drivers/staging/brcm80211/phy/wlc_phy_hal.h

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #ifndef _wlc_phy_h_
  18 #define _wlc_phy_h_
  19
  20 #include <typedefs.h>
  21 #include <wlioctl.h>
  22 #include <siutils.h>
  23 #include <d11.h>
  24 #include <wlc_phy_shim.h>
  25
  26 #define IDCODE_VER_MASK         0x0000000f
  27 #define IDCODE_VER_SHIFT        0
  28 #define IDCODE_MFG_MASK         0x00000fff
  29 #define IDCODE_MFG_SHIFT        0
  30 #define IDCODE_ID_MASK          0x0ffff000
  31 #define IDCODE_ID_SHIFT         12
  32 #define IDCODE_REV_MASK         0xf0000000
  33 #define IDCODE_REV_SHIFT        28
  34
  35 #define NORADIO_ID              0xe4f5
  36 #define NORADIO_IDCODE          0x4e4f5246
  37
  38 #define BCM2055_ID              0x2055
  39 #define BCM2055_IDCODE          0x02055000
  40 #define BCM2055A0_IDCODE        0x1205517f
  41
  42 #define BCM2056_ID              0x2056
  43 #define BCM2056_IDCODE          0x02056000
  44 #define BCM2056A0_IDCODE        0x1205617f
  45
  46 #define BCM2057_ID              0x2057
  47 #define BCM2057_IDCODE          0x02057000
  48 #define BCM2057A0_IDCODE        0x1205717f
  49
  50 #define BCM2064_ID              0x2064
  51 #define BCM2064_IDCODE          0x02064000
  52 #define BCM2064A0_IDCODE        0x0206417f
  53
  54 #define PHY_TPC_HW_OFF          FALSE
  55 #define PHY_TPC_HW_ON           TRUE
  56
  57 #define PHY_PERICAL_DRIVERUP    1
  58 #define PHY_PERICAL_WATCHDOG    2
  59 #define PHY_PERICAL_PHYINIT     3
  60 #define PHY_PERICAL_JOIN_BSS    4
  61 #define PHY_PERICAL_START_IBSS  5
  62 #define PHY_PERICAL_UP_BSS      6
  63 #define PHY_PERICAL_CHAN        7
  64 #define PHY_FULLCAL     8
  65
  66 #define PHY_PERICAL_DISABLE     0
  67 #define PHY_PERICAL_SPHASE      1
  68 #define PHY_PERICAL_MPHASE      2
  69 #define PHY_PERICAL_MANUAL      3
  70
  71 #define PHY_HOLD_FOR_ASSOC      1
  72 #define PHY_HOLD_FOR_SCAN       2
  73 #define PHY_HOLD_FOR_RM         4
  74 #define PHY_HOLD_FOR_PLT        8
  75 #define PHY_HOLD_FOR_MUTE       16
  76 #define PHY_HOLD_FOR_NOT_ASSOC 0x20
  77
  78 #define PHY_MUTE_FOR_PREISM     1
  79 #define PHY_MUTE_ALL            0xffffffff
  80
  81 #define PHY_NOISE_FIXED_VAL             (-95)
  82 #define PHY_NOISE_FIXED_VAL_NPHY        (-92)
  83 #define PHY_NOISE_FIXED_VAL_LCNPHY      (-92)
  84
  85 #define PHY_MODE_CAL            0x0002
  86 #define PHY_MODE_NOISEM         0x0004
  87
  88 #define WLC_TXPWR_DB_FACTOR     4
  89
  90 #define WLC_NUM_RATES_CCK           4
  91 #define WLC_NUM_RATES_OFDM          8
  92 #define WLC_NUM_RATES_MCS_1_STREAM  8
  93 #define WLC_NUM_RATES_MCS_2_STREAM  8
  94 #define WLC_NUM_RATES_MCS_3_STREAM  8
  95 #define WLC_NUM_RATES_MCS_4_STREAM  8
  96 typedef struct txpwr_limits {
  97         u8 cck[WLC_NUM_RATES_CCK];
  98         u8 ofdm[WLC_NUM_RATES_OFDM];
  99
 100         u8 ofdm_cdd[WLC_NUM_RATES_OFDM];
 101
 102         u8 ofdm_40_siso[WLC_NUM_RATES_OFDM];
 103         u8 ofdm_40_cdd[WLC_NUM_RATES_OFDM];
 104
 105         u8 mcs_20_siso[WLC_NUM_RATES_MCS_1_STREAM];
 106         u8 mcs_20_cdd[WLC_NUM_RATES_MCS_1_STREAM];
 107         u8 mcs_20_stbc[WLC_NUM_RATES_MCS_1_STREAM];
 108         u8 mcs_20_mimo[WLC_NUM_RATES_MCS_2_STREAM];
 109
 110         u8 mcs_40_siso[WLC_NUM_RATES_MCS_1_STREAM];
 111         u8 mcs_40_cdd[WLC_NUM_RATES_MCS_1_STREAM];
 112         u8 mcs_40_stbc[WLC_NUM_RATES_MCS_1_STREAM];
 113         u8 mcs_40_mimo[WLC_NUM_RATES_MCS_2_STREAM];
 114         u8 mcs32;
 115 } txpwr_limits_t;
 116
 117 typedef struct {
 118         u8 vec[MAXCHANNEL / NBBY];
 119 } chanvec_t;
 120
 121 struct rpc_info;
 122 typedef struct shared_phy shared_phy_t;
 123
 124 struct phy_pub;
 125
 126 #ifdef WLC_HIGH_ONLY
 127 typedef struct wlc_rpc_phy wlc_phy_t;
 128 #else
 129 typedef struct phy_pub wlc_phy_t;
 130 #endif
 131
 132 typedef struct shared_phy_params {
 133         void *osh;
 134         si_t *sih;
 135         void *physhim;
 136         uint unit;
 137         uint corerev;
 138         uint bustype;
 139         uint buscorerev;
 140         char *vars;
 141         uint16 vid;
 142         uint16 did;
 143         uint chip;
 144         uint chiprev;
 145         uint chippkg;
 146         uint sromrev;
 147         uint boardtype;
 148         uint boardrev;
 149         uint boardvendor;
 150         uint32 boardflags;
 151         uint32 boardflags2;
 152 } shared_phy_params_t;
 153
 154 #ifdef WLC_LOW
 155
 156 extern shared_phy_t *wlc_phy_shared_attach(shared_phy_params_t *shp);
 157 extern void wlc_phy_shared_detach(shared_phy_t *phy_sh);
 158 extern wlc_phy_t *wlc_phy_attach(shared_phy_t *sh, void *regs, int bandtype,
 159                                  char *vars);
 160 extern void wlc_phy_detach(wlc_phy_t *ppi);
 161
 162 extern bool wlc_phy_get_phyversion(wlc_phy_t *pih, uint16 *phytype,
 163                                    uint16 *phyrev, uint16 *radioid,
 164                                    uint16 *radiover);
 165 extern bool wlc_phy_get_encore(wlc_phy_t *pih);
 166 extern uint32 wlc_phy_get_coreflags(wlc_phy_t *pih);
 167
 168 extern void wlc_phy_hw_clk_state_upd(wlc_phy_t *ppi, bool newstate);
 169 extern void wlc_phy_hw_state_upd(wlc_phy_t *ppi, bool newstate);
 170 extern void wlc_phy_init(wlc_phy_t *ppi, chanspec_t chanspec);
 171 extern void wlc_phy_watchdog(wlc_phy_t *ppi);
 172 extern int wlc_phy_down(wlc_phy_t *ppi);
 173 extern uint32 wlc_phy_clk_bwbits(wlc_phy_t *pih);
 174 extern void wlc_phy_cal_init(wlc_phy_t *ppi);
 175 extern void wlc_phy_antsel_init(wlc_phy_t *ppi, bool lut_init);
 176
 177 extern void wlc_phy_chanspec_set(wlc_phy_t *ppi, chanspec_t chanspec);
 178 extern chanspec_t wlc_phy_chanspec_get(wlc_phy_t *ppi);
 179 extern void wlc_phy_chanspec_radio_set(wlc_phy_t *ppi, chanspec_t newch);
 180 extern uint16 wlc_phy_bw_state_get(wlc_phy_t *ppi);
 181 extern void wlc_phy_bw_state_set(wlc_phy_t *ppi, uint16 bw);
 182
 183 extern void wlc_phy_rssi_compute(wlc_phy_t *pih, void *ctx);
 184 extern void wlc_phy_por_inform(wlc_phy_t *ppi);
 185 extern void wlc_phy_noise_sample_intr(wlc_phy_t *ppi);
 186 extern bool wlc_phy_bist_check_phy(wlc_phy_t *ppi);
 187
 188 extern void wlc_phy_set_deaf(wlc_phy_t *ppi, bool user_flag);
 189
 190 extern void wlc_phy_switch_radio(wlc_phy_t *ppi, bool on);
 191 extern void wlc_phy_anacore(wlc_phy_t *ppi, bool on);
 192
 193 #endif                          /* WLC_LOW */
 194
 195 extern void wlc_phy_BSSinit(wlc_phy_t *ppi, bool bonlyap, int rssi);
 196
 197 extern void wlc_phy_chanspec_ch14_widefilter_set(wlc_phy_t *ppi,
 198                                                  bool wide_filter);
 199 extern void wlc_phy_chanspec_band_validch(wlc_phy_t *ppi, uint band,
 200                                           chanvec_t *channels);
 201 extern chanspec_t wlc_phy_chanspec_band_firstch(wlc_phy_t *ppi, uint band);
 202
 203 extern void wlc_phy_txpower_sromlimit(wlc_phy_t *ppi, uint chan,
 204                                       u8 *_min_, u8 *_max_, int rate);
 205 extern void wlc_phy_txpower_sromlimit_max_get(wlc_phy_t *ppi, uint chan,
 206                                               u8 *_max_, u8 *_min_);
 207 extern void wlc_phy_txpower_boardlimit_band(wlc_phy_t *ppi, uint band, int32 *,
 208                                             int32 *, uint32 *);
 209 extern void wlc_phy_txpower_limit_set(wlc_phy_t *ppi, struct txpwr_limits *,
 210                                       chanspec_t chanspec);
 211 extern int wlc_phy_txpower_get(wlc_phy_t *ppi, uint *qdbm, bool *override);
 212 extern int wlc_phy_txpower_set(wlc_phy_t *ppi, uint qdbm, bool override);
 213 extern void wlc_phy_txpower_target_set(wlc_phy_t *ppi, struct txpwr_limits *);
 214 extern bool wlc_phy_txpower_hw_ctrl_get(wlc_phy_t *ppi);
 215 extern void wlc_phy_txpower_hw_ctrl_set(wlc_phy_t *ppi, bool hwpwrctrl);
 216 extern u8 wlc_phy_txpower_get_target_min(wlc_phy_t *ppi);
 217 extern u8 wlc_phy_txpower_get_target_max(wlc_phy_t *ppi);
 218 extern bool wlc_phy_txpower_ipa_ison(wlc_phy_t *pih);
 219
 220 extern void wlc_phy_stf_chain_init(wlc_phy_t *pih, u8 txchain,
 221                                    u8 rxchain);
 222 extern void wlc_phy_stf_chain_set(wlc_phy_t *pih, u8 txchain,
 223                                   u8 rxchain);
 224 extern void wlc_phy_stf_chain_get(wlc_phy_t *pih, u8 *txchain,
 225                                   u8 *rxchain);
 226 extern u8 wlc_phy_stf_chain_active_get(wlc_phy_t *pih);
 227 extern s8 wlc_phy_stf_ssmode_get(wlc_phy_t *pih, chanspec_t chanspec);
 228 extern void wlc_phy_ldpc_override_set(wlc_phy_t *ppi, bool val);
 229
 230 extern void wlc_phy_cal_perical(wlc_phy_t *ppi, u8 reason);
 231 extern void wlc_phy_noise_sample_request_external(wlc_phy_t *ppi);
 232 extern void wlc_phy_edcrs_lock(wlc_phy_t *pih, bool lock);
 233 extern void wlc_phy_cal_papd_recal(wlc_phy_t *ppi);
 234
 235 extern void wlc_phy_ant_rxdiv_set(wlc_phy_t *ppi, u8 val);
 236 extern bool wlc_phy_ant_rxdiv_get(wlc_phy_t *ppi, u8 *pval);
 237 extern void wlc_phy_clear_tssi(wlc_phy_t *ppi);
 238 extern void wlc_phy_hold_upd(wlc_phy_t *ppi, mbool id, bool val);
 239 extern void wlc_phy_mute_upd(wlc_phy_t *ppi, bool val, mbool flags);
 240
 241 extern void wlc_phy_antsel_type_set(wlc_phy_t *ppi, u8 antsel_type);
 242
 243 extern void wlc_phy_txpower_get_current(wlc_phy_t *ppi, tx_power_t *power,
 244                                         uint channel);
 245
 246 extern void wlc_phy_initcal_enable(wlc_phy_t *pih, bool initcal);
 247 extern bool wlc_phy_test_ison(wlc_phy_t *ppi);
 248 extern void wlc_phy_txpwr_percent_set(wlc_phy_t *ppi, u8 txpwr_percent);
 249 extern void wlc_phy_ofdm_rateset_war(wlc_phy_t *pih, bool war);
 250 extern void wlc_phy_bf_preempt_enable(wlc_phy_t *pih, bool bf_preempt);
 251 extern void wlc_phy_machwcap_set(wlc_phy_t *ppi, uint32 machwcap);
 252
 253 extern void wlc_phy_runbist_config(wlc_phy_t *ppi, bool start_end);
 254
 255 extern void wlc_phy_freqtrack_start(wlc_phy_t *ppi);
 256 extern void wlc_phy_freqtrack_end(wlc_phy_t *ppi);
 257
 258 extern const u8 *wlc_phy_get_ofdm_rate_lookup(void);
 259
 260 extern s8 wlc_phy_get_tx_power_offset_by_mcs(wlc_phy_t *ppi,
 261                                                u8 mcs_offset);
 262 extern s8 wlc_phy_get_tx_power_offset(wlc_phy_t *ppi, u8 tbl_offset);
 263 #endif                          /* _wlc_phy_h_ */