x86, olpc: Constify an olpc_ofw() arg
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / rtc / rtc-ds1307.c
blobde033b7ac21f68e67b423d711d998c06604fd90f
1 /*
2 * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
4 * Copyright (C) 2005 James Chapman (ds1337 core)
5 * Copyright (C) 2006 David Brownell
6 * Copyright (C) 2009 Matthias Fuchs (rx8025 support)
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/slab.h>
16 #include <linux/i2c.h>
17 #include <linux/string.h>
18 #include <linux/rtc.h>
19 #include <linux/bcd.h>
23 /* We can't determine type by probing, but if we expect pre-Linux code
24 * to have set the chip up as a clock (turning on the oscillator and
25 * setting the date and time), Linux can ignore the non-clock features.
26 * That's a natural job for a factory or repair bench.
28 enum ds_type {
29 ds_1307,
30 ds_1337,
31 ds_1338,
32 ds_1339,
33 ds_1340,
34 ds_1388,
35 ds_3231,
36 m41t00,
37 rx_8025,
38 // rs5c372 too? different address...
42 /* RTC registers don't differ much, except for the century flag */
43 #define DS1307_REG_SECS 0x00 /* 00-59 */
44 # define DS1307_BIT_CH 0x80
45 # define DS1340_BIT_nEOSC 0x80
46 #define DS1307_REG_MIN 0x01 /* 00-59 */
47 #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */
48 # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */
49 # define DS1307_BIT_PM 0x20 /* in REG_HOUR */
50 # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */
51 # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */
52 #define DS1307_REG_WDAY 0x03 /* 01-07 */
53 #define DS1307_REG_MDAY 0x04 /* 01-31 */
54 #define DS1307_REG_MONTH 0x05 /* 01-12 */
55 # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */
56 #define DS1307_REG_YEAR 0x06 /* 00-99 */
58 /* Other registers (control, status, alarms, trickle charge, NVRAM, etc)
59 * start at 7, and they differ a LOT. Only control and status matter for
60 * basic RTC date and time functionality; be careful using them.
62 #define DS1307_REG_CONTROL 0x07 /* or ds1338 */
63 # define DS1307_BIT_OUT 0x80
64 # define DS1338_BIT_OSF 0x20
65 # define DS1307_BIT_SQWE 0x10
66 # define DS1307_BIT_RS1 0x02
67 # define DS1307_BIT_RS0 0x01
68 #define DS1337_REG_CONTROL 0x0e
69 # define DS1337_BIT_nEOSC 0x80
70 # define DS1339_BIT_BBSQI 0x20
71 # define DS3231_BIT_BBSQW 0x40 /* same as BBSQI */
72 # define DS1337_BIT_RS2 0x10
73 # define DS1337_BIT_RS1 0x08
74 # define DS1337_BIT_INTCN 0x04
75 # define DS1337_BIT_A2IE 0x02
76 # define DS1337_BIT_A1IE 0x01
77 #define DS1340_REG_CONTROL 0x07
78 # define DS1340_BIT_OUT 0x80
79 # define DS1340_BIT_FT 0x40
80 # define DS1340_BIT_CALIB_SIGN 0x20
81 # define DS1340_M_CALIBRATION 0x1f
82 #define DS1340_REG_FLAG 0x09
83 # define DS1340_BIT_OSF 0x80
84 #define DS1337_REG_STATUS 0x0f
85 # define DS1337_BIT_OSF 0x80
86 # define DS1337_BIT_A2I 0x02
87 # define DS1337_BIT_A1I 0x01
88 #define DS1339_REG_ALARM1_SECS 0x07
89 #define DS1339_REG_TRICKLE 0x10
91 #define RX8025_REG_CTRL1 0x0e
92 # define RX8025_BIT_2412 0x20
93 #define RX8025_REG_CTRL2 0x0f
94 # define RX8025_BIT_PON 0x10
95 # define RX8025_BIT_VDET 0x40
96 # define RX8025_BIT_XST 0x20
99 struct ds1307 {
100 u8 offset; /* register's offset */
101 u8 regs[11];
102 enum ds_type type;
103 unsigned long flags;
104 #define HAS_NVRAM 0 /* bit 0 == sysfs file active */
105 #define HAS_ALARM 1 /* bit 1 == irq claimed */
106 struct i2c_client *client;
107 struct rtc_device *rtc;
108 struct work_struct work;
109 s32 (*read_block_data)(struct i2c_client *client, u8 command,
110 u8 length, u8 *values);
111 s32 (*write_block_data)(struct i2c_client *client, u8 command,
112 u8 length, const u8 *values);
115 struct chip_desc {
116 unsigned nvram56:1;
117 unsigned alarm:1;
120 static const struct chip_desc chips[] = {
121 [ds_1307] = {
122 .nvram56 = 1,
124 [ds_1337] = {
125 .alarm = 1,
127 [ds_1338] = {
128 .nvram56 = 1,
130 [ds_1339] = {
131 .alarm = 1,
133 [ds_1340] = {
135 [ds_3231] = {
136 .alarm = 1,
138 [m41t00] = {
140 [rx_8025] = {
141 }, };
143 static const struct i2c_device_id ds1307_id[] = {
144 { "ds1307", ds_1307 },
145 { "ds1337", ds_1337 },
146 { "ds1338", ds_1338 },
147 { "ds1339", ds_1339 },
148 { "ds1388", ds_1388 },
149 { "ds1340", ds_1340 },
150 { "ds3231", ds_3231 },
151 { "m41t00", m41t00 },
152 { "rx8025", rx_8025 },
155 MODULE_DEVICE_TABLE(i2c, ds1307_id);
157 /*----------------------------------------------------------------------*/
159 #define BLOCK_DATA_MAX_TRIES 10
161 static s32 ds1307_read_block_data_once(struct i2c_client *client, u8 command,
162 u8 length, u8 *values)
164 s32 i, data;
166 for (i = 0; i < length; i++) {
167 data = i2c_smbus_read_byte_data(client, command + i);
168 if (data < 0)
169 return data;
170 values[i] = data;
172 return i;
175 static s32 ds1307_read_block_data(struct i2c_client *client, u8 command,
176 u8 length, u8 *values)
178 u8 oldvalues[I2C_SMBUS_BLOCK_MAX];
179 s32 ret;
180 int tries = 0;
182 dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length);
183 ret = ds1307_read_block_data_once(client, command, length, values);
184 if (ret < 0)
185 return ret;
186 do {
187 if (++tries > BLOCK_DATA_MAX_TRIES) {
188 dev_err(&client->dev,
189 "ds1307_read_block_data failed\n");
190 return -EIO;
192 memcpy(oldvalues, values, length);
193 ret = ds1307_read_block_data_once(client, command, length,
194 values);
195 if (ret < 0)
196 return ret;
197 } while (memcmp(oldvalues, values, length));
198 return length;
201 static s32 ds1307_write_block_data(struct i2c_client *client, u8 command,
202 u8 length, const u8 *values)
204 u8 currvalues[I2C_SMBUS_BLOCK_MAX];
205 int tries = 0;
207 dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length);
208 do {
209 s32 i, ret;
211 if (++tries > BLOCK_DATA_MAX_TRIES) {
212 dev_err(&client->dev,
213 "ds1307_write_block_data failed\n");
214 return -EIO;
216 for (i = 0; i < length; i++) {
217 ret = i2c_smbus_write_byte_data(client, command + i,
218 values[i]);
219 if (ret < 0)
220 return ret;
222 ret = ds1307_read_block_data_once(client, command, length,
223 currvalues);
224 if (ret < 0)
225 return ret;
226 } while (memcmp(currvalues, values, length));
227 return length;
230 /*----------------------------------------------------------------------*/
233 * The IRQ logic includes a "real" handler running in IRQ context just
234 * long enough to schedule this workqueue entry. We need a task context
235 * to talk to the RTC, since I2C I/O calls require that; and disable the
236 * IRQ until we clear its status on the chip, so that this handler can
237 * work with any type of triggering (not just falling edge).
239 * The ds1337 and ds1339 both have two alarms, but we only use the first
240 * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm
241 * signal; ds1339 chips have only one alarm signal.
243 static void ds1307_work(struct work_struct *work)
245 struct ds1307 *ds1307;
246 struct i2c_client *client;
247 struct mutex *lock;
248 int stat, control;
250 ds1307 = container_of(work, struct ds1307, work);
251 client = ds1307->client;
252 lock = &ds1307->rtc->ops_lock;
254 mutex_lock(lock);
255 stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
256 if (stat < 0)
257 goto out;
259 if (stat & DS1337_BIT_A1I) {
260 stat &= ~DS1337_BIT_A1I;
261 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat);
263 control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
264 if (control < 0)
265 goto out;
267 control &= ~DS1337_BIT_A1IE;
268 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
270 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
273 out:
274 if (test_bit(HAS_ALARM, &ds1307->flags))
275 enable_irq(client->irq);
276 mutex_unlock(lock);
279 static irqreturn_t ds1307_irq(int irq, void *dev_id)
281 struct i2c_client *client = dev_id;
282 struct ds1307 *ds1307 = i2c_get_clientdata(client);
284 disable_irq_nosync(irq);
285 schedule_work(&ds1307->work);
286 return IRQ_HANDLED;
289 /*----------------------------------------------------------------------*/
291 static int ds1307_get_time(struct device *dev, struct rtc_time *t)
293 struct ds1307 *ds1307 = dev_get_drvdata(dev);
294 int tmp;
296 /* read the RTC date and time registers all at once */
297 tmp = ds1307->read_block_data(ds1307->client,
298 ds1307->offset, 7, ds1307->regs);
299 if (tmp != 7) {
300 dev_err(dev, "%s error %d\n", "read", tmp);
301 return -EIO;
304 dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n",
305 "read",
306 ds1307->regs[0], ds1307->regs[1],
307 ds1307->regs[2], ds1307->regs[3],
308 ds1307->regs[4], ds1307->regs[5],
309 ds1307->regs[6]);
311 t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f);
312 t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f);
313 tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
314 t->tm_hour = bcd2bin(tmp);
315 t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
316 t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
317 tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
318 t->tm_mon = bcd2bin(tmp) - 1;
320 /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */
321 t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100;
323 dev_dbg(dev, "%s secs=%d, mins=%d, "
324 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
325 "read", t->tm_sec, t->tm_min,
326 t->tm_hour, t->tm_mday,
327 t->tm_mon, t->tm_year, t->tm_wday);
329 /* initial clock setting can be undefined */
330 return rtc_valid_tm(t);
333 static int ds1307_set_time(struct device *dev, struct rtc_time *t)
335 struct ds1307 *ds1307 = dev_get_drvdata(dev);
336 int result;
337 int tmp;
338 u8 *buf = ds1307->regs;
340 dev_dbg(dev, "%s secs=%d, mins=%d, "
341 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
342 "write", t->tm_sec, t->tm_min,
343 t->tm_hour, t->tm_mday,
344 t->tm_mon, t->tm_year, t->tm_wday);
346 buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
347 buf[DS1307_REG_MIN] = bin2bcd(t->tm_min);
348 buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
349 buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
350 buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
351 buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
353 /* assume 20YY not 19YY */
354 tmp = t->tm_year - 100;
355 buf[DS1307_REG_YEAR] = bin2bcd(tmp);
357 switch (ds1307->type) {
358 case ds_1337:
359 case ds_1339:
360 case ds_3231:
361 buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY;
362 break;
363 case ds_1340:
364 buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN
365 | DS1340_BIT_CENTURY;
366 break;
367 default:
368 break;
371 dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n",
372 "write", buf[0], buf[1], buf[2], buf[3],
373 buf[4], buf[5], buf[6]);
375 result = ds1307->write_block_data(ds1307->client,
376 ds1307->offset, 7, buf);
377 if (result < 0) {
378 dev_err(dev, "%s error %d\n", "write", result);
379 return result;
381 return 0;
384 static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
386 struct i2c_client *client = to_i2c_client(dev);
387 struct ds1307 *ds1307 = i2c_get_clientdata(client);
388 int ret;
390 if (!test_bit(HAS_ALARM, &ds1307->flags))
391 return -EINVAL;
393 /* read all ALARM1, ALARM2, and status registers at once */
394 ret = ds1307->read_block_data(client,
395 DS1339_REG_ALARM1_SECS, 9, ds1307->regs);
396 if (ret != 9) {
397 dev_err(dev, "%s error %d\n", "alarm read", ret);
398 return -EIO;
401 dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
402 "alarm read",
403 ds1307->regs[0], ds1307->regs[1],
404 ds1307->regs[2], ds1307->regs[3],
405 ds1307->regs[4], ds1307->regs[5],
406 ds1307->regs[6], ds1307->regs[7],
407 ds1307->regs[8]);
409 /* report alarm time (ALARM1); assume 24 hour and day-of-month modes,
410 * and that all four fields are checked matches
412 t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
413 t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
414 t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
415 t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
416 t->time.tm_mon = -1;
417 t->time.tm_year = -1;
418 t->time.tm_wday = -1;
419 t->time.tm_yday = -1;
420 t->time.tm_isdst = -1;
422 /* ... and status */
423 t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
424 t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
426 dev_dbg(dev, "%s secs=%d, mins=%d, "
427 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
428 "alarm read", t->time.tm_sec, t->time.tm_min,
429 t->time.tm_hour, t->time.tm_mday,
430 t->enabled, t->pending);
432 return 0;
435 static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
437 struct i2c_client *client = to_i2c_client(dev);
438 struct ds1307 *ds1307 = i2c_get_clientdata(client);
439 unsigned char *buf = ds1307->regs;
440 u8 control, status;
441 int ret;
443 if (!test_bit(HAS_ALARM, &ds1307->flags))
444 return -EINVAL;
446 dev_dbg(dev, "%s secs=%d, mins=%d, "
447 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
448 "alarm set", t->time.tm_sec, t->time.tm_min,
449 t->time.tm_hour, t->time.tm_mday,
450 t->enabled, t->pending);
452 /* read current status of both alarms and the chip */
453 ret = ds1307->read_block_data(client,
454 DS1339_REG_ALARM1_SECS, 9, buf);
455 if (ret != 9) {
456 dev_err(dev, "%s error %d\n", "alarm write", ret);
457 return -EIO;
459 control = ds1307->regs[7];
460 status = ds1307->regs[8];
462 dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
463 "alarm set (old status)",
464 ds1307->regs[0], ds1307->regs[1],
465 ds1307->regs[2], ds1307->regs[3],
466 ds1307->regs[4], ds1307->regs[5],
467 ds1307->regs[6], control, status);
469 /* set ALARM1, using 24 hour and day-of-month modes */
470 buf[0] = bin2bcd(t->time.tm_sec);
471 buf[1] = bin2bcd(t->time.tm_min);
472 buf[2] = bin2bcd(t->time.tm_hour);
473 buf[3] = bin2bcd(t->time.tm_mday);
475 /* set ALARM2 to non-garbage */
476 buf[4] = 0;
477 buf[5] = 0;
478 buf[6] = 0;
480 /* optionally enable ALARM1 */
481 buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
482 if (t->enabled) {
483 dev_dbg(dev, "alarm IRQ armed\n");
484 buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
486 buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
488 ret = ds1307->write_block_data(client,
489 DS1339_REG_ALARM1_SECS, 9, buf);
490 if (ret < 0) {
491 dev_err(dev, "can't set alarm time\n");
492 return ret;
495 return 0;
498 static int ds1307_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
500 struct i2c_client *client = to_i2c_client(dev);
501 struct ds1307 *ds1307 = i2c_get_clientdata(client);
502 int ret;
504 switch (cmd) {
505 case RTC_AIE_OFF:
506 if (!test_bit(HAS_ALARM, &ds1307->flags))
507 return -ENOTTY;
509 ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
510 if (ret < 0)
511 return ret;
513 ret &= ~DS1337_BIT_A1IE;
515 ret = i2c_smbus_write_byte_data(client,
516 DS1337_REG_CONTROL, ret);
517 if (ret < 0)
518 return ret;
520 break;
522 case RTC_AIE_ON:
523 if (!test_bit(HAS_ALARM, &ds1307->flags))
524 return -ENOTTY;
526 ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
527 if (ret < 0)
528 return ret;
530 ret |= DS1337_BIT_A1IE;
532 ret = i2c_smbus_write_byte_data(client,
533 DS1337_REG_CONTROL, ret);
534 if (ret < 0)
535 return ret;
537 break;
539 default:
540 return -ENOIOCTLCMD;
543 return 0;
546 static const struct rtc_class_ops ds13xx_rtc_ops = {
547 .read_time = ds1307_get_time,
548 .set_time = ds1307_set_time,
549 .read_alarm = ds1337_read_alarm,
550 .set_alarm = ds1337_set_alarm,
551 .ioctl = ds1307_ioctl,
554 /*----------------------------------------------------------------------*/
556 #define NVRAM_SIZE 56
558 static ssize_t
559 ds1307_nvram_read(struct file *filp, struct kobject *kobj,
560 struct bin_attribute *attr,
561 char *buf, loff_t off, size_t count)
563 struct i2c_client *client;
564 struct ds1307 *ds1307;
565 int result;
567 client = kobj_to_i2c_client(kobj);
568 ds1307 = i2c_get_clientdata(client);
570 if (unlikely(off >= NVRAM_SIZE))
571 return 0;
572 if ((off + count) > NVRAM_SIZE)
573 count = NVRAM_SIZE - off;
574 if (unlikely(!count))
575 return count;
577 result = ds1307->read_block_data(client, 8 + off, count, buf);
578 if (result < 0)
579 dev_err(&client->dev, "%s error %d\n", "nvram read", result);
580 return result;
583 static ssize_t
584 ds1307_nvram_write(struct file *filp, struct kobject *kobj,
585 struct bin_attribute *attr,
586 char *buf, loff_t off, size_t count)
588 struct i2c_client *client;
589 struct ds1307 *ds1307;
590 int result;
592 client = kobj_to_i2c_client(kobj);
593 ds1307 = i2c_get_clientdata(client);
595 if (unlikely(off >= NVRAM_SIZE))
596 return -EFBIG;
597 if ((off + count) > NVRAM_SIZE)
598 count = NVRAM_SIZE - off;
599 if (unlikely(!count))
600 return count;
602 result = ds1307->write_block_data(client, 8 + off, count, buf);
603 if (result < 0) {
604 dev_err(&client->dev, "%s error %d\n", "nvram write", result);
605 return result;
607 return count;
610 static struct bin_attribute nvram = {
611 .attr = {
612 .name = "nvram",
613 .mode = S_IRUGO | S_IWUSR,
616 .read = ds1307_nvram_read,
617 .write = ds1307_nvram_write,
618 .size = NVRAM_SIZE,
621 /*----------------------------------------------------------------------*/
623 static struct i2c_driver ds1307_driver;
625 static int __devinit ds1307_probe(struct i2c_client *client,
626 const struct i2c_device_id *id)
628 struct ds1307 *ds1307;
629 int err = -ENODEV;
630 int tmp;
631 const struct chip_desc *chip = &chips[id->driver_data];
632 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
633 int want_irq = false;
634 unsigned char *buf;
635 static const int bbsqi_bitpos[] = {
636 [ds_1337] = 0,
637 [ds_1339] = DS1339_BIT_BBSQI,
638 [ds_3231] = DS3231_BIT_BBSQW,
641 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)
642 && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
643 return -EIO;
645 if (!(ds1307 = kzalloc(sizeof(struct ds1307), GFP_KERNEL)))
646 return -ENOMEM;
648 i2c_set_clientdata(client, ds1307);
650 ds1307->client = client;
651 ds1307->type = id->driver_data;
652 ds1307->offset = 0;
654 buf = ds1307->regs;
655 if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
656 ds1307->read_block_data = i2c_smbus_read_i2c_block_data;
657 ds1307->write_block_data = i2c_smbus_write_i2c_block_data;
658 } else {
659 ds1307->read_block_data = ds1307_read_block_data;
660 ds1307->write_block_data = ds1307_write_block_data;
663 switch (ds1307->type) {
664 case ds_1337:
665 case ds_1339:
666 case ds_3231:
667 /* has IRQ? */
668 if (ds1307->client->irq > 0 && chip->alarm) {
669 INIT_WORK(&ds1307->work, ds1307_work);
670 want_irq = true;
672 /* get registers that the "rtc" read below won't read... */
673 tmp = ds1307->read_block_data(ds1307->client,
674 DS1337_REG_CONTROL, 2, buf);
675 if (tmp != 2) {
676 pr_debug("read error %d\n", tmp);
677 err = -EIO;
678 goto exit_free;
681 /* oscillator off? turn it on, so clock can tick. */
682 if (ds1307->regs[0] & DS1337_BIT_nEOSC)
683 ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
685 /* Using IRQ? Disable the square wave and both alarms.
686 * For some variants, be sure alarms can trigger when we're
687 * running on Vbackup (BBSQI/BBSQW)
689 if (want_irq) {
690 ds1307->regs[0] |= DS1337_BIT_INTCN
691 | bbsqi_bitpos[ds1307->type];
692 ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
695 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
696 ds1307->regs[0]);
698 /* oscillator fault? clear flag, and warn */
699 if (ds1307->regs[1] & DS1337_BIT_OSF) {
700 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS,
701 ds1307->regs[1] & ~DS1337_BIT_OSF);
702 dev_warn(&client->dev, "SET TIME!\n");
704 break;
706 case rx_8025:
707 tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
708 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
709 if (tmp != 2) {
710 pr_debug("read error %d\n", tmp);
711 err = -EIO;
712 goto exit_free;
715 /* oscillator off? turn it on, so clock can tick. */
716 if (!(ds1307->regs[1] & RX8025_BIT_XST)) {
717 ds1307->regs[1] |= RX8025_BIT_XST;
718 i2c_smbus_write_byte_data(client,
719 RX8025_REG_CTRL2 << 4 | 0x08,
720 ds1307->regs[1]);
721 dev_warn(&client->dev,
722 "oscillator stop detected - SET TIME!\n");
725 if (ds1307->regs[1] & RX8025_BIT_PON) {
726 ds1307->regs[1] &= ~RX8025_BIT_PON;
727 i2c_smbus_write_byte_data(client,
728 RX8025_REG_CTRL2 << 4 | 0x08,
729 ds1307->regs[1]);
730 dev_warn(&client->dev, "power-on detected\n");
733 if (ds1307->regs[1] & RX8025_BIT_VDET) {
734 ds1307->regs[1] &= ~RX8025_BIT_VDET;
735 i2c_smbus_write_byte_data(client,
736 RX8025_REG_CTRL2 << 4 | 0x08,
737 ds1307->regs[1]);
738 dev_warn(&client->dev, "voltage drop detected\n");
741 /* make sure we are running in 24hour mode */
742 if (!(ds1307->regs[0] & RX8025_BIT_2412)) {
743 u8 hour;
745 /* switch to 24 hour mode */
746 i2c_smbus_write_byte_data(client,
747 RX8025_REG_CTRL1 << 4 | 0x08,
748 ds1307->regs[0] |
749 RX8025_BIT_2412);
751 tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
752 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
753 if (tmp != 2) {
754 pr_debug("read error %d\n", tmp);
755 err = -EIO;
756 goto exit_free;
759 /* correct hour */
760 hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]);
761 if (hour == 12)
762 hour = 0;
763 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
764 hour += 12;
766 i2c_smbus_write_byte_data(client,
767 DS1307_REG_HOUR << 4 | 0x08,
768 hour);
770 break;
771 case ds_1388:
772 ds1307->offset = 1; /* Seconds starts at 1 */
773 break;
774 default:
775 break;
778 read_rtc:
779 /* read RTC registers */
780 tmp = ds1307->read_block_data(ds1307->client, 0, 8, buf);
781 if (tmp != 8) {
782 pr_debug("read error %d\n", tmp);
783 err = -EIO;
784 goto exit_free;
787 /* minimal sanity checking; some chips (like DS1340) don't
788 * specify the extra bits as must-be-zero, but there are
789 * still a few values that are clearly out-of-range.
791 tmp = ds1307->regs[DS1307_REG_SECS];
792 switch (ds1307->type) {
793 case ds_1307:
794 case m41t00:
795 /* clock halted? turn it on, so clock can tick. */
796 if (tmp & DS1307_BIT_CH) {
797 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
798 dev_warn(&client->dev, "SET TIME!\n");
799 goto read_rtc;
801 break;
802 case ds_1338:
803 /* clock halted? turn it on, so clock can tick. */
804 if (tmp & DS1307_BIT_CH)
805 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
807 /* oscillator fault? clear flag, and warn */
808 if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
809 i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL,
810 ds1307->regs[DS1307_REG_CONTROL]
811 & ~DS1338_BIT_OSF);
812 dev_warn(&client->dev, "SET TIME!\n");
813 goto read_rtc;
815 break;
816 case ds_1340:
817 /* clock halted? turn it on, so clock can tick. */
818 if (tmp & DS1340_BIT_nEOSC)
819 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
821 tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG);
822 if (tmp < 0) {
823 pr_debug("read error %d\n", tmp);
824 err = -EIO;
825 goto exit_free;
828 /* oscillator fault? clear flag, and warn */
829 if (tmp & DS1340_BIT_OSF) {
830 i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0);
831 dev_warn(&client->dev, "SET TIME!\n");
833 break;
834 case rx_8025:
835 case ds_1337:
836 case ds_1339:
837 case ds_1388:
838 case ds_3231:
839 break;
842 tmp = ds1307->regs[DS1307_REG_HOUR];
843 switch (ds1307->type) {
844 case ds_1340:
845 case m41t00:
846 /* NOTE: ignores century bits; fix before deploying
847 * systems that will run through year 2100.
849 break;
850 case rx_8025:
851 break;
852 default:
853 if (!(tmp & DS1307_BIT_12HR))
854 break;
856 /* Be sure we're in 24 hour mode. Multi-master systems
857 * take note...
859 tmp = bcd2bin(tmp & 0x1f);
860 if (tmp == 12)
861 tmp = 0;
862 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
863 tmp += 12;
864 i2c_smbus_write_byte_data(client,
865 DS1307_REG_HOUR,
866 bin2bcd(tmp));
869 ds1307->rtc = rtc_device_register(client->name, &client->dev,
870 &ds13xx_rtc_ops, THIS_MODULE);
871 if (IS_ERR(ds1307->rtc)) {
872 err = PTR_ERR(ds1307->rtc);
873 dev_err(&client->dev,
874 "unable to register the class device\n");
875 goto exit_free;
878 if (want_irq) {
879 err = request_irq(client->irq, ds1307_irq, IRQF_SHARED,
880 ds1307->rtc->name, client);
881 if (err) {
882 dev_err(&client->dev,
883 "unable to request IRQ!\n");
884 goto exit_irq;
887 device_set_wakeup_capable(&client->dev, 1);
888 set_bit(HAS_ALARM, &ds1307->flags);
889 dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
892 if (chip->nvram56) {
893 err = sysfs_create_bin_file(&client->dev.kobj, &nvram);
894 if (err == 0) {
895 set_bit(HAS_NVRAM, &ds1307->flags);
896 dev_info(&client->dev, "56 bytes nvram\n");
900 return 0;
902 exit_irq:
903 rtc_device_unregister(ds1307->rtc);
904 exit_free:
905 kfree(ds1307);
906 return err;
909 static int __devexit ds1307_remove(struct i2c_client *client)
911 struct ds1307 *ds1307 = i2c_get_clientdata(client);
913 if (test_and_clear_bit(HAS_ALARM, &ds1307->flags)) {
914 free_irq(client->irq, client);
915 cancel_work_sync(&ds1307->work);
918 if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags))
919 sysfs_remove_bin_file(&client->dev.kobj, &nvram);
921 rtc_device_unregister(ds1307->rtc);
922 kfree(ds1307);
923 return 0;
926 static struct i2c_driver ds1307_driver = {
927 .driver = {
928 .name = "rtc-ds1307",
929 .owner = THIS_MODULE,
931 .probe = ds1307_probe,
932 .remove = __devexit_p(ds1307_remove),
933 .id_table = ds1307_id,
936 static int __init ds1307_init(void)
938 return i2c_add_driver(&ds1307_driver);
940 module_init(ds1307_init);
942 static void __exit ds1307_exit(void)
944 i2c_del_driver(&ds1307_driver);
946 module_exit(ds1307_exit);
948 MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
949 MODULE_LICENSE("GPL");