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USB: gadget: Add test mode support for ci13xxx_udc
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / usb / gadget / ci13xxx_udc.c
blobe09178bc1450a54b46a9a12ab68abd6a96ba2b2d
1 /*
2 * ci13xxx_udc.c - MIPS USB IP core family device controller
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 /*
14 * Description: MIPS USB IP core family device controller
15 * Currently it only supports IP part number CI13412
16 *
17 * This driver is composed of several blocks:
18 * - HW: hardware interface
19 * - DBG: debug facilities (optional)
20 * - UTIL: utilities
21 * - ISR: interrupts handling
22 * - ENDPT: endpoint operations (Gadget API)
23 * - GADGET: gadget operations (Gadget API)
24 * - BUS: bus glue code, bus abstraction layer
25 *
26 * Compile Options
27 * - CONFIG_USB_GADGET_DEBUG_FILES: enable debug facilities
28 * - STALL_IN: non-empty bulk-in pipes cannot be halted
29 * if defined mass storage compliance succeeds but with warnings
30 * => case 4: Hi > Dn
31 * => case 5: Hi > Di
32 * => case 8: Hi <> Do
33 * if undefined usbtest 13 fails
34 * - TRACE: enable function tracing (depends on DEBUG)
35 *
36 * Main Features
37 * - Chapter 9 & Mass Storage Compliance with Gadget File Storage
38 * - Chapter 9 Compliance with Gadget Zero (STALL_IN undefined)
39 * - Normal & LPM support
40 *
41 * USBTEST Report
42 * - OK: 0-12, 13 (STALL_IN defined) & 14
43 * - Not Supported: 15 & 16 (ISO)
44 *
45 * TODO List
46 * - OTG
47 * - Isochronous & Interrupt Traffic
48 * - Handle requests which spawns into several TDs
49 * - GET_STATUS(device) - always reports 0
50 * - Gadget API (majority of optional features)
51 * - Suspend & Remote Wakeup
52 */
53 #include <linux/delay.h>
54 #include <linux/device.h>
55 #include <linux/dmapool.h>
56 #include <linux/dma-mapping.h>
57 #include <linux/init.h>
58 #include <linux/interrupt.h>
59 #include <linux/io.h>
60 #include <linux/irq.h>
61 #include <linux/kernel.h>
62 #include <linux/slab.h>
63 #include <linux/pm_runtime.h>
64 #include <linux/usb/ch9.h>
65 #include <linux/usb/gadget.h>
66 #include <linux/usb/otg.h>
67
68 #include "ci13xxx_udc.h"
69
70
71 /******************************************************************************
72 * DEFINE
73 *****************************************************************************/
74 /* ctrl register bank access */
75 static DEFINE_SPINLOCK(udc_lock);
76
77 /* control endpoint description */
78 static const struct usb_endpoint_descriptor
79 ctrl_endpt_out_desc = {
80 .bLength = USB_DT_ENDPOINT_SIZE,
81 .bDescriptorType = USB_DT_ENDPOINT,
82
83 .bEndpointAddress = USB_DIR_OUT,
84 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
85 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
86 };
87
88 static const struct usb_endpoint_descriptor
89 ctrl_endpt_in_desc = {
90 .bLength = USB_DT_ENDPOINT_SIZE,
91 .bDescriptorType = USB_DT_ENDPOINT,
92
93 .bEndpointAddress = USB_DIR_IN,
94 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
95 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
96 };
97
98 /* UDC descriptor */
99 static struct ci13xxx *_udc;
100
101 /* Interrupt statistics */
102 #define ISR_MASK 0x1F
103 static struct {
104 u32 test;
105 u32 ui;
106 u32 uei;
107 u32 pci;
108 u32 uri;
109 u32 sli;
110 u32 none;
111 struct {
112 u32 cnt;
113 u32 buf[ISR_MASK+1];
114 u32 idx;
115 } hndl;
116 } isr_statistics;
117
118 /**
119 * ffs_nr: find first (least significant) bit set
120 * @x: the word to search
121 *
122 * This function returns bit number (instead of position)
123 */
124 static int ffs_nr(u32 x)
125 {
126 int n = ffs(x);
127
128 return n ? n-1 : 32;
129 }
130
131 /******************************************************************************
132 * HW block
133 *****************************************************************************/
134 /* register bank descriptor */
135 static struct {
136 unsigned lpm; /* is LPM? */
137 void __iomem *abs; /* bus map offset */
138 void __iomem *cap; /* bus map offset + CAP offset + CAP data */
139 size_t size; /* bank size */
140 } hw_bank;
141
142 /* MSM specific */
143 #define ABS_AHBBURST (0x0090UL)
144 #define ABS_AHBMODE (0x0098UL)
145 /* UDC register map */
146 #define ABS_CAPLENGTH (0x100UL)
147 #define ABS_HCCPARAMS (0x108UL)
148 #define ABS_DCCPARAMS (0x124UL)
149 #define ABS_TESTMODE (hw_bank.lpm ? 0x0FCUL : 0x138UL)
150 /* offset to CAPLENTGH (addr + data) */
151 #define CAP_USBCMD (0x000UL)
152 #define CAP_USBSTS (0x004UL)
153 #define CAP_USBINTR (0x008UL)
154 #define CAP_DEVICEADDR (0x014UL)
155 #define CAP_ENDPTLISTADDR (0x018UL)
156 #define CAP_PORTSC (0x044UL)
157 #define CAP_DEVLC (0x084UL)
158 #define CAP_USBMODE (hw_bank.lpm ? 0x0C8UL : 0x068UL)
159 #define CAP_ENDPTSETUPSTAT (hw_bank.lpm ? 0x0D8UL : 0x06CUL)
160 #define CAP_ENDPTPRIME (hw_bank.lpm ? 0x0DCUL : 0x070UL)
161 #define CAP_ENDPTFLUSH (hw_bank.lpm ? 0x0E0UL : 0x074UL)
162 #define CAP_ENDPTSTAT (hw_bank.lpm ? 0x0E4UL : 0x078UL)
163 #define CAP_ENDPTCOMPLETE (hw_bank.lpm ? 0x0E8UL : 0x07CUL)
164 #define CAP_ENDPTCTRL (hw_bank.lpm ? 0x0ECUL : 0x080UL)
165 #define CAP_LAST (hw_bank.lpm ? 0x12CUL : 0x0C0UL)
166
167 /* maximum number of enpoints: valid only after hw_device_reset() */
168 static unsigned hw_ep_max;
169
170 /**
171 * hw_ep_bit: calculates the bit number
172 * @num: endpoint number
173 * @dir: endpoint direction
174 *
175 * This function returns bit number
176 */
177 static inline int hw_ep_bit(int num, int dir)
178 {
179 return num + (dir ? 16 : 0);
180 }
181
182 /**
183 * hw_aread: reads from register bitfield
184 * @addr: address relative to bus map
185 * @mask: bitfield mask
186 *
187 * This function returns register bitfield data
188 */
189 static u32 hw_aread(u32 addr, u32 mask)
190 {
191 return ioread32(addr + hw_bank.abs) & mask;
192 }
193
194 /**
195 * hw_awrite: writes to register bitfield
196 * @addr: address relative to bus map
197 * @mask: bitfield mask
198 * @data: new data
199 */
200 static void hw_awrite(u32 addr, u32 mask, u32 data)
201 {
202 iowrite32(hw_aread(addr, ~mask) | (data & mask),
203 addr + hw_bank.abs);
204 }
205
206 /**
207 * hw_cread: reads from register bitfield
208 * @addr: address relative to CAP offset plus content
209 * @mask: bitfield mask
210 *
211 * This function returns register bitfield data
212 */
213 static u32 hw_cread(u32 addr, u32 mask)
214 {
215 return ioread32(addr + hw_bank.cap) & mask;
216 }
217
218 /**
219 * hw_cwrite: writes to register bitfield
220 * @addr: address relative to CAP offset plus content
221 * @mask: bitfield mask
222 * @data: new data
223 */
224 static void hw_cwrite(u32 addr, u32 mask, u32 data)
225 {
226 iowrite32(hw_cread(addr, ~mask) | (data & mask),
227 addr + hw_bank.cap);
228 }
229
230 /**
231 * hw_ctest_and_clear: tests & clears register bitfield
232 * @addr: address relative to CAP offset plus content
233 * @mask: bitfield mask
234 *
235 * This function returns register bitfield data
236 */
237 static u32 hw_ctest_and_clear(u32 addr, u32 mask)
238 {
239 u32 reg = hw_cread(addr, mask);
240
241 iowrite32(reg, addr + hw_bank.cap);
242 return reg;
243 }
244
245 /**
246 * hw_ctest_and_write: tests & writes register bitfield
247 * @addr: address relative to CAP offset plus content
248 * @mask: bitfield mask
249 * @data: new data
250 *
251 * This function returns register bitfield data
252 */
253 static u32 hw_ctest_and_write(u32 addr, u32 mask, u32 data)
254 {
255 u32 reg = hw_cread(addr, ~0);
256
257 iowrite32((reg & ~mask) | (data & mask), addr + hw_bank.cap);
258 return (reg & mask) >> ffs_nr(mask);
259 }
260
261 static int hw_device_init(void __iomem *base)
262 {
263 u32 reg;
264
265 /* bank is a module variable */
266 hw_bank.abs = base;
267
268 hw_bank.cap = hw_bank.abs;
269 hw_bank.cap += ABS_CAPLENGTH;
270 hw_bank.cap += ioread8(hw_bank.cap);
271
272 reg = hw_aread(ABS_HCCPARAMS, HCCPARAMS_LEN) >> ffs_nr(HCCPARAMS_LEN);
273 hw_bank.lpm = reg;
274 hw_bank.size = hw_bank.cap - hw_bank.abs;
275 hw_bank.size += CAP_LAST;
276 hw_bank.size /= sizeof(u32);
277
278 reg = hw_aread(ABS_DCCPARAMS, DCCPARAMS_DEN) >> ffs_nr(DCCPARAMS_DEN);
279 hw_ep_max = reg * 2; /* cache hw ENDPT_MAX */
280
281 if (hw_ep_max == 0 || hw_ep_max > ENDPT_MAX)
282 return -ENODEV;
283
284 /* setup lock mode ? */
285
286 /* ENDPTSETUPSTAT is '0' by default */
287
288 /* HCSPARAMS.bf.ppc SHOULD BE zero for device */
289
290 return 0;
291 }
292 /**
293 * hw_device_reset: resets chip (execute without interruption)
294 * @base: register base address
295 *
296 * This function returns an error code
297 */
298 static int hw_device_reset(struct ci13xxx *udc)
299 {
300 /* should flush & stop before reset */
301 hw_cwrite(CAP_ENDPTFLUSH, ~0, ~0);
302 hw_cwrite(CAP_USBCMD, USBCMD_RS, 0);
303
304 hw_cwrite(CAP_USBCMD, USBCMD_RST, USBCMD_RST);
305 while (hw_cread(CAP_USBCMD, USBCMD_RST))
306 udelay(10); /* not RTOS friendly */
307
308
309 if (udc->udc_driver->notify_event)
310 udc->udc_driver->notify_event(udc,
311 CI13XXX_CONTROLLER_RESET_EVENT);
312
313 if (udc->udc_driver->flags && CI13XXX_DISABLE_STREAMING)
314 hw_cwrite(CAP_USBMODE, USBMODE_SDIS, USBMODE_SDIS);
315
316 /* USBMODE should be configured step by step */
317 hw_cwrite(CAP_USBMODE, USBMODE_CM, USBMODE_CM_IDLE);
318 hw_cwrite(CAP_USBMODE, USBMODE_CM, USBMODE_CM_DEVICE);
319 hw_cwrite(CAP_USBMODE, USBMODE_SLOM, USBMODE_SLOM); /* HW >= 2.3 */
320
321 if (hw_cread(CAP_USBMODE, USBMODE_CM) != USBMODE_CM_DEVICE) {
322 pr_err("cannot enter in device mode");
323 pr_err("lpm = %i", hw_bank.lpm);
324 return -ENODEV;
325 }
326
327 return 0;
328 }
329
330 /**
331 * hw_device_state: enables/disables interrupts & starts/stops device (execute
332 * without interruption)
333 * @dma: 0 => disable, !0 => enable and set dma engine
334 *
335 * This function returns an error code
336 */
337 static int hw_device_state(u32 dma)
338 {
339 if (dma) {
340 hw_cwrite(CAP_ENDPTLISTADDR, ~0, dma);
341 /* interrupt, error, port change, reset, sleep/suspend */
342 hw_cwrite(CAP_USBINTR, ~0,
343 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
344 hw_cwrite(CAP_USBCMD, USBCMD_RS, USBCMD_RS);
345 } else {
346 hw_cwrite(CAP_USBCMD, USBCMD_RS, 0);
347 hw_cwrite(CAP_USBINTR, ~0, 0);
348 }
349 return 0;
350 }
351
352 /**
353 * hw_ep_flush: flush endpoint fifo (execute without interruption)
354 * @num: endpoint number
355 * @dir: endpoint direction
356 *
357 * This function returns an error code
358 */
359 static int hw_ep_flush(int num, int dir)
360 {
361 int n = hw_ep_bit(num, dir);
362
363 do {
364 /* flush any pending transfer */
365 hw_cwrite(CAP_ENDPTFLUSH, BIT(n), BIT(n));
366 while (hw_cread(CAP_ENDPTFLUSH, BIT(n)))
367 cpu_relax();
368 } while (hw_cread(CAP_ENDPTSTAT, BIT(n)));
369
370 return 0;
371 }
372
373 /**
374 * hw_ep_disable: disables endpoint (execute without interruption)
375 * @num: endpoint number
376 * @dir: endpoint direction
377 *
378 * This function returns an error code
379 */
380 static int hw_ep_disable(int num, int dir)
381 {
382 hw_ep_flush(num, dir);
383 hw_cwrite(CAP_ENDPTCTRL + num * sizeof(u32),
384 dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
385 return 0;
386 }
387
388 /**
389 * hw_ep_enable: enables endpoint (execute without interruption)
390 * @num: endpoint number
391 * @dir: endpoint direction
392 * @type: endpoint type
393 *
394 * This function returns an error code
395 */
396 static int hw_ep_enable(int num, int dir, int type)
397 {
398 u32 mask, data;
399
400 if (dir) {
401 mask = ENDPTCTRL_TXT; /* type */
402 data = type << ffs_nr(mask);
403
404 mask |= ENDPTCTRL_TXS; /* unstall */
405 mask |= ENDPTCTRL_TXR; /* reset data toggle */
406 data |= ENDPTCTRL_TXR;
407 mask |= ENDPTCTRL_TXE; /* enable */
408 data |= ENDPTCTRL_TXE;
409 } else {
410 mask = ENDPTCTRL_RXT; /* type */
411 data = type << ffs_nr(mask);
412
413 mask |= ENDPTCTRL_RXS; /* unstall */
414 mask |= ENDPTCTRL_RXR; /* reset data toggle */
415 data |= ENDPTCTRL_RXR;
416 mask |= ENDPTCTRL_RXE; /* enable */
417 data |= ENDPTCTRL_RXE;
418 }
419 hw_cwrite(CAP_ENDPTCTRL + num * sizeof(u32), mask, data);
420 return 0;
421 }
422
423 /**
424 * hw_ep_get_halt: return endpoint halt status
425 * @num: endpoint number
426 * @dir: endpoint direction
427 *
428 * This function returns 1 if endpoint halted
429 */
430 static int hw_ep_get_halt(int num, int dir)
431 {
432 u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
433
434 return hw_cread(CAP_ENDPTCTRL + num * sizeof(u32), mask) ? 1 : 0;
435 }
436
437 /**
438 * hw_test_and_clear_setup_status: test & clear setup status (execute without
439 * interruption)
440 * @n: bit number (endpoint)
441 *
442 * This function returns setup status
443 */
444 static int hw_test_and_clear_setup_status(int n)
445 {
446 return hw_ctest_and_clear(CAP_ENDPTSETUPSTAT, BIT(n));
447 }
448
449 /**
450 * hw_ep_prime: primes endpoint (execute without interruption)
451 * @num: endpoint number
452 * @dir: endpoint direction
453 * @is_ctrl: true if control endpoint
454 *
455 * This function returns an error code
456 */
457 static int hw_ep_prime(int num, int dir, int is_ctrl)
458 {
459 int n = hw_ep_bit(num, dir);
460
461 if (is_ctrl && dir == RX && hw_cread(CAP_ENDPTSETUPSTAT, BIT(num)))
462 return -EAGAIN;
463
464 hw_cwrite(CAP_ENDPTPRIME, BIT(n), BIT(n));
465
466 while (hw_cread(CAP_ENDPTPRIME, BIT(n)))
467 cpu_relax();
468 if (is_ctrl && dir == RX && hw_cread(CAP_ENDPTSETUPSTAT, BIT(num)))
469 return -EAGAIN;
470
471 /* status shoult be tested according with manual but it doesn't work */
472 return 0;
473 }
474
475 /**
476 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
477 * without interruption)
478 * @num: endpoint number
479 * @dir: endpoint direction
480 * @value: true => stall, false => unstall
481 *
482 * This function returns an error code
483 */
484 static int hw_ep_set_halt(int num, int dir, int value)
485 {
486 if (value != 0 && value != 1)
487 return -EINVAL;
488
489 do {
490 u32 addr = CAP_ENDPTCTRL + num * sizeof(u32);
491 u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
492 u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
493
494 /* data toggle - reserved for EP0 but it's in ESS */
495 hw_cwrite(addr, mask_xs|mask_xr, value ? mask_xs : mask_xr);
496
497 } while (value != hw_ep_get_halt(num, dir));
498
499 return 0;
500 }
501
502 /**
503 * hw_intr_clear: disables interrupt & clears interrupt status (execute without
504 * interruption)
505 * @n: interrupt bit
506 *
507 * This function returns an error code
508 */
509 static int hw_intr_clear(int n)
510 {
511 if (n >= REG_BITS)
512 return -EINVAL;
513
514 hw_cwrite(CAP_USBINTR, BIT(n), 0);
515 hw_cwrite(CAP_USBSTS, BIT(n), BIT(n));
516 return 0;
517 }
518
519 /**
520 * hw_intr_force: enables interrupt & forces interrupt status (execute without
521 * interruption)
522 * @n: interrupt bit
523 *
524 * This function returns an error code
525 */
526 static int hw_intr_force(int n)
527 {
528 if (n >= REG_BITS)
529 return -EINVAL;
530
531 hw_awrite(ABS_TESTMODE, TESTMODE_FORCE, TESTMODE_FORCE);
532 hw_cwrite(CAP_USBINTR, BIT(n), BIT(n));
533 hw_cwrite(CAP_USBSTS, BIT(n), BIT(n));
534 hw_awrite(ABS_TESTMODE, TESTMODE_FORCE, 0);
535 return 0;
536 }
537
538 /**
539 * hw_is_port_high_speed: test if port is high speed
540 *
541 * This function returns true if high speed port
542 */
543 static int hw_port_is_high_speed(void)
544 {
545 return hw_bank.lpm ? hw_cread(CAP_DEVLC, DEVLC_PSPD) :
546 hw_cread(CAP_PORTSC, PORTSC_HSP);
547 }
548
549 /**
550 * hw_port_test_get: reads port test mode value
551 *
552 * This function returns port test mode value
553 */
554 static u8 hw_port_test_get(void)
555 {
556 return hw_cread(CAP_PORTSC, PORTSC_PTC) >> ffs_nr(PORTSC_PTC);
557 }
558
559 /**
560 * hw_port_test_set: writes port test mode (execute without interruption)
561 * @mode: new value
562 *
563 * This function returns an error code
564 */
565 static int hw_port_test_set(u8 mode)
566 {
567 const u8 TEST_MODE_MAX = 7;
568
569 if (mode > TEST_MODE_MAX)
570 return -EINVAL;
571
572 hw_cwrite(CAP_PORTSC, PORTSC_PTC, mode << ffs_nr(PORTSC_PTC));
573 return 0;
574 }
575
576 /**
577 * hw_read_intr_enable: returns interrupt enable register
578 *
579 * This function returns register data
580 */
581 static u32 hw_read_intr_enable(void)
582 {
583 return hw_cread(CAP_USBINTR, ~0);
584 }
585
586 /**
587 * hw_read_intr_status: returns interrupt status register
588 *
589 * This function returns register data
590 */
591 static u32 hw_read_intr_status(void)
592 {
593 return hw_cread(CAP_USBSTS, ~0);
594 }
595
596 /**
597 * hw_register_read: reads all device registers (execute without interruption)
598 * @buf: destination buffer
599 * @size: buffer size
600 *
601 * This function returns number of registers read
602 */
603 static size_t hw_register_read(u32 *buf, size_t size)
604 {
605 unsigned i;
606
607 if (size > hw_bank.size)
608 size = hw_bank.size;
609
610 for (i = 0; i < size; i++)
611 buf[i] = hw_aread(i * sizeof(u32), ~0);
612
613 return size;
614 }
615
616 /**
617 * hw_register_write: writes to register
618 * @addr: register address
619 * @data: register value
620 *
621 * This function returns an error code
622 */
623 static int hw_register_write(u16 addr, u32 data)
624 {
625 /* align */
626 addr /= sizeof(u32);
627
628 if (addr >= hw_bank.size)
629 return -EINVAL;
630
631 /* align */
632 addr *= sizeof(u32);
633
634 hw_awrite(addr, ~0, data);
635 return 0;
636 }
637
638 /**
639 * hw_test_and_clear_complete: test & clear complete status (execute without
640 * interruption)
641 * @n: bit number (endpoint)
642 *
643 * This function returns complete status
644 */
645 static int hw_test_and_clear_complete(int n)
646 {
647 return hw_ctest_and_clear(CAP_ENDPTCOMPLETE, BIT(n));
648 }
649
650 /**
651 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
652 * without interruption)
653 *
654 * This function returns active interrutps
655 */
656 static u32 hw_test_and_clear_intr_active(void)
657 {
658 u32 reg = hw_read_intr_status() & hw_read_intr_enable();
659
660 hw_cwrite(CAP_USBSTS, ~0, reg);
661 return reg;
662 }
663
664 /**
665 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
666 * interruption)
667 *
668 * This function returns guard value
669 */
670 static int hw_test_and_clear_setup_guard(void)
671 {
672 return hw_ctest_and_write(CAP_USBCMD, USBCMD_SUTW, 0);
673 }
674
675 /**
676 * hw_test_and_set_setup_guard: test & set setup guard (execute without
677 * interruption)
678 *
679 * This function returns guard value
680 */
681 static int hw_test_and_set_setup_guard(void)
682 {
683 return hw_ctest_and_write(CAP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
684 }
685
686 /**
687 * hw_usb_set_address: configures USB address (execute without interruption)
688 * @value: new USB address
689 *
690 * This function returns an error code
691 */
692 static int hw_usb_set_address(u8 value)
693 {
694 /* advance */
695 hw_cwrite(CAP_DEVICEADDR, DEVICEADDR_USBADR | DEVICEADDR_USBADRA,
696 value << ffs_nr(DEVICEADDR_USBADR) | DEVICEADDR_USBADRA);
697 return 0;
698 }
699
700 /**
701 * hw_usb_reset: restart device after a bus reset (execute without
702 * interruption)
703 *
704 * This function returns an error code
705 */
706 static int hw_usb_reset(void)
707 {
708 hw_usb_set_address(0);
709
710 /* ESS flushes only at end?!? */
711 hw_cwrite(CAP_ENDPTFLUSH, ~0, ~0); /* flush all EPs */
712
713 /* clear setup token semaphores */
714 hw_cwrite(CAP_ENDPTSETUPSTAT, 0, 0); /* writes its content */
715
716 /* clear complete status */
717 hw_cwrite(CAP_ENDPTCOMPLETE, 0, 0); /* writes its content */
718
719 /* wait until all bits cleared */
720 while (hw_cread(CAP_ENDPTPRIME, ~0))
721 udelay(10); /* not RTOS friendly */
722
723 /* reset all endpoints ? */
724
725 /* reset internal status and wait for further instructions
726 no need to verify the port reset status (ESS does it) */
727
728 return 0;
729 }
730
731 /******************************************************************************
732 * DBG block
733 *****************************************************************************/
734 /**
735 * show_device: prints information about device capabilities and status
736 *
737 * Check "device.h" for details
738 */
739 static ssize_t show_device(struct device *dev, struct device_attribute *attr,
740 char *buf)
741 {
742 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
743 struct usb_gadget *gadget = &udc->gadget;
744 int n = 0;
745
746 dbg_trace("[%s] %p\n", __func__, buf);
747 if (attr == NULL || buf == NULL) {
748 dev_err(dev, "[%s] EINVAL\n", __func__);
749 return 0;
750 }
751
752 n += scnprintf(buf + n, PAGE_SIZE - n, "speed = %d\n",
753 gadget->speed);
754 n += scnprintf(buf + n, PAGE_SIZE - n, "is_dualspeed = %d\n",
755 gadget->is_dualspeed);
756 n += scnprintf(buf + n, PAGE_SIZE - n, "is_otg = %d\n",
757 gadget->is_otg);
758 n += scnprintf(buf + n, PAGE_SIZE - n, "is_a_peripheral = %d\n",
759 gadget->is_a_peripheral);
760 n += scnprintf(buf + n, PAGE_SIZE - n, "b_hnp_enable = %d\n",
761 gadget->b_hnp_enable);
762 n += scnprintf(buf + n, PAGE_SIZE - n, "a_hnp_support = %d\n",
763 gadget->a_hnp_support);
764 n += scnprintf(buf + n, PAGE_SIZE - n, "a_alt_hnp_support = %d\n",
765 gadget->a_alt_hnp_support);
766 n += scnprintf(buf + n, PAGE_SIZE - n, "name = %s\n",
767 (gadget->name ? gadget->name : ""));
768
769 return n;
770 }
771 static DEVICE_ATTR(device, S_IRUSR, show_device, NULL);
772
773 /**
774 * show_driver: prints information about attached gadget (if any)
775 *
776 * Check "device.h" for details
777 */
778 static ssize_t show_driver(struct device *dev, struct device_attribute *attr,
779 char *buf)
780 {
781 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
782 struct usb_gadget_driver *driver = udc->driver;
783 int n = 0;
784
785 dbg_trace("[%s] %p\n", __func__, buf);
786 if (attr == NULL || buf == NULL) {
787 dev_err(dev, "[%s] EINVAL\n", __func__);
788 return 0;
789 }
790
791 if (driver == NULL)
792 return scnprintf(buf, PAGE_SIZE,
793 "There is no gadget attached!\n");
794
795 n += scnprintf(buf + n, PAGE_SIZE - n, "function = %s\n",
796 (driver->function ? driver->function : ""));
797 n += scnprintf(buf + n, PAGE_SIZE - n, "max speed = %d\n",
798 driver->speed);
799
800 return n;
801 }
802 static DEVICE_ATTR(driver, S_IRUSR, show_driver, NULL);
803
804 /* Maximum event message length */
805 #define DBG_DATA_MSG 64UL
806
807 /* Maximum event messages */
808 #define DBG_DATA_MAX 128UL
809
810 /* Event buffer descriptor */
811 static struct {
812 char (buf[DBG_DATA_MAX])[DBG_DATA_MSG]; /* buffer */
813 unsigned idx; /* index */
814 unsigned tty; /* print to console? */
815 rwlock_t lck; /* lock */
816 } dbg_data = {
817 .idx = 0,
818 .tty = 0,
819 .lck = __RW_LOCK_UNLOCKED(lck)
820 };
821
822 /**
823 * dbg_dec: decrements debug event index
824 * @idx: buffer index
825 */
826 static void dbg_dec(unsigned *idx)
827 {
828 *idx = (*idx - 1) & (DBG_DATA_MAX-1);
829 }
830
831 /**
832 * dbg_inc: increments debug event index
833 * @idx: buffer index
834 */
835 static void dbg_inc(unsigned *idx)
836 {
837 *idx = (*idx + 1) & (DBG_DATA_MAX-1);
838 }
839
840 /**
841 * dbg_print: prints the common part of the event
842 * @addr: endpoint address
843 * @name: event name
844 * @status: status
845 * @extra: extra information
846 */
847 static void dbg_print(u8 addr, const char *name, int status, const char *extra)
848 {
849 struct timeval tval;
850 unsigned int stamp;
851 unsigned long flags;
852
853 write_lock_irqsave(&dbg_data.lck, flags);
854
855 do_gettimeofday(&tval);
856 stamp = tval.tv_sec & 0xFFFF; /* 2^32 = 4294967296. Limit to 4096s */
857 stamp = stamp * 1000000 + tval.tv_usec;
858
859 scnprintf(dbg_data.buf[dbg_data.idx], DBG_DATA_MSG,
860 "%04X\t» %02X %-7.7s %4i «\t%s\n",
861 stamp, addr, name, status, extra);
862
863 dbg_inc(&dbg_data.idx);
864
865 write_unlock_irqrestore(&dbg_data.lck, flags);
866
867 if (dbg_data.tty != 0)
868 pr_notice("%04X\t» %02X %-7.7s %4i «\t%s\n",
869 stamp, addr, name, status, extra);
870 }
871
872 /**
873 * dbg_done: prints a DONE event
874 * @addr: endpoint address
875 * @td: transfer descriptor
876 * @status: status
877 */
878 static void dbg_done(u8 addr, const u32 token, int status)
879 {
880 char msg[DBG_DATA_MSG];
881
882 scnprintf(msg, sizeof(msg), "%d %02X",
883 (int)(token & TD_TOTAL_BYTES) >> ffs_nr(TD_TOTAL_BYTES),
884 (int)(token & TD_STATUS) >> ffs_nr(TD_STATUS));
885 dbg_print(addr, "DONE", status, msg);
886 }
887
888 /**
889 * dbg_event: prints a generic event
890 * @addr: endpoint address
891 * @name: event name
892 * @status: status
893 */
894 static void dbg_event(u8 addr, const char *name, int status)
895 {
896 if (name != NULL)
897 dbg_print(addr, name, status, "");
898 }
899
900 /*
901 * dbg_queue: prints a QUEUE event
902 * @addr: endpoint address
903 * @req: USB request
904 * @status: status
905 */
906 static void dbg_queue(u8 addr, const struct usb_request *req, int status)
907 {
908 char msg[DBG_DATA_MSG];
909
910 if (req != NULL) {
911 scnprintf(msg, sizeof(msg),
912 "%d %d", !req->no_interrupt, req->length);
913 dbg_print(addr, "QUEUE", status, msg);
914 }
915 }
916
917 /**
918 * dbg_setup: prints a SETUP event
919 * @addr: endpoint address
920 * @req: setup request
921 */
922 static void dbg_setup(u8 addr, const struct usb_ctrlrequest *req)
923 {
924 char msg[DBG_DATA_MSG];
925
926 if (req != NULL) {
927 scnprintf(msg, sizeof(msg),
928 "%02X %02X %04X %04X %d", req->bRequestType,
929 req->bRequest, le16_to_cpu(req->wValue),
930 le16_to_cpu(req->wIndex), le16_to_cpu(req->wLength));
931 dbg_print(addr, "SETUP", 0, msg);
932 }
933 }
934
935 /**
936 * show_events: displays the event buffer
937 *
938 * Check "device.h" for details
939 */
940 static ssize_t show_events(struct device *dev, struct device_attribute *attr,
941 char *buf)
942 {
943 unsigned long flags;
944 unsigned i, j, n = 0;
945
946 dbg_trace("[%s] %p\n", __func__, buf);
947 if (attr == NULL || buf == NULL) {
948 dev_err(dev, "[%s] EINVAL\n", __func__);
949 return 0;
950 }
951
952 read_lock_irqsave(&dbg_data.lck, flags);
953
954 i = dbg_data.idx;
955 for (dbg_dec(&i); i != dbg_data.idx; dbg_dec(&i)) {
956 n += strlen(dbg_data.buf[i]);
957 if (n >= PAGE_SIZE) {
958 n -= strlen(dbg_data.buf[i]);
959 break;
960 }
961 }
962 for (j = 0, dbg_inc(&i); j < n; dbg_inc(&i))
963 j += scnprintf(buf + j, PAGE_SIZE - j,
964 "%s", dbg_data.buf[i]);
965
966 read_unlock_irqrestore(&dbg_data.lck, flags);
967
968 return n;
969 }
970
971 /**
972 * store_events: configure if events are going to be also printed to console
973 *
974 * Check "device.h" for details
975 */
976 static ssize_t store_events(struct device *dev, struct device_attribute *attr,
977 const char *buf, size_t count)
978 {
979 unsigned tty;
980
981 dbg_trace("[%s] %p, %d\n", __func__, buf, count);
982 if (attr == NULL || buf == NULL) {
983 dev_err(dev, "[%s] EINVAL\n", __func__);
984 goto done;
985 }
986
987 if (sscanf(buf, "%u", &tty) != 1 || tty > 1) {
988 dev_err(dev, "<1|0>: enable|disable console log\n");
989 goto done;
990 }
991
992 dbg_data.tty = tty;
993 dev_info(dev, "tty = %u", dbg_data.tty);
994
995 done:
996 return count;
997 }
998 static DEVICE_ATTR(events, S_IRUSR | S_IWUSR, show_events, store_events);
999
1000 /**
1001 * show_inters: interrupt status, enable status and historic
1002 *
1003 * Check "device.h" for details
1004 */
1005 static ssize_t show_inters(struct device *dev, struct device_attribute *attr,
1006 char *buf)
1007 {
1008 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1009 unsigned long flags;
1010 u32 intr;
1011 unsigned i, j, n = 0;
1012
1013 dbg_trace("[%s] %p\n", __func__, buf);
1014 if (attr == NULL || buf == NULL) {
1015 dev_err(dev, "[%s] EINVAL\n", __func__);
1016 return 0;
1017 }
1018
1019 spin_lock_irqsave(udc->lock, flags);
1020
1021 n += scnprintf(buf + n, PAGE_SIZE - n,
1022 "status = %08x\n", hw_read_intr_status());
1023 n += scnprintf(buf + n, PAGE_SIZE - n,
1024 "enable = %08x\n", hw_read_intr_enable());
1025
1026 n += scnprintf(buf + n, PAGE_SIZE - n, "*test = %d\n",
1027 isr_statistics.test);
1028 n += scnprintf(buf + n, PAGE_SIZE - n, "» ui = %d\n",
1029 isr_statistics.ui);
1030 n += scnprintf(buf + n, PAGE_SIZE - n, "» uei = %d\n",
1031 isr_statistics.uei);
1032 n += scnprintf(buf + n, PAGE_SIZE - n, "» pci = %d\n",
1033 isr_statistics.pci);
1034 n += scnprintf(buf + n, PAGE_SIZE - n, "» uri = %d\n",
1035 isr_statistics.uri);
1036 n += scnprintf(buf + n, PAGE_SIZE - n, "» sli = %d\n",
1037 isr_statistics.sli);
1038 n += scnprintf(buf + n, PAGE_SIZE - n, "*none = %d\n",
1039 isr_statistics.none);
1040 n += scnprintf(buf + n, PAGE_SIZE - n, "*hndl = %d\n",
1041 isr_statistics.hndl.cnt);
1042
1043 for (i = isr_statistics.hndl.idx, j = 0; j <= ISR_MASK; j++, i++) {
1044 i &= ISR_MASK;
1045 intr = isr_statistics.hndl.buf[i];
1046
1047 if (USBi_UI & intr)
1048 n += scnprintf(buf + n, PAGE_SIZE - n, "ui ");
1049 intr &= ~USBi_UI;
1050 if (USBi_UEI & intr)
1051 n += scnprintf(buf + n, PAGE_SIZE - n, "uei ");
1052 intr &= ~USBi_UEI;
1053 if (USBi_PCI & intr)
1054 n += scnprintf(buf + n, PAGE_SIZE - n, "pci ");
1055 intr &= ~USBi_PCI;
1056 if (USBi_URI & intr)
1057 n += scnprintf(buf + n, PAGE_SIZE - n, "uri ");
1058 intr &= ~USBi_URI;
1059 if (USBi_SLI & intr)
1060 n += scnprintf(buf + n, PAGE_SIZE - n, "sli ");
1061 intr &= ~USBi_SLI;
1062 if (intr)
1063 n += scnprintf(buf + n, PAGE_SIZE - n, "??? ");
1064 if (isr_statistics.hndl.buf[i])
1065 n += scnprintf(buf + n, PAGE_SIZE - n, "\n");
1066 }
1067
1068 spin_unlock_irqrestore(udc->lock, flags);
1069
1070 return n;
1071 }
1072
1073 /**
1074 * store_inters: enable & force or disable an individual interrutps
1075 * (to be used for test purposes only)
1076 *
1077 * Check "device.h" for details
1078 */
1079 static ssize_t store_inters(struct device *dev, struct device_attribute *attr,
1080 const char *buf, size_t count)
1081 {
1082 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1083 unsigned long flags;
1084 unsigned en, bit;
1085
1086 dbg_trace("[%s] %p, %d\n", __func__, buf, count);
1087 if (attr == NULL || buf == NULL) {
1088 dev_err(dev, "[%s] EINVAL\n", __func__);
1089 goto done;
1090 }
1091
1092 if (sscanf(buf, "%u %u", &en, &bit) != 2 || en > 1) {
1093 dev_err(dev, "<1|0> <bit>: enable|disable interrupt");
1094 goto done;
1095 }
1096
1097 spin_lock_irqsave(udc->lock, flags);
1098 if (en) {
1099 if (hw_intr_force(bit))
1100 dev_err(dev, "invalid bit number\n");
1101 else
1102 isr_statistics.test++;
1103 } else {
1104 if (hw_intr_clear(bit))
1105 dev_err(dev, "invalid bit number\n");
1106 }
1107 spin_unlock_irqrestore(udc->lock, flags);
1108
1109 done:
1110 return count;
1111 }
1112 static DEVICE_ATTR(inters, S_IRUSR | S_IWUSR, show_inters, store_inters);
1113
1114 /**
1115 * show_port_test: reads port test mode
1116 *
1117 * Check "device.h" for details
1118 */
1119 static ssize_t show_port_test(struct device *dev,
1120 struct device_attribute *attr, char *buf)
1121 {
1122 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1123 unsigned long flags;
1124 unsigned mode;
1125
1126 dbg_trace("[%s] %p\n", __func__, buf);
1127 if (attr == NULL || buf == NULL) {
1128 dev_err(dev, "[%s] EINVAL\n", __func__);
1129 return 0;
1130 }
1131
1132 spin_lock_irqsave(udc->lock, flags);
1133 mode = hw_port_test_get();
1134 spin_unlock_irqrestore(udc->lock, flags);
1135
1136 return scnprintf(buf, PAGE_SIZE, "mode = %u\n", mode);
1137 }
1138
1139 /**
1140 * store_port_test: writes port test mode
1141 *
1142 * Check "device.h" for details
1143 */
1144 static ssize_t store_port_test(struct device *dev,
1145 struct device_attribute *attr,
1146 const char *buf, size_t count)
1147 {
1148 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1149 unsigned long flags;
1150 unsigned mode;
1151
1152 dbg_trace("[%s] %p, %d\n", __func__, buf, count);
1153 if (attr == NULL || buf == NULL) {
1154 dev_err(dev, "[%s] EINVAL\n", __func__);
1155 goto done;
1156 }
1157
1158 if (sscanf(buf, "%u", &mode) != 1) {
1159 dev_err(dev, "<mode>: set port test mode");
1160 goto done;
1161 }
1162
1163 spin_lock_irqsave(udc->lock, flags);
1164 if (hw_port_test_set(mode))
1165 dev_err(dev, "invalid mode\n");
1166 spin_unlock_irqrestore(udc->lock, flags);
1167
1168 done:
1169 return count;
1170 }
1171 static DEVICE_ATTR(port_test, S_IRUSR | S_IWUSR,
1172 show_port_test, store_port_test);
1173
1174 /**
1175 * show_qheads: DMA contents of all queue heads
1176 *
1177 * Check "device.h" for details
1178 */
1179 static ssize_t show_qheads(struct device *dev, struct device_attribute *attr,
1180 char *buf)
1181 {
1182 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1183 unsigned long flags;
1184 unsigned i, j, n = 0;
1185
1186 dbg_trace("[%s] %p\n", __func__, buf);
1187 if (attr == NULL || buf == NULL) {
1188 dev_err(dev, "[%s] EINVAL\n", __func__);
1189 return 0;
1190 }
1191
1192 spin_lock_irqsave(udc->lock, flags);
1193 for (i = 0; i < hw_ep_max/2; i++) {
1194 struct ci13xxx_ep *mEpRx = &udc->ci13xxx_ep[i];
1195 struct ci13xxx_ep *mEpTx = &udc->ci13xxx_ep[i + hw_ep_max/2];
1196 n += scnprintf(buf + n, PAGE_SIZE - n,
1197 "EP=%02i: RX=%08X TX=%08X\n",
1198 i, (u32)mEpRx->qh.dma, (u32)mEpTx->qh.dma);
1199 for (j = 0; j < (sizeof(struct ci13xxx_qh)/sizeof(u32)); j++) {
1200 n += scnprintf(buf + n, PAGE_SIZE - n,
1201 " %04X: %08X %08X\n", j,
1202 *((u32 *)mEpRx->qh.ptr + j),
1203 *((u32 *)mEpTx->qh.ptr + j));
1204 }
1205 }
1206 spin_unlock_irqrestore(udc->lock, flags);
1207
1208 return n;
1209 }
1210 static DEVICE_ATTR(qheads, S_IRUSR, show_qheads, NULL);
1211
1212 /**
1213 * show_registers: dumps all registers
1214 *
1215 * Check "device.h" for details
1216 */
1217 static ssize_t show_registers(struct device *dev,
1218 struct device_attribute *attr, char *buf)
1219 {
1220 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1221 unsigned long flags;
1222 u32 dump[512];
1223 unsigned i, k, n = 0;
1224
1225 dbg_trace("[%s] %p\n", __func__, buf);
1226 if (attr == NULL || buf == NULL) {
1227 dev_err(dev, "[%s] EINVAL\n", __func__);
1228 return 0;
1229 }
1230
1231 spin_lock_irqsave(udc->lock, flags);
1232 k = hw_register_read(dump, sizeof(dump)/sizeof(u32));
1233 spin_unlock_irqrestore(udc->lock, flags);
1234
1235 for (i = 0; i < k; i++) {
1236 n += scnprintf(buf + n, PAGE_SIZE - n,
1237 "reg[0x%04X] = 0x%08X\n",
1238 i * (unsigned)sizeof(u32), dump[i]);
1239 }
1240
1241 return n;
1242 }
1243
1244 /**
1245 * store_registers: writes value to register address
1246 *
1247 * Check "device.h" for details
1248 */
1249 static ssize_t store_registers(struct device *dev,
1250 struct device_attribute *attr,
1251 const char *buf, size_t count)
1252 {
1253 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1254 unsigned long addr, data, flags;
1255
1256 dbg_trace("[%s] %p, %d\n", __func__, buf, count);
1257 if (attr == NULL || buf == NULL) {
1258 dev_err(dev, "[%s] EINVAL\n", __func__);
1259 goto done;
1260 }
1261
1262 if (sscanf(buf, "%li %li", &addr, &data) != 2) {
1263 dev_err(dev, "<addr> <data>: write data to register address");
1264 goto done;
1265 }
1266
1267 spin_lock_irqsave(udc->lock, flags);
1268 if (hw_register_write(addr, data))
1269 dev_err(dev, "invalid address range\n");
1270 spin_unlock_irqrestore(udc->lock, flags);
1271
1272 done:
1273 return count;
1274 }
1275 static DEVICE_ATTR(registers, S_IRUSR | S_IWUSR,
1276 show_registers, store_registers);
1277
1278 /**
1279 * show_requests: DMA contents of all requests currently queued (all endpts)
1280 *
1281 * Check "device.h" for details
1282 */
1283 static ssize_t show_requests(struct device *dev, struct device_attribute *attr,
1284 char *buf)
1285 {
1286 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1287 unsigned long flags;
1288 struct list_head *ptr = NULL;
1289 struct ci13xxx_req *req = NULL;
1290 unsigned i, j, n = 0, qSize = sizeof(struct ci13xxx_td)/sizeof(u32);
1291
1292 dbg_trace("[%s] %p\n", __func__, buf);
1293 if (attr == NULL || buf == NULL) {
1294 dev_err(dev, "[%s] EINVAL\n", __func__);
1295 return 0;
1296 }
1297
1298 spin_lock_irqsave(udc->lock, flags);
1299 for (i = 0; i < hw_ep_max; i++)
1300 list_for_each(ptr, &udc->ci13xxx_ep[i].qh.queue)
1301 {
1302 req = list_entry(ptr, struct ci13xxx_req, queue);
1303
1304 n += scnprintf(buf + n, PAGE_SIZE - n,
1305 "EP=%02i: TD=%08X %s\n",
1306 i % hw_ep_max/2, (u32)req->dma,
1307 ((i < hw_ep_max/2) ? "RX" : "TX"));
1308
1309 for (j = 0; j < qSize; j++)
1310 n += scnprintf(buf + n, PAGE_SIZE - n,
1311 " %04X: %08X\n", j,
1312 *((u32 *)req->ptr + j));
1313 }
1314 spin_unlock_irqrestore(udc->lock, flags);
1315
1316 return n;
1317 }
1318 static DEVICE_ATTR(requests, S_IRUSR, show_requests, NULL);
1319
1320 /**
1321 * dbg_create_files: initializes the attribute interface
1322 * @dev: device
1323 *
1324 * This function returns an error code
1325 */
1326 __maybe_unused static int dbg_create_files(struct device *dev)
1327 {
1328 int retval = 0;
1329
1330 if (dev == NULL)
1331 return -EINVAL;
1332 retval = device_create_file(dev, &dev_attr_device);
1333 if (retval)
1334 goto done;
1335 retval = device_create_file(dev, &dev_attr_driver);
1336 if (retval)
1337 goto rm_device;
1338 retval = device_create_file(dev, &dev_attr_events);
1339 if (retval)
1340 goto rm_driver;
1341 retval = device_create_file(dev, &dev_attr_inters);
1342 if (retval)
1343 goto rm_events;
1344 retval = device_create_file(dev, &dev_attr_port_test);
1345 if (retval)
1346 goto rm_inters;
1347 retval = device_create_file(dev, &dev_attr_qheads);
1348 if (retval)
1349 goto rm_port_test;
1350 retval = device_create_file(dev, &dev_attr_registers);
1351 if (retval)
1352 goto rm_qheads;
1353 retval = device_create_file(dev, &dev_attr_requests);
1354 if (retval)
1355 goto rm_registers;
1356 return 0;
1357
1358 rm_registers:
1359 device_remove_file(dev, &dev_attr_registers);
1360 rm_qheads:
1361 device_remove_file(dev, &dev_attr_qheads);
1362 rm_port_test:
1363 device_remove_file(dev, &dev_attr_port_test);
1364 rm_inters:
1365 device_remove_file(dev, &dev_attr_inters);
1366 rm_events:
1367 device_remove_file(dev, &dev_attr_events);
1368 rm_driver:
1369 device_remove_file(dev, &dev_attr_driver);
1370 rm_device:
1371 device_remove_file(dev, &dev_attr_device);
1372 done:
1373 return retval;
1374 }
1375
1376 /**
1377 * dbg_remove_files: destroys the attribute interface
1378 * @dev: device
1379 *
1380 * This function returns an error code
1381 */
1382 __maybe_unused static int dbg_remove_files(struct device *dev)
1383 {
1384 if (dev == NULL)
1385 return -EINVAL;
1386 device_remove_file(dev, &dev_attr_requests);
1387 device_remove_file(dev, &dev_attr_registers);
1388 device_remove_file(dev, &dev_attr_qheads);
1389 device_remove_file(dev, &dev_attr_port_test);
1390 device_remove_file(dev, &dev_attr_inters);
1391 device_remove_file(dev, &dev_attr_events);
1392 device_remove_file(dev, &dev_attr_driver);
1393 device_remove_file(dev, &dev_attr_device);
1394 return 0;
1395 }
1396
1397 /******************************************************************************
1398 * UTIL block
1399 *****************************************************************************/
1400 /**
1401 * _usb_addr: calculates endpoint address from direction & number
1402 * @ep: endpoint
1403 */
1404 static inline u8 _usb_addr(struct ci13xxx_ep *ep)
1405 {
1406 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
1407 }
1408
1409 /**
1410 * _hardware_queue: configures a request at hardware level
1411 * @gadget: gadget
1412 * @mEp: endpoint
1413 *
1414 * This function returns an error code
1415 */
1416 static int _hardware_enqueue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
1417 {
1418 unsigned i;
1419 int ret = 0;
1420 unsigned length = mReq->req.length;
1421
1422 trace("%p, %p", mEp, mReq);
1423
1424 /* don't queue twice */
1425 if (mReq->req.status == -EALREADY)
1426 return -EALREADY;
1427
1428 mReq->req.status = -EALREADY;
1429 if (length && !mReq->req.dma) {
1430 mReq->req.dma = \
1431 dma_map_single(mEp->device, mReq->req.buf,
1432 length, mEp->dir ? DMA_TO_DEVICE :
1433 DMA_FROM_DEVICE);
1434 if (mReq->req.dma == 0)
1435 return -ENOMEM;
1436
1437 mReq->map = 1;
1438 }
1439
1440 if (mReq->req.zero && length && (length % mEp->ep.maxpacket == 0)) {
1441 mReq->zptr = dma_pool_alloc(mEp->td_pool, GFP_ATOMIC,
1442 &mReq->zdma);
1443 if (mReq->zptr == NULL) {
1444 if (mReq->map) {
1445 dma_unmap_single(mEp->device, mReq->req.dma,
1446 length, mEp->dir ? DMA_TO_DEVICE :
1447 DMA_FROM_DEVICE);
1448 mReq->req.dma = 0;
1449 mReq->map = 0;
1450 }
1451 return -ENOMEM;
1452 }
1453 memset(mReq->zptr, 0, sizeof(*mReq->zptr));
1454 mReq->zptr->next = TD_TERMINATE;
1455 mReq->zptr->token = TD_STATUS_ACTIVE;
1456 if (!mReq->req.no_interrupt)
1457 mReq->zptr->token |= TD_IOC;
1458 }
1459 /*
1460 * TD configuration
1461 * TODO - handle requests which spawns into several TDs
1462 */
1463 memset(mReq->ptr, 0, sizeof(*mReq->ptr));
1464 mReq->ptr->token = length << ffs_nr(TD_TOTAL_BYTES);
1465 mReq->ptr->token &= TD_TOTAL_BYTES;
1466 mReq->ptr->token |= TD_STATUS_ACTIVE;
1467 if (mReq->zptr) {
1468 mReq->ptr->next = mReq->zdma;
1469 } else {
1470 mReq->ptr->next = TD_TERMINATE;
1471 if (!mReq->req.no_interrupt)
1472 mReq->ptr->token |= TD_IOC;
1473 }
1474 mReq->ptr->page[0] = mReq->req.dma;
1475 for (i = 1; i < 5; i++)
1476 mReq->ptr->page[i] =
1477 (mReq->req.dma + i * CI13XXX_PAGE_SIZE) & ~TD_RESERVED_MASK;
1478
1479 if (!list_empty(&mEp->qh.queue)) {
1480 struct ci13xxx_req *mReqPrev;
1481 int n = hw_ep_bit(mEp->num, mEp->dir);
1482 int tmp_stat;
1483
1484 mReqPrev = list_entry(mEp->qh.queue.prev,
1485 struct ci13xxx_req, queue);
1486 if (mReqPrev->zptr)
1487 mReqPrev->zptr->next = mReq->dma & TD_ADDR_MASK;
1488 else
1489 mReqPrev->ptr->next = mReq->dma & TD_ADDR_MASK;
1490 wmb();
1491 if (hw_cread(CAP_ENDPTPRIME, BIT(n)))
1492 goto done;
1493 do {
1494 hw_cwrite(CAP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
1495 tmp_stat = hw_cread(CAP_ENDPTSTAT, BIT(n));
1496 } while (!hw_cread(CAP_USBCMD, USBCMD_ATDTW));
1497 hw_cwrite(CAP_USBCMD, USBCMD_ATDTW, 0);
1498 if (tmp_stat)
1499 goto done;
1500 }
1501
1502 /* QH configuration */
1503 mEp->qh.ptr->td.next = mReq->dma; /* TERMINATE = 0 */
1504 mEp->qh.ptr->td.token &= ~TD_STATUS; /* clear status */
1505 mEp->qh.ptr->cap |= QH_ZLT;
1506
1507 wmb(); /* synchronize before ep prime */
1508
1509 ret = hw_ep_prime(mEp->num, mEp->dir,
1510 mEp->type == USB_ENDPOINT_XFER_CONTROL);
1511 done:
1512 return ret;
1513 }
1514
1515 /**
1516 * _hardware_dequeue: handles a request at hardware level
1517 * @gadget: gadget
1518 * @mEp: endpoint
1519 *
1520 * This function returns an error code
1521 */
1522 static int _hardware_dequeue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
1523 {
1524 trace("%p, %p", mEp, mReq);
1525
1526 if (mReq->req.status != -EALREADY)
1527 return -EINVAL;
1528
1529 if ((TD_STATUS_ACTIVE & mReq->ptr->token) != 0)
1530 return -EBUSY;
1531
1532 if (mReq->zptr) {
1533 if ((TD_STATUS_ACTIVE & mReq->zptr->token) != 0)
1534 return -EBUSY;
1535 dma_pool_free(mEp->td_pool, mReq->zptr, mReq->zdma);
1536 mReq->zptr = NULL;
1537 }
1538
1539 mReq->req.status = 0;
1540
1541 if (mReq->map) {
1542 dma_unmap_single(mEp->device, mReq->req.dma, mReq->req.length,
1543 mEp->dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1544 mReq->req.dma = 0;
1545 mReq->map = 0;
1546 }
1547
1548 mReq->req.status = mReq->ptr->token & TD_STATUS;
1549 if ((TD_STATUS_HALTED & mReq->req.status) != 0)
1550 mReq->req.status = -1;
1551 else if ((TD_STATUS_DT_ERR & mReq->req.status) != 0)
1552 mReq->req.status = -1;
1553 else if ((TD_STATUS_TR_ERR & mReq->req.status) != 0)
1554 mReq->req.status = -1;
1555
1556 mReq->req.actual = mReq->ptr->token & TD_TOTAL_BYTES;
1557 mReq->req.actual >>= ffs_nr(TD_TOTAL_BYTES);
1558 mReq->req.actual = mReq->req.length - mReq->req.actual;
1559 mReq->req.actual = mReq->req.status ? 0 : mReq->req.actual;
1560
1561 return mReq->req.actual;
1562 }
1563
1564 /**
1565 * _ep_nuke: dequeues all endpoint requests
1566 * @mEp: endpoint
1567 *
1568 * This function returns an error code
1569 * Caller must hold lock
1570 */
1571 static int _ep_nuke(struct ci13xxx_ep *mEp)
1572 __releases(mEp->lock)
1573 __acquires(mEp->lock)
1574 {
1575 trace("%p", mEp);
1576
1577 if (mEp == NULL)
1578 return -EINVAL;
1579
1580 hw_ep_flush(mEp->num, mEp->dir);
1581
1582 while (!list_empty(&mEp->qh.queue)) {
1583
1584 /* pop oldest request */
1585 struct ci13xxx_req *mReq = \
1586 list_entry(mEp->qh.queue.next,
1587 struct ci13xxx_req, queue);
1588 list_del_init(&mReq->queue);
1589 mReq->req.status = -ESHUTDOWN;
1590
1591 if (mReq->req.complete != NULL) {
1592 spin_unlock(mEp->lock);
1593 mReq->req.complete(&mEp->ep, &mReq->req);
1594 spin_lock(mEp->lock);
1595 }
1596 }
1597 return 0;
1598 }
1599
1600 /**
1601 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
1602 * @gadget: gadget
1603 *
1604 * This function returns an error code
1605 * Caller must hold lock
1606 */
1607 static int _gadget_stop_activity(struct usb_gadget *gadget)
1608 {
1609 struct usb_ep *ep;
1610 struct ci13xxx *udc = container_of(gadget, struct ci13xxx, gadget);
1611 unsigned long flags;
1612
1613 trace("%p", gadget);
1614
1615 if (gadget == NULL)
1616 return -EINVAL;
1617
1618 spin_lock_irqsave(udc->lock, flags);
1619 udc->gadget.speed = USB_SPEED_UNKNOWN;
1620 udc->remote_wakeup = 0;
1621 udc->suspended = 0;
1622 spin_unlock_irqrestore(udc->lock, flags);
1623
1624 /* flush all endpoints */
1625 gadget_for_each_ep(ep, gadget) {
1626 usb_ep_fifo_flush(ep);
1627 }
1628 usb_ep_fifo_flush(&udc->ep0out.ep);
1629 usb_ep_fifo_flush(&udc->ep0in.ep);
1630
1631 udc->driver->disconnect(gadget);
1632
1633 /* make sure to disable all endpoints */
1634 gadget_for_each_ep(ep, gadget) {
1635 usb_ep_disable(ep);
1636 }
1637 usb_ep_disable(&udc->ep0out.ep);
1638 usb_ep_disable(&udc->ep0in.ep);
1639
1640 if (udc->status != NULL) {
1641 usb_ep_free_request(&udc->ep0in.ep, udc->status);
1642 udc->status = NULL;
1643 }
1644
1645 return 0;
1646 }
1647
1648 /******************************************************************************
1649 * ISR block
1650 *****************************************************************************/
1651 /**
1652 * isr_reset_handler: USB reset interrupt handler
1653 * @udc: UDC device
1654 *
1655 * This function resets USB engine after a bus reset occurred
1656 */
1657 static void isr_reset_handler(struct ci13xxx *udc)
1658 __releases(udc->lock)
1659 __acquires(udc->lock)
1660 {
1661 int retval;
1662
1663 trace("%p", udc);
1664
1665 if (udc == NULL) {
1666 err("EINVAL");
1667 return;
1668 }
1669
1670 dbg_event(0xFF, "BUS RST", 0);
1671
1672 spin_unlock(udc->lock);
1673 retval = _gadget_stop_activity(&udc->gadget);
1674 if (retval)
1675 goto done;
1676
1677 retval = hw_usb_reset();
1678 if (retval)
1679 goto done;
1680
1681 retval = usb_ep_enable(&udc->ep0out.ep, &ctrl_endpt_out_desc);
1682 if (retval)
1683 goto done;
1684
1685 retval = usb_ep_enable(&udc->ep0in.ep, &ctrl_endpt_in_desc);
1686 if (!retval) {
1687 udc->status = usb_ep_alloc_request(&udc->ep0in.ep, GFP_ATOMIC);
1688 if (udc->status == NULL) {
1689 usb_ep_disable(&udc->ep0out.ep);
1690 retval = -ENOMEM;
1691 }
1692 }
1693 spin_lock(udc->lock);
1694
1695 done:
1696 if (retval)
1697 err("error: %i", retval);
1698 }
1699
1700 /**
1701 * isr_get_status_complete: get_status request complete function
1702 * @ep: endpoint
1703 * @req: request handled
1704 *
1705 * Caller must release lock
1706 */
1707 static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
1708 {
1709 trace("%p, %p", ep, req);
1710
1711 if (ep == NULL || req == NULL) {
1712 err("EINVAL");
1713 return;
1714 }
1715
1716 kfree(req->buf);
1717 usb_ep_free_request(ep, req);
1718 }
1719
1720 /**
1721 * isr_get_status_response: get_status request response
1722 * @udc: udc struct
1723 * @setup: setup request packet
1724 *
1725 * This function returns an error code
1726 */
1727 static int isr_get_status_response(struct ci13xxx *udc,
1728 struct usb_ctrlrequest *setup)
1729 __releases(mEp->lock)
1730 __acquires(mEp->lock)
1731 {
1732 struct ci13xxx_ep *mEp = &udc->ep0in;
1733 struct usb_request *req = NULL;
1734 gfp_t gfp_flags = GFP_ATOMIC;
1735 int dir, num, retval;
1736
1737 trace("%p, %p", mEp, setup);
1738
1739 if (mEp == NULL || setup == NULL)
1740 return -EINVAL;
1741
1742 spin_unlock(mEp->lock);
1743 req = usb_ep_alloc_request(&mEp->ep, gfp_flags);
1744 spin_lock(mEp->lock);
1745 if (req == NULL)
1746 return -ENOMEM;
1747
1748 req->complete = isr_get_status_complete;
1749 req->length = 2;
1750 req->buf = kzalloc(req->length, gfp_flags);
1751 if (req->buf == NULL) {
1752 retval = -ENOMEM;
1753 goto err_free_req;
1754 }
1755
1756 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1757 /* Assume that device is bus powered for now. */
1758 *((u16 *)req->buf) = _udc->remote_wakeup << 1;
1759 retval = 0;
1760 } else if ((setup->bRequestType & USB_RECIP_MASK) \
1761 == USB_RECIP_ENDPOINT) {
1762 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
1763 TX : RX;
1764 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
1765 *((u16 *)req->buf) = hw_ep_get_halt(num, dir);
1766 }
1767 /* else do nothing; reserved for future use */
1768
1769 spin_unlock(mEp->lock);
1770 retval = usb_ep_queue(&mEp->ep, req, gfp_flags);
1771 spin_lock(mEp->lock);
1772 if (retval)
1773 goto err_free_buf;
1774
1775 return 0;
1776
1777 err_free_buf:
1778 kfree(req->buf);
1779 err_free_req:
1780 spin_unlock(mEp->lock);
1781 usb_ep_free_request(&mEp->ep, req);
1782 spin_lock(mEp->lock);
1783 return retval;
1784 }
1785
1786 /**
1787 * isr_setup_status_complete: setup_status request complete function
1788 * @ep: endpoint
1789 * @req: request handled
1790 *
1791 * Caller must release lock. Put the port in test mode if test mode
1792 * feature is selected.
1793 */
1794 static void
1795 isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
1796 {
1797 struct ci13xxx *udc = req->context;
1798 unsigned long flags;
1799
1800 trace("%p, %p", ep, req);
1801
1802 spin_lock_irqsave(udc->lock, flags);
1803 if (udc->test_mode)
1804 hw_port_test_set(udc->test_mode);
1805 spin_unlock_irqrestore(udc->lock, flags);
1806 }
1807
1808 /**
1809 * isr_setup_status_phase: queues the status phase of a setup transation
1810 * @udc: udc struct
1811 *
1812 * This function returns an error code
1813 */
1814 static int isr_setup_status_phase(struct ci13xxx *udc)
1815 __releases(mEp->lock)
1816 __acquires(mEp->lock)
1817 {
1818 int retval;
1819 struct ci13xxx_ep *mEp;
1820
1821 trace("%p", udc);
1822
1823 mEp = (udc->ep0_dir == TX) ? &udc->ep0out : &udc->ep0in;
1824 udc->status->context = udc;
1825 udc->status->complete = isr_setup_status_complete;
1826
1827 spin_unlock(mEp->lock);
1828 retval = usb_ep_queue(&mEp->ep, udc->status, GFP_ATOMIC);
1829 spin_lock(mEp->lock);
1830
1831 return retval;
1832 }
1833
1834 /**
1835 * isr_tr_complete_low: transaction complete low level handler
1836 * @mEp: endpoint
1837 *
1838 * This function returns an error code
1839 * Caller must hold lock
1840 */
1841 static int isr_tr_complete_low(struct ci13xxx_ep *mEp)
1842 __releases(mEp->lock)
1843 __acquires(mEp->lock)
1844 {
1845 struct ci13xxx_req *mReq, *mReqTemp;
1846 int retval;
1847
1848 trace("%p", mEp);
1849
1850 if (list_empty(&mEp->qh.queue))
1851 return -EINVAL;
1852
1853 list_for_each_entry_safe(mReq, mReqTemp, &mEp->qh.queue,
1854 queue) {
1855 retval = _hardware_dequeue(mEp, mReq);
1856 if (retval < 0)
1857 break;
1858 list_del_init(&mReq->queue);
1859 dbg_done(_usb_addr(mEp), mReq->ptr->token, retval);
1860 if (mReq->req.complete != NULL) {
1861 spin_unlock(mEp->lock);
1862 mReq->req.complete(&mEp->ep, &mReq->req);
1863 spin_lock(mEp->lock);
1864 }
1865 }
1866
1867 if (retval == EBUSY)
1868 retval = 0;
1869 if (retval < 0)
1870 dbg_event(_usb_addr(mEp), "DONE", retval);
1871
1872 return retval;
1873 }
1874
1875 /**
1876 * isr_tr_complete_handler: transaction complete interrupt handler
1877 * @udc: UDC descriptor
1878 *
1879 * This function handles traffic events
1880 */
1881 static void isr_tr_complete_handler(struct ci13xxx *udc)
1882 __releases(udc->lock)
1883 __acquires(udc->lock)
1884 {
1885 unsigned i;
1886 u8 tmode = 0;
1887
1888 trace("%p", udc);
1889
1890 if (udc == NULL) {
1891 err("EINVAL");
1892 return;
1893 }
1894
1895 for (i = 0; i < hw_ep_max; i++) {
1896 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
1897 int type, num, err = -EINVAL;
1898 struct usb_ctrlrequest req;
1899
1900 if (mEp->desc == NULL)
1901 continue; /* not configured */
1902
1903 if (hw_test_and_clear_complete(i)) {
1904 err = isr_tr_complete_low(mEp);
1905 if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
1906 if (err > 0) /* needs status phase */
1907 err = isr_setup_status_phase(udc);
1908 if (err < 0) {
1909 dbg_event(_usb_addr(mEp),
1910 "ERROR", err);
1911 spin_unlock(udc->lock);
1912 if (usb_ep_set_halt(&mEp->ep))
1913 err("error: ep_set_halt");
1914 spin_lock(udc->lock);
1915 }
1916 }
1917 }
1918
1919 if (mEp->type != USB_ENDPOINT_XFER_CONTROL ||
1920 !hw_test_and_clear_setup_status(i))
1921 continue;
1922
1923 if (i != 0) {
1924 warn("ctrl traffic received at endpoint");
1925 continue;
1926 }
1927
1928 /*
1929 * Flush data and handshake transactions of previous
1930 * setup packet.
1931 */
1932 _ep_nuke(&udc->ep0out);
1933 _ep_nuke(&udc->ep0in);
1934
1935 /* read_setup_packet */
1936 do {
1937 hw_test_and_set_setup_guard();
1938 memcpy(&req, &mEp->qh.ptr->setup, sizeof(req));
1939 } while (!hw_test_and_clear_setup_guard());
1940
1941 type = req.bRequestType;
1942
1943 udc->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
1944
1945 dbg_setup(_usb_addr(mEp), &req);
1946
1947 switch (req.bRequest) {
1948 case USB_REQ_CLEAR_FEATURE:
1949 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1950 le16_to_cpu(req.wValue) ==
1951 USB_ENDPOINT_HALT) {
1952 if (req.wLength != 0)
1953 break;
1954 num = le16_to_cpu(req.wIndex);
1955 num &= USB_ENDPOINT_NUMBER_MASK;
1956 if (!udc->ci13xxx_ep[num].wedge) {
1957 spin_unlock(udc->lock);
1958 err = usb_ep_clear_halt(
1959 &udc->ci13xxx_ep[num].ep);
1960 spin_lock(udc->lock);
1961 if (err)
1962 break;
1963 }
1964 err = isr_setup_status_phase(udc);
1965 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1966 le16_to_cpu(req.wValue) ==
1967 USB_DEVICE_REMOTE_WAKEUP) {
1968 if (req.wLength != 0)
1969 break;
1970 udc->remote_wakeup = 0;
1971 err = isr_setup_status_phase(udc);
1972 } else {
1973 goto delegate;
1974 }
1975 break;
1976 case USB_REQ_GET_STATUS:
1977 if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
1978 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1979 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1980 goto delegate;
1981 if (le16_to_cpu(req.wLength) != 2 ||
1982 le16_to_cpu(req.wValue) != 0)
1983 break;
1984 err = isr_get_status_response(udc, &req);
1985 break;
1986 case USB_REQ_SET_ADDRESS:
1987 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1988 goto delegate;
1989 if (le16_to_cpu(req.wLength) != 0 ||
1990 le16_to_cpu(req.wIndex) != 0)
1991 break;
1992 err = hw_usb_set_address((u8)le16_to_cpu(req.wValue));
1993 if (err)
1994 break;
1995 err = isr_setup_status_phase(udc);
1996 break;
1997 case USB_REQ_SET_FEATURE:
1998 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1999 le16_to_cpu(req.wValue) ==
2000 USB_ENDPOINT_HALT) {
2001 if (req.wLength != 0)
2002 break;
2003 num = le16_to_cpu(req.wIndex);
2004 num &= USB_ENDPOINT_NUMBER_MASK;
2005
2006 spin_unlock(udc->lock);
2007 err = usb_ep_set_halt(&udc->ci13xxx_ep[num].ep);
2008 spin_lock(udc->lock);
2009 if (!err)
2010 isr_setup_status_phase(udc);
2011 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
2012 if (req.wLength != 0)
2013 break;
2014 switch (le16_to_cpu(req.wValue)) {
2015 case USB_DEVICE_REMOTE_WAKEUP:
2016 udc->remote_wakeup = 1;
2017 err = isr_setup_status_phase(udc);
2018 break;
2019 case USB_DEVICE_TEST_MODE:
2020 tmode = le16_to_cpu(req.wIndex) >> 8;
2021 switch (tmode) {
2022 case TEST_J:
2023 case TEST_K:
2024 case TEST_SE0_NAK:
2025 case TEST_PACKET:
2026 case TEST_FORCE_EN:
2027 udc->test_mode = tmode;
2028 err = isr_setup_status_phase(
2029 udc);
2030 break;
2031 default:
2032 break;
2033 }
2034 default:
2035 goto delegate;
2036 }
2037 } else {
2038 goto delegate;
2039 }
2040 break;
2041 default:
2042 delegate:
2043 if (req.wLength == 0) /* no data phase */
2044 udc->ep0_dir = TX;
2045
2046 spin_unlock(udc->lock);
2047 err = udc->driver->setup(&udc->gadget, &req);
2048 spin_lock(udc->lock);
2049 break;
2050 }
2051
2052 if (err < 0) {
2053 dbg_event(_usb_addr(mEp), "ERROR", err);
2054
2055 spin_unlock(udc->lock);
2056 if (usb_ep_set_halt(&mEp->ep))
2057 err("error: ep_set_halt");
2058 spin_lock(udc->lock);
2059 }
2060 }
2061 }
2062
2063 /******************************************************************************
2064 * ENDPT block
2065 *****************************************************************************/
2066 /**
2067 * ep_enable: configure endpoint, making it usable
2068 *
2069 * Check usb_ep_enable() at "usb_gadget.h" for details
2070 */
2071 static int ep_enable(struct usb_ep *ep,
2072 const struct usb_endpoint_descriptor *desc)
2073 {
2074 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2075 int retval = 0;
2076 unsigned long flags;
2077
2078 trace("%p, %p", ep, desc);
2079
2080 if (ep == NULL || desc == NULL)
2081 return -EINVAL;
2082
2083 spin_lock_irqsave(mEp->lock, flags);
2084
2085 /* only internal SW should enable ctrl endpts */
2086
2087 mEp->desc = desc;
2088
2089 if (!list_empty(&mEp->qh.queue))
2090 warn("enabling a non-empty endpoint!");
2091
2092 mEp->dir = usb_endpoint_dir_in(desc) ? TX : RX;
2093 mEp->num = usb_endpoint_num(desc);
2094 mEp->type = usb_endpoint_type(desc);
2095
2096 mEp->ep.maxpacket = __constant_le16_to_cpu(desc->wMaxPacketSize);
2097
2098 dbg_event(_usb_addr(mEp), "ENABLE", 0);
2099
2100 mEp->qh.ptr->cap = 0;
2101
2102 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
2103 mEp->qh.ptr->cap |= QH_IOS;
2104 else if (mEp->type == USB_ENDPOINT_XFER_ISOC)
2105 mEp->qh.ptr->cap &= ~QH_MULT;
2106 else
2107 mEp->qh.ptr->cap &= ~QH_ZLT;
2108
2109 mEp->qh.ptr->cap |=
2110 (mEp->ep.maxpacket << ffs_nr(QH_MAX_PKT)) & QH_MAX_PKT;
2111 mEp->qh.ptr->td.next |= TD_TERMINATE; /* needed? */
2112
2113 retval |= hw_ep_enable(mEp->num, mEp->dir, mEp->type);
2114
2115 spin_unlock_irqrestore(mEp->lock, flags);
2116 return retval;
2117 }
2118
2119 /**
2120 * ep_disable: endpoint is no longer usable
2121 *
2122 * Check usb_ep_disable() at "usb_gadget.h" for details
2123 */
2124 static int ep_disable(struct usb_ep *ep)
2125 {
2126 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2127 int direction, retval = 0;
2128 unsigned long flags;
2129
2130 trace("%p", ep);
2131
2132 if (ep == NULL)
2133 return -EINVAL;
2134 else if (mEp->desc == NULL)
2135 return -EBUSY;
2136
2137 spin_lock_irqsave(mEp->lock, flags);
2138
2139 /* only internal SW should disable ctrl endpts */
2140
2141 direction = mEp->dir;
2142 do {
2143 dbg_event(_usb_addr(mEp), "DISABLE", 0);
2144
2145 retval |= _ep_nuke(mEp);
2146 retval |= hw_ep_disable(mEp->num, mEp->dir);
2147
2148 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
2149 mEp->dir = (mEp->dir == TX) ? RX : TX;
2150
2151 } while (mEp->dir != direction);
2152
2153 mEp->desc = NULL;
2154
2155 spin_unlock_irqrestore(mEp->lock, flags);
2156 return retval;
2157 }
2158
2159 /**
2160 * ep_alloc_request: allocate a request object to use with this endpoint
2161 *
2162 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
2163 */
2164 static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
2165 {
2166 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2167 struct ci13xxx_req *mReq = NULL;
2168
2169 trace("%p, %i", ep, gfp_flags);
2170
2171 if (ep == NULL) {
2172 err("EINVAL");
2173 return NULL;
2174 }
2175
2176 mReq = kzalloc(sizeof(struct ci13xxx_req), gfp_flags);
2177 if (mReq != NULL) {
2178 INIT_LIST_HEAD(&mReq->queue);
2179
2180 mReq->ptr = dma_pool_alloc(mEp->td_pool, gfp_flags,
2181 &mReq->dma);
2182 if (mReq->ptr == NULL) {
2183 kfree(mReq);
2184 mReq = NULL;
2185 }
2186 }
2187
2188 dbg_event(_usb_addr(mEp), "ALLOC", mReq == NULL);
2189
2190 return (mReq == NULL) ? NULL : &mReq->req;
2191 }
2192
2193 /**
2194 * ep_free_request: frees a request object
2195 *
2196 * Check usb_ep_free_request() at "usb_gadget.h" for details
2197 */
2198 static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
2199 {
2200 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2201 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
2202 unsigned long flags;
2203
2204 trace("%p, %p", ep, req);
2205
2206 if (ep == NULL || req == NULL) {
2207 err("EINVAL");
2208 return;
2209 } else if (!list_empty(&mReq->queue)) {
2210 err("EBUSY");
2211 return;
2212 }
2213
2214 spin_lock_irqsave(mEp->lock, flags);
2215
2216 if (mReq->ptr)
2217 dma_pool_free(mEp->td_pool, mReq->ptr, mReq->dma);
2218 kfree(mReq);
2219
2220 dbg_event(_usb_addr(mEp), "FREE", 0);
2221
2222 spin_unlock_irqrestore(mEp->lock, flags);
2223 }
2224
2225 /**
2226 * ep_queue: queues (submits) an I/O request to an endpoint
2227 *
2228 * Check usb_ep_queue()* at usb_gadget.h" for details
2229 */
2230 static int ep_queue(struct usb_ep *ep, struct usb_request *req,
2231 gfp_t __maybe_unused gfp_flags)
2232 {
2233 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2234 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
2235 int retval = 0;
2236 unsigned long flags;
2237
2238 trace("%p, %p, %X", ep, req, gfp_flags);
2239
2240 if (ep == NULL || req == NULL || mEp->desc == NULL)
2241 return -EINVAL;
2242
2243 spin_lock_irqsave(mEp->lock, flags);
2244
2245 if (mEp->type == USB_ENDPOINT_XFER_CONTROL &&
2246 !list_empty(&mEp->qh.queue)) {
2247 _ep_nuke(mEp);
2248 retval = -EOVERFLOW;
2249 warn("endpoint ctrl %X nuked", _usb_addr(mEp));
2250 }
2251
2252 /* first nuke then test link, e.g. previous status has not sent */
2253 if (!list_empty(&mReq->queue)) {
2254 retval = -EBUSY;
2255 err("request already in queue");
2256 goto done;
2257 }
2258
2259 if (req->length > (4 * CI13XXX_PAGE_SIZE)) {
2260 req->length = (4 * CI13XXX_PAGE_SIZE);
2261 retval = -EMSGSIZE;
2262 warn("request length truncated");
2263 }
2264
2265 dbg_queue(_usb_addr(mEp), req, retval);
2266
2267 /* push request */
2268 mReq->req.status = -EINPROGRESS;
2269 mReq->req.actual = 0;
2270
2271 retval = _hardware_enqueue(mEp, mReq);
2272
2273 if (retval == -EALREADY) {
2274 dbg_event(_usb_addr(mEp), "QUEUE", retval);
2275 retval = 0;
2276 }
2277 if (!retval)
2278 list_add_tail(&mReq->queue, &mEp->qh.queue);
2279
2280 done:
2281 spin_unlock_irqrestore(mEp->lock, flags);
2282 return retval;
2283 }
2284
2285 /**
2286 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
2287 *
2288 * Check usb_ep_dequeue() at "usb_gadget.h" for details
2289 */
2290 static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
2291 {
2292 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2293 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
2294 unsigned long flags;
2295
2296 trace("%p, %p", ep, req);
2297
2298 if (ep == NULL || req == NULL || mReq->req.status != -EALREADY ||
2299 mEp->desc == NULL || list_empty(&mReq->queue) ||
2300 list_empty(&mEp->qh.queue))
2301 return -EINVAL;
2302
2303 spin_lock_irqsave(mEp->lock, flags);
2304
2305 dbg_event(_usb_addr(mEp), "DEQUEUE", 0);
2306
2307 hw_ep_flush(mEp->num, mEp->dir);
2308
2309 /* pop request */
2310 list_del_init(&mReq->queue);
2311 if (mReq->map) {
2312 dma_unmap_single(mEp->device, mReq->req.dma, mReq->req.length,
2313 mEp->dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
2314 mReq->req.dma = 0;
2315 mReq->map = 0;
2316 }
2317 req->status = -ECONNRESET;
2318
2319 if (mReq->req.complete != NULL) {
2320 spin_unlock(mEp->lock);
2321 mReq->req.complete(&mEp->ep, &mReq->req);
2322 spin_lock(mEp->lock);
2323 }
2324
2325 spin_unlock_irqrestore(mEp->lock, flags);
2326 return 0;
2327 }
2328
2329 /**
2330 * ep_set_halt: sets the endpoint halt feature
2331 *
2332 * Check usb_ep_set_halt() at "usb_gadget.h" for details
2333 */
2334 static int ep_set_halt(struct usb_ep *ep, int value)
2335 {
2336 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2337 int direction, retval = 0;
2338 unsigned long flags;
2339
2340 trace("%p, %i", ep, value);
2341
2342 if (ep == NULL || mEp->desc == NULL)
2343 return -EINVAL;
2344
2345 spin_lock_irqsave(mEp->lock, flags);
2346
2347 #ifndef STALL_IN
2348 /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
2349 if (value && mEp->type == USB_ENDPOINT_XFER_BULK && mEp->dir == TX &&
2350 !list_empty(&mEp->qh.queue)) {
2351 spin_unlock_irqrestore(mEp->lock, flags);
2352 return -EAGAIN;
2353 }
2354 #endif
2355
2356 direction = mEp->dir;
2357 do {
2358 dbg_event(_usb_addr(mEp), "HALT", value);
2359 retval |= hw_ep_set_halt(mEp->num, mEp->dir, value);
2360
2361 if (!value)
2362 mEp->wedge = 0;
2363
2364 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
2365 mEp->dir = (mEp->dir == TX) ? RX : TX;
2366
2367 } while (mEp->dir != direction);
2368
2369 spin_unlock_irqrestore(mEp->lock, flags);
2370 return retval;
2371 }
2372
2373 /**
2374 * ep_set_wedge: sets the halt feature and ignores clear requests
2375 *
2376 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
2377 */
2378 static int ep_set_wedge(struct usb_ep *ep)
2379 {
2380 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2381 unsigned long flags;
2382
2383 trace("%p", ep);
2384
2385 if (ep == NULL || mEp->desc == NULL)
2386 return -EINVAL;
2387
2388 spin_lock_irqsave(mEp->lock, flags);
2389
2390 dbg_event(_usb_addr(mEp), "WEDGE", 0);
2391 mEp->wedge = 1;
2392
2393 spin_unlock_irqrestore(mEp->lock, flags);
2394
2395 return usb_ep_set_halt(ep);
2396 }
2397
2398 /**
2399 * ep_fifo_flush: flushes contents of a fifo
2400 *
2401 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
2402 */
2403 static void ep_fifo_flush(struct usb_ep *ep)
2404 {
2405 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2406 unsigned long flags;
2407
2408 trace("%p", ep);
2409
2410 if (ep == NULL) {
2411 err("%02X: -EINVAL", _usb_addr(mEp));
2412 return;
2413 }
2414
2415 spin_lock_irqsave(mEp->lock, flags);
2416
2417 dbg_event(_usb_addr(mEp), "FFLUSH", 0);
2418 hw_ep_flush(mEp->num, mEp->dir);
2419
2420 spin_unlock_irqrestore(mEp->lock, flags);
2421 }
2422
2423 /**
2424 * Endpoint-specific part of the API to the USB controller hardware
2425 * Check "usb_gadget.h" for details
2426 */
2427 static const struct usb_ep_ops usb_ep_ops = {
2428 .enable = ep_enable,
2429 .disable = ep_disable,
2430 .alloc_request = ep_alloc_request,
2431 .free_request = ep_free_request,
2432 .queue = ep_queue,
2433 .dequeue = ep_dequeue,
2434 .set_halt = ep_set_halt,
2435 .set_wedge = ep_set_wedge,
2436 .fifo_flush = ep_fifo_flush,
2437 };
2438
2439 /******************************************************************************
2440 * GADGET block
2441 *****************************************************************************/
2442 static int ci13xxx_vbus_session(struct usb_gadget *_gadget, int is_active)
2443 {
2444 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
2445 unsigned long flags;
2446 int gadget_ready = 0;
2447
2448 if (!(udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS))
2449 return -EOPNOTSUPP;
2450
2451 spin_lock_irqsave(udc->lock, flags);
2452 udc->vbus_active = is_active;
2453 if (udc->driver)
2454 gadget_ready = 1;
2455 spin_unlock_irqrestore(udc->lock, flags);
2456
2457 if (gadget_ready) {
2458 if (is_active) {
2459 pm_runtime_get_sync(&_gadget->dev);
2460 hw_device_reset(udc);
2461 hw_device_state(udc->ep0out.qh.dma);
2462 } else {
2463 hw_device_state(0);
2464 if (udc->udc_driver->notify_event)
2465 udc->udc_driver->notify_event(udc,
2466 CI13XXX_CONTROLLER_STOPPED_EVENT);
2467 _gadget_stop_activity(&udc->gadget);
2468 pm_runtime_put_sync(&_gadget->dev);
2469 }
2470 }
2471
2472 return 0;
2473 }
2474
2475 static int ci13xxx_wakeup(struct usb_gadget *_gadget)
2476 {
2477 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
2478 unsigned long flags;
2479 int ret = 0;
2480
2481 trace();
2482
2483 spin_lock_irqsave(udc->lock, flags);
2484 if (!udc->remote_wakeup) {
2485 ret = -EOPNOTSUPP;
2486 dbg_trace("remote wakeup feature is not enabled\n");
2487 goto out;
2488 }
2489 if (!hw_cread(CAP_PORTSC, PORTSC_SUSP)) {
2490 ret = -EINVAL;
2491 dbg_trace("port is not suspended\n");
2492 goto out;
2493 }
2494 hw_cwrite(CAP_PORTSC, PORTSC_FPR, PORTSC_FPR);
2495 out:
2496 spin_unlock_irqrestore(udc->lock, flags);
2497 return ret;
2498 }
2499
2500 /**
2501 * Device operations part of the API to the USB controller hardware,
2502 * which don't involve endpoints (or i/o)
2503 * Check "usb_gadget.h" for details
2504 */
2505 static const struct usb_gadget_ops usb_gadget_ops = {
2506 .vbus_session = ci13xxx_vbus_session,
2507 .wakeup = ci13xxx_wakeup,
2508 };
2509
2510 /**
2511 * usb_gadget_probe_driver: register a gadget driver
2512 * @driver: the driver being registered
2513 * @bind: the driver's bind callback
2514 *
2515 * Check usb_gadget_probe_driver() at <linux/usb/gadget.h> for details.
2516 * Interrupts are enabled here.
2517 */
2518 int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
2519 int (*bind)(struct usb_gadget *))
2520 {
2521 struct ci13xxx *udc = _udc;
2522 unsigned long flags;
2523 int i, j;
2524 int retval = -ENOMEM;
2525
2526 trace("%p", driver);
2527
2528 if (driver == NULL ||
2529 bind == NULL ||
2530 driver->setup == NULL ||
2531 driver->disconnect == NULL ||
2532 driver->suspend == NULL ||
2533 driver->resume == NULL)
2534 return -EINVAL;
2535 else if (udc == NULL)
2536 return -ENODEV;
2537 else if (udc->driver != NULL)
2538 return -EBUSY;
2539
2540 /* alloc resources */
2541 udc->qh_pool = dma_pool_create("ci13xxx_qh", &udc->gadget.dev,
2542 sizeof(struct ci13xxx_qh),
2543 64, CI13XXX_PAGE_SIZE);
2544 if (udc->qh_pool == NULL)
2545 return -ENOMEM;
2546
2547 udc->td_pool = dma_pool_create("ci13xxx_td", &udc->gadget.dev,
2548 sizeof(struct ci13xxx_td),
2549 64, CI13XXX_PAGE_SIZE);
2550 if (udc->td_pool == NULL) {
2551 dma_pool_destroy(udc->qh_pool);
2552 udc->qh_pool = NULL;
2553 return -ENOMEM;
2554 }
2555
2556 spin_lock_irqsave(udc->lock, flags);
2557
2558 info("hw_ep_max = %d", hw_ep_max);
2559
2560 udc->gadget.dev.driver = NULL;
2561
2562 retval = 0;
2563 for (i = 0; i < hw_ep_max/2; i++) {
2564 for (j = RX; j <= TX; j++) {
2565 int k = i + j * hw_ep_max/2;
2566 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[k];
2567
2568 scnprintf(mEp->name, sizeof(mEp->name), "ep%i%s", i,
2569 (j == TX) ? "in" : "out");
2570
2571 mEp->lock = udc->lock;
2572 mEp->device = &udc->gadget.dev;
2573 mEp->td_pool = udc->td_pool;
2574
2575 mEp->ep.name = mEp->name;
2576 mEp->ep.ops = &usb_ep_ops;
2577 mEp->ep.maxpacket = CTRL_PAYLOAD_MAX;
2578
2579 INIT_LIST_HEAD(&mEp->qh.queue);
2580 spin_unlock_irqrestore(udc->lock, flags);
2581 mEp->qh.ptr = dma_pool_alloc(udc->qh_pool, GFP_KERNEL,
2582 &mEp->qh.dma);
2583 spin_lock_irqsave(udc->lock, flags);
2584 if (mEp->qh.ptr == NULL)
2585 retval = -ENOMEM;
2586 else
2587 memset(mEp->qh.ptr, 0, sizeof(*mEp->qh.ptr));
2588
2589 /* skip ep0 out and in endpoints */
2590 if (i == 0)
2591 continue;
2592
2593 list_add_tail(&mEp->ep.ep_list, &udc->gadget.ep_list);
2594 }
2595 }
2596 if (retval)
2597 goto done;
2598
2599 udc->gadget.ep0 = &udc->ep0in.ep;
2600 /* bind gadget */
2601 driver->driver.bus = NULL;
2602 udc->gadget.dev.driver = &driver->driver;
2603
2604 spin_unlock_irqrestore(udc->lock, flags);
2605 retval = bind(&udc->gadget); /* MAY SLEEP */
2606 spin_lock_irqsave(udc->lock, flags);
2607
2608 if (retval) {
2609 udc->gadget.dev.driver = NULL;
2610 goto done;
2611 }
2612
2613 udc->driver = driver;
2614 pm_runtime_get_sync(&udc->gadget.dev);
2615 if (udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS) {
2616 if (udc->vbus_active) {
2617 if (udc->udc_driver->flags & CI13XXX_REGS_SHARED)
2618 hw_device_reset(udc);
2619 } else {
2620 pm_runtime_put_sync(&udc->gadget.dev);
2621 goto done;
2622 }
2623 }
2624
2625 retval = hw_device_state(udc->ep0out.qh.dma);
2626 if (retval)
2627 pm_runtime_put_sync(&udc->gadget.dev);
2628
2629 done:
2630 spin_unlock_irqrestore(udc->lock, flags);
2631 return retval;
2632 }
2633 EXPORT_SYMBOL(usb_gadget_probe_driver);
2634
2635 /**
2636 * usb_gadget_unregister_driver: unregister a gadget driver
2637 *
2638 * Check usb_gadget_unregister_driver() at "usb_gadget.h" for details
2639 */
2640 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
2641 {
2642 struct ci13xxx *udc = _udc;
2643 unsigned long i, flags;
2644
2645 trace("%p", driver);
2646
2647 if (driver == NULL ||
2648 driver->unbind == NULL ||
2649 driver->setup == NULL ||
2650 driver->disconnect == NULL ||
2651 driver->suspend == NULL ||
2652 driver->resume == NULL ||
2653 driver != udc->driver)
2654 return -EINVAL;
2655
2656 spin_lock_irqsave(udc->lock, flags);
2657
2658 if (!(udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS) ||
2659 udc->vbus_active) {
2660 hw_device_state(0);
2661 if (udc->udc_driver->notify_event)
2662 udc->udc_driver->notify_event(udc,
2663 CI13XXX_CONTROLLER_STOPPED_EVENT);
2664 _gadget_stop_activity(&udc->gadget);
2665 pm_runtime_put(&udc->gadget.dev);
2666 }
2667
2668 /* unbind gadget */
2669 spin_unlock_irqrestore(udc->lock, flags);
2670 driver->unbind(&udc->gadget); /* MAY SLEEP */
2671 spin_lock_irqsave(udc->lock, flags);
2672
2673 udc->gadget.dev.driver = NULL;
2674
2675 /* free resources */
2676 for (i = 0; i < hw_ep_max; i++) {
2677 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
2678
2679 if (!list_empty(&mEp->ep.ep_list))
2680 list_del_init(&mEp->ep.ep_list);
2681
2682 if (mEp->qh.ptr != NULL)
2683 dma_pool_free(udc->qh_pool, mEp->qh.ptr, mEp->qh.dma);
2684 }
2685
2686 udc->gadget.ep0 = NULL;
2687 udc->driver = NULL;
2688
2689 spin_unlock_irqrestore(udc->lock, flags);
2690
2691 if (udc->td_pool != NULL) {
2692 dma_pool_destroy(udc->td_pool);
2693 udc->td_pool = NULL;
2694 }
2695 if (udc->qh_pool != NULL) {
2696 dma_pool_destroy(udc->qh_pool);
2697 udc->qh_pool = NULL;
2698 }
2699
2700 return 0;
2701 }
2702 EXPORT_SYMBOL(usb_gadget_unregister_driver);
2703
2704 /******************************************************************************
2705 * BUS block
2706 *****************************************************************************/
2707 /**
2708 * udc_irq: global interrupt handler
2709 *
2710 * This function returns IRQ_HANDLED if the IRQ has been handled
2711 * It locks access to registers
2712 */
2713 static irqreturn_t udc_irq(void)
2714 {
2715 struct ci13xxx *udc = _udc;
2716 irqreturn_t retval;
2717 u32 intr;
2718
2719 trace();
2720
2721 if (udc == NULL) {
2722 err("ENODEV");
2723 return IRQ_HANDLED;
2724 }
2725
2726 spin_lock(udc->lock);
2727
2728 if (udc->udc_driver->flags & CI13XXX_REGS_SHARED) {
2729 if (hw_cread(CAP_USBMODE, USBMODE_CM) !=
2730 USBMODE_CM_DEVICE) {
2731 spin_unlock(udc->lock);
2732 return IRQ_NONE;
2733 }
2734 }
2735 intr = hw_test_and_clear_intr_active();
2736 if (intr) {
2737 isr_statistics.hndl.buf[isr_statistics.hndl.idx++] = intr;
2738 isr_statistics.hndl.idx &= ISR_MASK;
2739 isr_statistics.hndl.cnt++;
2740
2741 /* order defines priority - do NOT change it */
2742 if (USBi_URI & intr) {
2743 isr_statistics.uri++;
2744 isr_reset_handler(udc);
2745 }
2746 if (USBi_PCI & intr) {
2747 isr_statistics.pci++;
2748 udc->gadget.speed = hw_port_is_high_speed() ?
2749 USB_SPEED_HIGH : USB_SPEED_FULL;
2750 if (udc->suspended) {
2751 spin_unlock(udc->lock);
2752 udc->driver->resume(&udc->gadget);
2753 spin_lock(udc->lock);
2754 udc->suspended = 0;
2755 }
2756 }
2757 if (USBi_UEI & intr)
2758 isr_statistics.uei++;
2759 if (USBi_UI & intr) {
2760 isr_statistics.ui++;
2761 isr_tr_complete_handler(udc);
2762 }
2763 if (USBi_SLI & intr) {
2764 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
2765 udc->suspended = 1;
2766 spin_unlock(udc->lock);
2767 udc->driver->suspend(&udc->gadget);
2768 spin_lock(udc->lock);
2769 }
2770 isr_statistics.sli++;
2771 }
2772 retval = IRQ_HANDLED;
2773 } else {
2774 isr_statistics.none++;
2775 retval = IRQ_NONE;
2776 }
2777 spin_unlock(udc->lock);
2778
2779 return retval;
2780 }
2781
2782 /**
2783 * udc_release: driver release function
2784 * @dev: device
2785 *
2786 * Currently does nothing
2787 */
2788 static void udc_release(struct device *dev)
2789 {
2790 trace("%p", dev);
2791
2792 if (dev == NULL)
2793 err("EINVAL");
2794 }
2795
2796 /**
2797 * udc_probe: parent probe must call this to initialize UDC
2798 * @dev: parent device
2799 * @regs: registers base address
2800 * @name: driver name
2801 *
2802 * This function returns an error code
2803 * No interrupts active, the IRQ has not been requested yet
2804 * Kernel assumes 32-bit DMA operations by default, no need to dma_set_mask
2805 */
2806 static int udc_probe(struct ci13xxx_udc_driver *driver, struct device *dev,
2807 void __iomem *regs)
2808 {
2809 struct ci13xxx *udc;
2810 int retval = 0;
2811
2812 trace("%p, %p, %p", dev, regs, name);
2813
2814 if (dev == NULL || regs == NULL || driver == NULL ||
2815 driver->name == NULL)
2816 return -EINVAL;
2817
2818 udc = kzalloc(sizeof(struct ci13xxx), GFP_KERNEL);
2819 if (udc == NULL)
2820 return -ENOMEM;
2821
2822 udc->lock = &udc_lock;
2823 udc->regs = regs;
2824 udc->udc_driver = driver;
2825
2826 udc->gadget.ops = &usb_gadget_ops;
2827 udc->gadget.speed = USB_SPEED_UNKNOWN;
2828 udc->gadget.is_dualspeed = 1;
2829 udc->gadget.is_otg = 0;
2830 udc->gadget.name = driver->name;
2831
2832 INIT_LIST_HEAD(&udc->gadget.ep_list);
2833 udc->gadget.ep0 = NULL;
2834
2835 dev_set_name(&udc->gadget.dev, "gadget");
2836 udc->gadget.dev.dma_mask = dev->dma_mask;
2837 udc->gadget.dev.coherent_dma_mask = dev->coherent_dma_mask;
2838 udc->gadget.dev.parent = dev;
2839 udc->gadget.dev.release = udc_release;
2840
2841 retval = hw_device_init(regs);
2842 if (retval < 0)
2843 goto free_udc;
2844
2845 udc->transceiver = otg_get_transceiver();
2846
2847 if (udc->udc_driver->flags & CI13XXX_REQUIRE_TRANSCEIVER) {
2848 if (udc->transceiver == NULL) {
2849 retval = -ENODEV;
2850 goto free_udc;
2851 }
2852 }
2853
2854 if (!(udc->udc_driver->flags & CI13XXX_REGS_SHARED)) {
2855 retval = hw_device_reset(udc);
2856 if (retval)
2857 goto put_transceiver;
2858 }
2859
2860 retval = device_register(&udc->gadget.dev);
2861 if (retval) {
2862 put_device(&udc->gadget.dev);
2863 goto put_transceiver;
2864 }
2865
2866 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
2867 retval = dbg_create_files(&udc->gadget.dev);
2868 #endif
2869 if (retval)
2870 goto unreg_device;
2871
2872 if (udc->transceiver) {
2873 retval = otg_set_peripheral(udc->transceiver, &udc->gadget);
2874 if (retval)
2875 goto remove_dbg;
2876 }
2877 pm_runtime_no_callbacks(&udc->gadget.dev);
2878 pm_runtime_enable(&udc->gadget.dev);
2879
2880 _udc = udc;
2881 return retval;
2882
2883 err("error = %i", retval);
2884 remove_dbg:
2885 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
2886 dbg_remove_files(&udc->gadget.dev);
2887 #endif
2888 unreg_device:
2889 device_unregister(&udc->gadget.dev);
2890 put_transceiver:
2891 if (udc->transceiver)
2892 otg_put_transceiver(udc->transceiver);
2893 free_udc:
2894 kfree(udc);
2895 _udc = NULL;
2896 return retval;
2897 }
2898
2899 /**
2900 * udc_remove: parent remove must call this to remove UDC
2901 *
2902 * No interrupts active, the IRQ has been released
2903 */
2904 static void udc_remove(void)
2905 {
2906 struct ci13xxx *udc = _udc;
2907
2908 if (udc == NULL) {
2909 err("EINVAL");
2910 return;
2911 }
2912
2913 if (udc->transceiver) {
2914 otg_set_peripheral(udc->transceiver, &udc->gadget);
2915 otg_put_transceiver(udc->transceiver);
2916 }
2917 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
2918 dbg_remove_files(&udc->gadget.dev);
2919 #endif
2920 device_unregister(&udc->gadget.dev);
2921
2922 kfree(udc);
2923 _udc = NULL;
2924 }
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree