1 /***************************************************************************
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 ***************************************************************************
21 * Rewritten, heavily based on smsc911x simple driver by SMSC.
22 * Partly uses io macros from smc91x.c by Nicolas Pitre
25 * LAN9115, LAN9116, LAN9117, LAN9118
26 * LAN9215, LAN9216, LAN9217, LAN9218
32 #include <linux/crc32.h>
33 #include <linux/delay.h>
34 #include <linux/errno.h>
35 #include <linux/etherdevice.h>
36 #include <linux/ethtool.h>
37 #include <linux/init.h>
38 #include <linux/ioport.h>
39 #include <linux/kernel.h>
40 #include <linux/module.h>
41 #include <linux/netdevice.h>
42 #include <linux/platform_device.h>
43 #include <linux/sched.h>
44 #include <linux/timer.h>
45 #include <linux/bug.h>
46 #include <linux/bitops.h>
47 #include <linux/irq.h>
49 #include <linux/swab.h>
50 #include <linux/phy.h>
51 #include <linux/smsc911x.h>
52 #include <linux/device.h>
55 #define SMSC_CHIPNAME "smsc911x"
56 #define SMSC_MDIONAME "smsc911x-mdio"
57 #define SMSC_DRV_VERSION "2008-10-21"
59 MODULE_LICENSE("GPL");
60 MODULE_VERSION(SMSC_DRV_VERSION
);
63 static int debug
= 16;
68 module_param(debug
, int, 0);
69 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
71 struct smsc911x_data
{
76 /* used to decide which workarounds apply */
77 unsigned int generation
;
79 /* device configuration (copied from platform_data during probe) */
80 struct smsc911x_platform_config config
;
82 /* This needs to be acquired before calling any of below:
83 * smsc911x_mac_read(), smsc911x_mac_write()
87 /* spinlock to ensure register accesses are serialised */
90 struct phy_device
*phy_dev
;
91 struct mii_bus
*mii_bus
;
92 int phy_irq
[PHY_MAX_ADDR
];
93 unsigned int using_extphy
;
98 unsigned int gpio_setting
;
99 unsigned int gpio_orig_setting
;
100 struct net_device
*dev
;
101 struct napi_struct napi
;
103 unsigned int software_irq_signal
;
105 #ifdef USE_PHY_WORK_AROUND
106 #define MIN_PACKET_SIZE (64)
107 char loopback_tx_pkt
[MIN_PACKET_SIZE
];
108 char loopback_rx_pkt
[MIN_PACKET_SIZE
];
109 unsigned int resetcount
;
112 /* Members for Multicast filter workaround */
113 unsigned int multicast_update_pending
;
114 unsigned int set_bits_mask
;
115 unsigned int clear_bits_mask
;
120 static inline u32
__smsc911x_reg_read(struct smsc911x_data
*pdata
, u32 reg
)
122 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
)
123 return readl(pdata
->ioaddr
+ reg
);
125 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
)
126 return ((readw(pdata
->ioaddr
+ reg
) & 0xFFFF) |
127 ((readw(pdata
->ioaddr
+ reg
+ 2) & 0xFFFF) << 16));
133 static inline u32
smsc911x_reg_read(struct smsc911x_data
*pdata
, u32 reg
)
138 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
139 data
= __smsc911x_reg_read(pdata
, reg
);
140 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
145 static inline void __smsc911x_reg_write(struct smsc911x_data
*pdata
, u32 reg
,
148 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
149 writel(val
, pdata
->ioaddr
+ reg
);
153 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
154 writew(val
& 0xFFFF, pdata
->ioaddr
+ reg
);
155 writew((val
>> 16) & 0xFFFF, pdata
->ioaddr
+ reg
+ 2);
162 static inline void smsc911x_reg_write(struct smsc911x_data
*pdata
, u32 reg
,
167 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
168 __smsc911x_reg_write(pdata
, reg
, val
);
169 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
172 /* Writes a packet to the TX_DATA_FIFO */
174 smsc911x_tx_writefifo(struct smsc911x_data
*pdata
, unsigned int *buf
,
175 unsigned int wordcount
)
179 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
181 if (pdata
->config
.flags
& SMSC911X_SWAP_FIFO
) {
183 __smsc911x_reg_write(pdata
, TX_DATA_FIFO
,
188 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
189 writesl(pdata
->ioaddr
+ TX_DATA_FIFO
, buf
, wordcount
);
193 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
195 __smsc911x_reg_write(pdata
, TX_DATA_FIFO
, *buf
++);
201 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
204 /* Reads a packet out of the RX_DATA_FIFO */
206 smsc911x_rx_readfifo(struct smsc911x_data
*pdata
, unsigned int *buf
,
207 unsigned int wordcount
)
211 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
213 if (pdata
->config
.flags
& SMSC911X_SWAP_FIFO
) {
215 *buf
++ = swab32(__smsc911x_reg_read(pdata
,
220 if (pdata
->config
.flags
& SMSC911X_USE_32BIT
) {
221 readsl(pdata
->ioaddr
+ RX_DATA_FIFO
, buf
, wordcount
);
225 if (pdata
->config
.flags
& SMSC911X_USE_16BIT
) {
227 *buf
++ = __smsc911x_reg_read(pdata
, RX_DATA_FIFO
);
233 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
236 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
237 * and smsc911x_mac_write, so assumes mac_lock is held */
238 static int smsc911x_mac_complete(struct smsc911x_data
*pdata
)
243 SMSC_ASSERT_MAC_LOCK(pdata
);
245 for (i
= 0; i
< 40; i
++) {
246 val
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
247 if (!(val
& MAC_CSR_CMD_CSR_BUSY_
))
250 SMSC_WARNING(HW
, "Timed out waiting for MAC not BUSY. "
251 "MAC_CSR_CMD: 0x%08X", val
);
255 /* Fetches a MAC register value. Assumes mac_lock is acquired */
256 static u32
smsc911x_mac_read(struct smsc911x_data
*pdata
, unsigned int offset
)
260 SMSC_ASSERT_MAC_LOCK(pdata
);
262 temp
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
263 if (unlikely(temp
& MAC_CSR_CMD_CSR_BUSY_
)) {
264 SMSC_WARNING(HW
, "MAC busy at entry");
268 /* Send the MAC cmd */
269 smsc911x_reg_write(pdata
, MAC_CSR_CMD
, ((offset
& 0xFF) |
270 MAC_CSR_CMD_CSR_BUSY_
| MAC_CSR_CMD_R_NOT_W_
));
272 /* Workaround for hardware read-after-write restriction */
273 temp
= smsc911x_reg_read(pdata
, BYTE_TEST
);
275 /* Wait for the read to complete */
276 if (likely(smsc911x_mac_complete(pdata
) == 0))
277 return smsc911x_reg_read(pdata
, MAC_CSR_DATA
);
279 SMSC_WARNING(HW
, "MAC busy after read");
283 /* Set a mac register, mac_lock must be acquired before calling */
284 static void smsc911x_mac_write(struct smsc911x_data
*pdata
,
285 unsigned int offset
, u32 val
)
289 SMSC_ASSERT_MAC_LOCK(pdata
);
291 temp
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
292 if (unlikely(temp
& MAC_CSR_CMD_CSR_BUSY_
)) {
294 "smsc911x_mac_write failed, MAC busy at entry");
298 /* Send data to write */
299 smsc911x_reg_write(pdata
, MAC_CSR_DATA
, val
);
301 /* Write the actual data */
302 smsc911x_reg_write(pdata
, MAC_CSR_CMD
, ((offset
& 0xFF) |
303 MAC_CSR_CMD_CSR_BUSY_
));
305 /* Workaround for hardware read-after-write restriction */
306 temp
= smsc911x_reg_read(pdata
, BYTE_TEST
);
308 /* Wait for the write to complete */
309 if (likely(smsc911x_mac_complete(pdata
) == 0))
313 "smsc911x_mac_write failed, MAC busy after write");
316 /* Get a phy register */
317 static int smsc911x_mii_read(struct mii_bus
*bus
, int phyaddr
, int regidx
)
319 struct smsc911x_data
*pdata
= (struct smsc911x_data
*)bus
->priv
;
324 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
326 /* Confirm MII not busy */
327 if (unlikely(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
329 "MII is busy in smsc911x_mii_read???");
334 /* Set the address, index & direction (read from PHY) */
335 addr
= ((phyaddr
& 0x1F) << 11) | ((regidx
& 0x1F) << 6);
336 smsc911x_mac_write(pdata
, MII_ACC
, addr
);
338 /* Wait for read to complete w/ timeout */
339 for (i
= 0; i
< 100; i
++)
340 if (!(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
341 reg
= smsc911x_mac_read(pdata
, MII_DATA
);
345 SMSC_WARNING(HW
, "Timed out waiting for MII read to finish");
349 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
353 /* Set a phy register */
354 static int smsc911x_mii_write(struct mii_bus
*bus
, int phyaddr
, int regidx
,
357 struct smsc911x_data
*pdata
= (struct smsc911x_data
*)bus
->priv
;
362 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
364 /* Confirm MII not busy */
365 if (unlikely(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
367 "MII is busy in smsc911x_mii_write???");
372 /* Put the data to write in the MAC */
373 smsc911x_mac_write(pdata
, MII_DATA
, val
);
375 /* Set the address, index & direction (write to PHY) */
376 addr
= ((phyaddr
& 0x1F) << 11) | ((regidx
& 0x1F) << 6) |
378 smsc911x_mac_write(pdata
, MII_ACC
, addr
);
380 /* Wait for write to complete w/ timeout */
381 for (i
= 0; i
< 100; i
++)
382 if (!(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
387 SMSC_WARNING(HW
, "Timed out waiting for MII write to finish");
391 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
395 /* Switch to external phy. Assumes tx and rx are stopped. */
396 static void smsc911x_phy_enable_external(struct smsc911x_data
*pdata
)
398 unsigned int hwcfg
= smsc911x_reg_read(pdata
, HW_CFG
);
400 /* Disable phy clocks to the MAC */
401 hwcfg
&= (~HW_CFG_PHY_CLK_SEL_
);
402 hwcfg
|= HW_CFG_PHY_CLK_SEL_CLK_DIS_
;
403 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
404 udelay(10); /* Enough time for clocks to stop */
406 /* Switch to external phy */
407 hwcfg
|= HW_CFG_EXT_PHY_EN_
;
408 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
410 /* Enable phy clocks to the MAC */
411 hwcfg
&= (~HW_CFG_PHY_CLK_SEL_
);
412 hwcfg
|= HW_CFG_PHY_CLK_SEL_EXT_PHY_
;
413 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
414 udelay(10); /* Enough time for clocks to restart */
416 hwcfg
|= HW_CFG_SMI_SEL_
;
417 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
420 /* Autodetects and enables external phy if present on supported chips.
421 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
422 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
423 static void smsc911x_phy_initialise_external(struct smsc911x_data
*pdata
)
425 unsigned int hwcfg
= smsc911x_reg_read(pdata
, HW_CFG
);
427 if (pdata
->config
.flags
& SMSC911X_FORCE_INTERNAL_PHY
) {
428 SMSC_TRACE(HW
, "Forcing internal PHY");
429 pdata
->using_extphy
= 0;
430 } else if (pdata
->config
.flags
& SMSC911X_FORCE_EXTERNAL_PHY
) {
431 SMSC_TRACE(HW
, "Forcing external PHY");
432 smsc911x_phy_enable_external(pdata
);
433 pdata
->using_extphy
= 1;
434 } else if (hwcfg
& HW_CFG_EXT_PHY_DET_
) {
435 SMSC_TRACE(HW
, "HW_CFG EXT_PHY_DET set, using external PHY");
436 smsc911x_phy_enable_external(pdata
);
437 pdata
->using_extphy
= 1;
439 SMSC_TRACE(HW
, "HW_CFG EXT_PHY_DET clear, using internal PHY");
440 pdata
->using_extphy
= 0;
444 /* Fetches a tx status out of the status fifo */
445 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data
*pdata
)
447 unsigned int result
=
448 smsc911x_reg_read(pdata
, TX_FIFO_INF
) & TX_FIFO_INF_TSUSED_
;
451 result
= smsc911x_reg_read(pdata
, TX_STATUS_FIFO
);
456 /* Fetches the next rx status */
457 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data
*pdata
)
459 unsigned int result
=
460 smsc911x_reg_read(pdata
, RX_FIFO_INF
) & RX_FIFO_INF_RXSUSED_
;
463 result
= smsc911x_reg_read(pdata
, RX_STATUS_FIFO
);
468 #ifdef USE_PHY_WORK_AROUND
469 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data
*pdata
)
476 for (tries
= 0; tries
< 10; tries
++) {
477 unsigned int txcmd_a
;
478 unsigned int txcmd_b
;
480 unsigned int pktlength
;
483 /* Zero-out rx packet memory */
484 memset(pdata
->loopback_rx_pkt
, 0, MIN_PACKET_SIZE
);
486 /* Write tx packet to 118 */
487 txcmd_a
= (u32
)((ulong
)pdata
->loopback_tx_pkt
& 0x03) << 16;
488 txcmd_a
|= TX_CMD_A_FIRST_SEG_
| TX_CMD_A_LAST_SEG_
;
489 txcmd_a
|= MIN_PACKET_SIZE
;
491 txcmd_b
= MIN_PACKET_SIZE
<< 16 | MIN_PACKET_SIZE
;
493 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, txcmd_a
);
494 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, txcmd_b
);
496 bufp
= (ulong
)pdata
->loopback_tx_pkt
& (~0x3);
497 wrsz
= MIN_PACKET_SIZE
+ 3;
498 wrsz
+= (u32
)((ulong
)pdata
->loopback_tx_pkt
& 0x3);
501 smsc911x_tx_writefifo(pdata
, (unsigned int *)bufp
, wrsz
);
503 /* Wait till transmit is done */
507 status
= smsc911x_tx_get_txstatus(pdata
);
508 } while ((i
--) && (!status
));
511 SMSC_WARNING(HW
, "Failed to transmit "
512 "during loopback test");
515 if (status
& TX_STS_ES_
) {
516 SMSC_WARNING(HW
, "Transmit encountered "
517 "errors during loopback test");
521 /* Wait till receive is done */
525 status
= smsc911x_rx_get_rxstatus(pdata
);
526 } while ((i
--) && (!status
));
530 "Failed to receive during loopback test");
533 if (status
& RX_STS_ES_
) {
534 SMSC_WARNING(HW
, "Receive encountered "
535 "errors during loopback test");
539 pktlength
= ((status
& 0x3FFF0000UL
) >> 16);
540 bufp
= (ulong
)pdata
->loopback_rx_pkt
;
541 rdsz
= pktlength
+ 3;
542 rdsz
+= (u32
)((ulong
)pdata
->loopback_rx_pkt
& 0x3);
545 smsc911x_rx_readfifo(pdata
, (unsigned int *)bufp
, rdsz
);
547 if (pktlength
!= (MIN_PACKET_SIZE
+ 4)) {
548 SMSC_WARNING(HW
, "Unexpected packet size "
549 "during loop back test, size=%d, will retry",
554 for (j
= 0; j
< MIN_PACKET_SIZE
; j
++) {
555 if (pdata
->loopback_tx_pkt
[j
]
556 != pdata
->loopback_rx_pkt
[j
]) {
562 SMSC_TRACE(HW
, "Successfully verified "
566 SMSC_WARNING(HW
, "Data mismatch "
567 "during loop back test, will retry");
575 static int smsc911x_phy_reset(struct smsc911x_data
*pdata
)
577 struct phy_device
*phy_dev
= pdata
->phy_dev
;
579 unsigned int i
= 100000;
582 BUG_ON(!phy_dev
->bus
);
584 SMSC_TRACE(HW
, "Performing PHY BCR Reset");
585 smsc911x_mii_write(phy_dev
->bus
, phy_dev
->addr
, MII_BMCR
, BMCR_RESET
);
588 temp
= smsc911x_mii_read(phy_dev
->bus
, phy_dev
->addr
,
590 } while ((i
--) && (temp
& BMCR_RESET
));
592 if (temp
& BMCR_RESET
) {
593 SMSC_WARNING(HW
, "PHY reset failed to complete.");
596 /* Extra delay required because the phy may not be completed with
597 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
598 * enough delay but using 1ms here to be safe */
604 static int smsc911x_phy_loopbacktest(struct net_device
*dev
)
606 struct smsc911x_data
*pdata
= netdev_priv(dev
);
607 struct phy_device
*phy_dev
= pdata
->phy_dev
;
612 /* Initialise tx packet using broadcast destination address */
613 memset(pdata
->loopback_tx_pkt
, 0xff, ETH_ALEN
);
615 /* Use incrementing source address */
616 for (i
= 6; i
< 12; i
++)
617 pdata
->loopback_tx_pkt
[i
] = (char)i
;
619 /* Set length type field */
620 pdata
->loopback_tx_pkt
[12] = 0x00;
621 pdata
->loopback_tx_pkt
[13] = 0x00;
623 for (i
= 14; i
< MIN_PACKET_SIZE
; i
++)
624 pdata
->loopback_tx_pkt
[i
] = (char)i
;
626 val
= smsc911x_reg_read(pdata
, HW_CFG
);
627 val
&= HW_CFG_TX_FIF_SZ_
;
629 smsc911x_reg_write(pdata
, HW_CFG
, val
);
631 smsc911x_reg_write(pdata
, TX_CFG
, TX_CFG_TX_ON_
);
632 smsc911x_reg_write(pdata
, RX_CFG
,
633 (u32
)((ulong
)pdata
->loopback_rx_pkt
& 0x03) << 8);
635 for (i
= 0; i
< 10; i
++) {
636 /* Set PHY to 10/FD, no ANEG, and loopback mode */
637 smsc911x_mii_write(phy_dev
->bus
, phy_dev
->addr
, MII_BMCR
,
638 BMCR_LOOPBACK
| BMCR_FULLDPLX
);
640 /* Enable MAC tx/rx, FD */
641 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
642 smsc911x_mac_write(pdata
, MAC_CR
, MAC_CR_FDPX_
643 | MAC_CR_TXEN_
| MAC_CR_RXEN_
);
644 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
646 if (smsc911x_phy_check_loopbackpkt(pdata
) == 0) {
653 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
654 smsc911x_mac_write(pdata
, MAC_CR
, 0);
655 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
657 smsc911x_phy_reset(pdata
);
661 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
662 smsc911x_mac_write(pdata
, MAC_CR
, 0);
663 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
665 /* Cancel PHY loopback mode */
666 smsc911x_mii_write(phy_dev
->bus
, phy_dev
->addr
, MII_BMCR
, 0);
668 smsc911x_reg_write(pdata
, TX_CFG
, 0);
669 smsc911x_reg_write(pdata
, RX_CFG
, 0);
673 #endif /* USE_PHY_WORK_AROUND */
675 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data
*pdata
)
677 struct phy_device
*phy_dev
= pdata
->phy_dev
;
678 u32 afc
= smsc911x_reg_read(pdata
, AFC_CFG
);
682 if (phy_dev
->duplex
== DUPLEX_FULL
) {
683 u16 lcladv
= phy_read(phy_dev
, MII_ADVERTISE
);
684 u16 rmtadv
= phy_read(phy_dev
, MII_LPA
);
685 u8 cap
= mii_resolve_flowctrl_fdx(lcladv
, rmtadv
);
687 if (cap
& FLOW_CTRL_RX
)
692 if (cap
& FLOW_CTRL_TX
)
697 SMSC_TRACE(HW
, "rx pause %s, tx pause %s",
698 (cap
& FLOW_CTRL_RX
? "enabled" : "disabled"),
699 (cap
& FLOW_CTRL_TX
? "enabled" : "disabled"));
701 SMSC_TRACE(HW
, "half duplex");
706 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
707 smsc911x_mac_write(pdata
, FLOW
, flow
);
708 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
710 smsc911x_reg_write(pdata
, AFC_CFG
, afc
);
713 /* Update link mode if anything has changed. Called periodically when the
714 * PHY is in polling mode, even if nothing has changed. */
715 static void smsc911x_phy_adjust_link(struct net_device
*dev
)
717 struct smsc911x_data
*pdata
= netdev_priv(dev
);
718 struct phy_device
*phy_dev
= pdata
->phy_dev
;
722 if (phy_dev
->duplex
!= pdata
->last_duplex
) {
724 SMSC_TRACE(HW
, "duplex state has changed");
726 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
727 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
728 if (phy_dev
->duplex
) {
730 "configuring for full duplex mode");
731 mac_cr
|= MAC_CR_FDPX_
;
734 "configuring for half duplex mode");
735 mac_cr
&= ~MAC_CR_FDPX_
;
737 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
738 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
740 smsc911x_phy_update_flowcontrol(pdata
);
741 pdata
->last_duplex
= phy_dev
->duplex
;
744 carrier
= netif_carrier_ok(dev
);
745 if (carrier
!= pdata
->last_carrier
) {
746 SMSC_TRACE(HW
, "carrier state has changed");
748 SMSC_TRACE(HW
, "configuring for carrier OK");
749 if ((pdata
->gpio_orig_setting
& GPIO_CFG_LED1_EN_
) &&
750 (!pdata
->using_extphy
)) {
751 /* Restore original GPIO configuration */
752 pdata
->gpio_setting
= pdata
->gpio_orig_setting
;
753 smsc911x_reg_write(pdata
, GPIO_CFG
,
754 pdata
->gpio_setting
);
757 SMSC_TRACE(HW
, "configuring for no carrier");
758 /* Check global setting that LED1
759 * usage is 10/100 indicator */
760 pdata
->gpio_setting
= smsc911x_reg_read(pdata
,
762 if ((pdata
->gpio_setting
& GPIO_CFG_LED1_EN_
) &&
763 (!pdata
->using_extphy
)) {
764 /* Force 10/100 LED off, after saving
765 * original GPIO configuration */
766 pdata
->gpio_orig_setting
= pdata
->gpio_setting
;
768 pdata
->gpio_setting
&= ~GPIO_CFG_LED1_EN_
;
769 pdata
->gpio_setting
|= (GPIO_CFG_GPIOBUF0_
772 smsc911x_reg_write(pdata
, GPIO_CFG
,
773 pdata
->gpio_setting
);
776 pdata
->last_carrier
= carrier
;
780 static int smsc911x_mii_probe(struct net_device
*dev
)
782 struct smsc911x_data
*pdata
= netdev_priv(dev
);
783 struct phy_device
*phydev
= NULL
;
786 /* find the first phy */
787 phydev
= phy_find_first(pdata
->mii_bus
);
789 pr_err("%s: no PHY found\n", dev
->name
);
793 SMSC_TRACE(PROBE
, "PHY %d: addr %d, phy_id 0x%08X",
794 phy_addr
, phydev
->addr
, phydev
->phy_id
);
796 ret
= phy_connect_direct(dev
, phydev
,
797 &smsc911x_phy_adjust_link
, 0,
798 pdata
->config
.phy_interface
);
801 pr_err("%s: Could not attach to PHY\n", dev
->name
);
805 pr_info("%s: attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
806 dev
->name
, phydev
->drv
->name
,
807 dev_name(&phydev
->dev
), phydev
->irq
);
809 /* mask with MAC supported features */
810 phydev
->supported
&= (PHY_BASIC_FEATURES
| SUPPORTED_Pause
|
811 SUPPORTED_Asym_Pause
);
812 phydev
->advertising
= phydev
->supported
;
814 pdata
->phy_dev
= phydev
;
815 pdata
->last_duplex
= -1;
816 pdata
->last_carrier
= -1;
818 #ifdef USE_PHY_WORK_AROUND
819 if (smsc911x_phy_loopbacktest(dev
) < 0) {
820 SMSC_WARNING(HW
, "Failed Loop Back Test");
823 SMSC_TRACE(HW
, "Passed Loop Back Test");
824 #endif /* USE_PHY_WORK_AROUND */
826 SMSC_TRACE(HW
, "phy initialised successfully");
830 static int __devinit
smsc911x_mii_init(struct platform_device
*pdev
,
831 struct net_device
*dev
)
833 struct smsc911x_data
*pdata
= netdev_priv(dev
);
836 pdata
->mii_bus
= mdiobus_alloc();
837 if (!pdata
->mii_bus
) {
842 pdata
->mii_bus
->name
= SMSC_MDIONAME
;
843 snprintf(pdata
->mii_bus
->id
, MII_BUS_ID_SIZE
, "%x", pdev
->id
);
844 pdata
->mii_bus
->priv
= pdata
;
845 pdata
->mii_bus
->read
= smsc911x_mii_read
;
846 pdata
->mii_bus
->write
= smsc911x_mii_write
;
847 pdata
->mii_bus
->irq
= pdata
->phy_irq
;
848 for (i
= 0; i
< PHY_MAX_ADDR
; ++i
)
849 pdata
->mii_bus
->irq
[i
] = PHY_POLL
;
851 pdata
->mii_bus
->parent
= &pdev
->dev
;
853 switch (pdata
->idrev
& 0xFFFF0000) {
858 /* External PHY supported, try to autodetect */
859 smsc911x_phy_initialise_external(pdata
);
862 SMSC_TRACE(HW
, "External PHY is not supported, "
863 "using internal PHY");
864 pdata
->using_extphy
= 0;
868 if (!pdata
->using_extphy
) {
869 /* Mask all PHYs except ID 1 (internal) */
870 pdata
->mii_bus
->phy_mask
= ~(1 << 1);
873 if (mdiobus_register(pdata
->mii_bus
)) {
874 SMSC_WARNING(PROBE
, "Error registering mii bus");
875 goto err_out_free_bus_2
;
878 if (smsc911x_mii_probe(dev
) < 0) {
879 SMSC_WARNING(PROBE
, "Error registering mii bus");
880 goto err_out_unregister_bus_3
;
885 err_out_unregister_bus_3
:
886 mdiobus_unregister(pdata
->mii_bus
);
888 mdiobus_free(pdata
->mii_bus
);
893 /* Gets the number of tx statuses in the fifo */
894 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data
*pdata
)
896 return (smsc911x_reg_read(pdata
, TX_FIFO_INF
)
897 & TX_FIFO_INF_TSUSED_
) >> 16;
900 /* Reads tx statuses and increments counters where necessary */
901 static void smsc911x_tx_update_txcounters(struct net_device
*dev
)
903 struct smsc911x_data
*pdata
= netdev_priv(dev
);
904 unsigned int tx_stat
;
906 while ((tx_stat
= smsc911x_tx_get_txstatus(pdata
)) != 0) {
907 if (unlikely(tx_stat
& 0x80000000)) {
908 /* In this driver the packet tag is used as the packet
909 * length. Since a packet length can never reach the
910 * size of 0x8000, this bit is reserved. It is worth
911 * noting that the "reserved bit" in the warning above
912 * does not reference a hardware defined reserved bit
913 * but rather a driver defined one.
916 "Packet tag reserved bit is high");
918 if (unlikely(tx_stat
& TX_STS_ES_
)) {
919 dev
->stats
.tx_errors
++;
921 dev
->stats
.tx_packets
++;
922 dev
->stats
.tx_bytes
+= (tx_stat
>> 16);
924 if (unlikely(tx_stat
& TX_STS_EXCESS_COL_
)) {
925 dev
->stats
.collisions
+= 16;
926 dev
->stats
.tx_aborted_errors
+= 1;
928 dev
->stats
.collisions
+=
929 ((tx_stat
>> 3) & 0xF);
931 if (unlikely(tx_stat
& TX_STS_LOST_CARRIER_
))
932 dev
->stats
.tx_carrier_errors
+= 1;
933 if (unlikely(tx_stat
& TX_STS_LATE_COL_
)) {
934 dev
->stats
.collisions
++;
935 dev
->stats
.tx_aborted_errors
++;
941 /* Increments the Rx error counters */
943 smsc911x_rx_counterrors(struct net_device
*dev
, unsigned int rxstat
)
947 if (unlikely(rxstat
& RX_STS_ES_
)) {
948 dev
->stats
.rx_errors
++;
949 if (unlikely(rxstat
& RX_STS_CRC_ERR_
)) {
950 dev
->stats
.rx_crc_errors
++;
954 if (likely(!crc_err
)) {
955 if (unlikely((rxstat
& RX_STS_FRAME_TYPE_
) &&
956 (rxstat
& RX_STS_LENGTH_ERR_
)))
957 dev
->stats
.rx_length_errors
++;
958 if (rxstat
& RX_STS_MCAST_
)
959 dev
->stats
.multicast
++;
963 /* Quickly dumps bad packets */
965 smsc911x_rx_fastforward(struct smsc911x_data
*pdata
, unsigned int pktbytes
)
967 unsigned int pktwords
= (pktbytes
+ NET_IP_ALIGN
+ 3) >> 2;
969 if (likely(pktwords
>= 4)) {
970 unsigned int timeout
= 500;
972 smsc911x_reg_write(pdata
, RX_DP_CTRL
, RX_DP_CTRL_RX_FFWD_
);
975 val
= smsc911x_reg_read(pdata
, RX_DP_CTRL
);
976 } while ((val
& RX_DP_CTRL_RX_FFWD_
) && --timeout
);
978 if (unlikely(timeout
== 0))
979 SMSC_WARNING(HW
, "Timed out waiting for "
980 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val
);
984 temp
= smsc911x_reg_read(pdata
, RX_DATA_FIFO
);
988 /* NAPI poll function */
989 static int smsc911x_poll(struct napi_struct
*napi
, int budget
)
991 struct smsc911x_data
*pdata
=
992 container_of(napi
, struct smsc911x_data
, napi
);
993 struct net_device
*dev
= pdata
->dev
;
996 while (npackets
< budget
) {
997 unsigned int pktlength
;
998 unsigned int pktwords
;
1000 unsigned int rxstat
= smsc911x_rx_get_rxstatus(pdata
);
1004 /* We processed all packets available. Tell NAPI it can
1005 * stop polling then re-enable rx interrupts */
1006 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RSFL_
);
1007 napi_complete(napi
);
1008 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1009 temp
|= INT_EN_RSFL_EN_
;
1010 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1014 /* Count packet for NAPI scheduling, even if it has an error.
1015 * Error packets still require cycles to discard */
1018 pktlength
= ((rxstat
& 0x3FFF0000) >> 16);
1019 pktwords
= (pktlength
+ NET_IP_ALIGN
+ 3) >> 2;
1020 smsc911x_rx_counterrors(dev
, rxstat
);
1022 if (unlikely(rxstat
& RX_STS_ES_
)) {
1023 SMSC_WARNING(RX_ERR
,
1024 "Discarding packet with error bit set");
1025 /* Packet has an error, discard it and continue with
1027 smsc911x_rx_fastforward(pdata
, pktwords
);
1028 dev
->stats
.rx_dropped
++;
1032 skb
= netdev_alloc_skb(dev
, pktlength
+ NET_IP_ALIGN
);
1033 if (unlikely(!skb
)) {
1034 SMSC_WARNING(RX_ERR
,
1035 "Unable to allocate skb for rx packet");
1036 /* Drop the packet and stop this polling iteration */
1037 smsc911x_rx_fastforward(pdata
, pktwords
);
1038 dev
->stats
.rx_dropped
++;
1042 skb
->data
= skb
->head
;
1043 skb_reset_tail_pointer(skb
);
1045 /* Align IP on 16B boundary */
1046 skb_reserve(skb
, NET_IP_ALIGN
);
1047 skb_put(skb
, pktlength
- 4);
1048 smsc911x_rx_readfifo(pdata
, (unsigned int *)skb
->head
,
1050 skb
->protocol
= eth_type_trans(skb
, dev
);
1051 skb
->ip_summed
= CHECKSUM_NONE
;
1052 netif_receive_skb(skb
);
1054 /* Update counters */
1055 dev
->stats
.rx_packets
++;
1056 dev
->stats
.rx_bytes
+= (pktlength
- 4);
1059 /* Return total received packets */
1063 /* Returns hash bit number for given MAC address
1065 * 01 00 5E 00 00 01 -> returns bit number 31 */
1066 static unsigned int smsc911x_hash(char addr
[ETH_ALEN
])
1068 return (ether_crc(ETH_ALEN
, addr
) >> 26) & 0x3f;
1071 static void smsc911x_rx_multicast_update(struct smsc911x_data
*pdata
)
1073 /* Performs the multicast & mac_cr update. This is called when
1074 * safe on the current hardware, and with the mac_lock held */
1075 unsigned int mac_cr
;
1077 SMSC_ASSERT_MAC_LOCK(pdata
);
1079 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
1080 mac_cr
|= pdata
->set_bits_mask
;
1081 mac_cr
&= ~(pdata
->clear_bits_mask
);
1082 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
1083 smsc911x_mac_write(pdata
, HASHH
, pdata
->hashhi
);
1084 smsc911x_mac_write(pdata
, HASHL
, pdata
->hashlo
);
1085 SMSC_TRACE(HW
, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1086 mac_cr
, pdata
->hashhi
, pdata
->hashlo
);
1089 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data
*pdata
)
1091 unsigned int mac_cr
;
1093 /* This function is only called for older LAN911x devices
1094 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1095 * be modified during Rx - newer devices immediately update the
1098 * This is called from interrupt context */
1100 spin_lock(&pdata
->mac_lock
);
1102 /* Check Rx has stopped */
1103 if (smsc911x_mac_read(pdata
, MAC_CR
) & MAC_CR_RXEN_
)
1104 SMSC_WARNING(DRV
, "Rx not stopped");
1106 /* Perform the update - safe to do now Rx has stopped */
1107 smsc911x_rx_multicast_update(pdata
);
1110 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
1111 mac_cr
|= MAC_CR_RXEN_
;
1112 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
1114 pdata
->multicast_update_pending
= 0;
1116 spin_unlock(&pdata
->mac_lock
);
1119 static int smsc911x_soft_reset(struct smsc911x_data
*pdata
)
1121 unsigned int timeout
;
1124 /* Reset the LAN911x */
1125 smsc911x_reg_write(pdata
, HW_CFG
, HW_CFG_SRST_
);
1129 temp
= smsc911x_reg_read(pdata
, HW_CFG
);
1130 } while ((--timeout
) && (temp
& HW_CFG_SRST_
));
1132 if (unlikely(temp
& HW_CFG_SRST_
)) {
1133 SMSC_WARNING(DRV
, "Failed to complete reset");
1139 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1141 smsc911x_set_hw_mac_address(struct smsc911x_data
*pdata
, u8 dev_addr
[6])
1143 u32 mac_high16
= (dev_addr
[5] << 8) | dev_addr
[4];
1144 u32 mac_low32
= (dev_addr
[3] << 24) | (dev_addr
[2] << 16) |
1145 (dev_addr
[1] << 8) | dev_addr
[0];
1147 SMSC_ASSERT_MAC_LOCK(pdata
);
1149 smsc911x_mac_write(pdata
, ADDRH
, mac_high16
);
1150 smsc911x_mac_write(pdata
, ADDRL
, mac_low32
);
1153 static int smsc911x_open(struct net_device
*dev
)
1155 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1156 unsigned int timeout
;
1158 unsigned int intcfg
;
1160 /* if the phy is not yet registered, retry later*/
1161 if (!pdata
->phy_dev
) {
1162 SMSC_WARNING(HW
, "phy_dev is NULL");
1166 if (!is_valid_ether_addr(dev
->dev_addr
)) {
1167 SMSC_WARNING(HW
, "dev_addr is not a valid MAC address");
1168 return -EADDRNOTAVAIL
;
1171 /* Reset the LAN911x */
1172 if (smsc911x_soft_reset(pdata
)) {
1173 SMSC_WARNING(HW
, "soft reset failed");
1177 smsc911x_reg_write(pdata
, HW_CFG
, 0x00050000);
1178 smsc911x_reg_write(pdata
, AFC_CFG
, 0x006E3740);
1180 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1182 while ((smsc911x_reg_read(pdata
, E2P_CMD
) & E2P_CMD_EPC_BUSY_
) &&
1187 if (unlikely(timeout
== 0))
1189 "Timed out waiting for EEPROM busy bit to clear");
1191 smsc911x_reg_write(pdata
, GPIO_CFG
, 0x70070000);
1193 /* The soft reset above cleared the device's MAC address,
1194 * restore it from local copy (set in probe) */
1195 spin_lock_irq(&pdata
->mac_lock
);
1196 smsc911x_set_hw_mac_address(pdata
, dev
->dev_addr
);
1197 spin_unlock_irq(&pdata
->mac_lock
);
1199 /* Initialise irqs, but leave all sources disabled */
1200 smsc911x_reg_write(pdata
, INT_EN
, 0);
1201 smsc911x_reg_write(pdata
, INT_STS
, 0xFFFFFFFF);
1203 /* Set interrupt deassertion to 100uS */
1204 intcfg
= ((10 << 24) | INT_CFG_IRQ_EN_
);
1206 if (pdata
->config
.irq_polarity
) {
1207 SMSC_TRACE(IFUP
, "irq polarity: active high");
1208 intcfg
|= INT_CFG_IRQ_POL_
;
1210 SMSC_TRACE(IFUP
, "irq polarity: active low");
1213 if (pdata
->config
.irq_type
) {
1214 SMSC_TRACE(IFUP
, "irq type: push-pull");
1215 intcfg
|= INT_CFG_IRQ_TYPE_
;
1217 SMSC_TRACE(IFUP
, "irq type: open drain");
1220 smsc911x_reg_write(pdata
, INT_CFG
, intcfg
);
1222 SMSC_TRACE(IFUP
, "Testing irq handler using IRQ %d", dev
->irq
);
1223 pdata
->software_irq_signal
= 0;
1226 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1227 temp
|= INT_EN_SW_INT_EN_
;
1228 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1232 if (pdata
->software_irq_signal
)
1237 if (!pdata
->software_irq_signal
) {
1238 dev_warn(&dev
->dev
, "ISR failed signaling test (IRQ %d)\n",
1242 SMSC_TRACE(IFUP
, "IRQ handler passed test using IRQ %d", dev
->irq
);
1244 dev_info(&dev
->dev
, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1245 (unsigned long)pdata
->ioaddr
, dev
->irq
);
1247 /* Reset the last known duplex and carrier */
1248 pdata
->last_duplex
= -1;
1249 pdata
->last_carrier
= -1;
1251 /* Bring the PHY up */
1252 phy_start(pdata
->phy_dev
);
1254 temp
= smsc911x_reg_read(pdata
, HW_CFG
);
1255 /* Preserve TX FIFO size and external PHY configuration */
1256 temp
&= (HW_CFG_TX_FIF_SZ_
|0x00000FFF);
1258 smsc911x_reg_write(pdata
, HW_CFG
, temp
);
1260 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1261 temp
|= FIFO_INT_TX_AVAIL_LEVEL_
;
1262 temp
&= ~(FIFO_INT_RX_STS_LEVEL_
);
1263 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1265 /* set RX Data offset to 2 bytes for alignment */
1266 smsc911x_reg_write(pdata
, RX_CFG
, (2 << 8));
1268 /* enable NAPI polling before enabling RX interrupts */
1269 napi_enable(&pdata
->napi
);
1271 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1272 temp
|= (INT_EN_TDFA_EN_
| INT_EN_RSFL_EN_
| INT_EN_RXSTOP_INT_EN_
);
1273 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1275 spin_lock_irq(&pdata
->mac_lock
);
1276 temp
= smsc911x_mac_read(pdata
, MAC_CR
);
1277 temp
|= (MAC_CR_TXEN_
| MAC_CR_RXEN_
| MAC_CR_HBDIS_
);
1278 smsc911x_mac_write(pdata
, MAC_CR
, temp
);
1279 spin_unlock_irq(&pdata
->mac_lock
);
1281 smsc911x_reg_write(pdata
, TX_CFG
, TX_CFG_TX_ON_
);
1283 netif_start_queue(dev
);
1287 /* Entry point for stopping the interface */
1288 static int smsc911x_stop(struct net_device
*dev
)
1290 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1293 /* Disable all device interrupts */
1294 temp
= smsc911x_reg_read(pdata
, INT_CFG
);
1295 temp
&= ~INT_CFG_IRQ_EN_
;
1296 smsc911x_reg_write(pdata
, INT_CFG
, temp
);
1298 /* Stop Tx and Rx polling */
1299 netif_stop_queue(dev
);
1300 napi_disable(&pdata
->napi
);
1302 /* At this point all Rx and Tx activity is stopped */
1303 dev
->stats
.rx_dropped
+= smsc911x_reg_read(pdata
, RX_DROP
);
1304 smsc911x_tx_update_txcounters(dev
);
1306 /* Bring the PHY down */
1308 phy_stop(pdata
->phy_dev
);
1310 SMSC_TRACE(IFDOWN
, "Interface stopped");
1314 /* Entry point for transmitting a packet */
1315 static int smsc911x_hard_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1317 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1318 unsigned int freespace
;
1319 unsigned int tx_cmd_a
;
1320 unsigned int tx_cmd_b
;
1325 freespace
= smsc911x_reg_read(pdata
, TX_FIFO_INF
) & TX_FIFO_INF_TDFREE_
;
1327 if (unlikely(freespace
< TX_FIFO_LOW_THRESHOLD
))
1328 SMSC_WARNING(TX_ERR
,
1329 "Tx data fifo low, space available: %d", freespace
);
1331 /* Word alignment adjustment */
1332 tx_cmd_a
= (u32
)((ulong
)skb
->data
& 0x03) << 16;
1333 tx_cmd_a
|= TX_CMD_A_FIRST_SEG_
| TX_CMD_A_LAST_SEG_
;
1334 tx_cmd_a
|= (unsigned int)skb
->len
;
1336 tx_cmd_b
= ((unsigned int)skb
->len
) << 16;
1337 tx_cmd_b
|= (unsigned int)skb
->len
;
1339 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, tx_cmd_a
);
1340 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, tx_cmd_b
);
1342 bufp
= (ulong
)skb
->data
& (~0x3);
1343 wrsz
= (u32
)skb
->len
+ 3;
1344 wrsz
+= (u32
)((ulong
)skb
->data
& 0x3);
1347 smsc911x_tx_writefifo(pdata
, (unsigned int *)bufp
, wrsz
);
1348 freespace
-= (skb
->len
+ 32);
1351 if (unlikely(smsc911x_tx_get_txstatcount(pdata
) >= 30))
1352 smsc911x_tx_update_txcounters(dev
);
1354 if (freespace
< TX_FIFO_LOW_THRESHOLD
) {
1355 netif_stop_queue(dev
);
1356 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1359 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1362 return NETDEV_TX_OK
;
1365 /* Entry point for getting status counters */
1366 static struct net_device_stats
*smsc911x_get_stats(struct net_device
*dev
)
1368 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1369 smsc911x_tx_update_txcounters(dev
);
1370 dev
->stats
.rx_dropped
+= smsc911x_reg_read(pdata
, RX_DROP
);
1374 /* Entry point for setting addressing modes */
1375 static void smsc911x_set_multicast_list(struct net_device
*dev
)
1377 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1378 unsigned long flags
;
1380 if (dev
->flags
& IFF_PROMISC
) {
1381 /* Enabling promiscuous mode */
1382 pdata
->set_bits_mask
= MAC_CR_PRMS_
;
1383 pdata
->clear_bits_mask
= (MAC_CR_MCPAS_
| MAC_CR_HPFILT_
);
1386 } else if (dev
->flags
& IFF_ALLMULTI
) {
1387 /* Enabling all multicast mode */
1388 pdata
->set_bits_mask
= MAC_CR_MCPAS_
;
1389 pdata
->clear_bits_mask
= (MAC_CR_PRMS_
| MAC_CR_HPFILT_
);
1392 } else if (!netdev_mc_empty(dev
)) {
1393 /* Enabling specific multicast addresses */
1394 unsigned int hash_high
= 0;
1395 unsigned int hash_low
= 0;
1396 struct netdev_hw_addr
*ha
;
1398 pdata
->set_bits_mask
= MAC_CR_HPFILT_
;
1399 pdata
->clear_bits_mask
= (MAC_CR_PRMS_
| MAC_CR_MCPAS_
);
1401 netdev_for_each_mc_addr(ha
, dev
) {
1402 unsigned int bitnum
= smsc911x_hash(ha
->addr
);
1403 unsigned int mask
= 0x01 << (bitnum
& 0x1F);
1411 pdata
->hashhi
= hash_high
;
1412 pdata
->hashlo
= hash_low
;
1414 /* Enabling local MAC address only */
1415 pdata
->set_bits_mask
= 0;
1416 pdata
->clear_bits_mask
=
1417 (MAC_CR_PRMS_
| MAC_CR_MCPAS_
| MAC_CR_HPFILT_
);
1422 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
1424 if (pdata
->generation
<= 1) {
1425 /* Older hardware revision - cannot change these flags while
1427 if (!pdata
->multicast_update_pending
) {
1429 SMSC_TRACE(HW
, "scheduling mcast update");
1430 pdata
->multicast_update_pending
= 1;
1432 /* Request the hardware to stop, then perform the
1433 * update when we get an RX_STOP interrupt */
1434 temp
= smsc911x_mac_read(pdata
, MAC_CR
);
1435 temp
&= ~(MAC_CR_RXEN_
);
1436 smsc911x_mac_write(pdata
, MAC_CR
, temp
);
1438 /* There is another update pending, this should now
1439 * use the newer values */
1442 /* Newer hardware revision - can write immediately */
1443 smsc911x_rx_multicast_update(pdata
);
1446 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
1449 static irqreturn_t
smsc911x_irqhandler(int irq
, void *dev_id
)
1451 struct net_device
*dev
= dev_id
;
1452 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1453 u32 intsts
= smsc911x_reg_read(pdata
, INT_STS
);
1454 u32 inten
= smsc911x_reg_read(pdata
, INT_EN
);
1455 int serviced
= IRQ_NONE
;
1458 if (unlikely(intsts
& inten
& INT_STS_SW_INT_
)) {
1459 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1460 temp
&= (~INT_EN_SW_INT_EN_
);
1461 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1462 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_SW_INT_
);
1463 pdata
->software_irq_signal
= 1;
1465 serviced
= IRQ_HANDLED
;
1468 if (unlikely(intsts
& inten
& INT_STS_RXSTOP_INT_
)) {
1469 /* Called when there is a multicast update scheduled and
1470 * it is now safe to complete the update */
1471 SMSC_TRACE(INTR
, "RX Stop interrupt");
1472 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RXSTOP_INT_
);
1473 if (pdata
->multicast_update_pending
)
1474 smsc911x_rx_multicast_update_workaround(pdata
);
1475 serviced
= IRQ_HANDLED
;
1478 if (intsts
& inten
& INT_STS_TDFA_
) {
1479 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1480 temp
|= FIFO_INT_TX_AVAIL_LEVEL_
;
1481 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1482 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_TDFA_
);
1483 netif_wake_queue(dev
);
1484 serviced
= IRQ_HANDLED
;
1487 if (unlikely(intsts
& inten
& INT_STS_RXE_
)) {
1488 SMSC_TRACE(INTR
, "RX Error interrupt");
1489 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RXE_
);
1490 serviced
= IRQ_HANDLED
;
1493 if (likely(intsts
& inten
& INT_STS_RSFL_
)) {
1494 if (likely(napi_schedule_prep(&pdata
->napi
))) {
1495 /* Disable Rx interrupts */
1496 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1497 temp
&= (~INT_EN_RSFL_EN_
);
1498 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1499 /* Schedule a NAPI poll */
1500 __napi_schedule(&pdata
->napi
);
1502 SMSC_WARNING(RX_ERR
,
1503 "napi_schedule_prep failed");
1505 serviced
= IRQ_HANDLED
;
1511 #ifdef CONFIG_NET_POLL_CONTROLLER
1512 static void smsc911x_poll_controller(struct net_device
*dev
)
1514 disable_irq(dev
->irq
);
1515 smsc911x_irqhandler(0, dev
);
1516 enable_irq(dev
->irq
);
1518 #endif /* CONFIG_NET_POLL_CONTROLLER */
1520 static int smsc911x_set_mac_address(struct net_device
*dev
, void *p
)
1522 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1523 struct sockaddr
*addr
= p
;
1525 /* On older hardware revisions we cannot change the mac address
1526 * registers while receiving data. Newer devices can safely change
1527 * this at any time. */
1528 if (pdata
->generation
<= 1 && netif_running(dev
))
1531 if (!is_valid_ether_addr(addr
->sa_data
))
1532 return -EADDRNOTAVAIL
;
1534 memcpy(dev
->dev_addr
, addr
->sa_data
, ETH_ALEN
);
1536 spin_lock_irq(&pdata
->mac_lock
);
1537 smsc911x_set_hw_mac_address(pdata
, dev
->dev_addr
);
1538 spin_unlock_irq(&pdata
->mac_lock
);
1540 dev_info(&dev
->dev
, "MAC Address: %pM\n", dev
->dev_addr
);
1545 /* Standard ioctls for mii-tool */
1546 static int smsc911x_do_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
1548 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1550 if (!netif_running(dev
) || !pdata
->phy_dev
)
1553 return phy_mii_ioctl(pdata
->phy_dev
, if_mii(ifr
), cmd
);
1557 smsc911x_ethtool_getsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1559 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1563 return phy_ethtool_gset(pdata
->phy_dev
, cmd
);
1567 smsc911x_ethtool_setsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1569 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1571 return phy_ethtool_sset(pdata
->phy_dev
, cmd
);
1574 static void smsc911x_ethtool_getdrvinfo(struct net_device
*dev
,
1575 struct ethtool_drvinfo
*info
)
1577 strlcpy(info
->driver
, SMSC_CHIPNAME
, sizeof(info
->driver
));
1578 strlcpy(info
->version
, SMSC_DRV_VERSION
, sizeof(info
->version
));
1579 strlcpy(info
->bus_info
, dev_name(dev
->dev
.parent
),
1580 sizeof(info
->bus_info
));
1583 static int smsc911x_ethtool_nwayreset(struct net_device
*dev
)
1585 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1587 return phy_start_aneg(pdata
->phy_dev
);
1590 static u32
smsc911x_ethtool_getmsglevel(struct net_device
*dev
)
1592 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1593 return pdata
->msg_enable
;
1596 static void smsc911x_ethtool_setmsglevel(struct net_device
*dev
, u32 level
)
1598 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1599 pdata
->msg_enable
= level
;
1602 static int smsc911x_ethtool_getregslen(struct net_device
*dev
)
1604 return (((E2P_DATA
- ID_REV
) / 4 + 1) + (WUCSR
- MAC_CR
) + 1 + 32) *
1609 smsc911x_ethtool_getregs(struct net_device
*dev
, struct ethtool_regs
*regs
,
1612 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1613 struct phy_device
*phy_dev
= pdata
->phy_dev
;
1614 unsigned long flags
;
1619 regs
->version
= pdata
->idrev
;
1620 for (i
= ID_REV
; i
<= E2P_DATA
; i
+= (sizeof(u32
)))
1621 data
[j
++] = smsc911x_reg_read(pdata
, i
);
1623 for (i
= MAC_CR
; i
<= WUCSR
; i
++) {
1624 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
1625 data
[j
++] = smsc911x_mac_read(pdata
, i
);
1626 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
1629 for (i
= 0; i
<= 31; i
++)
1630 data
[j
++] = smsc911x_mii_read(phy_dev
->bus
, phy_dev
->addr
, i
);
1633 static void smsc911x_eeprom_enable_access(struct smsc911x_data
*pdata
)
1635 unsigned int temp
= smsc911x_reg_read(pdata
, GPIO_CFG
);
1636 temp
&= ~GPIO_CFG_EEPR_EN_
;
1637 smsc911x_reg_write(pdata
, GPIO_CFG
, temp
);
1641 static int smsc911x_eeprom_send_cmd(struct smsc911x_data
*pdata
, u32 op
)
1646 SMSC_TRACE(DRV
, "op 0x%08x", op
);
1647 if (smsc911x_reg_read(pdata
, E2P_CMD
) & E2P_CMD_EPC_BUSY_
) {
1648 SMSC_WARNING(DRV
, "Busy at start");
1652 e2cmd
= op
| E2P_CMD_EPC_BUSY_
;
1653 smsc911x_reg_write(pdata
, E2P_CMD
, e2cmd
);
1657 e2cmd
= smsc911x_reg_read(pdata
, E2P_CMD
);
1658 } while ((e2cmd
& E2P_CMD_EPC_BUSY_
) && (--timeout
));
1661 SMSC_TRACE(DRV
, "TIMED OUT");
1665 if (e2cmd
& E2P_CMD_EPC_TIMEOUT_
) {
1666 SMSC_TRACE(DRV
, "Error occured during eeprom operation");
1673 static int smsc911x_eeprom_read_location(struct smsc911x_data
*pdata
,
1674 u8 address
, u8
*data
)
1676 u32 op
= E2P_CMD_EPC_CMD_READ_
| address
;
1679 SMSC_TRACE(DRV
, "address 0x%x", address
);
1680 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
1683 data
[address
] = smsc911x_reg_read(pdata
, E2P_DATA
);
1688 static int smsc911x_eeprom_write_location(struct smsc911x_data
*pdata
,
1689 u8 address
, u8 data
)
1691 u32 op
= E2P_CMD_EPC_CMD_ERASE_
| address
;
1695 SMSC_TRACE(DRV
, "address 0x%x, data 0x%x", address
, data
);
1696 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
1699 op
= E2P_CMD_EPC_CMD_WRITE_
| address
;
1700 smsc911x_reg_write(pdata
, E2P_DATA
, (u32
)data
);
1702 /* Workaround for hardware read-after-write restriction */
1703 temp
= smsc911x_reg_read(pdata
, BYTE_TEST
);
1705 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
1711 static int smsc911x_ethtool_get_eeprom_len(struct net_device
*dev
)
1713 return SMSC911X_EEPROM_SIZE
;
1716 static int smsc911x_ethtool_get_eeprom(struct net_device
*dev
,
1717 struct ethtool_eeprom
*eeprom
, u8
*data
)
1719 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1720 u8 eeprom_data
[SMSC911X_EEPROM_SIZE
];
1724 smsc911x_eeprom_enable_access(pdata
);
1726 len
= min(eeprom
->len
, SMSC911X_EEPROM_SIZE
);
1727 for (i
= 0; i
< len
; i
++) {
1728 int ret
= smsc911x_eeprom_read_location(pdata
, i
, eeprom_data
);
1735 memcpy(data
, &eeprom_data
[eeprom
->offset
], len
);
1740 static int smsc911x_ethtool_set_eeprom(struct net_device
*dev
,
1741 struct ethtool_eeprom
*eeprom
, u8
*data
)
1744 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1746 smsc911x_eeprom_enable_access(pdata
);
1747 smsc911x_eeprom_send_cmd(pdata
, E2P_CMD_EPC_CMD_EWEN_
);
1748 ret
= smsc911x_eeprom_write_location(pdata
, eeprom
->offset
, *data
);
1749 smsc911x_eeprom_send_cmd(pdata
, E2P_CMD_EPC_CMD_EWDS_
);
1751 /* Single byte write, according to man page */
1757 static const struct ethtool_ops smsc911x_ethtool_ops
= {
1758 .get_settings
= smsc911x_ethtool_getsettings
,
1759 .set_settings
= smsc911x_ethtool_setsettings
,
1760 .get_link
= ethtool_op_get_link
,
1761 .get_drvinfo
= smsc911x_ethtool_getdrvinfo
,
1762 .nway_reset
= smsc911x_ethtool_nwayreset
,
1763 .get_msglevel
= smsc911x_ethtool_getmsglevel
,
1764 .set_msglevel
= smsc911x_ethtool_setmsglevel
,
1765 .get_regs_len
= smsc911x_ethtool_getregslen
,
1766 .get_regs
= smsc911x_ethtool_getregs
,
1767 .get_eeprom_len
= smsc911x_ethtool_get_eeprom_len
,
1768 .get_eeprom
= smsc911x_ethtool_get_eeprom
,
1769 .set_eeprom
= smsc911x_ethtool_set_eeprom
,
1772 static const struct net_device_ops smsc911x_netdev_ops
= {
1773 .ndo_open
= smsc911x_open
,
1774 .ndo_stop
= smsc911x_stop
,
1775 .ndo_start_xmit
= smsc911x_hard_start_xmit
,
1776 .ndo_get_stats
= smsc911x_get_stats
,
1777 .ndo_set_multicast_list
= smsc911x_set_multicast_list
,
1778 .ndo_do_ioctl
= smsc911x_do_ioctl
,
1779 .ndo_change_mtu
= eth_change_mtu
,
1780 .ndo_validate_addr
= eth_validate_addr
,
1781 .ndo_set_mac_address
= smsc911x_set_mac_address
,
1782 #ifdef CONFIG_NET_POLL_CONTROLLER
1783 .ndo_poll_controller
= smsc911x_poll_controller
,
1787 /* copies the current mac address from hardware to dev->dev_addr */
1788 static void __devinit
smsc911x_read_mac_address(struct net_device
*dev
)
1790 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1791 u32 mac_high16
= smsc911x_mac_read(pdata
, ADDRH
);
1792 u32 mac_low32
= smsc911x_mac_read(pdata
, ADDRL
);
1794 dev
->dev_addr
[0] = (u8
)(mac_low32
);
1795 dev
->dev_addr
[1] = (u8
)(mac_low32
>> 8);
1796 dev
->dev_addr
[2] = (u8
)(mac_low32
>> 16);
1797 dev
->dev_addr
[3] = (u8
)(mac_low32
>> 24);
1798 dev
->dev_addr
[4] = (u8
)(mac_high16
);
1799 dev
->dev_addr
[5] = (u8
)(mac_high16
>> 8);
1802 /* Initializing private device structures, only called from probe */
1803 static int __devinit
smsc911x_init(struct net_device
*dev
)
1805 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1806 unsigned int byte_test
;
1808 SMSC_TRACE(PROBE
, "Driver Parameters:");
1809 SMSC_TRACE(PROBE
, "LAN base: 0x%08lX",
1810 (unsigned long)pdata
->ioaddr
);
1811 SMSC_TRACE(PROBE
, "IRQ: %d", dev
->irq
);
1812 SMSC_TRACE(PROBE
, "PHY will be autodetected.");
1814 spin_lock_init(&pdata
->dev_lock
);
1816 if (pdata
->ioaddr
== 0) {
1817 SMSC_WARNING(PROBE
, "pdata->ioaddr: 0x00000000");
1821 /* Check byte ordering */
1822 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
1823 SMSC_TRACE(PROBE
, "BYTE_TEST: 0x%08X", byte_test
);
1824 if (byte_test
== 0x43218765) {
1825 SMSC_TRACE(PROBE
, "BYTE_TEST looks swapped, "
1826 "applying WORD_SWAP");
1827 smsc911x_reg_write(pdata
, WORD_SWAP
, 0xffffffff);
1829 /* 1 dummy read of BYTE_TEST is needed after a write to
1830 * WORD_SWAP before its contents are valid */
1831 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
1833 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
1836 if (byte_test
!= 0x87654321) {
1837 SMSC_WARNING(DRV
, "BYTE_TEST: 0x%08X", byte_test
);
1838 if (((byte_test
>> 16) & 0xFFFF) == (byte_test
& 0xFFFF)) {
1840 "top 16 bits equal to bottom 16 bits");
1841 SMSC_TRACE(PROBE
, "This may mean the chip is set "
1842 "for 32 bit while the bus is reading 16 bit");
1847 /* Default generation to zero (all workarounds apply) */
1848 pdata
->generation
= 0;
1850 pdata
->idrev
= smsc911x_reg_read(pdata
, ID_REV
);
1851 switch (pdata
->idrev
& 0xFFFF0000) {
1856 /* LAN911[5678] family */
1857 pdata
->generation
= pdata
->idrev
& 0x0000FFFF;
1864 /* LAN921[5678] family */
1865 pdata
->generation
= 3;
1872 /* LAN9210/LAN9211/LAN9220/LAN9221 */
1873 pdata
->generation
= 4;
1877 SMSC_WARNING(PROBE
, "LAN911x not identified, idrev: 0x%08X",
1882 SMSC_TRACE(PROBE
, "LAN911x identified, idrev: 0x%08X, generation: %d",
1883 pdata
->idrev
, pdata
->generation
);
1885 if (pdata
->generation
== 0)
1887 "This driver is not intended for this chip revision");
1889 /* workaround for platforms without an eeprom, where the mac address
1890 * is stored elsewhere and set by the bootloader. This saves the
1891 * mac address before resetting the device */
1892 if (pdata
->config
.flags
& SMSC911X_SAVE_MAC_ADDRESS
)
1893 smsc911x_read_mac_address(dev
);
1895 /* Reset the LAN911x */
1896 if (smsc911x_soft_reset(pdata
))
1899 /* Disable all interrupt sources until we bring the device up */
1900 smsc911x_reg_write(pdata
, INT_EN
, 0);
1903 dev
->flags
|= IFF_MULTICAST
;
1904 netif_napi_add(dev
, &pdata
->napi
, smsc911x_poll
, SMSC_NAPI_WEIGHT
);
1905 dev
->netdev_ops
= &smsc911x_netdev_ops
;
1906 dev
->ethtool_ops
= &smsc911x_ethtool_ops
;
1911 static int __devexit
smsc911x_drv_remove(struct platform_device
*pdev
)
1913 struct net_device
*dev
;
1914 struct smsc911x_data
*pdata
;
1915 struct resource
*res
;
1917 dev
= platform_get_drvdata(pdev
);
1919 pdata
= netdev_priv(dev
);
1921 BUG_ON(!pdata
->ioaddr
);
1922 BUG_ON(!pdata
->phy_dev
);
1924 SMSC_TRACE(IFDOWN
, "Stopping driver.");
1926 phy_disconnect(pdata
->phy_dev
);
1927 pdata
->phy_dev
= NULL
;
1928 mdiobus_unregister(pdata
->mii_bus
);
1929 mdiobus_free(pdata
->mii_bus
);
1931 platform_set_drvdata(pdev
, NULL
);
1932 unregister_netdev(dev
);
1933 free_irq(dev
->irq
, dev
);
1934 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
,
1937 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1939 release_mem_region(res
->start
, resource_size(res
));
1941 iounmap(pdata
->ioaddr
);
1948 static int __devinit
smsc911x_drv_probe(struct platform_device
*pdev
)
1950 struct net_device
*dev
;
1951 struct smsc911x_data
*pdata
;
1952 struct smsc911x_platform_config
*config
= pdev
->dev
.platform_data
;
1953 struct resource
*res
, *irq_res
;
1954 unsigned int intcfg
= 0;
1955 int res_size
, irq_flags
;
1958 pr_info("%s: Driver version %s.\n", SMSC_CHIPNAME
, SMSC_DRV_VERSION
);
1960 /* platform data specifies irq & dynamic bus configuration */
1961 if (!pdev
->dev
.platform_data
) {
1962 pr_warning("%s: platform_data not provided\n", SMSC_CHIPNAME
);
1967 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
,
1970 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1972 pr_warning("%s: Could not allocate resource.\n",
1977 res_size
= resource_size(res
);
1979 irq_res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
1981 pr_warning("%s: Could not allocate irq resource.\n",
1987 if (!request_mem_region(res
->start
, res_size
, SMSC_CHIPNAME
)) {
1992 dev
= alloc_etherdev(sizeof(struct smsc911x_data
));
1994 pr_warning("%s: Could not allocate device.\n", SMSC_CHIPNAME
);
1996 goto out_release_io_1
;
1999 SET_NETDEV_DEV(dev
, &pdev
->dev
);
2001 pdata
= netdev_priv(dev
);
2003 dev
->irq
= irq_res
->start
;
2004 irq_flags
= irq_res
->flags
& IRQF_TRIGGER_MASK
;
2005 pdata
->ioaddr
= ioremap_nocache(res
->start
, res_size
);
2007 /* copy config parameters across to pdata */
2008 memcpy(&pdata
->config
, config
, sizeof(pdata
->config
));
2011 pdata
->msg_enable
= ((1 << debug
) - 1);
2013 if (pdata
->ioaddr
== NULL
) {
2015 "Error smsc911x base address invalid");
2017 goto out_free_netdev_2
;
2020 retval
= smsc911x_init(dev
);
2022 goto out_unmap_io_3
;
2024 /* configure irq polarity and type before connecting isr */
2025 if (pdata
->config
.irq_polarity
== SMSC911X_IRQ_POLARITY_ACTIVE_HIGH
)
2026 intcfg
|= INT_CFG_IRQ_POL_
;
2028 if (pdata
->config
.irq_type
== SMSC911X_IRQ_TYPE_PUSH_PULL
)
2029 intcfg
|= INT_CFG_IRQ_TYPE_
;
2031 smsc911x_reg_write(pdata
, INT_CFG
, intcfg
);
2033 /* Ensure interrupts are globally disabled before connecting ISR */
2034 smsc911x_reg_write(pdata
, INT_EN
, 0);
2035 smsc911x_reg_write(pdata
, INT_STS
, 0xFFFFFFFF);
2037 retval
= request_irq(dev
->irq
, smsc911x_irqhandler
,
2038 irq_flags
| IRQF_SHARED
, dev
->name
, dev
);
2041 "Unable to claim requested irq: %d", dev
->irq
);
2042 goto out_unmap_io_3
;
2045 platform_set_drvdata(pdev
, dev
);
2047 retval
= register_netdev(dev
);
2050 "Error %i registering device", retval
);
2051 goto out_unset_drvdata_4
;
2053 SMSC_TRACE(PROBE
, "Network interface: \"%s\"", dev
->name
);
2056 spin_lock_init(&pdata
->mac_lock
);
2058 retval
= smsc911x_mii_init(pdev
, dev
);
2061 "Error %i initialising mii", retval
);
2062 goto out_unregister_netdev_5
;
2065 spin_lock_irq(&pdata
->mac_lock
);
2067 /* Check if mac address has been specified when bringing interface up */
2068 if (is_valid_ether_addr(dev
->dev_addr
)) {
2069 smsc911x_set_hw_mac_address(pdata
, dev
->dev_addr
);
2070 SMSC_TRACE(PROBE
, "MAC Address is specified by configuration");
2071 } else if (is_valid_ether_addr(pdata
->config
.mac
)) {
2072 memcpy(dev
->dev_addr
, pdata
->config
.mac
, 6);
2073 SMSC_TRACE(PROBE
, "MAC Address specified by platform data");
2075 /* Try reading mac address from device. if EEPROM is present
2076 * it will already have been set */
2077 smsc911x_read_mac_address(dev
);
2079 if (is_valid_ether_addr(dev
->dev_addr
)) {
2080 /* eeprom values are valid so use them */
2082 "Mac Address is read from LAN911x EEPROM");
2084 /* eeprom values are invalid, generate random MAC */
2085 random_ether_addr(dev
->dev_addr
);
2086 smsc911x_set_hw_mac_address(pdata
, dev
->dev_addr
);
2088 "MAC Address is set to random_ether_addr");
2092 spin_unlock_irq(&pdata
->mac_lock
);
2094 dev_info(&dev
->dev
, "MAC Address: %pM\n", dev
->dev_addr
);
2098 out_unregister_netdev_5
:
2099 unregister_netdev(dev
);
2100 out_unset_drvdata_4
:
2101 platform_set_drvdata(pdev
, NULL
);
2102 free_irq(dev
->irq
, dev
);
2104 iounmap(pdata
->ioaddr
);
2108 release_mem_region(res
->start
, resource_size(res
));
2114 /* This implementation assumes the devices remains powered on its VDDVARIO
2115 * pins during suspend. */
2117 /* TODO: implement freeze/thaw callbacks for hibernation.*/
2119 static int smsc911x_suspend(struct device
*dev
)
2121 struct net_device
*ndev
= dev_get_drvdata(dev
);
2122 struct smsc911x_data
*pdata
= netdev_priv(ndev
);
2124 /* enable wake on LAN, energy detection and the external PME
2126 smsc911x_reg_write(pdata
, PMT_CTRL
,
2127 PMT_CTRL_PM_MODE_D1_
| PMT_CTRL_WOL_EN_
|
2128 PMT_CTRL_ED_EN_
| PMT_CTRL_PME_EN_
);
2133 static int smsc911x_resume(struct device
*dev
)
2135 struct net_device
*ndev
= dev_get_drvdata(dev
);
2136 struct smsc911x_data
*pdata
= netdev_priv(ndev
);
2137 unsigned int to
= 100;
2139 /* Note 3.11 from the datasheet:
2140 * "When the LAN9220 is in a power saving state, a write of any
2141 * data to the BYTE_TEST register will wake-up the device."
2143 smsc911x_reg_write(pdata
, BYTE_TEST
, 0);
2145 /* poll the READY bit in PMT_CTRL. Any other access to the device is
2146 * forbidden while this bit isn't set. Try for 100ms and return -EIO
2148 while (!(smsc911x_reg_read(pdata
, PMT_CTRL
) & PMT_CTRL_READY_
) && --to
)
2151 return (to
== 0) ? -EIO
: 0;
2154 static const struct dev_pm_ops smsc911x_pm_ops
= {
2155 .suspend
= smsc911x_suspend
,
2156 .resume
= smsc911x_resume
,
2159 #define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2162 #define SMSC911X_PM_OPS NULL
2165 static struct platform_driver smsc911x_driver
= {
2166 .probe
= smsc911x_drv_probe
,
2167 .remove
= __devexit_p(smsc911x_drv_remove
),
2169 .name
= SMSC_CHIPNAME
,
2170 .owner
= THIS_MODULE
,
2171 .pm
= SMSC911X_PM_OPS
,
2175 /* Entry point for loading the module */
2176 static int __init
smsc911x_init_module(void)
2178 return platform_driver_register(&smsc911x_driver
);
2181 /* entry point for unloading the module */
2182 static void __exit
smsc911x_cleanup_module(void)
2184 platform_driver_unregister(&smsc911x_driver
);
2187 module_init(smsc911x_init_module
);
2188 module_exit(smsc911x_cleanup_module
);