2 * Blackfin On-Chip MAC Driver
4 * Copyright 2004-2007 Analog Devices Inc.
6 * Enter bugs at http://blackfin.uclinux.org/
8 * Licensed under the GPL-2 or later.
11 #include <linux/init.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/sched.h>
15 #include <linux/slab.h>
16 #include <linux/delay.h>
17 #include <linux/timer.h>
18 #include <linux/errno.h>
19 #include <linux/irq.h>
21 #include <linux/ioport.h>
22 #include <linux/crc32.h>
23 #include <linux/device.h>
24 #include <linux/spinlock.h>
25 #include <linux/mii.h>
26 #include <linux/phy.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/ethtool.h>
30 #include <linux/skbuff.h>
31 #include <linux/platform_device.h>
34 #include <linux/dma-mapping.h>
36 #include <asm/div64.h>
38 #include <asm/blackfin.h>
39 #include <asm/cacheflush.h>
40 #include <asm/portmux.h>
44 #define DRV_NAME "bfin_mac"
45 #define DRV_VERSION "1.1"
46 #define DRV_AUTHOR "Bryan Wu, Luke Yang"
47 #define DRV_DESC "Blackfin on-chip Ethernet MAC driver"
49 MODULE_AUTHOR(DRV_AUTHOR
);
50 MODULE_LICENSE("GPL");
51 MODULE_DESCRIPTION(DRV_DESC
);
52 MODULE_ALIAS("platform:bfin_mac");
54 #if defined(CONFIG_BFIN_MAC_USE_L1)
55 # define bfin_mac_alloc(dma_handle, size) l1_data_sram_zalloc(size)
56 # define bfin_mac_free(dma_handle, ptr) l1_data_sram_free(ptr)
58 # define bfin_mac_alloc(dma_handle, size) \
59 dma_alloc_coherent(NULL, size, dma_handle, GFP_KERNEL)
60 # define bfin_mac_free(dma_handle, ptr) \
61 dma_free_coherent(NULL, sizeof(*ptr), ptr, dma_handle)
64 #define PKT_BUF_SZ 1580
66 #define MAX_TIMEOUT_CNT 500
68 /* pointers to maintain transmit list */
69 static struct net_dma_desc_tx
*tx_list_head
;
70 static struct net_dma_desc_tx
*tx_list_tail
;
71 static struct net_dma_desc_rx
*rx_list_head
;
72 static struct net_dma_desc_rx
*rx_list_tail
;
73 static struct net_dma_desc_rx
*current_rx_ptr
;
74 static struct net_dma_desc_tx
*current_tx_ptr
;
75 static struct net_dma_desc_tx
*tx_desc
;
76 static struct net_dma_desc_rx
*rx_desc
;
78 #if defined(CONFIG_BFIN_MAC_RMII)
79 static u16 pin_req
[] = P_RMII0
;
81 static u16 pin_req
[] = P_MII0
;
84 static void desc_list_free(void)
86 struct net_dma_desc_rx
*r
;
87 struct net_dma_desc_tx
*t
;
89 #if !defined(CONFIG_BFIN_MAC_USE_L1)
90 dma_addr_t dma_handle
= 0;
95 for (i
= 0; i
< CONFIG_BFIN_TX_DESC_NUM
; i
++) {
98 dev_kfree_skb(t
->skb
);
104 bfin_mac_free(dma_handle
, tx_desc
);
109 for (i
= 0; i
< CONFIG_BFIN_RX_DESC_NUM
; i
++) {
112 dev_kfree_skb(r
->skb
);
118 bfin_mac_free(dma_handle
, rx_desc
);
122 static int desc_list_init(void)
125 struct sk_buff
*new_skb
;
126 #if !defined(CONFIG_BFIN_MAC_USE_L1)
128 * This dma_handle is useless in Blackfin dma_alloc_coherent().
129 * The real dma handler is the return value of dma_alloc_coherent().
131 dma_addr_t dma_handle
;
134 tx_desc
= bfin_mac_alloc(&dma_handle
,
135 sizeof(struct net_dma_desc_tx
) *
136 CONFIG_BFIN_TX_DESC_NUM
);
140 rx_desc
= bfin_mac_alloc(&dma_handle
,
141 sizeof(struct net_dma_desc_rx
) *
142 CONFIG_BFIN_RX_DESC_NUM
);
147 tx_list_head
= tx_list_tail
= tx_desc
;
149 for (i
= 0; i
< CONFIG_BFIN_TX_DESC_NUM
; i
++) {
150 struct net_dma_desc_tx
*t
= tx_desc
+ i
;
151 struct dma_descriptor
*a
= &(t
->desc_a
);
152 struct dma_descriptor
*b
= &(t
->desc_b
);
156 * read from memory WNR = 0
157 * wordsize is 32 bits
158 * 6 half words is desc size
161 a
->config
= WDSIZE_32
| NDSIZE_6
| DMAFLOW_LARGE
;
162 a
->start_addr
= (unsigned long)t
->packet
;
164 a
->next_dma_desc
= b
;
168 * write to memory WNR = 1
169 * wordsize is 32 bits
171 * 6 half words is desc size
174 b
->config
= DMAEN
| WNR
| WDSIZE_32
| NDSIZE_6
| DMAFLOW_LARGE
;
175 b
->start_addr
= (unsigned long)(&(t
->status
));
179 tx_list_tail
->desc_b
.next_dma_desc
= a
;
180 tx_list_tail
->next
= t
;
183 tx_list_tail
->next
= tx_list_head
; /* tx_list is a circle */
184 tx_list_tail
->desc_b
.next_dma_desc
= &(tx_list_head
->desc_a
);
185 current_tx_ptr
= tx_list_head
;
188 rx_list_head
= rx_list_tail
= rx_desc
;
190 for (i
= 0; i
< CONFIG_BFIN_RX_DESC_NUM
; i
++) {
191 struct net_dma_desc_rx
*r
= rx_desc
+ i
;
192 struct dma_descriptor
*a
= &(r
->desc_a
);
193 struct dma_descriptor
*b
= &(r
->desc_b
);
195 /* allocate a new skb for next time receive */
196 new_skb
= dev_alloc_skb(PKT_BUF_SZ
+ NET_IP_ALIGN
);
198 printk(KERN_NOTICE DRV_NAME
199 ": init: low on mem - packet dropped\n");
202 skb_reserve(new_skb
, NET_IP_ALIGN
);
203 /* Invidate the data cache of skb->data range when it is write back
204 * cache. It will prevent overwritting the new data from DMA
206 blackfin_dcache_invalidate_range((unsigned long)new_skb
->head
,
207 (unsigned long)new_skb
->end
);
212 * write to memory WNR = 1
213 * wordsize is 32 bits
215 * 6 half words is desc size
218 a
->config
= DMAEN
| WNR
| WDSIZE_32
| NDSIZE_6
| DMAFLOW_LARGE
;
219 /* since RXDWA is enabled */
220 a
->start_addr
= (unsigned long)new_skb
->data
- 2;
222 a
->next_dma_desc
= b
;
226 * write to memory WNR = 1
227 * wordsize is 32 bits
229 * 6 half words is desc size
232 b
->config
= DMAEN
| WNR
| WDSIZE_32
| DI_EN
|
233 NDSIZE_6
| DMAFLOW_LARGE
;
234 b
->start_addr
= (unsigned long)(&(r
->status
));
237 rx_list_tail
->desc_b
.next_dma_desc
= a
;
238 rx_list_tail
->next
= r
;
241 rx_list_tail
->next
= rx_list_head
; /* rx_list is a circle */
242 rx_list_tail
->desc_b
.next_dma_desc
= &(rx_list_head
->desc_a
);
243 current_rx_ptr
= rx_list_head
;
249 printk(KERN_ERR DRV_NAME
": kmalloc failed\n");
254 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
259 /* Wait until the previous MDC/MDIO transaction has completed */
260 static int bfin_mdio_poll(void)
262 int timeout_cnt
= MAX_TIMEOUT_CNT
;
264 /* poll the STABUSY bit */
265 while ((bfin_read_EMAC_STAADD()) & STABUSY
) {
267 if (timeout_cnt
-- < 0) {
268 printk(KERN_ERR DRV_NAME
269 ": wait MDC/MDIO transaction to complete timeout\n");
277 /* Read an off-chip register in a PHY through the MDC/MDIO port */
278 static int bfin_mdiobus_read(struct mii_bus
*bus
, int phy_addr
, int regnum
)
282 ret
= bfin_mdio_poll();
287 bfin_write_EMAC_STAADD(SET_PHYAD((u16
) phy_addr
) |
288 SET_REGAD((u16
) regnum
) |
291 ret
= bfin_mdio_poll();
295 return (int) bfin_read_EMAC_STADAT();
298 /* Write an off-chip register in a PHY through the MDC/MDIO port */
299 static int bfin_mdiobus_write(struct mii_bus
*bus
, int phy_addr
, int regnum
,
304 ret
= bfin_mdio_poll();
308 bfin_write_EMAC_STADAT((u32
) value
);
311 bfin_write_EMAC_STAADD(SET_PHYAD((u16
) phy_addr
) |
312 SET_REGAD((u16
) regnum
) |
316 return bfin_mdio_poll();
319 static int bfin_mdiobus_reset(struct mii_bus
*bus
)
324 static void bfin_mac_adjust_link(struct net_device
*dev
)
326 struct bfin_mac_local
*lp
= netdev_priv(dev
);
327 struct phy_device
*phydev
= lp
->phydev
;
331 spin_lock_irqsave(&lp
->lock
, flags
);
333 /* Now we make sure that we can be in full duplex mode.
334 * If not, we operate in half-duplex mode. */
335 if (phydev
->duplex
!= lp
->old_duplex
) {
336 u32 opmode
= bfin_read_EMAC_OPMODE();
344 bfin_write_EMAC_OPMODE(opmode
);
345 lp
->old_duplex
= phydev
->duplex
;
348 if (phydev
->speed
!= lp
->old_speed
) {
349 #if defined(CONFIG_BFIN_MAC_RMII)
350 u32 opmode
= bfin_read_EMAC_OPMODE();
351 switch (phydev
->speed
) {
356 opmode
&= ~(RMII_10
);
360 "%s: Ack! Speed (%d) is not 10/100!\n",
361 DRV_NAME
, phydev
->speed
);
364 bfin_write_EMAC_OPMODE(opmode
);
368 lp
->old_speed
= phydev
->speed
;
375 } else if (lp
->old_link
) {
383 u32 opmode
= bfin_read_EMAC_OPMODE();
384 phy_print_status(phydev
);
385 pr_debug("EMAC_OPMODE = 0x%08x\n", opmode
);
388 spin_unlock_irqrestore(&lp
->lock
, flags
);
392 #define MDC_CLK 2500000
394 static int mii_probe(struct net_device
*dev
)
396 struct bfin_mac_local
*lp
= netdev_priv(dev
);
397 struct phy_device
*phydev
= NULL
;
398 unsigned short sysctl
;
402 /* Enable PHY output early */
403 if (!(bfin_read_VR_CTL() & CLKBUFOE
))
404 bfin_write_VR_CTL(bfin_read_VR_CTL() | CLKBUFOE
);
407 mdc_div
= ((sclk
/ MDC_CLK
) / 2) - 1;
409 sysctl
= bfin_read_EMAC_SYSCTL();
410 sysctl
= (sysctl
& ~MDCDIV
) | SET_MDCDIV(mdc_div
);
411 bfin_write_EMAC_SYSCTL(sysctl
);
413 /* search for connect PHY device */
414 for (i
= 0; i
< PHY_MAX_ADDR
; i
++) {
415 struct phy_device
*const tmp_phydev
= lp
->mii_bus
->phy_map
[i
];
418 continue; /* no PHY here... */
421 break; /* found it */
424 /* now we are supposed to have a proper phydev, to attach to... */
426 printk(KERN_INFO
"%s: Don't found any phy device at all\n",
431 #if defined(CONFIG_BFIN_MAC_RMII)
432 phydev
= phy_connect(dev
, dev_name(&phydev
->dev
), &bfin_mac_adjust_link
,
433 0, PHY_INTERFACE_MODE_RMII
);
435 phydev
= phy_connect(dev
, dev_name(&phydev
->dev
), &bfin_mac_adjust_link
,
436 0, PHY_INTERFACE_MODE_MII
);
439 if (IS_ERR(phydev
)) {
440 printk(KERN_ERR
"%s: Could not attach to PHY\n", dev
->name
);
441 return PTR_ERR(phydev
);
444 /* mask with MAC supported features */
445 phydev
->supported
&= (SUPPORTED_10baseT_Half
446 | SUPPORTED_10baseT_Full
447 | SUPPORTED_100baseT_Half
448 | SUPPORTED_100baseT_Full
450 | SUPPORTED_Pause
| SUPPORTED_Asym_Pause
454 phydev
->advertising
= phydev
->supported
;
461 printk(KERN_INFO
"%s: attached PHY driver [%s] "
462 "(mii_bus:phy_addr=%s, irq=%d, mdc_clk=%dHz(mdc_div=%d)"
464 DRV_NAME
, phydev
->drv
->name
, dev_name(&phydev
->dev
), phydev
->irq
,
465 MDC_CLK
, mdc_div
, sclk
/1000000);
475 * interrupt routine for magic packet wakeup
477 static irqreturn_t
bfin_mac_wake_interrupt(int irq
, void *dev_id
)
483 bfin_mac_ethtool_getsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
485 struct bfin_mac_local
*lp
= netdev_priv(dev
);
488 return phy_ethtool_gset(lp
->phydev
, cmd
);
494 bfin_mac_ethtool_setsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
496 struct bfin_mac_local
*lp
= netdev_priv(dev
);
498 if (!capable(CAP_NET_ADMIN
))
502 return phy_ethtool_sset(lp
->phydev
, cmd
);
507 static void bfin_mac_ethtool_getdrvinfo(struct net_device
*dev
,
508 struct ethtool_drvinfo
*info
)
510 strcpy(info
->driver
, DRV_NAME
);
511 strcpy(info
->version
, DRV_VERSION
);
512 strcpy(info
->fw_version
, "N/A");
513 strcpy(info
->bus_info
, dev_name(&dev
->dev
));
516 static void bfin_mac_ethtool_getwol(struct net_device
*dev
,
517 struct ethtool_wolinfo
*wolinfo
)
519 struct bfin_mac_local
*lp
= netdev_priv(dev
);
521 wolinfo
->supported
= WAKE_MAGIC
;
522 wolinfo
->wolopts
= lp
->wol
;
525 static int bfin_mac_ethtool_setwol(struct net_device
*dev
,
526 struct ethtool_wolinfo
*wolinfo
)
528 struct bfin_mac_local
*lp
= netdev_priv(dev
);
531 if (wolinfo
->wolopts
& (WAKE_MAGICSECURE
|
538 lp
->wol
= wolinfo
->wolopts
;
540 if (lp
->wol
&& !lp
->irq_wake_requested
) {
541 /* register wake irq handler */
542 rc
= request_irq(IRQ_MAC_WAKEDET
, bfin_mac_wake_interrupt
,
543 IRQF_DISABLED
, "EMAC_WAKE", dev
);
546 lp
->irq_wake_requested
= true;
549 if (!lp
->wol
&& lp
->irq_wake_requested
) {
550 free_irq(IRQ_MAC_WAKEDET
, dev
);
551 lp
->irq_wake_requested
= false;
554 /* Make sure the PHY driver doesn't suspend */
555 device_init_wakeup(&dev
->dev
, lp
->wol
);
560 static const struct ethtool_ops bfin_mac_ethtool_ops
= {
561 .get_settings
= bfin_mac_ethtool_getsettings
,
562 .set_settings
= bfin_mac_ethtool_setsettings
,
563 .get_link
= ethtool_op_get_link
,
564 .get_drvinfo
= bfin_mac_ethtool_getdrvinfo
,
565 .get_wol
= bfin_mac_ethtool_getwol
,
566 .set_wol
= bfin_mac_ethtool_setwol
,
569 /**************************************************************************/
570 void setup_system_regs(struct net_device
*dev
)
572 unsigned short sysctl
;
575 * Odd word alignment for Receive Frame DMA word
576 * Configure checksum support and rcve frame word alignment
578 sysctl
= bfin_read_EMAC_SYSCTL();
580 #if defined(BFIN_MAC_CSUM_OFFLOAD)
585 bfin_write_EMAC_SYSCTL(sysctl
);
587 bfin_write_EMAC_MMC_CTL(RSTC
| CROLL
);
589 /* Initialize the TX DMA channel registers */
590 bfin_write_DMA2_X_COUNT(0);
591 bfin_write_DMA2_X_MODIFY(4);
592 bfin_write_DMA2_Y_COUNT(0);
593 bfin_write_DMA2_Y_MODIFY(0);
595 /* Initialize the RX DMA channel registers */
596 bfin_write_DMA1_X_COUNT(0);
597 bfin_write_DMA1_X_MODIFY(4);
598 bfin_write_DMA1_Y_COUNT(0);
599 bfin_write_DMA1_Y_MODIFY(0);
602 static void setup_mac_addr(u8
*mac_addr
)
604 u32 addr_low
= le32_to_cpu(*(__le32
*) & mac_addr
[0]);
605 u16 addr_hi
= le16_to_cpu(*(__le16
*) & mac_addr
[4]);
607 /* this depends on a little-endian machine */
608 bfin_write_EMAC_ADDRLO(addr_low
);
609 bfin_write_EMAC_ADDRHI(addr_hi
);
612 static int bfin_mac_set_mac_address(struct net_device
*dev
, void *p
)
614 struct sockaddr
*addr
= p
;
615 if (netif_running(dev
))
617 memcpy(dev
->dev_addr
, addr
->sa_data
, dev
->addr_len
);
618 setup_mac_addr(dev
->dev_addr
);
622 #ifdef CONFIG_BFIN_MAC_USE_HWSTAMP
623 #define bfin_mac_hwtstamp_is_none(cfg) ((cfg) == HWTSTAMP_FILTER_NONE)
625 static int bfin_mac_hwtstamp_ioctl(struct net_device
*netdev
,
626 struct ifreq
*ifr
, int cmd
)
628 struct hwtstamp_config config
;
629 struct bfin_mac_local
*lp
= netdev_priv(netdev
);
631 u32 ptpfv1
, ptpfv2
, ptpfv3
, ptpfoff
;
633 if (copy_from_user(&config
, ifr
->ifr_data
, sizeof(config
)))
636 pr_debug("%s config flag:0x%x, tx_type:0x%x, rx_filter:0x%x\n",
637 __func__
, config
.flags
, config
.tx_type
, config
.rx_filter
);
639 /* reserved for future extensions */
643 if ((config
.tx_type
!= HWTSTAMP_TX_OFF
) &&
644 (config
.tx_type
!= HWTSTAMP_TX_ON
))
647 ptpctl
= bfin_read_EMAC_PTP_CTL();
649 switch (config
.rx_filter
) {
650 case HWTSTAMP_FILTER_NONE
:
652 * Dont allow any timestamping
655 bfin_write_EMAC_PTP_FV3(ptpfv3
);
657 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT
:
658 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC
:
659 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ
:
661 * Clear the five comparison mask bits (bits[12:8]) in EMAC_PTP_CTL)
662 * to enable all the field matches.
665 bfin_write_EMAC_PTP_CTL(ptpctl
);
667 * Keep the default values of the EMAC_PTP_FOFF register.
669 ptpfoff
= 0x4A24170C;
670 bfin_write_EMAC_PTP_FOFF(ptpfoff
);
672 * Keep the default values of the EMAC_PTP_FV1 and EMAC_PTP_FV2
676 bfin_write_EMAC_PTP_FV1(ptpfv1
);
678 bfin_write_EMAC_PTP_FV2(ptpfv2
);
680 * The default value (0xFFFC) allows the timestamping of both
681 * received Sync messages and Delay_Req messages.
684 bfin_write_EMAC_PTP_FV3(ptpfv3
);
686 config
.rx_filter
= HWTSTAMP_FILTER_PTP_V1_L4_EVENT
;
688 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT
:
689 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC
:
690 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ
:
691 /* Clear all five comparison mask bits (bits[12:8]) in the
692 * EMAC_PTP_CTL register to enable all the field matches.
695 bfin_write_EMAC_PTP_CTL(ptpctl
);
697 * Keep the default values of the EMAC_PTP_FOFF register, except set
698 * the PTPCOF field to 0x2A.
700 ptpfoff
= 0x2A24170C;
701 bfin_write_EMAC_PTP_FOFF(ptpfoff
);
703 * Keep the default values of the EMAC_PTP_FV1 and EMAC_PTP_FV2
707 bfin_write_EMAC_PTP_FV1(ptpfv1
);
709 bfin_write_EMAC_PTP_FV2(ptpfv2
);
711 * To allow the timestamping of Pdelay_Req and Pdelay_Resp, set
712 * the value to 0xFFF0.
715 bfin_write_EMAC_PTP_FV3(ptpfv3
);
717 config
.rx_filter
= HWTSTAMP_FILTER_PTP_V2_L4_EVENT
;
719 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT
:
720 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC
:
721 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ
:
723 * Clear bits 8 and 12 of the EMAC_PTP_CTL register to enable only the
724 * EFTM and PTPCM field comparison.
727 bfin_write_EMAC_PTP_CTL(ptpctl
);
729 * Keep the default values of all the fields of the EMAC_PTP_FOFF
730 * register, except set the PTPCOF field to 0x0E.
732 ptpfoff
= 0x0E24170C;
733 bfin_write_EMAC_PTP_FOFF(ptpfoff
);
735 * Program bits [15:0] of the EMAC_PTP_FV1 register to 0x88F7, which
736 * corresponds to PTP messages on the MAC layer.
739 bfin_write_EMAC_PTP_FV1(ptpfv1
);
741 bfin_write_EMAC_PTP_FV2(ptpfv2
);
743 * To allow the timestamping of Pdelay_Req and Pdelay_Resp
744 * messages, set the value to 0xFFF0.
747 bfin_write_EMAC_PTP_FV3(ptpfv3
);
749 config
.rx_filter
= HWTSTAMP_FILTER_PTP_V2_L2_EVENT
;
755 if (config
.tx_type
== HWTSTAMP_TX_OFF
&&
756 bfin_mac_hwtstamp_is_none(config
.rx_filter
)) {
758 bfin_write_EMAC_PTP_CTL(ptpctl
);
763 bfin_write_EMAC_PTP_CTL(ptpctl
);
766 * clear any existing timestamp
768 bfin_read_EMAC_PTP_RXSNAPLO();
769 bfin_read_EMAC_PTP_RXSNAPHI();
771 bfin_read_EMAC_PTP_TXSNAPLO();
772 bfin_read_EMAC_PTP_TXSNAPHI();
775 * Set registers so that rollover occurs soon to test this.
777 bfin_write_EMAC_PTP_TIMELO(0x00000000);
778 bfin_write_EMAC_PTP_TIMEHI(0xFF800000);
782 lp
->compare
.last_update
= 0;
783 timecounter_init(&lp
->clock
,
785 ktime_to_ns(ktime_get_real()));
786 timecompare_update(&lp
->compare
, 0);
789 lp
->stamp_cfg
= config
;
790 return copy_to_user(ifr
->ifr_data
, &config
, sizeof(config
)) ?
794 static void bfin_dump_hwtamp(char *s
, ktime_t
*hw
, ktime_t
*ts
, struct timecompare
*cmp
)
796 ktime_t sys
= ktime_get_real();
798 pr_debug("%s %s hardware:%d,%d transform system:%d,%d system:%d,%d, cmp:%lld, %lld\n",
799 __func__
, s
, hw
->tv
.sec
, hw
->tv
.nsec
, ts
->tv
.sec
, ts
->tv
.nsec
, sys
.tv
.sec
,
800 sys
.tv
.nsec
, cmp
->offset
, cmp
->skew
);
803 static void bfin_tx_hwtstamp(struct net_device
*netdev
, struct sk_buff
*skb
)
805 struct bfin_mac_local
*lp
= netdev_priv(netdev
);
806 union skb_shared_tx
*shtx
= skb_tx(skb
);
808 if (shtx
->hardware
) {
809 int timeout_cnt
= MAX_TIMEOUT_CNT
;
811 /* When doing time stamping, keep the connection to the socket
814 shtx
->in_progress
= 1;
817 * The timestamping is done at the EMAC module's MII/RMII interface
818 * when the module sees the Start of Frame of an event message packet. This
819 * interface is the closest possible place to the physical Ethernet transmission
820 * medium, providing the best timing accuracy.
822 while ((!(bfin_read_EMAC_PTP_ISTAT() & TXTL
)) && (--timeout_cnt
))
824 if (timeout_cnt
== 0)
825 printk(KERN_ERR DRV_NAME
826 ": fails to timestamp the TX packet\n");
828 struct skb_shared_hwtstamps shhwtstamps
;
832 regval
= bfin_read_EMAC_PTP_TXSNAPLO();
833 regval
|= (u64
)bfin_read_EMAC_PTP_TXSNAPHI() << 32;
834 memset(&shhwtstamps
, 0, sizeof(shhwtstamps
));
835 ns
= timecounter_cyc2time(&lp
->clock
,
837 timecompare_update(&lp
->compare
, ns
);
838 shhwtstamps
.hwtstamp
= ns_to_ktime(ns
);
839 shhwtstamps
.syststamp
=
840 timecompare_transform(&lp
->compare
, ns
);
841 skb_tstamp_tx(skb
, &shhwtstamps
);
843 bfin_dump_hwtamp("TX", &shhwtstamps
.hwtstamp
, &shhwtstamps
.syststamp
, &lp
->compare
);
848 static void bfin_rx_hwtstamp(struct net_device
*netdev
, struct sk_buff
*skb
)
850 struct bfin_mac_local
*lp
= netdev_priv(netdev
);
853 struct skb_shared_hwtstamps
*shhwtstamps
;
855 if (bfin_mac_hwtstamp_is_none(lp
->stamp_cfg
.rx_filter
))
858 valid
= bfin_read_EMAC_PTP_ISTAT() & RXEL
;
862 shhwtstamps
= skb_hwtstamps(skb
);
864 regval
= bfin_read_EMAC_PTP_RXSNAPLO();
865 regval
|= (u64
)bfin_read_EMAC_PTP_RXSNAPHI() << 32;
866 ns
= timecounter_cyc2time(&lp
->clock
, regval
);
867 timecompare_update(&lp
->compare
, ns
);
868 memset(shhwtstamps
, 0, sizeof(*shhwtstamps
));
869 shhwtstamps
->hwtstamp
= ns_to_ktime(ns
);
870 shhwtstamps
->syststamp
= timecompare_transform(&lp
->compare
, ns
);
872 bfin_dump_hwtamp("RX", &shhwtstamps
->hwtstamp
, &shhwtstamps
->syststamp
, &lp
->compare
);
876 * bfin_read_clock - read raw cycle counter (to be used by time counter)
878 static cycle_t
bfin_read_clock(const struct cyclecounter
*tc
)
882 stamp
= bfin_read_EMAC_PTP_TIMELO();
883 stamp
|= (u64
)bfin_read_EMAC_PTP_TIMEHI() << 32ULL;
888 #define PTP_CLK 25000000
890 static void bfin_mac_hwtstamp_init(struct net_device
*netdev
)
892 struct bfin_mac_local
*lp
= netdev_priv(netdev
);
895 /* Initialize hardware timer */
896 append
= PTP_CLK
* (1ULL << 32);
897 do_div(append
, get_sclk());
898 bfin_write_EMAC_PTP_ADDEND((u32
)append
);
900 memset(&lp
->cycles
, 0, sizeof(lp
->cycles
));
901 lp
->cycles
.read
= bfin_read_clock
;
902 lp
->cycles
.mask
= CLOCKSOURCE_MASK(64);
903 lp
->cycles
.mult
= 1000000000 / PTP_CLK
;
904 lp
->cycles
.shift
= 0;
906 /* Synchronize our NIC clock against system wall clock */
907 memset(&lp
->compare
, 0, sizeof(lp
->compare
));
908 lp
->compare
.source
= &lp
->clock
;
909 lp
->compare
.target
= ktime_get_real
;
910 lp
->compare
.num_samples
= 10;
912 /* Initialize hwstamp config */
913 lp
->stamp_cfg
.rx_filter
= HWTSTAMP_FILTER_NONE
;
914 lp
->stamp_cfg
.tx_type
= HWTSTAMP_TX_OFF
;
918 # define bfin_mac_hwtstamp_is_none(cfg) 0
919 # define bfin_mac_hwtstamp_init(dev)
920 # define bfin_mac_hwtstamp_ioctl(dev, ifr, cmd) (-EOPNOTSUPP)
921 # define bfin_rx_hwtstamp(dev, skb)
922 # define bfin_tx_hwtstamp(dev, skb)
925 static inline void _tx_reclaim_skb(void)
928 tx_list_head
->desc_a
.config
&= ~DMAEN
;
929 tx_list_head
->status
.status_word
= 0;
930 if (tx_list_head
->skb
) {
931 dev_kfree_skb(tx_list_head
->skb
);
932 tx_list_head
->skb
= NULL
;
934 tx_list_head
= tx_list_head
->next
;
936 } while (tx_list_head
->status
.status_word
!= 0);
939 static void tx_reclaim_skb(struct bfin_mac_local
*lp
)
941 int timeout_cnt
= MAX_TIMEOUT_CNT
;
943 if (tx_list_head
->status
.status_word
!= 0)
946 if (current_tx_ptr
->next
== tx_list_head
) {
947 while (tx_list_head
->status
.status_word
== 0) {
948 /* slow down polling to avoid too many queue stop. */
950 /* reclaim skb if DMA is not running. */
951 if (!(bfin_read_DMA2_IRQ_STATUS() & DMA_RUN
))
953 if (timeout_cnt
-- < 0)
957 if (timeout_cnt
>= 0)
960 netif_stop_queue(lp
->ndev
);
963 if (current_tx_ptr
->next
!= tx_list_head
&&
964 netif_queue_stopped(lp
->ndev
))
965 netif_wake_queue(lp
->ndev
);
967 if (tx_list_head
!= current_tx_ptr
) {
968 /* shorten the timer interval if tx queue is stopped */
969 if (netif_queue_stopped(lp
->ndev
))
970 lp
->tx_reclaim_timer
.expires
=
971 jiffies
+ (TX_RECLAIM_JIFFIES
>> 4);
973 lp
->tx_reclaim_timer
.expires
=
974 jiffies
+ TX_RECLAIM_JIFFIES
;
976 mod_timer(&lp
->tx_reclaim_timer
,
977 lp
->tx_reclaim_timer
.expires
);
983 static void tx_reclaim_skb_timeout(unsigned long lp
)
985 tx_reclaim_skb((struct bfin_mac_local
*)lp
);
988 static int bfin_mac_hard_start_xmit(struct sk_buff
*skb
,
989 struct net_device
*dev
)
991 struct bfin_mac_local
*lp
= netdev_priv(dev
);
993 u32 data_align
= (unsigned long)(skb
->data
) & 0x3;
994 union skb_shared_tx
*shtx
= skb_tx(skb
);
996 current_tx_ptr
->skb
= skb
;
998 if (data_align
== 0x2) {
999 /* move skb->data to current_tx_ptr payload */
1000 data
= (u16
*)(skb
->data
) - 1;
1001 *data
= (u16
)(skb
->len
);
1003 * When transmitting an Ethernet packet, the PTP_TSYNC module requires
1004 * a DMA_Length_Word field associated with the packet. The lower 12 bits
1005 * of this field are the length of the packet payload in bytes and the higher
1006 * 4 bits are the timestamping enable field.
1011 current_tx_ptr
->desc_a
.start_addr
= (u32
)data
;
1012 /* this is important! */
1013 blackfin_dcache_flush_range((u32
)data
,
1014 (u32
)((u8
*)data
+ skb
->len
+ 4));
1016 *((u16
*)(current_tx_ptr
->packet
)) = (u16
)(skb
->len
);
1017 /* enable timestamping for the sent packet */
1019 *((u16
*)(current_tx_ptr
->packet
)) |= 0x1000;
1020 memcpy((u8
*)(current_tx_ptr
->packet
+ 2), skb
->data
,
1022 current_tx_ptr
->desc_a
.start_addr
=
1023 (u32
)current_tx_ptr
->packet
;
1024 blackfin_dcache_flush_range(
1025 (u32
)current_tx_ptr
->packet
,
1026 (u32
)(current_tx_ptr
->packet
+ skb
->len
+ 2));
1029 /* make sure the internal data buffers in the core are drained
1030 * so that the DMA descriptors are completely written when the
1031 * DMA engine goes to fetch them below
1035 /* always clear status buffer before start tx dma */
1036 current_tx_ptr
->status
.status_word
= 0;
1038 /* enable this packet's dma */
1039 current_tx_ptr
->desc_a
.config
|= DMAEN
;
1041 /* tx dma is running, just return */
1042 if (bfin_read_DMA2_IRQ_STATUS() & DMA_RUN
)
1045 /* tx dma is not running */
1046 bfin_write_DMA2_NEXT_DESC_PTR(&(current_tx_ptr
->desc_a
));
1047 /* dma enabled, read from memory, size is 6 */
1048 bfin_write_DMA2_CONFIG(current_tx_ptr
->desc_a
.config
);
1049 /* Turn on the EMAC tx */
1050 bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE
);
1053 bfin_tx_hwtstamp(dev
, skb
);
1055 current_tx_ptr
= current_tx_ptr
->next
;
1056 dev
->stats
.tx_packets
++;
1057 dev
->stats
.tx_bytes
+= (skb
->len
);
1061 return NETDEV_TX_OK
;
1064 #define IP_HEADER_OFF 0
1065 #define RX_ERROR_MASK (RX_LONG | RX_ALIGN | RX_CRC | RX_LEN | \
1066 RX_FRAG | RX_ADDR | RX_DMAO | RX_PHY | RX_LATE | RX_RANGE)
1068 static void bfin_mac_rx(struct net_device
*dev
)
1070 struct sk_buff
*skb
, *new_skb
;
1072 struct bfin_mac_local
*lp __maybe_unused
= netdev_priv(dev
);
1073 #if defined(BFIN_MAC_CSUM_OFFLOAD)
1075 unsigned char fcs
[ETH_FCS_LEN
+ 1];
1078 /* check if frame status word reports an error condition
1079 * we which case we simply drop the packet
1081 if (current_rx_ptr
->status
.status_word
& RX_ERROR_MASK
) {
1082 printk(KERN_NOTICE DRV_NAME
1083 ": rx: receive error - packet dropped\n");
1084 dev
->stats
.rx_dropped
++;
1088 /* allocate a new skb for next time receive */
1089 skb
= current_rx_ptr
->skb
;
1091 new_skb
= dev_alloc_skb(PKT_BUF_SZ
+ NET_IP_ALIGN
);
1093 printk(KERN_NOTICE DRV_NAME
1094 ": rx: low on mem - packet dropped\n");
1095 dev
->stats
.rx_dropped
++;
1098 /* reserve 2 bytes for RXDWA padding */
1099 skb_reserve(new_skb
, NET_IP_ALIGN
);
1100 /* Invidate the data cache of skb->data range when it is write back
1101 * cache. It will prevent overwritting the new data from DMA
1103 blackfin_dcache_invalidate_range((unsigned long)new_skb
->head
,
1104 (unsigned long)new_skb
->end
);
1106 current_rx_ptr
->skb
= new_skb
;
1107 current_rx_ptr
->desc_a
.start_addr
= (unsigned long)new_skb
->data
- 2;
1109 len
= (unsigned short)((current_rx_ptr
->status
.status_word
) & RX_FRLEN
);
1110 /* Deduce Ethernet FCS length from Ethernet payload length */
1114 skb
->protocol
= eth_type_trans(skb
, dev
);
1116 bfin_rx_hwtstamp(dev
, skb
);
1118 #if defined(BFIN_MAC_CSUM_OFFLOAD)
1119 /* Checksum offloading only works for IPv4 packets with the standard IP header
1120 * length of 20 bytes, because the blackfin MAC checksum calculation is
1121 * based on that assumption. We must NOT use the calculated checksum if our
1122 * IP version or header break that assumption.
1124 if (skb
->data
[IP_HEADER_OFF
] == 0x45) {
1125 skb
->csum
= current_rx_ptr
->status
.ip_payload_csum
;
1127 * Deduce Ethernet FCS from hardware generated IP payload checksum.
1128 * IP checksum is based on 16-bit one's complement algorithm.
1129 * To deduce a value from checksum is equal to add its inversion.
1130 * If the IP payload len is odd, the inversed FCS should also
1131 * begin from odd address and leave first byte zero.
1135 for (i
= 0; i
< ETH_FCS_LEN
; i
++)
1136 fcs
[i
+ 1] = ~skb
->data
[skb
->len
+ i
];
1137 skb
->csum
= csum_partial(fcs
, ETH_FCS_LEN
+ 1, skb
->csum
);
1139 for (i
= 0; i
< ETH_FCS_LEN
; i
++)
1140 fcs
[i
] = ~skb
->data
[skb
->len
+ i
];
1141 skb
->csum
= csum_partial(fcs
, ETH_FCS_LEN
, skb
->csum
);
1143 skb
->ip_summed
= CHECKSUM_COMPLETE
;
1148 dev
->stats
.rx_packets
++;
1149 dev
->stats
.rx_bytes
+= len
;
1151 current_rx_ptr
->status
.status_word
= 0x00000000;
1152 current_rx_ptr
= current_rx_ptr
->next
;
1155 /* interrupt routine to handle rx and error signal */
1156 static irqreturn_t
bfin_mac_interrupt(int irq
, void *dev_id
)
1158 struct net_device
*dev
= dev_id
;
1162 if (current_rx_ptr
->status
.status_word
== 0) {
1163 /* no more new packet received */
1165 if (current_rx_ptr
->next
->status
.status_word
!= 0) {
1166 current_rx_ptr
= current_rx_ptr
->next
;
1170 bfin_write_DMA1_IRQ_STATUS(bfin_read_DMA1_IRQ_STATUS() |
1171 DMA_DONE
| DMA_ERR
);
1178 goto get_one_packet
;
1181 #ifdef CONFIG_NET_POLL_CONTROLLER
1182 static void bfin_mac_poll(struct net_device
*dev
)
1184 struct bfin_mac_local
*lp
= netdev_priv(dev
);
1186 disable_irq(IRQ_MAC_RX
);
1187 bfin_mac_interrupt(IRQ_MAC_RX
, dev
);
1189 enable_irq(IRQ_MAC_RX
);
1191 #endif /* CONFIG_NET_POLL_CONTROLLER */
1193 static void bfin_mac_disable(void)
1195 unsigned int opmode
;
1197 opmode
= bfin_read_EMAC_OPMODE();
1200 /* Turn off the EMAC */
1201 bfin_write_EMAC_OPMODE(opmode
);
1205 * Enable Interrupts, Receive, and Transmit
1207 static int bfin_mac_enable(void)
1212 pr_debug("%s: %s\n", DRV_NAME
, __func__
);
1215 bfin_write_DMA1_NEXT_DESC_PTR(&(rx_list_head
->desc_a
));
1216 bfin_write_DMA1_CONFIG(rx_list_head
->desc_a
.config
);
1219 ret
= bfin_mdio_poll();
1223 /* We enable only RX here */
1224 /* ASTP : Enable Automatic Pad Stripping
1225 PR : Promiscuous Mode for test
1226 PSF : Receive frames with total length less than 64 bytes.
1227 FDMODE : Full Duplex Mode
1228 LB : Internal Loopback for test
1229 RE : Receiver Enable */
1230 opmode
= bfin_read_EMAC_OPMODE();
1231 if (opmode
& FDMODE
)
1234 opmode
|= DRO
| DC
| PSF
;
1237 #if defined(CONFIG_BFIN_MAC_RMII)
1238 opmode
|= RMII
; /* For Now only 100MBit are supported */
1239 #if (defined(CONFIG_BF537) || defined(CONFIG_BF536)) && CONFIG_BF_REV_0_2
1243 /* Turn on the EMAC rx */
1244 bfin_write_EMAC_OPMODE(opmode
);
1249 /* Our watchdog timed out. Called by the networking layer */
1250 static void bfin_mac_timeout(struct net_device
*dev
)
1252 struct bfin_mac_local
*lp
= netdev_priv(dev
);
1254 pr_debug("%s: %s\n", dev
->name
, __func__
);
1258 del_timer(&lp
->tx_reclaim_timer
);
1260 /* reset tx queue and free skb */
1261 while (tx_list_head
!= current_tx_ptr
) {
1262 tx_list_head
->desc_a
.config
&= ~DMAEN
;
1263 tx_list_head
->status
.status_word
= 0;
1264 if (tx_list_head
->skb
) {
1265 dev_kfree_skb(tx_list_head
->skb
);
1266 tx_list_head
->skb
= NULL
;
1268 tx_list_head
= tx_list_head
->next
;
1271 if (netif_queue_stopped(lp
->ndev
))
1272 netif_wake_queue(lp
->ndev
);
1276 /* We can accept TX packets again */
1277 dev
->trans_start
= jiffies
; /* prevent tx timeout */
1278 netif_wake_queue(dev
);
1281 static void bfin_mac_multicast_hash(struct net_device
*dev
)
1283 u32 emac_hashhi
, emac_hashlo
;
1284 struct netdev_hw_addr
*ha
;
1288 emac_hashhi
= emac_hashlo
= 0;
1290 netdev_for_each_mc_addr(ha
, dev
) {
1293 /* skip non-multicast addresses */
1297 crc
= ether_crc(ETH_ALEN
, addrs
);
1301 emac_hashhi
|= 1 << (crc
& 0x1f);
1303 emac_hashlo
|= 1 << (crc
& 0x1f);
1306 bfin_write_EMAC_HASHHI(emac_hashhi
);
1307 bfin_write_EMAC_HASHLO(emac_hashlo
);
1311 * This routine will, depending on the values passed to it,
1312 * either make it accept multicast packets, go into
1313 * promiscuous mode (for TCPDUMP and cousins) or accept
1314 * a select set of multicast packets
1316 static void bfin_mac_set_multicast_list(struct net_device
*dev
)
1320 if (dev
->flags
& IFF_PROMISC
) {
1321 printk(KERN_INFO
"%s: set to promisc mode\n", dev
->name
);
1322 sysctl
= bfin_read_EMAC_OPMODE();
1324 bfin_write_EMAC_OPMODE(sysctl
);
1325 } else if (dev
->flags
& IFF_ALLMULTI
) {
1326 /* accept all multicast */
1327 sysctl
= bfin_read_EMAC_OPMODE();
1329 bfin_write_EMAC_OPMODE(sysctl
);
1330 } else if (!netdev_mc_empty(dev
)) {
1331 /* set up multicast hash table */
1332 sysctl
= bfin_read_EMAC_OPMODE();
1334 bfin_write_EMAC_OPMODE(sysctl
);
1335 bfin_mac_multicast_hash(dev
);
1337 /* clear promisc or multicast mode */
1338 sysctl
= bfin_read_EMAC_OPMODE();
1339 sysctl
&= ~(RAF
| PAM
);
1340 bfin_write_EMAC_OPMODE(sysctl
);
1344 static int bfin_mac_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
1348 return bfin_mac_hwtstamp_ioctl(netdev
, ifr
, cmd
);
1355 * this puts the device in an inactive state
1357 static void bfin_mac_shutdown(struct net_device
*dev
)
1359 /* Turn off the EMAC */
1360 bfin_write_EMAC_OPMODE(0x00000000);
1361 /* Turn off the EMAC RX DMA */
1362 bfin_write_DMA1_CONFIG(0x0000);
1363 bfin_write_DMA2_CONFIG(0x0000);
1367 * Open and Initialize the interface
1369 * Set up everything, reset the card, etc..
1371 static int bfin_mac_open(struct net_device
*dev
)
1373 struct bfin_mac_local
*lp
= netdev_priv(dev
);
1375 pr_debug("%s: %s\n", dev
->name
, __func__
);
1378 * Check that the address is valid. If its not, refuse
1379 * to bring the device up. The user must specify an
1380 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1382 if (!is_valid_ether_addr(dev
->dev_addr
)) {
1383 printk(KERN_WARNING DRV_NAME
": no valid ethernet hw addr\n");
1387 /* initial rx and tx list */
1388 ret
= desc_list_init();
1392 phy_start(lp
->phydev
);
1393 phy_write(lp
->phydev
, MII_BMCR
, BMCR_RESET
);
1394 setup_system_regs(dev
);
1395 setup_mac_addr(dev
->dev_addr
);
1398 ret
= bfin_mac_enable();
1401 pr_debug("hardware init finished\n");
1403 netif_start_queue(dev
);
1404 netif_carrier_on(dev
);
1410 * this makes the board clean up everything that it can
1411 * and not talk to the outside world. Caused by
1412 * an 'ifconfig ethX down'
1414 static int bfin_mac_close(struct net_device
*dev
)
1416 struct bfin_mac_local
*lp
= netdev_priv(dev
);
1417 pr_debug("%s: %s\n", dev
->name
, __func__
);
1419 netif_stop_queue(dev
);
1420 netif_carrier_off(dev
);
1422 phy_stop(lp
->phydev
);
1423 phy_write(lp
->phydev
, MII_BMCR
, BMCR_PDOWN
);
1425 /* clear everything */
1426 bfin_mac_shutdown(dev
);
1428 /* free the rx/tx buffers */
1434 static const struct net_device_ops bfin_mac_netdev_ops
= {
1435 .ndo_open
= bfin_mac_open
,
1436 .ndo_stop
= bfin_mac_close
,
1437 .ndo_start_xmit
= bfin_mac_hard_start_xmit
,
1438 .ndo_set_mac_address
= bfin_mac_set_mac_address
,
1439 .ndo_tx_timeout
= bfin_mac_timeout
,
1440 .ndo_set_multicast_list
= bfin_mac_set_multicast_list
,
1441 .ndo_do_ioctl
= bfin_mac_ioctl
,
1442 .ndo_validate_addr
= eth_validate_addr
,
1443 .ndo_change_mtu
= eth_change_mtu
,
1444 #ifdef CONFIG_NET_POLL_CONTROLLER
1445 .ndo_poll_controller
= bfin_mac_poll
,
1449 static int __devinit
bfin_mac_probe(struct platform_device
*pdev
)
1451 struct net_device
*ndev
;
1452 struct bfin_mac_local
*lp
;
1453 struct platform_device
*pd
;
1456 ndev
= alloc_etherdev(sizeof(struct bfin_mac_local
));
1458 dev_err(&pdev
->dev
, "Cannot allocate net device!\n");
1462 SET_NETDEV_DEV(ndev
, &pdev
->dev
);
1463 platform_set_drvdata(pdev
, ndev
);
1464 lp
= netdev_priv(ndev
);
1467 /* Grab the MAC address in the MAC */
1468 *(__le32
*) (&(ndev
->dev_addr
[0])) = cpu_to_le32(bfin_read_EMAC_ADDRLO());
1469 *(__le16
*) (&(ndev
->dev_addr
[4])) = cpu_to_le16((u16
) bfin_read_EMAC_ADDRHI());
1472 /*todo: how to proble? which is revision_register */
1473 bfin_write_EMAC_ADDRLO(0x12345678);
1474 if (bfin_read_EMAC_ADDRLO() != 0x12345678) {
1475 dev_err(&pdev
->dev
, "Cannot detect Blackfin on-chip ethernet MAC controller!\n");
1477 goto out_err_probe_mac
;
1482 * Is it valid? (Did bootloader initialize it?)
1483 * Grab the MAC from the board somehow
1484 * this is done in the arch/blackfin/mach-bfxxx/boards/eth_mac.c
1486 if (!is_valid_ether_addr(ndev
->dev_addr
))
1487 bfin_get_ether_addr(ndev
->dev_addr
);
1489 /* If still not valid, get a random one */
1490 if (!is_valid_ether_addr(ndev
->dev_addr
))
1491 random_ether_addr(ndev
->dev_addr
);
1493 setup_mac_addr(ndev
->dev_addr
);
1495 if (!pdev
->dev
.platform_data
) {
1496 dev_err(&pdev
->dev
, "Cannot get platform device bfin_mii_bus!\n");
1498 goto out_err_probe_mac
;
1500 pd
= pdev
->dev
.platform_data
;
1501 lp
->mii_bus
= platform_get_drvdata(pd
);
1503 dev_err(&pdev
->dev
, "Cannot get mii_bus!\n");
1505 goto out_err_mii_bus_probe
;
1507 lp
->mii_bus
->priv
= ndev
;
1509 rc
= mii_probe(ndev
);
1511 dev_err(&pdev
->dev
, "MII Probe failed!\n");
1512 goto out_err_mii_probe
;
1515 /* Fill in the fields of the device structure with ethernet values. */
1518 ndev
->netdev_ops
= &bfin_mac_netdev_ops
;
1519 ndev
->ethtool_ops
= &bfin_mac_ethtool_ops
;
1521 init_timer(&lp
->tx_reclaim_timer
);
1522 lp
->tx_reclaim_timer
.data
= (unsigned long)lp
;
1523 lp
->tx_reclaim_timer
.function
= tx_reclaim_skb_timeout
;
1525 spin_lock_init(&lp
->lock
);
1527 /* now, enable interrupts */
1528 /* register irq handler */
1529 rc
= request_irq(IRQ_MAC_RX
, bfin_mac_interrupt
,
1530 IRQF_DISABLED
, "EMAC_RX", ndev
);
1532 dev_err(&pdev
->dev
, "Cannot request Blackfin MAC RX IRQ!\n");
1534 goto out_err_request_irq
;
1537 rc
= register_netdev(ndev
);
1539 dev_err(&pdev
->dev
, "Cannot register net device!\n");
1540 goto out_err_reg_ndev
;
1543 bfin_mac_hwtstamp_init(ndev
);
1545 /* now, print out the card info, in a short format.. */
1546 dev_info(&pdev
->dev
, "%s, Version %s\n", DRV_DESC
, DRV_VERSION
);
1551 free_irq(IRQ_MAC_RX
, ndev
);
1552 out_err_request_irq
:
1554 mdiobus_unregister(lp
->mii_bus
);
1555 mdiobus_free(lp
->mii_bus
);
1556 out_err_mii_bus_probe
:
1557 peripheral_free_list(pin_req
);
1559 platform_set_drvdata(pdev
, NULL
);
1565 static int __devexit
bfin_mac_remove(struct platform_device
*pdev
)
1567 struct net_device
*ndev
= platform_get_drvdata(pdev
);
1568 struct bfin_mac_local
*lp
= netdev_priv(ndev
);
1570 platform_set_drvdata(pdev
, NULL
);
1572 lp
->mii_bus
->priv
= NULL
;
1574 unregister_netdev(ndev
);
1576 free_irq(IRQ_MAC_RX
, ndev
);
1580 peripheral_free_list(pin_req
);
1586 static int bfin_mac_suspend(struct platform_device
*pdev
, pm_message_t mesg
)
1588 struct net_device
*net_dev
= platform_get_drvdata(pdev
);
1589 struct bfin_mac_local
*lp
= netdev_priv(net_dev
);
1592 bfin_write_EMAC_OPMODE((bfin_read_EMAC_OPMODE() & ~TE
) | RE
);
1593 bfin_write_EMAC_WKUP_CTL(MPKE
);
1594 enable_irq_wake(IRQ_MAC_WAKEDET
);
1596 if (netif_running(net_dev
))
1597 bfin_mac_close(net_dev
);
1603 static int bfin_mac_resume(struct platform_device
*pdev
)
1605 struct net_device
*net_dev
= platform_get_drvdata(pdev
);
1606 struct bfin_mac_local
*lp
= netdev_priv(net_dev
);
1609 bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE
);
1610 bfin_write_EMAC_WKUP_CTL(0);
1611 disable_irq_wake(IRQ_MAC_WAKEDET
);
1613 if (netif_running(net_dev
))
1614 bfin_mac_open(net_dev
);
1620 #define bfin_mac_suspend NULL
1621 #define bfin_mac_resume NULL
1622 #endif /* CONFIG_PM */
1624 static int __devinit
bfin_mii_bus_probe(struct platform_device
*pdev
)
1626 struct mii_bus
*miibus
;
1630 * We are setting up a network card,
1631 * so set the GPIO pins to Ethernet mode
1633 rc
= peripheral_request_list(pin_req
, DRV_NAME
);
1635 dev_err(&pdev
->dev
, "Requesting peripherals failed!\n");
1640 miibus
= mdiobus_alloc();
1643 miibus
->read
= bfin_mdiobus_read
;
1644 miibus
->write
= bfin_mdiobus_write
;
1645 miibus
->reset
= bfin_mdiobus_reset
;
1647 miibus
->parent
= &pdev
->dev
;
1648 miibus
->name
= "bfin_mii_bus";
1649 snprintf(miibus
->id
, MII_BUS_ID_SIZE
, "0");
1650 miibus
->irq
= kmalloc(sizeof(int)*PHY_MAX_ADDR
, GFP_KERNEL
);
1651 if (miibus
->irq
== NULL
)
1653 for (i
= 0; i
< PHY_MAX_ADDR
; ++i
)
1654 miibus
->irq
[i
] = PHY_POLL
;
1656 rc
= mdiobus_register(miibus
);
1658 dev_err(&pdev
->dev
, "Cannot register MDIO bus!\n");
1659 goto out_err_mdiobus_register
;
1662 platform_set_drvdata(pdev
, miibus
);
1665 out_err_mdiobus_register
:
1667 mdiobus_free(miibus
);
1669 peripheral_free_list(pin_req
);
1674 static int __devexit
bfin_mii_bus_remove(struct platform_device
*pdev
)
1676 struct mii_bus
*miibus
= platform_get_drvdata(pdev
);
1677 platform_set_drvdata(pdev
, NULL
);
1678 mdiobus_unregister(miibus
);
1680 mdiobus_free(miibus
);
1681 peripheral_free_list(pin_req
);
1685 static struct platform_driver bfin_mii_bus_driver
= {
1686 .probe
= bfin_mii_bus_probe
,
1687 .remove
= __devexit_p(bfin_mii_bus_remove
),
1689 .name
= "bfin_mii_bus",
1690 .owner
= THIS_MODULE
,
1694 static struct platform_driver bfin_mac_driver
= {
1695 .probe
= bfin_mac_probe
,
1696 .remove
= __devexit_p(bfin_mac_remove
),
1697 .resume
= bfin_mac_resume
,
1698 .suspend
= bfin_mac_suspend
,
1701 .owner
= THIS_MODULE
,
1705 static int __init
bfin_mac_init(void)
1708 ret
= platform_driver_register(&bfin_mii_bus_driver
);
1710 return platform_driver_register(&bfin_mac_driver
);
1714 module_init(bfin_mac_init
);
1716 static void __exit
bfin_mac_cleanup(void)
1718 platform_driver_unregister(&bfin_mac_driver
);
1719 platform_driver_unregister(&bfin_mii_bus_driver
);
1722 module_exit(bfin_mac_cleanup
);