1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2007 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
37 #include <linux/tcp.h>
38 #include <linux/ipv6.h>
39 #include <net/checksum.h>
40 #include <net/ip6_checksum.h>
41 #include <linux/ethtool.h>
42 #include <linux/if_vlan.h>
45 #include "ixgbe_common.h"
47 char ixgbe_driver_name
[] = "ixgbe";
48 static const char ixgbe_driver_string
[] =
49 "Intel(R) 10 Gigabit PCI Express Network Driver";
51 #define DRV_VERSION "1.3.30-k2"
52 const char ixgbe_driver_version
[] = DRV_VERSION
;
53 static const char ixgbe_copyright
[] =
54 "Copyright (c) 1999-2007 Intel Corporation.";
56 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
57 [board_82598
] = &ixgbe_82598_info
,
60 /* ixgbe_pci_tbl - PCI Device ID Table
62 * Wildcard entries (PCI_ANY_ID) should come last
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static struct pci_device_id ixgbe_pci_tbl
[] = {
69 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
),
71 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
),
73 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
),
75 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
),
77 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_XF_LR
),
80 /* required last entry */
83 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
85 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
86 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
88 static struct notifier_block dca_notifier
= {
89 .notifier_call
= ixgbe_notify_dca
,
95 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
96 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
97 MODULE_LICENSE("GPL");
98 MODULE_VERSION(DRV_VERSION
);
100 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
102 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
106 /* Let firmware take over control of h/w */
107 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
108 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
109 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
112 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
116 /* Let firmware know the driver has taken over */
117 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
118 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
119 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
124 * ixgbe_get_hw_dev_name - return device name string
125 * used by hardware layer to print debugging information
127 char *ixgbe_get_hw_dev_name(struct ixgbe_hw
*hw
)
129 struct ixgbe_adapter
*adapter
= hw
->back
;
130 struct net_device
*netdev
= adapter
->netdev
;
135 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, u16 int_alloc_entry
,
140 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
141 index
= (int_alloc_entry
>> 2) & 0x1F;
142 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR(index
));
143 ivar
&= ~(0xFF << (8 * (int_alloc_entry
& 0x3)));
144 ivar
|= (msix_vector
<< (8 * (int_alloc_entry
& 0x3)));
145 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR(index
), ivar
);
148 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter
*adapter
,
149 struct ixgbe_tx_buffer
152 if (tx_buffer_info
->dma
) {
153 pci_unmap_page(adapter
->pdev
, tx_buffer_info
->dma
,
154 tx_buffer_info
->length
, PCI_DMA_TODEVICE
);
155 tx_buffer_info
->dma
= 0;
157 if (tx_buffer_info
->skb
) {
158 dev_kfree_skb_any(tx_buffer_info
->skb
);
159 tx_buffer_info
->skb
= NULL
;
161 /* tx_buffer_info must be completely set up in the transmit path */
164 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter
*adapter
,
165 struct ixgbe_ring
*tx_ring
,
168 struct ixgbe_hw
*hw
= &adapter
->hw
;
171 /* Detect a transmit hang in hardware, this serializes the
172 * check with the clearing of time_stamp and movement of eop */
173 head
= IXGBE_READ_REG(hw
, tx_ring
->head
);
174 tail
= IXGBE_READ_REG(hw
, tx_ring
->tail
);
175 adapter
->detect_tx_hung
= false;
176 if ((head
!= tail
) &&
177 tx_ring
->tx_buffer_info
[eop
].time_stamp
&&
178 time_after(jiffies
, tx_ring
->tx_buffer_info
[eop
].time_stamp
+ HZ
) &&
179 !(IXGBE_READ_REG(&adapter
->hw
, IXGBE_TFCS
) & IXGBE_TFCS_TXOFF
)) {
180 /* detected Tx unit hang */
181 union ixgbe_adv_tx_desc
*tx_desc
;
182 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, eop
);
183 DPRINTK(DRV
, ERR
, "Detected Tx Unit Hang\n"
185 " TDH, TDT <%x>, <%x>\n"
186 " next_to_use <%x>\n"
187 " next_to_clean <%x>\n"
188 "tx_buffer_info[next_to_clean]\n"
189 " time_stamp <%lx>\n"
191 tx_ring
->queue_index
,
193 tx_ring
->next_to_use
, eop
,
194 tx_ring
->tx_buffer_info
[eop
].time_stamp
, jiffies
);
201 #define IXGBE_MAX_TXD_PWR 14
202 #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
204 /* Tx Descriptors needed, worst case */
205 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
206 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
207 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
208 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
210 #define GET_TX_HEAD_FROM_RING(ring) (\
212 ((union ixgbe_adv_tx_desc *)(ring)->desc + (ring)->count))
213 static void ixgbe_tx_timeout(struct net_device
*netdev
);
216 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
217 * @adapter: board private structure
218 * @tx_ring: tx ring to clean
220 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter
*adapter
,
221 struct ixgbe_ring
*tx_ring
)
223 union ixgbe_adv_tx_desc
*tx_desc
;
224 struct ixgbe_tx_buffer
*tx_buffer_info
;
225 struct net_device
*netdev
= adapter
->netdev
;
229 unsigned int count
= 0;
230 unsigned int total_bytes
= 0, total_packets
= 0;
233 head
= GET_TX_HEAD_FROM_RING(tx_ring
);
234 head
= le32_to_cpu(head
);
235 i
= tx_ring
->next_to_clean
;
238 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, i
);
239 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
240 skb
= tx_buffer_info
->skb
;
243 unsigned int segs
, bytecount
;
245 /* gso_segs is currently only valid for tcp */
246 segs
= skb_shinfo(skb
)->gso_segs
?: 1;
247 /* multiply data chunks by size of headers */
248 bytecount
= ((segs
- 1) * skb_headlen(skb
)) +
250 total_packets
+= segs
;
251 total_bytes
+= bytecount
;
254 ixgbe_unmap_and_free_tx_resource(adapter
,
258 if (i
== tx_ring
->count
)
262 if (count
== tx_ring
->count
)
267 head
= GET_TX_HEAD_FROM_RING(tx_ring
);
268 head
= le32_to_cpu(head
);
274 tx_ring
->next_to_clean
= i
;
276 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
277 if (unlikely(count
&& netif_carrier_ok(netdev
) &&
278 (IXGBE_DESC_UNUSED(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
279 /* Make sure that anybody stopping the queue after this
280 * sees the new next_to_clean.
283 if (__netif_subqueue_stopped(netdev
, tx_ring
->queue_index
) &&
284 !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
285 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
286 ++adapter
->restart_queue
;
290 if (adapter
->detect_tx_hung
) {
291 if (ixgbe_check_tx_hang(adapter
, tx_ring
, i
)) {
292 /* schedule immediate reset if we believe we hung */
294 "tx hang %d detected, resetting adapter\n",
295 adapter
->tx_timeout_count
+ 1);
296 ixgbe_tx_timeout(adapter
->netdev
);
300 /* re-arm the interrupt */
301 if ((total_packets
>= tx_ring
->work_limit
) ||
302 (count
== tx_ring
->count
))
303 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, tx_ring
->v_idx
);
305 tx_ring
->total_bytes
+= total_bytes
;
306 tx_ring
->total_packets
+= total_packets
;
307 tx_ring
->stats
.bytes
+= total_bytes
;
308 tx_ring
->stats
.packets
+= total_packets
;
309 adapter
->net_stats
.tx_bytes
+= total_bytes
;
310 adapter
->net_stats
.tx_packets
+= total_packets
;
311 return (total_packets
? true : false);
314 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
315 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
316 struct ixgbe_ring
*rx_ring
)
320 int q
= rx_ring
- adapter
->rx_ring
;
322 if (rx_ring
->cpu
!= cpu
) {
323 rxctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
));
324 rxctrl
&= ~IXGBE_DCA_RXCTRL_CPUID_MASK
;
325 rxctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
326 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
327 rxctrl
|= IXGBE_DCA_RXCTRL_HEAD_DCA_EN
;
328 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_RXCTRL(q
), rxctrl
);
334 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
335 struct ixgbe_ring
*tx_ring
)
339 int q
= tx_ring
- adapter
->tx_ring
;
341 if (tx_ring
->cpu
!= cpu
) {
342 txctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_DCA_TXCTRL(q
));
343 txctrl
&= ~IXGBE_DCA_TXCTRL_CPUID_MASK
;
344 txctrl
|= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
345 txctrl
|= IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
346 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_TXCTRL(q
), txctrl
);
352 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
356 if (!(adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
))
359 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
360 adapter
->tx_ring
[i
].cpu
= -1;
361 ixgbe_update_tx_dca(adapter
, &adapter
->tx_ring
[i
]);
363 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
364 adapter
->rx_ring
[i
].cpu
= -1;
365 ixgbe_update_rx_dca(adapter
, &adapter
->rx_ring
[i
]);
369 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
371 struct net_device
*netdev
= dev_get_drvdata(dev
);
372 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
373 unsigned long event
= *(unsigned long *)data
;
376 case DCA_PROVIDER_ADD
:
377 /* if we're already enabled, don't do it again */
378 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
380 /* Always use CB2 mode, difference is masked
381 * in the CB driver. */
382 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 2);
383 if (dca_add_requester(dev
) == 0) {
384 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
385 ixgbe_setup_dca(adapter
);
388 /* Fall Through since DCA is disabled. */
389 case DCA_PROVIDER_REMOVE
:
390 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
391 dca_remove_requester(dev
);
392 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
393 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
401 #endif /* CONFIG_DCA or CONFIG_DCA_MODULE */
403 * ixgbe_receive_skb - Send a completed packet up the stack
404 * @adapter: board private structure
405 * @skb: packet to send up
406 * @status: hardware indication of status of receive
407 * @rx_ring: rx descriptor ring (for a specific queue) to setup
408 * @rx_desc: rx descriptor
410 static void ixgbe_receive_skb(struct ixgbe_adapter
*adapter
,
411 struct sk_buff
*skb
, u8 status
,
412 struct ixgbe_ring
*ring
,
413 union ixgbe_adv_rx_desc
*rx_desc
)
415 bool is_vlan
= (status
& IXGBE_RXD_STAT_VP
);
416 u16 tag
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
418 if (adapter
->netdev
->features
& NETIF_F_LRO
&&
419 skb
->ip_summed
== CHECKSUM_UNNECESSARY
) {
420 if (adapter
->vlgrp
&& is_vlan
)
421 lro_vlan_hwaccel_receive_skb(&ring
->lro_mgr
, skb
,
425 lro_receive_skb(&ring
->lro_mgr
, skb
, rx_desc
);
426 ring
->lro_used
= true;
428 if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
)) {
429 if (adapter
->vlgrp
&& is_vlan
)
430 vlan_hwaccel_receive_skb(skb
, adapter
->vlgrp
, tag
);
432 netif_receive_skb(skb
);
434 if (adapter
->vlgrp
&& is_vlan
)
435 vlan_hwaccel_rx(skb
, adapter
->vlgrp
, tag
);
443 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
444 * @adapter: address of board private structure
445 * @status_err: hardware indication of status of receive
446 * @skb: skb currently being received and modified
448 static inline void ixgbe_rx_checksum(struct ixgbe_adapter
*adapter
,
449 u32 status_err
, struct sk_buff
*skb
)
451 skb
->ip_summed
= CHECKSUM_NONE
;
453 /* Rx csum disabled */
454 if (!(adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
))
457 /* if IP and error */
458 if ((status_err
& IXGBE_RXD_STAT_IPCS
) &&
459 (status_err
& IXGBE_RXDADV_ERR_IPE
)) {
460 adapter
->hw_csum_rx_error
++;
464 if (!(status_err
& IXGBE_RXD_STAT_L4CS
))
467 if (status_err
& IXGBE_RXDADV_ERR_TCPE
) {
468 adapter
->hw_csum_rx_error
++;
472 /* It must be a TCP or UDP packet with a valid checksum */
473 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
474 adapter
->hw_csum_rx_good
++;
478 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
479 * @adapter: address of board private structure
481 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter
*adapter
,
482 struct ixgbe_ring
*rx_ring
,
485 struct pci_dev
*pdev
= adapter
->pdev
;
486 union ixgbe_adv_rx_desc
*rx_desc
;
487 struct ixgbe_rx_buffer
*bi
;
489 unsigned int bufsz
= rx_ring
->rx_buf_len
+ NET_IP_ALIGN
;
491 i
= rx_ring
->next_to_use
;
492 bi
= &rx_ring
->rx_buffer_info
[i
];
494 while (cleaned_count
--) {
495 rx_desc
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
498 (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
)) {
500 bi
->page
= alloc_page(GFP_ATOMIC
);
502 adapter
->alloc_rx_page_failed
++;
507 /* use a half page if we're re-using */
508 bi
->page_offset
^= (PAGE_SIZE
/ 2);
511 bi
->page_dma
= pci_map_page(pdev
, bi
->page
,
518 struct sk_buff
*skb
= netdev_alloc_skb(adapter
->netdev
,
522 adapter
->alloc_rx_buff_failed
++;
527 * Make buffer alignment 2 beyond a 16 byte boundary
528 * this will result in a 16 byte aligned IP header after
529 * the 14 byte MAC header is removed
531 skb_reserve(skb
, NET_IP_ALIGN
);
534 bi
->dma
= pci_map_single(pdev
, skb
->data
, bufsz
,
537 /* Refresh the desc even if buffer_addrs didn't change because
538 * each write-back erases this info. */
539 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
540 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->page_dma
);
541 rx_desc
->read
.hdr_addr
= cpu_to_le64(bi
->dma
);
543 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
);
547 if (i
== rx_ring
->count
)
549 bi
= &rx_ring
->rx_buffer_info
[i
];
553 if (rx_ring
->next_to_use
!= i
) {
554 rx_ring
->next_to_use
= i
;
556 i
= (rx_ring
->count
- 1);
559 * Force memory writes to complete before letting h/w
560 * know there are new descriptors to fetch. (Only
561 * applicable for weak-ordered memory model archs,
565 writel(i
, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
569 static inline u16
ixgbe_get_hdr_info(union ixgbe_adv_rx_desc
*rx_desc
)
571 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.hdr_info
;
574 static inline u16
ixgbe_get_pkt_info(union ixgbe_adv_rx_desc
*rx_desc
)
576 return rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
579 static bool ixgbe_clean_rx_irq(struct ixgbe_adapter
*adapter
,
580 struct ixgbe_ring
*rx_ring
,
581 int *work_done
, int work_to_do
)
583 struct pci_dev
*pdev
= adapter
->pdev
;
584 union ixgbe_adv_rx_desc
*rx_desc
, *next_rxd
;
585 struct ixgbe_rx_buffer
*rx_buffer_info
, *next_buffer
;
590 bool cleaned
= false;
591 int cleaned_count
= 0;
592 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
594 i
= rx_ring
->next_to_clean
;
595 rx_desc
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
596 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
597 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
599 while (staterr
& IXGBE_RXD_STAT_DD
) {
601 if (*work_done
>= work_to_do
)
605 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
606 hdr_info
= le16_to_cpu(ixgbe_get_hdr_info(rx_desc
));
607 len
= (hdr_info
& IXGBE_RXDADV_HDRBUFLEN_MASK
) >>
608 IXGBE_RXDADV_HDRBUFLEN_SHIFT
;
609 if (hdr_info
& IXGBE_RXDADV_SPH
)
610 adapter
->rx_hdr_split
++;
611 if (len
> IXGBE_RX_HDR_SIZE
)
612 len
= IXGBE_RX_HDR_SIZE
;
613 upper_len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
615 len
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
619 skb
= rx_buffer_info
->skb
;
620 prefetch(skb
->data
- NET_IP_ALIGN
);
621 rx_buffer_info
->skb
= NULL
;
623 if (len
&& !skb_shinfo(skb
)->nr_frags
) {
624 pci_unmap_single(pdev
, rx_buffer_info
->dma
,
625 rx_ring
->rx_buf_len
+ NET_IP_ALIGN
,
631 pci_unmap_page(pdev
, rx_buffer_info
->page_dma
,
632 PAGE_SIZE
/ 2, PCI_DMA_FROMDEVICE
);
633 rx_buffer_info
->page_dma
= 0;
634 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
,
635 rx_buffer_info
->page
,
636 rx_buffer_info
->page_offset
,
639 if ((rx_ring
->rx_buf_len
> (PAGE_SIZE
/ 2)) ||
640 (page_count(rx_buffer_info
->page
) != 1))
641 rx_buffer_info
->page
= NULL
;
643 get_page(rx_buffer_info
->page
);
645 skb
->len
+= upper_len
;
646 skb
->data_len
+= upper_len
;
647 skb
->truesize
+= upper_len
;
651 if (i
== rx_ring
->count
)
653 next_buffer
= &rx_ring
->rx_buffer_info
[i
];
655 next_rxd
= IXGBE_RX_DESC_ADV(*rx_ring
, i
);
659 if (staterr
& IXGBE_RXD_STAT_EOP
) {
660 rx_ring
->stats
.packets
++;
661 rx_ring
->stats
.bytes
+= skb
->len
;
663 rx_buffer_info
->skb
= next_buffer
->skb
;
664 rx_buffer_info
->dma
= next_buffer
->dma
;
665 next_buffer
->skb
= skb
;
666 next_buffer
->dma
= 0;
667 adapter
->non_eop_descs
++;
671 if (staterr
& IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) {
672 dev_kfree_skb_irq(skb
);
676 ixgbe_rx_checksum(adapter
, staterr
, skb
);
678 /* probably a little skewed due to removing CRC */
679 total_rx_bytes
+= skb
->len
;
682 skb
->protocol
= eth_type_trans(skb
, adapter
->netdev
);
683 ixgbe_receive_skb(adapter
, skb
, staterr
, rx_ring
, rx_desc
);
684 adapter
->netdev
->last_rx
= jiffies
;
687 rx_desc
->wb
.upper
.status_error
= 0;
689 /* return some buffers to hardware, one at a time is too slow */
690 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
691 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
695 /* use prefetched values */
697 rx_buffer_info
= next_buffer
;
699 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
702 if (rx_ring
->lro_used
) {
703 lro_flush_all(&rx_ring
->lro_mgr
);
704 rx_ring
->lro_used
= false;
707 rx_ring
->next_to_clean
= i
;
708 cleaned_count
= IXGBE_DESC_UNUSED(rx_ring
);
711 ixgbe_alloc_rx_buffers(adapter
, rx_ring
, cleaned_count
);
713 rx_ring
->total_packets
+= total_rx_packets
;
714 rx_ring
->total_bytes
+= total_rx_bytes
;
715 adapter
->net_stats
.rx_bytes
+= total_rx_bytes
;
716 adapter
->net_stats
.rx_packets
+= total_rx_packets
;
721 static int ixgbe_clean_rxonly(struct napi_struct
*, int);
723 * ixgbe_configure_msix - Configure MSI-X hardware
724 * @adapter: board private structure
726 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
729 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
731 struct ixgbe_q_vector
*q_vector
;
732 int i
, j
, q_vectors
, v_idx
, r_idx
;
735 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
737 /* Populate the IVAR table and set the ITR values to the
738 * corresponding register.
740 for (v_idx
= 0; v_idx
< q_vectors
; v_idx
++) {
741 q_vector
= &adapter
->q_vector
[v_idx
];
742 /* XXX for_each_bit(...) */
743 r_idx
= find_first_bit(q_vector
->rxr_idx
,
744 adapter
->num_rx_queues
);
746 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
747 j
= adapter
->rx_ring
[r_idx
].reg_idx
;
748 ixgbe_set_ivar(adapter
, IXGBE_IVAR_RX_QUEUE(j
), v_idx
);
749 r_idx
= find_next_bit(q_vector
->rxr_idx
,
750 adapter
->num_rx_queues
,
753 r_idx
= find_first_bit(q_vector
->txr_idx
,
754 adapter
->num_tx_queues
);
756 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
757 j
= adapter
->tx_ring
[r_idx
].reg_idx
;
758 ixgbe_set_ivar(adapter
, IXGBE_IVAR_TX_QUEUE(j
), v_idx
);
759 r_idx
= find_next_bit(q_vector
->txr_idx
,
760 adapter
->num_tx_queues
,
764 /* if this is a tx only vector halve the interrupt rate */
765 if (q_vector
->txr_count
&& !q_vector
->rxr_count
)
766 q_vector
->eitr
= (adapter
->eitr_param
>> 1);
769 q_vector
->eitr
= adapter
->eitr_param
;
771 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
),
772 EITR_INTS_PER_SEC_TO_REG(q_vector
->eitr
));
775 ixgbe_set_ivar(adapter
, IXGBE_IVAR_OTHER_CAUSES_INDEX
, v_idx
);
776 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
778 /* set up to autoclear timer, and the vectors */
779 mask
= IXGBE_EIMS_ENABLE_MASK
;
780 mask
&= ~(IXGBE_EIMS_OTHER
| IXGBE_EIMS_LSC
);
781 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
788 latency_invalid
= 255
792 * ixgbe_update_itr - update the dynamic ITR value based on statistics
793 * @adapter: pointer to adapter
794 * @eitr: eitr setting (ints per sec) to give last timeslice
795 * @itr_setting: current throttle rate in ints/second
796 * @packets: the number of packets during this measurement interval
797 * @bytes: the number of bytes during this measurement interval
799 * Stores a new ITR value based on packets and byte
800 * counts during the last interrupt. The advantage of per interrupt
801 * computation is faster updates and more accurate ITR for the current
802 * traffic pattern. Constants in this function were computed
803 * based on theoretical maximum wire speed and thresholds were set based
804 * on testing data as well as attempting to minimize response time
805 * while increasing bulk throughput.
806 * this functionality is controlled by the InterruptThrottleRate module
807 * parameter (see ixgbe_param.c)
809 static u8
ixgbe_update_itr(struct ixgbe_adapter
*adapter
,
810 u32 eitr
, u8 itr_setting
,
811 int packets
, int bytes
)
813 unsigned int retval
= itr_setting
;
818 goto update_itr_done
;
821 /* simple throttlerate management
822 * 0-20MB/s lowest (100000 ints/s)
823 * 20-100MB/s low (20000 ints/s)
824 * 100-1249MB/s bulk (8000 ints/s)
826 /* what was last interrupt timeslice? */
827 timepassed_us
= 1000000/eitr
;
828 bytes_perint
= bytes
/ timepassed_us
; /* bytes/usec */
830 switch (itr_setting
) {
832 if (bytes_perint
> adapter
->eitr_low
)
833 retval
= low_latency
;
836 if (bytes_perint
> adapter
->eitr_high
)
837 retval
= bulk_latency
;
838 else if (bytes_perint
<= adapter
->eitr_low
)
839 retval
= lowest_latency
;
842 if (bytes_perint
<= adapter
->eitr_high
)
843 retval
= low_latency
;
851 static void ixgbe_set_itr_msix(struct ixgbe_q_vector
*q_vector
)
853 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
854 struct ixgbe_hw
*hw
= &adapter
->hw
;
856 u8 current_itr
, ret_itr
;
857 int i
, r_idx
, v_idx
= ((void *)q_vector
- (void *)(adapter
->q_vector
)) /
858 sizeof(struct ixgbe_q_vector
);
859 struct ixgbe_ring
*rx_ring
, *tx_ring
;
861 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
862 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
863 tx_ring
= &(adapter
->tx_ring
[r_idx
]);
864 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
866 tx_ring
->total_packets
,
867 tx_ring
->total_bytes
);
868 /* if the result for this queue would decrease interrupt
869 * rate for this vector then use that result */
870 q_vector
->tx_itr
= ((q_vector
->tx_itr
> ret_itr
) ?
871 q_vector
->tx_itr
- 1 : ret_itr
);
872 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
876 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
877 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
878 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
879 ret_itr
= ixgbe_update_itr(adapter
, q_vector
->eitr
,
881 rx_ring
->total_packets
,
882 rx_ring
->total_bytes
);
883 /* if the result for this queue would decrease interrupt
884 * rate for this vector then use that result */
885 q_vector
->rx_itr
= ((q_vector
->rx_itr
> ret_itr
) ?
886 q_vector
->rx_itr
- 1 : ret_itr
);
887 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
891 current_itr
= max(q_vector
->rx_itr
, q_vector
->tx_itr
);
893 switch (current_itr
) {
894 /* counts and packets in update_itr are dependent on these numbers */
899 new_itr
= 20000; /* aka hwitr = ~200 */
907 if (new_itr
!= q_vector
->eitr
) {
909 /* do an exponential smoothing */
910 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
911 q_vector
->eitr
= new_itr
;
912 itr_reg
= EITR_INTS_PER_SEC_TO_REG(new_itr
);
913 /* must write high and low 16 bits to reset counter */
914 DPRINTK(TX_ERR
, DEBUG
, "writing eitr(%d): %08X\n", v_idx
,
916 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
| (itr_reg
)<<16);
923 static void ixgbe_check_lsc(struct ixgbe_adapter
*adapter
)
925 struct ixgbe_hw
*hw
= &adapter
->hw
;
928 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
929 adapter
->link_check_timeout
= jiffies
;
930 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
931 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_LSC
);
932 schedule_work(&adapter
->watchdog_task
);
936 static irqreturn_t
ixgbe_msix_lsc(int irq
, void *data
)
938 struct net_device
*netdev
= data
;
939 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
940 struct ixgbe_hw
*hw
= &adapter
->hw
;
941 u32 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
943 if (eicr
& IXGBE_EICR_LSC
)
944 ixgbe_check_lsc(adapter
);
946 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
947 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_OTHER
);
952 static irqreturn_t
ixgbe_msix_clean_tx(int irq
, void *data
)
954 struct ixgbe_q_vector
*q_vector
= data
;
955 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
956 struct ixgbe_ring
*tx_ring
;
959 if (!q_vector
->txr_count
)
962 r_idx
= find_first_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
);
963 for (i
= 0; i
< q_vector
->txr_count
; i
++) {
964 tx_ring
= &(adapter
->tx_ring
[r_idx
]);
965 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
966 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
967 ixgbe_update_tx_dca(adapter
, tx_ring
);
969 tx_ring
->total_bytes
= 0;
970 tx_ring
->total_packets
= 0;
971 ixgbe_clean_tx_irq(adapter
, tx_ring
);
972 r_idx
= find_next_bit(q_vector
->txr_idx
, adapter
->num_tx_queues
,
980 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
982 * @data: pointer to our q_vector struct for this interrupt vector
984 static irqreturn_t
ixgbe_msix_clean_rx(int irq
, void *data
)
986 struct ixgbe_q_vector
*q_vector
= data
;
987 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
988 struct ixgbe_ring
*rx_ring
;
992 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
993 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
994 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
995 rx_ring
->total_bytes
= 0;
996 rx_ring
->total_packets
= 0;
997 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1001 if (!q_vector
->rxr_count
)
1004 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1005 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1006 /* disable interrupts on this vector only */
1007 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, rx_ring
->v_idx
);
1008 netif_rx_schedule(adapter
->netdev
, &q_vector
->napi
);
1013 static irqreturn_t
ixgbe_msix_clean_many(int irq
, void *data
)
1015 ixgbe_msix_clean_rx(irq
, data
);
1016 ixgbe_msix_clean_tx(irq
, data
);
1022 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1023 * @napi: napi struct with our devices info in it
1024 * @budget: amount of work driver is allowed to do this pass, in packets
1026 * This function is optimized for cleaning one queue only on a single
1029 static int ixgbe_clean_rxonly(struct napi_struct
*napi
, int budget
)
1031 struct ixgbe_q_vector
*q_vector
=
1032 container_of(napi
, struct ixgbe_q_vector
, napi
);
1033 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1034 struct ixgbe_ring
*rx_ring
= NULL
;
1038 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1039 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1040 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
1041 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1042 ixgbe_update_rx_dca(adapter
, rx_ring
);
1045 ixgbe_clean_rx_irq(adapter
, rx_ring
, &work_done
, budget
);
1047 /* If all Rx work done, exit the polling mode */
1048 if (work_done
< budget
) {
1049 netif_rx_complete(adapter
->netdev
, napi
);
1050 if (adapter
->itr_setting
& 3)
1051 ixgbe_set_itr_msix(q_vector
);
1052 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1053 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, rx_ring
->v_idx
);
1060 * ixgbe_clean_rxonly_many - msix (aka one shot) rx clean routine
1061 * @napi: napi struct with our devices info in it
1062 * @budget: amount of work driver is allowed to do this pass, in packets
1064 * This function will clean more than one rx queue associated with a
1067 static int ixgbe_clean_rxonly_many(struct napi_struct
*napi
, int budget
)
1069 struct ixgbe_q_vector
*q_vector
=
1070 container_of(napi
, struct ixgbe_q_vector
, napi
);
1071 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1072 struct ixgbe_ring
*rx_ring
= NULL
;
1073 int work_done
= 0, i
;
1075 u16 enable_mask
= 0;
1077 /* attempt to distribute budget to each queue fairly, but don't allow
1078 * the budget to go below 1 because we'll exit polling */
1079 budget
/= (q_vector
->rxr_count
?: 1);
1080 budget
= max(budget
, 1);
1081 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1082 for (i
= 0; i
< q_vector
->rxr_count
; i
++) {
1083 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1084 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
1085 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1086 ixgbe_update_rx_dca(adapter
, rx_ring
);
1088 ixgbe_clean_rx_irq(adapter
, rx_ring
, &work_done
, budget
);
1089 enable_mask
|= rx_ring
->v_idx
;
1090 r_idx
= find_next_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
,
1094 r_idx
= find_first_bit(q_vector
->rxr_idx
, adapter
->num_rx_queues
);
1095 rx_ring
= &(adapter
->rx_ring
[r_idx
]);
1096 /* If all Rx work done, exit the polling mode */
1097 if (work_done
< budget
) {
1098 netif_rx_complete(adapter
->netdev
, napi
);
1099 if (adapter
->itr_setting
& 3)
1100 ixgbe_set_itr_msix(q_vector
);
1101 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1102 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, enable_mask
);
1108 static inline void map_vector_to_rxq(struct ixgbe_adapter
*a
, int v_idx
,
1111 a
->q_vector
[v_idx
].adapter
= a
;
1112 set_bit(r_idx
, a
->q_vector
[v_idx
].rxr_idx
);
1113 a
->q_vector
[v_idx
].rxr_count
++;
1114 a
->rx_ring
[r_idx
].v_idx
= 1 << v_idx
;
1117 static inline void map_vector_to_txq(struct ixgbe_adapter
*a
, int v_idx
,
1120 a
->q_vector
[v_idx
].adapter
= a
;
1121 set_bit(r_idx
, a
->q_vector
[v_idx
].txr_idx
);
1122 a
->q_vector
[v_idx
].txr_count
++;
1123 a
->tx_ring
[r_idx
].v_idx
= 1 << v_idx
;
1127 * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1128 * @adapter: board private structure to initialize
1129 * @vectors: allotted vector count for descriptor rings
1131 * This function maps descriptor rings to the queue-specific vectors
1132 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1133 * one vector per ring/queue, but on a constrained vector budget, we
1134 * group the rings as "efficiently" as possible. You would add new
1135 * mapping configurations in here.
1137 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter
*adapter
,
1141 int rxr_idx
= 0, txr_idx
= 0;
1142 int rxr_remaining
= adapter
->num_rx_queues
;
1143 int txr_remaining
= adapter
->num_tx_queues
;
1148 /* No mapping required if MSI-X is disabled. */
1149 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
1153 * The ideal configuration...
1154 * We have enough vectors to map one per queue.
1156 if (vectors
== adapter
->num_rx_queues
+ adapter
->num_tx_queues
) {
1157 for (; rxr_idx
< rxr_remaining
; v_start
++, rxr_idx
++)
1158 map_vector_to_rxq(adapter
, v_start
, rxr_idx
);
1160 for (; txr_idx
< txr_remaining
; v_start
++, txr_idx
++)
1161 map_vector_to_txq(adapter
, v_start
, txr_idx
);
1167 * If we don't have enough vectors for a 1-to-1
1168 * mapping, we'll have to group them so there are
1169 * multiple queues per vector.
1171 /* Re-adjusting *qpv takes care of the remainder. */
1172 for (i
= v_start
; i
< vectors
; i
++) {
1173 rqpv
= DIV_ROUND_UP(rxr_remaining
, vectors
- i
);
1174 for (j
= 0; j
< rqpv
; j
++) {
1175 map_vector_to_rxq(adapter
, i
, rxr_idx
);
1180 for (i
= v_start
; i
< vectors
; i
++) {
1181 tqpv
= DIV_ROUND_UP(txr_remaining
, vectors
- i
);
1182 for (j
= 0; j
< tqpv
; j
++) {
1183 map_vector_to_txq(adapter
, i
, txr_idx
);
1194 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1195 * @adapter: board private structure
1197 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1198 * interrupts from the kernel.
1200 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
1202 struct net_device
*netdev
= adapter
->netdev
;
1203 irqreturn_t (*handler
)(int, void *);
1204 int i
, vector
, q_vectors
, err
;
1206 /* Decrement for Other and TCP Timer vectors */
1207 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1209 /* Map the Tx/Rx rings to the vectors we were allotted. */
1210 err
= ixgbe_map_rings_to_vectors(adapter
, q_vectors
);
1214 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1215 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1216 &ixgbe_msix_clean_many)
1217 for (vector
= 0; vector
< q_vectors
; vector
++) {
1218 handler
= SET_HANDLER(&adapter
->q_vector
[vector
]);
1219 sprintf(adapter
->name
[vector
], "%s:v%d-%s",
1220 netdev
->name
, vector
,
1221 (handler
== &ixgbe_msix_clean_rx
) ? "Rx" :
1222 ((handler
== &ixgbe_msix_clean_tx
) ? "Tx" : "TxRx"));
1223 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
1224 handler
, 0, adapter
->name
[vector
],
1225 &(adapter
->q_vector
[vector
]));
1228 "request_irq failed for MSIX interrupt "
1229 "Error: %d\n", err
);
1230 goto free_queue_irqs
;
1234 sprintf(adapter
->name
[vector
], "%s:lsc", netdev
->name
);
1235 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
1236 &ixgbe_msix_lsc
, 0, adapter
->name
[vector
], netdev
);
1239 "request_irq for msix_lsc failed: %d\n", err
);
1240 goto free_queue_irqs
;
1246 for (i
= vector
- 1; i
>= 0; i
--)
1247 free_irq(adapter
->msix_entries
[--vector
].vector
,
1248 &(adapter
->q_vector
[i
]));
1249 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
1250 pci_disable_msix(adapter
->pdev
);
1251 kfree(adapter
->msix_entries
);
1252 adapter
->msix_entries
= NULL
;
1257 static void ixgbe_set_itr(struct ixgbe_adapter
*adapter
)
1259 struct ixgbe_hw
*hw
= &adapter
->hw
;
1260 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
;
1262 u32 new_itr
= q_vector
->eitr
;
1263 struct ixgbe_ring
*rx_ring
= &adapter
->rx_ring
[0];
1264 struct ixgbe_ring
*tx_ring
= &adapter
->tx_ring
[0];
1266 q_vector
->tx_itr
= ixgbe_update_itr(adapter
, new_itr
,
1268 tx_ring
->total_packets
,
1269 tx_ring
->total_bytes
);
1270 q_vector
->rx_itr
= ixgbe_update_itr(adapter
, new_itr
,
1272 rx_ring
->total_packets
,
1273 rx_ring
->total_bytes
);
1275 current_itr
= max(q_vector
->rx_itr
, q_vector
->tx_itr
);
1277 switch (current_itr
) {
1278 /* counts and packets in update_itr are dependent on these numbers */
1279 case lowest_latency
:
1283 new_itr
= 20000; /* aka hwitr = ~200 */
1292 if (new_itr
!= q_vector
->eitr
) {
1294 /* do an exponential smoothing */
1295 new_itr
= ((q_vector
->eitr
* 90)/100) + ((new_itr
* 10)/100);
1296 q_vector
->eitr
= new_itr
;
1297 itr_reg
= EITR_INTS_PER_SEC_TO_REG(new_itr
);
1298 /* must write high and low 16 bits to reset counter */
1299 IXGBE_WRITE_REG(hw
, IXGBE_EITR(0), itr_reg
| (itr_reg
)<<16);
1305 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
);
1308 * ixgbe_intr - legacy mode Interrupt Handler
1309 * @irq: interrupt number
1310 * @data: pointer to a network interface device structure
1311 * @pt_regs: CPU registers structure
1313 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
1315 struct net_device
*netdev
= data
;
1316 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1317 struct ixgbe_hw
*hw
= &adapter
->hw
;
1321 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1322 * therefore no explict interrupt disable is necessary */
1323 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
1325 /* shared interrupt alert!
1326 * make sure interrupts are enabled because the read will
1327 * have disabled interrupts due to EIAM */
1328 ixgbe_irq_enable(adapter
);
1329 return IRQ_NONE
; /* Not our interrupt */
1332 if (eicr
& IXGBE_EICR_LSC
)
1333 ixgbe_check_lsc(adapter
);
1335 if (netif_rx_schedule_prep(netdev
, &adapter
->q_vector
[0].napi
)) {
1336 adapter
->tx_ring
[0].total_packets
= 0;
1337 adapter
->tx_ring
[0].total_bytes
= 0;
1338 adapter
->rx_ring
[0].total_packets
= 0;
1339 adapter
->rx_ring
[0].total_bytes
= 0;
1340 /* would disable interrupts here but EIAM disabled it */
1341 __netif_rx_schedule(netdev
, &adapter
->q_vector
[0].napi
);
1347 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter
*adapter
)
1349 int i
, q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1351 for (i
= 0; i
< q_vectors
; i
++) {
1352 struct ixgbe_q_vector
*q_vector
= &adapter
->q_vector
[i
];
1353 bitmap_zero(q_vector
->rxr_idx
, MAX_RX_QUEUES
);
1354 bitmap_zero(q_vector
->txr_idx
, MAX_TX_QUEUES
);
1355 q_vector
->rxr_count
= 0;
1356 q_vector
->txr_count
= 0;
1361 * ixgbe_request_irq - initialize interrupts
1362 * @adapter: board private structure
1364 * Attempts to configure interrupts using the best available
1365 * capabilities of the hardware and kernel.
1367 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
1369 struct net_device
*netdev
= adapter
->netdev
;
1372 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1373 err
= ixgbe_request_msix_irqs(adapter
);
1374 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
1375 err
= request_irq(adapter
->pdev
->irq
, &ixgbe_intr
, 0,
1376 netdev
->name
, netdev
);
1378 err
= request_irq(adapter
->pdev
->irq
, &ixgbe_intr
, IRQF_SHARED
,
1379 netdev
->name
, netdev
);
1383 DPRINTK(PROBE
, ERR
, "request_irq failed, Error %d\n", err
);
1388 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
1390 struct net_device
*netdev
= adapter
->netdev
;
1392 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1395 q_vectors
= adapter
->num_msix_vectors
;
1398 free_irq(adapter
->msix_entries
[i
].vector
, netdev
);
1401 for (; i
>= 0; i
--) {
1402 free_irq(adapter
->msix_entries
[i
].vector
,
1403 &(adapter
->q_vector
[i
]));
1406 ixgbe_reset_q_vectors(adapter
);
1408 free_irq(adapter
->pdev
->irq
, netdev
);
1413 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1414 * @adapter: board private structure
1416 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
1418 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
1419 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1420 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1422 for (i
= 0; i
< adapter
->num_msix_vectors
; i
++)
1423 synchronize_irq(adapter
->msix_entries
[i
].vector
);
1425 synchronize_irq(adapter
->pdev
->irq
);
1430 * ixgbe_irq_enable - Enable default interrupt generation settings
1431 * @adapter: board private structure
1433 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
)
1436 mask
= IXGBE_EIMS_ENABLE_MASK
;
1437 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
1438 IXGBE_WRITE_FLUSH(&adapter
->hw
);
1442 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1445 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
1447 struct ixgbe_hw
*hw
= &adapter
->hw
;
1449 IXGBE_WRITE_REG(hw
, IXGBE_EITR(0),
1450 EITR_INTS_PER_SEC_TO_REG(adapter
->eitr_param
));
1452 ixgbe_set_ivar(adapter
, IXGBE_IVAR_RX_QUEUE(0), 0);
1453 ixgbe_set_ivar(adapter
, IXGBE_IVAR_TX_QUEUE(0), 0);
1455 map_vector_to_rxq(adapter
, 0, 0);
1456 map_vector_to_txq(adapter
, 0, 0);
1458 DPRINTK(HW
, INFO
, "Legacy interrupt IVAR setup done\n");
1462 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1463 * @adapter: board private structure
1465 * Configure the Tx unit of the MAC after a reset.
1467 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
1470 struct ixgbe_hw
*hw
= &adapter
->hw
;
1471 u32 i
, j
, tdlen
, txctrl
;
1473 /* Setup the HW Tx Head and Tail descriptor pointers */
1474 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1475 struct ixgbe_ring
*ring
= &adapter
->tx_ring
[i
];
1478 tdlen
= ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
1479 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(j
),
1480 (tdba
& DMA_32BIT_MASK
));
1481 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(j
), (tdba
>> 32));
1483 (ring
->count
* sizeof(union ixgbe_adv_tx_desc
));
1484 tdwba
|= IXGBE_TDWBAL_HEAD_WB_ENABLE
;
1485 IXGBE_WRITE_REG(hw
, IXGBE_TDWBAL(j
), tdwba
& DMA_32BIT_MASK
);
1486 IXGBE_WRITE_REG(hw
, IXGBE_TDWBAH(j
), (tdwba
>> 32));
1487 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(j
), tdlen
);
1488 IXGBE_WRITE_REG(hw
, IXGBE_TDH(j
), 0);
1489 IXGBE_WRITE_REG(hw
, IXGBE_TDT(j
), 0);
1490 adapter
->tx_ring
[i
].head
= IXGBE_TDH(j
);
1491 adapter
->tx_ring
[i
].tail
= IXGBE_TDT(j
);
1492 /* Disable Tx Head Writeback RO bit, since this hoses
1493 * bookkeeping if things aren't delivered in order.
1495 txctrl
= IXGBE_READ_REG(hw
, IXGBE_DCA_TXCTRL(j
));
1496 txctrl
&= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN
;
1497 IXGBE_WRITE_REG(hw
, IXGBE_DCA_TXCTRL(j
), txctrl
);
1501 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1503 static void ixgbe_configure_srrctl(struct ixgbe_adapter
*adapter
, int index
)
1505 struct ixgbe_ring
*rx_ring
;
1510 /* program one srrctl register per VMDq index */
1511 if (adapter
->flags
& IXGBE_FLAG_VMDQ_ENABLED
) {
1513 mask
= (unsigned long) adapter
->ring_feature
[RING_F_RSS
].mask
;
1514 len
= sizeof(adapter
->ring_feature
[RING_F_VMDQ
].mask
) * 8;
1515 shift
= find_first_bit(&mask
, len
);
1516 queue0
= index
& mask
;
1517 index
= (index
& mask
) >> shift
;
1518 /* program one srrctl per RSS queue since RDRXCTL.MVMEN is enabled */
1520 mask
= (unsigned long) adapter
->ring_feature
[RING_F_RSS
].mask
;
1521 queue0
= index
& mask
;
1522 index
= index
& mask
;
1525 rx_ring
= &adapter
->rx_ring
[queue0
];
1527 srrctl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SRRCTL(index
));
1529 srrctl
&= ~IXGBE_SRRCTL_BSIZEHDR_MASK
;
1530 srrctl
&= ~IXGBE_SRRCTL_BSIZEPKT_MASK
;
1532 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
1533 srrctl
|= IXGBE_RXBUFFER_2048
>> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1534 srrctl
|= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS
;
1535 srrctl
|= ((IXGBE_RX_HDR_SIZE
<<
1536 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
) &
1537 IXGBE_SRRCTL_BSIZEHDR_MASK
);
1539 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
1541 if (rx_ring
->rx_buf_len
== MAXIMUM_ETHERNET_VLAN_SIZE
)
1542 srrctl
|= IXGBE_RXBUFFER_2048
>>
1543 IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1545 srrctl
|= rx_ring
->rx_buf_len
>>
1546 IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
1548 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_SRRCTL(index
), srrctl
);
1552 * ixgbe_get_skb_hdr - helper function for LRO header processing
1553 * @skb: pointer to sk_buff to be added to LRO packet
1554 * @iphdr: pointer to tcp header structure
1555 * @tcph: pointer to tcp header structure
1556 * @hdr_flags: pointer to header flags
1557 * @priv: private data
1559 static int ixgbe_get_skb_hdr(struct sk_buff
*skb
, void **iphdr
, void **tcph
,
1560 u64
*hdr_flags
, void *priv
)
1562 union ixgbe_adv_rx_desc
*rx_desc
= priv
;
1564 /* Verify that this is a valid IPv4 TCP packet */
1565 if (!((ixgbe_get_pkt_info(rx_desc
) & IXGBE_RXDADV_PKTTYPE_IPV4
) &&
1566 (ixgbe_get_pkt_info(rx_desc
) & IXGBE_RXDADV_PKTTYPE_TCP
)))
1569 /* Set network headers */
1570 skb_reset_network_header(skb
);
1571 skb_set_transport_header(skb
, ip_hdrlen(skb
));
1572 *iphdr
= ip_hdr(skb
);
1573 *tcph
= tcp_hdr(skb
);
1574 *hdr_flags
= LRO_IPV4
| LRO_TCP
;
1578 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1579 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1582 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1583 * @adapter: board private structure
1585 * Configure the Rx unit of the MAC after a reset.
1587 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
1590 struct ixgbe_hw
*hw
= &adapter
->hw
;
1591 struct net_device
*netdev
= adapter
->netdev
;
1592 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1594 u32 rdlen
, rxctrl
, rxcsum
;
1595 static const u32 seed
[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1596 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1597 0x6A3E67EA, 0x14364D17, 0x3BED200D};
1604 /* Decide whether to use packet split mode or not */
1605 adapter
->flags
|= IXGBE_FLAG_RX_PS_ENABLED
;
1607 /* Set the RX buffer length according to the mode */
1608 if (adapter
->flags
& IXGBE_FLAG_RX_PS_ENABLED
) {
1609 rx_buf_len
= IXGBE_RX_HDR_SIZE
;
1611 if (netdev
->mtu
<= ETH_DATA_LEN
)
1612 rx_buf_len
= MAXIMUM_ETHERNET_VLAN_SIZE
;
1614 rx_buf_len
= ALIGN(max_frame
, 1024);
1617 fctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_FCTRL
);
1618 fctrl
|= IXGBE_FCTRL_BAM
;
1619 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
1620 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_FCTRL
, fctrl
);
1622 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
1623 if (adapter
->netdev
->mtu
<= ETH_DATA_LEN
)
1624 hlreg0
&= ~IXGBE_HLREG0_JUMBOEN
;
1626 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
1627 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
1629 pages
= PAGE_USE_COUNT(adapter
->netdev
->mtu
);
1631 rdlen
= adapter
->rx_ring
[0].count
* sizeof(union ixgbe_adv_rx_desc
);
1632 /* disable receives while setting up the descriptors */
1633 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
1634 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
1636 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1637 * the Base and Length of the Rx Descriptor Ring */
1638 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1639 rdba
= adapter
->rx_ring
[i
].dma
;
1640 j
= adapter
->rx_ring
[i
].reg_idx
;
1641 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(j
), (rdba
& DMA_32BIT_MASK
));
1642 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(j
), (rdba
>> 32));
1643 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(j
), rdlen
);
1644 IXGBE_WRITE_REG(hw
, IXGBE_RDH(j
), 0);
1645 IXGBE_WRITE_REG(hw
, IXGBE_RDT(j
), 0);
1646 adapter
->rx_ring
[i
].head
= IXGBE_RDH(j
);
1647 adapter
->rx_ring
[i
].tail
= IXGBE_RDT(j
);
1648 adapter
->rx_ring
[i
].rx_buf_len
= rx_buf_len
;
1649 /* Intitial LRO Settings */
1650 adapter
->rx_ring
[i
].lro_mgr
.max_aggr
= IXGBE_MAX_LRO_AGGREGATE
;
1651 adapter
->rx_ring
[i
].lro_mgr
.max_desc
= IXGBE_MAX_LRO_DESCRIPTORS
;
1652 adapter
->rx_ring
[i
].lro_mgr
.get_skb_header
= ixgbe_get_skb_hdr
;
1653 adapter
->rx_ring
[i
].lro_mgr
.features
= LRO_F_EXTRACT_VLAN_ID
;
1654 if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
))
1655 adapter
->rx_ring
[i
].lro_mgr
.features
|= LRO_F_NAPI
;
1656 adapter
->rx_ring
[i
].lro_mgr
.dev
= adapter
->netdev
;
1657 adapter
->rx_ring
[i
].lro_mgr
.ip_summed
= CHECKSUM_UNNECESSARY
;
1658 adapter
->rx_ring
[i
].lro_mgr
.ip_summed_aggr
= CHECKSUM_UNNECESSARY
;
1660 ixgbe_configure_srrctl(adapter
, j
);
1664 * For VMDq support of different descriptor types or
1665 * buffer sizes through the use of multiple SRRCTL
1666 * registers, RDRXCTL.MVMEN must be set to 1
1668 * also, the manual doesn't mention it clearly but DCA hints
1669 * will only use queue 0's tags unless this bit is set. Side
1670 * effects of setting this bit are only that SRRCTL must be
1671 * fully programmed [0..15]
1673 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
1674 rdrxctl
|= IXGBE_RDRXCTL_MVMEN
;
1675 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
1678 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) {
1679 /* Fill out redirection table */
1680 for (i
= 0, j
= 0; i
< 128; i
++, j
++) {
1681 if (j
== adapter
->ring_feature
[RING_F_RSS
].indices
)
1683 /* reta = 4-byte sliding window of
1684 * 0x00..(indices-1)(indices-1)00..etc. */
1685 reta
= (reta
<< 8) | (j
* 0x11);
1687 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
1690 /* Fill out hash function seeds */
1691 for (i
= 0; i
< 10; i
++)
1692 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), seed
[i
]);
1694 mrqc
= IXGBE_MRQC_RSSEN
1695 /* Perform hash on these packet types */
1696 | IXGBE_MRQC_RSS_FIELD_IPV4
1697 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1698 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1699 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1700 | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1701 | IXGBE_MRQC_RSS_FIELD_IPV6
1702 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1703 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1704 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP
;
1705 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
1708 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
1710 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
||
1711 adapter
->flags
& IXGBE_FLAG_RX_CSUM_ENABLED
) {
1712 /* Disable indicating checksum in descriptor, enables
1714 rxcsum
|= IXGBE_RXCSUM_PCSD
;
1716 if (!(rxcsum
& IXGBE_RXCSUM_PCSD
)) {
1717 /* Enable IPv4 payload checksum for UDP fragments
1718 * if PCSD is not set */
1719 rxcsum
|= IXGBE_RXCSUM_IPPCSE
;
1722 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
1725 static void ixgbe_vlan_rx_register(struct net_device
*netdev
,
1726 struct vlan_group
*grp
)
1728 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1731 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1732 ixgbe_irq_disable(adapter
);
1733 adapter
->vlgrp
= grp
;
1736 /* enable VLAN tag insert/strip */
1737 ctrl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_VLNCTRL
);
1738 ctrl
|= IXGBE_VLNCTRL_VME
;
1739 ctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
1740 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_VLNCTRL
, ctrl
);
1743 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1744 ixgbe_irq_enable(adapter
);
1747 static void ixgbe_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
1749 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1750 struct ixgbe_hw
*hw
= &adapter
->hw
;
1752 /* add VID to filter table */
1753 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, 0, true);
1756 static void ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
1758 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1759 struct ixgbe_hw
*hw
= &adapter
->hw
;
1761 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1762 ixgbe_irq_disable(adapter
);
1764 vlan_group_set_device(adapter
->vlgrp
, vid
, NULL
);
1766 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
1767 ixgbe_irq_enable(adapter
);
1769 /* remove VID from filter table */
1770 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, 0, false);
1773 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
1775 ixgbe_vlan_rx_register(adapter
->netdev
, adapter
->vlgrp
);
1777 if (adapter
->vlgrp
) {
1779 for (vid
= 0; vid
< VLAN_GROUP_ARRAY_LEN
; vid
++) {
1780 if (!vlan_group_get_device(adapter
->vlgrp
, vid
))
1782 ixgbe_vlan_rx_add_vid(adapter
->netdev
, vid
);
1787 static u8
*ixgbe_addr_list_itr(struct ixgbe_hw
*hw
, u8
**mc_addr_ptr
, u32
*vmdq
)
1789 struct dev_mc_list
*mc_ptr
;
1790 u8
*addr
= *mc_addr_ptr
;
1793 mc_ptr
= container_of(addr
, struct dev_mc_list
, dmi_addr
[0]);
1795 *mc_addr_ptr
= mc_ptr
->next
->dmi_addr
;
1797 *mc_addr_ptr
= NULL
;
1803 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1804 * @netdev: network interface device structure
1806 * The set_rx_method entry point is called whenever the unicast/multicast
1807 * address list or the network interface flags are updated. This routine is
1808 * responsible for configuring the hardware for proper unicast, multicast and
1811 static void ixgbe_set_rx_mode(struct net_device
*netdev
)
1813 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1814 struct ixgbe_hw
*hw
= &adapter
->hw
;
1816 u8
*addr_list
= NULL
;
1819 /* Check for Promiscuous and All Multicast modes */
1821 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
1822 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
1824 if (netdev
->flags
& IFF_PROMISC
) {
1825 hw
->addr_ctrl
.user_set_promisc
= 1;
1826 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
1827 vlnctrl
&= ~IXGBE_VLNCTRL_VFE
;
1829 if (netdev
->flags
& IFF_ALLMULTI
) {
1830 fctrl
|= IXGBE_FCTRL_MPE
;
1831 fctrl
&= ~IXGBE_FCTRL_UPE
;
1833 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
1835 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
1836 hw
->addr_ctrl
.user_set_promisc
= 0;
1839 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
1840 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
1842 /* reprogram secondary unicast list */
1843 addr_count
= netdev
->uc_count
;
1845 addr_list
= netdev
->uc_list
->dmi_addr
;
1846 hw
->mac
.ops
.update_uc_addr_list(hw
, addr_list
, addr_count
,
1847 ixgbe_addr_list_itr
);
1849 /* reprogram multicast list */
1850 addr_count
= netdev
->mc_count
;
1852 addr_list
= netdev
->mc_list
->dmi_addr
;
1853 hw
->mac
.ops
.update_mc_addr_list(hw
, addr_list
, addr_count
,
1854 ixgbe_addr_list_itr
);
1857 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
1860 struct ixgbe_q_vector
*q_vector
;
1861 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1863 /* legacy and MSI only use one vector */
1864 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
1867 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
1868 struct napi_struct
*napi
;
1869 q_vector
= &adapter
->q_vector
[q_idx
];
1870 if (!q_vector
->rxr_count
)
1872 napi
= &q_vector
->napi
;
1873 if ((adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) &&
1874 (q_vector
->rxr_count
> 1))
1875 napi
->poll
= &ixgbe_clean_rxonly_many
;
1881 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
1884 struct ixgbe_q_vector
*q_vector
;
1885 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1887 /* legacy and MSI only use one vector */
1888 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
1891 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
1892 q_vector
= &adapter
->q_vector
[q_idx
];
1893 if (!q_vector
->rxr_count
)
1895 napi_disable(&q_vector
->napi
);
1899 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
1901 struct net_device
*netdev
= adapter
->netdev
;
1904 ixgbe_set_rx_mode(netdev
);
1906 ixgbe_restore_vlan(adapter
);
1908 ixgbe_configure_tx(adapter
);
1909 ixgbe_configure_rx(adapter
);
1910 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
1911 ixgbe_alloc_rx_buffers(adapter
, &adapter
->rx_ring
[i
],
1912 (adapter
->rx_ring
[i
].count
- 1));
1915 static int ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
1917 struct net_device
*netdev
= adapter
->netdev
;
1918 struct ixgbe_hw
*hw
= &adapter
->hw
;
1920 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
1921 u32 txdctl
, rxdctl
, mhadd
;
1924 ixgbe_get_hw_control(adapter
);
1926 if ((adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) ||
1927 (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
)) {
1928 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
1929 gpie
= (IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_EIAME
|
1930 IXGBE_GPIE_PBA_SUPPORT
| IXGBE_GPIE_OCD
);
1935 /* XXX: to interrupt immediately for EICS writes, enable this */
1936 /* gpie |= IXGBE_GPIE_EIMEN; */
1937 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
1940 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
1941 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
1942 * specifically only auto mask tx and rx interrupts */
1943 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
1946 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
1947 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
1948 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
1949 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
1951 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
1954 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1955 j
= adapter
->tx_ring
[i
].reg_idx
;
1956 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
1957 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1958 txdctl
|= (8 << 16);
1959 txdctl
|= IXGBE_TXDCTL_ENABLE
;
1960 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
), txdctl
);
1963 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1964 j
= adapter
->rx_ring
[i
].reg_idx
;
1965 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
1966 /* enable PTHRESH=32 descriptors (half the internal cache)
1967 * and HTHRESH=0 descriptors (to minimize latency on fetch),
1968 * this also removes a pesky rx_no_buffer_count increment */
1970 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
1971 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), rxdctl
);
1973 /* enable all receives */
1974 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
1975 rxdctl
|= (IXGBE_RXCTRL_DMBYPS
| IXGBE_RXCTRL_RXEN
);
1976 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxdctl
);
1978 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
1979 ixgbe_configure_msix(adapter
);
1981 ixgbe_configure_msi_and_legacy(adapter
);
1983 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
1984 ixgbe_napi_enable_all(adapter
);
1986 /* clear any pending interrupts, may auto mask */
1987 IXGBE_READ_REG(hw
, IXGBE_EICR
);
1989 ixgbe_irq_enable(adapter
);
1991 /* bring the link up in the watchdog, this could race with our first
1992 * link up interrupt but shouldn't be a problem */
1993 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
1994 adapter
->link_check_timeout
= jiffies
;
1995 mod_timer(&adapter
->watchdog_timer
, jiffies
);
1999 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
2001 WARN_ON(in_interrupt());
2002 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
2004 ixgbe_down(adapter
);
2006 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
2009 int ixgbe_up(struct ixgbe_adapter
*adapter
)
2011 /* hardware has been reset, we need to reload some things */
2012 ixgbe_configure(adapter
);
2014 return ixgbe_up_complete(adapter
);
2017 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
2019 struct ixgbe_hw
*hw
= &adapter
->hw
;
2020 if (hw
->mac
.ops
.init_hw(hw
))
2021 dev_err(&adapter
->pdev
->dev
, "Hardware Error\n");
2023 /* reprogram the RAR[0] in case user changed it. */
2024 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, 0, IXGBE_RAH_AV
);
2029 static int ixgbe_resume(struct pci_dev
*pdev
)
2031 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2032 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2035 pci_set_power_state(pdev
, PCI_D0
);
2036 pci_restore_state(pdev
);
2037 err
= pci_enable_device(pdev
);
2039 printk(KERN_ERR
"ixgbe: Cannot enable PCI device from " \
2043 pci_set_master(pdev
);
2045 pci_enable_wake(pdev
, PCI_D3hot
, 0);
2046 pci_enable_wake(pdev
, PCI_D3cold
, 0);
2048 if (netif_running(netdev
)) {
2049 err
= ixgbe_request_irq(adapter
);
2054 ixgbe_reset(adapter
);
2056 if (netif_running(netdev
))
2059 netif_device_attach(netdev
);
2066 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
2067 * @adapter: board private structure
2068 * @rx_ring: ring to free buffers from
2070 static void ixgbe_clean_rx_ring(struct ixgbe_adapter
*adapter
,
2071 struct ixgbe_ring
*rx_ring
)
2073 struct pci_dev
*pdev
= adapter
->pdev
;
2077 /* Free all the Rx ring sk_buffs */
2079 for (i
= 0; i
< rx_ring
->count
; i
++) {
2080 struct ixgbe_rx_buffer
*rx_buffer_info
;
2082 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
2083 if (rx_buffer_info
->dma
) {
2084 pci_unmap_single(pdev
, rx_buffer_info
->dma
,
2085 rx_ring
->rx_buf_len
,
2086 PCI_DMA_FROMDEVICE
);
2087 rx_buffer_info
->dma
= 0;
2089 if (rx_buffer_info
->skb
) {
2090 dev_kfree_skb(rx_buffer_info
->skb
);
2091 rx_buffer_info
->skb
= NULL
;
2093 if (!rx_buffer_info
->page
)
2095 pci_unmap_page(pdev
, rx_buffer_info
->page_dma
, PAGE_SIZE
/ 2,
2096 PCI_DMA_FROMDEVICE
);
2097 rx_buffer_info
->page_dma
= 0;
2098 put_page(rx_buffer_info
->page
);
2099 rx_buffer_info
->page
= NULL
;
2100 rx_buffer_info
->page_offset
= 0;
2103 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
2104 memset(rx_ring
->rx_buffer_info
, 0, size
);
2106 /* Zero out the descriptor ring */
2107 memset(rx_ring
->desc
, 0, rx_ring
->size
);
2109 rx_ring
->next_to_clean
= 0;
2110 rx_ring
->next_to_use
= 0;
2112 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->head
);
2113 writel(0, adapter
->hw
.hw_addr
+ rx_ring
->tail
);
2117 * ixgbe_clean_tx_ring - Free Tx Buffers
2118 * @adapter: board private structure
2119 * @tx_ring: ring to be cleaned
2121 static void ixgbe_clean_tx_ring(struct ixgbe_adapter
*adapter
,
2122 struct ixgbe_ring
*tx_ring
)
2124 struct ixgbe_tx_buffer
*tx_buffer_info
;
2128 /* Free all the Tx ring sk_buffs */
2130 for (i
= 0; i
< tx_ring
->count
; i
++) {
2131 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
2132 ixgbe_unmap_and_free_tx_resource(adapter
, tx_buffer_info
);
2135 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
2136 memset(tx_ring
->tx_buffer_info
, 0, size
);
2138 /* Zero out the descriptor ring */
2139 memset(tx_ring
->desc
, 0, tx_ring
->size
);
2141 tx_ring
->next_to_use
= 0;
2142 tx_ring
->next_to_clean
= 0;
2144 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->head
);
2145 writel(0, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
2149 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2150 * @adapter: board private structure
2152 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
2156 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2157 ixgbe_clean_rx_ring(adapter
, &adapter
->rx_ring
[i
]);
2161 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2162 * @adapter: board private structure
2164 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
2168 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2169 ixgbe_clean_tx_ring(adapter
, &adapter
->tx_ring
[i
]);
2172 void ixgbe_down(struct ixgbe_adapter
*adapter
)
2174 struct net_device
*netdev
= adapter
->netdev
;
2175 struct ixgbe_hw
*hw
= &adapter
->hw
;
2180 /* signal that we are down to the interrupt handler */
2181 set_bit(__IXGBE_DOWN
, &adapter
->state
);
2183 /* disable receives */
2184 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
2185 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
2187 netif_tx_disable(netdev
);
2189 IXGBE_WRITE_FLUSH(hw
);
2192 netif_tx_stop_all_queues(netdev
);
2194 ixgbe_irq_disable(adapter
);
2196 ixgbe_napi_disable_all(adapter
);
2198 del_timer_sync(&adapter
->watchdog_timer
);
2199 cancel_work_sync(&adapter
->watchdog_task
);
2201 /* disable transmits in the hardware now that interrupts are off */
2202 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2203 j
= adapter
->tx_ring
[i
].reg_idx
;
2204 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(j
));
2205 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(j
),
2206 (txdctl
& ~IXGBE_TXDCTL_ENABLE
));
2209 netif_carrier_off(netdev
);
2211 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
2212 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
2213 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
2214 dca_remove_requester(&adapter
->pdev
->dev
);
2218 if (!pci_channel_offline(adapter
->pdev
))
2219 ixgbe_reset(adapter
);
2220 ixgbe_clean_all_tx_rings(adapter
);
2221 ixgbe_clean_all_rx_rings(adapter
);
2223 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
2224 /* since we reset the hardware DCA settings were cleared */
2225 if (dca_add_requester(&adapter
->pdev
->dev
) == 0) {
2226 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
2227 /* always use CB2 mode, difference is masked
2228 * in the CB driver */
2229 IXGBE_WRITE_REG(hw
, IXGBE_DCA_CTRL
, 2);
2230 ixgbe_setup_dca(adapter
);
2235 static int ixgbe_suspend(struct pci_dev
*pdev
, pm_message_t state
)
2237 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2238 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2243 netif_device_detach(netdev
);
2245 if (netif_running(netdev
)) {
2246 ixgbe_down(adapter
);
2247 ixgbe_free_irq(adapter
);
2251 retval
= pci_save_state(pdev
);
2256 pci_enable_wake(pdev
, PCI_D3hot
, 0);
2257 pci_enable_wake(pdev
, PCI_D3cold
, 0);
2259 ixgbe_release_hw_control(adapter
);
2261 pci_disable_device(pdev
);
2263 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
2268 static void ixgbe_shutdown(struct pci_dev
*pdev
)
2270 ixgbe_suspend(pdev
, PMSG_SUSPEND
);
2274 * ixgbe_poll - NAPI Rx polling callback
2275 * @napi: structure for representing this polling device
2276 * @budget: how many packets driver is allowed to clean
2278 * This function is used for legacy and MSI, NAPI mode
2280 static int ixgbe_poll(struct napi_struct
*napi
, int budget
)
2282 struct ixgbe_q_vector
*q_vector
= container_of(napi
,
2283 struct ixgbe_q_vector
, napi
);
2284 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2285 int tx_cleaned
, work_done
= 0;
2287 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
2288 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
2289 ixgbe_update_tx_dca(adapter
, adapter
->tx_ring
);
2290 ixgbe_update_rx_dca(adapter
, adapter
->rx_ring
);
2294 tx_cleaned
= ixgbe_clean_tx_irq(adapter
, adapter
->tx_ring
);
2295 ixgbe_clean_rx_irq(adapter
, adapter
->rx_ring
, &work_done
, budget
);
2300 /* If budget not fully consumed, exit the polling mode */
2301 if (work_done
< budget
) {
2302 netif_rx_complete(adapter
->netdev
, napi
);
2303 if (adapter
->itr_setting
& 3)
2304 ixgbe_set_itr(adapter
);
2305 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2306 ixgbe_irq_enable(adapter
);
2312 * ixgbe_tx_timeout - Respond to a Tx Hang
2313 * @netdev: network interface device structure
2315 static void ixgbe_tx_timeout(struct net_device
*netdev
)
2317 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2319 /* Do the reset outside of interrupt context */
2320 schedule_work(&adapter
->reset_task
);
2323 static void ixgbe_reset_task(struct work_struct
*work
)
2325 struct ixgbe_adapter
*adapter
;
2326 adapter
= container_of(work
, struct ixgbe_adapter
, reset_task
);
2328 adapter
->tx_timeout_count
++;
2330 ixgbe_reinit_locked(adapter
);
2333 static void ixgbe_set_num_queues(struct ixgbe_adapter
*adapter
)
2335 int nrq
= 1, ntq
= 1;
2336 int feature_mask
= 0, rss_i
, rss_m
;
2338 /* Number of supported queues */
2339 switch (adapter
->hw
.mac
.type
) {
2340 case ixgbe_mac_82598EB
:
2341 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
2343 feature_mask
|= IXGBE_FLAG_RSS_ENABLED
;
2345 switch (adapter
->flags
& feature_mask
) {
2346 case (IXGBE_FLAG_RSS_ENABLED
):
2360 adapter
->ring_feature
[RING_F_RSS
].indices
= rss_i
;
2361 adapter
->ring_feature
[RING_F_RSS
].mask
= rss_m
;
2369 adapter
->num_rx_queues
= nrq
;
2370 adapter
->num_tx_queues
= ntq
;
2373 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter
*adapter
,
2376 int err
, vector_threshold
;
2378 /* We'll want at least 3 (vector_threshold):
2381 * 3) Other (Link Status Change, etc.)
2382 * 4) TCP Timer (optional)
2384 vector_threshold
= MIN_MSIX_COUNT
;
2386 /* The more we get, the more we will assign to Tx/Rx Cleanup
2387 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2388 * Right now, we simply care about how many we'll get; we'll
2389 * set them up later while requesting irq's.
2391 while (vectors
>= vector_threshold
) {
2392 err
= pci_enable_msix(adapter
->pdev
, adapter
->msix_entries
,
2394 if (!err
) /* Success in acquiring all requested vectors. */
2397 vectors
= 0; /* Nasty failure, quit now */
2398 else /* err == number of vectors we should try again with */
2402 if (vectors
< vector_threshold
) {
2403 /* Can't allocate enough MSI-X interrupts? Oh well.
2404 * This just means we'll go with either a single MSI
2405 * vector or fall back to legacy interrupts.
2407 DPRINTK(HW
, DEBUG
, "Unable to allocate MSI-X interrupts\n");
2408 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2409 kfree(adapter
->msix_entries
);
2410 adapter
->msix_entries
= NULL
;
2411 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
2412 ixgbe_set_num_queues(adapter
);
2414 adapter
->flags
|= IXGBE_FLAG_MSIX_ENABLED
; /* Woot! */
2415 adapter
->num_msix_vectors
= vectors
;
2420 * ixgbe_cache_ring_register - Descriptor ring to register mapping
2421 * @adapter: board private structure to initialize
2423 * Once we know the feature-set enabled for the device, we'll cache
2424 * the register offset the descriptor ring is assigned to.
2426 static void __devinit
ixgbe_cache_ring_register(struct ixgbe_adapter
*adapter
)
2428 /* TODO: Remove all uses of the indices in the cases where multiple
2429 * features are OR'd together, if the feature set makes sense.
2431 int feature_mask
= 0, rss_i
;
2432 int i
, txr_idx
, rxr_idx
;
2434 /* Number of supported queues */
2435 switch (adapter
->hw
.mac
.type
) {
2436 case ixgbe_mac_82598EB
:
2437 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
2440 feature_mask
|= IXGBE_FLAG_RSS_ENABLED
;
2441 switch (adapter
->flags
& feature_mask
) {
2442 case (IXGBE_FLAG_RSS_ENABLED
):
2443 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2444 adapter
->rx_ring
[i
].reg_idx
= i
;
2445 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2446 adapter
->tx_ring
[i
].reg_idx
= i
;
2459 * ixgbe_alloc_queues - Allocate memory for all rings
2460 * @adapter: board private structure to initialize
2462 * We allocate one ring per queue at run-time since we don't know the
2463 * number of queues at compile-time. The polling_netdev array is
2464 * intended for Multiqueue, but should work fine with a single queue.
2466 static int __devinit
ixgbe_alloc_queues(struct ixgbe_adapter
*adapter
)
2470 adapter
->tx_ring
= kcalloc(adapter
->num_tx_queues
,
2471 sizeof(struct ixgbe_ring
), GFP_KERNEL
);
2472 if (!adapter
->tx_ring
)
2473 goto err_tx_ring_allocation
;
2475 adapter
->rx_ring
= kcalloc(adapter
->num_rx_queues
,
2476 sizeof(struct ixgbe_ring
), GFP_KERNEL
);
2477 if (!adapter
->rx_ring
)
2478 goto err_rx_ring_allocation
;
2480 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2481 adapter
->tx_ring
[i
].count
= adapter
->tx_ring_count
;
2482 adapter
->tx_ring
[i
].queue_index
= i
;
2485 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2486 adapter
->rx_ring
[i
].count
= adapter
->rx_ring_count
;
2487 adapter
->rx_ring
[i
].queue_index
= i
;
2490 ixgbe_cache_ring_register(adapter
);
2494 err_rx_ring_allocation
:
2495 kfree(adapter
->tx_ring
);
2496 err_tx_ring_allocation
:
2501 * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2502 * @adapter: board private structure to initialize
2504 * Attempt to configure the interrupts using the best available
2505 * capabilities of the hardware and the kernel.
2507 static int __devinit
ixgbe_set_interrupt_capability(struct ixgbe_adapter
2511 int vector
, v_budget
;
2514 * It's easy to be greedy for MSI-X vectors, but it really
2515 * doesn't do us much good if we have a lot more vectors
2516 * than CPU's. So let's be conservative and only ask for
2517 * (roughly) twice the number of vectors as there are CPU's.
2519 v_budget
= min(adapter
->num_rx_queues
+ adapter
->num_tx_queues
,
2520 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS
;
2523 * At the same time, hardware can only support a maximum of
2524 * MAX_MSIX_COUNT vectors. With features such as RSS and VMDq,
2525 * we can easily reach upwards of 64 Rx descriptor queues and
2526 * 32 Tx queues. Thus, we cap it off in those rare cases where
2527 * the cpu count also exceeds our vector limit.
2529 v_budget
= min(v_budget
, MAX_MSIX_COUNT
);
2531 /* A failure in MSI-X entry allocation isn't fatal, but it does
2532 * mean we disable MSI-X capabilities of the adapter. */
2533 adapter
->msix_entries
= kcalloc(v_budget
,
2534 sizeof(struct msix_entry
), GFP_KERNEL
);
2535 if (!adapter
->msix_entries
) {
2536 adapter
->flags
&= ~IXGBE_FLAG_RSS_ENABLED
;
2537 ixgbe_set_num_queues(adapter
);
2538 kfree(adapter
->tx_ring
);
2539 kfree(adapter
->rx_ring
);
2540 err
= ixgbe_alloc_queues(adapter
);
2542 DPRINTK(PROBE
, ERR
, "Unable to allocate memory "
2550 for (vector
= 0; vector
< v_budget
; vector
++)
2551 adapter
->msix_entries
[vector
].entry
= vector
;
2553 ixgbe_acquire_msix_vectors(adapter
, v_budget
);
2555 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
2559 err
= pci_enable_msi(adapter
->pdev
);
2561 adapter
->flags
|= IXGBE_FLAG_MSI_ENABLED
;
2563 DPRINTK(HW
, DEBUG
, "Unable to allocate MSI interrupt, "
2564 "falling back to legacy. Error: %d\n", err
);
2570 /* Notify the stack of the (possibly) reduced Tx Queue count. */
2571 adapter
->netdev
->real_num_tx_queues
= adapter
->num_tx_queues
;
2576 static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter
*adapter
)
2578 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2579 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2580 pci_disable_msix(adapter
->pdev
);
2581 kfree(adapter
->msix_entries
);
2582 adapter
->msix_entries
= NULL
;
2583 } else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
) {
2584 adapter
->flags
&= ~IXGBE_FLAG_MSI_ENABLED
;
2585 pci_disable_msi(adapter
->pdev
);
2591 * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2592 * @adapter: board private structure to initialize
2594 * We determine which interrupt scheme to use based on...
2595 * - Kernel support (MSI, MSI-X)
2596 * - which can be user-defined (via MODULE_PARAM)
2597 * - Hardware queue count (num_*_queues)
2598 * - defined by miscellaneous hardware support/features (RSS, etc.)
2600 static int __devinit
ixgbe_init_interrupt_scheme(struct ixgbe_adapter
*adapter
)
2604 /* Number of supported queues */
2605 ixgbe_set_num_queues(adapter
);
2607 err
= ixgbe_alloc_queues(adapter
);
2609 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for queues\n");
2610 goto err_alloc_queues
;
2613 err
= ixgbe_set_interrupt_capability(adapter
);
2615 DPRINTK(PROBE
, ERR
, "Unable to setup interrupt capabilities\n");
2616 goto err_set_interrupt
;
2619 DPRINTK(DRV
, INFO
, "Multiqueue %s: Rx Queue count = %u, "
2620 "Tx Queue count = %u\n",
2621 (adapter
->num_rx_queues
> 1) ? "Enabled" :
2622 "Disabled", adapter
->num_rx_queues
, adapter
->num_tx_queues
);
2624 set_bit(__IXGBE_DOWN
, &adapter
->state
);
2629 kfree(adapter
->tx_ring
);
2630 kfree(adapter
->rx_ring
);
2636 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
2637 * @adapter: board private structure to initialize
2639 * ixgbe_sw_init initializes the Adapter private data structure.
2640 * Fields are initialized based on PCI device information and
2641 * OS network device settings (MTU size).
2643 static int __devinit
ixgbe_sw_init(struct ixgbe_adapter
*adapter
)
2645 struct ixgbe_hw
*hw
= &adapter
->hw
;
2646 struct pci_dev
*pdev
= adapter
->pdev
;
2649 /* PCI config space info */
2651 hw
->vendor_id
= pdev
->vendor
;
2652 hw
->device_id
= pdev
->device
;
2653 hw
->revision_id
= pdev
->revision
;
2654 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
2655 hw
->subsystem_device_id
= pdev
->subsystem_device
;
2657 /* Set capability flags */
2658 rss
= min(IXGBE_MAX_RSS_INDICES
, (int)num_online_cpus());
2659 adapter
->ring_feature
[RING_F_RSS
].indices
= rss
;
2660 adapter
->flags
|= IXGBE_FLAG_RSS_ENABLED
;
2662 /* default flow control settings */
2663 hw
->fc
.original_type
= ixgbe_fc_none
;
2664 hw
->fc
.type
= ixgbe_fc_none
;
2665 hw
->fc
.high_water
= IXGBE_DEFAULT_FCRTH
;
2666 hw
->fc
.low_water
= IXGBE_DEFAULT_FCRTL
;
2667 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
2668 hw
->fc
.send_xon
= true;
2670 /* select 10G link by default */
2671 hw
->mac
.link_mode_select
= IXGBE_AUTOC_LMS_10G_LINK_NO_AN
;
2673 /* enable itr by default in dynamic mode */
2674 adapter
->itr_setting
= 1;
2675 adapter
->eitr_param
= 20000;
2677 /* set defaults for eitr in MegaBytes */
2678 adapter
->eitr_low
= 10;
2679 adapter
->eitr_high
= 20;
2681 /* set default ring sizes */
2682 adapter
->tx_ring_count
= IXGBE_DEFAULT_TXD
;
2683 adapter
->rx_ring_count
= IXGBE_DEFAULT_RXD
;
2685 /* initialize eeprom parameters */
2686 if (ixgbe_init_eeprom_params_generic(hw
)) {
2687 dev_err(&pdev
->dev
, "EEPROM initialization failed\n");
2691 /* enable rx csum by default */
2692 adapter
->flags
|= IXGBE_FLAG_RX_CSUM_ENABLED
;
2694 set_bit(__IXGBE_DOWN
, &adapter
->state
);
2700 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2701 * @adapter: board private structure
2702 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2704 * Return 0 on success, negative on failure
2706 int ixgbe_setup_tx_resources(struct ixgbe_adapter
*adapter
,
2707 struct ixgbe_ring
*tx_ring
)
2709 struct pci_dev
*pdev
= adapter
->pdev
;
2712 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
2713 tx_ring
->tx_buffer_info
= vmalloc(size
);
2714 if (!tx_ring
->tx_buffer_info
)
2716 memset(tx_ring
->tx_buffer_info
, 0, size
);
2718 /* round up to nearest 4K */
2719 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
) +
2721 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
2723 tx_ring
->desc
= pci_alloc_consistent(pdev
, tx_ring
->size
,
2728 tx_ring
->next_to_use
= 0;
2729 tx_ring
->next_to_clean
= 0;
2730 tx_ring
->work_limit
= tx_ring
->count
;
2734 vfree(tx_ring
->tx_buffer_info
);
2735 tx_ring
->tx_buffer_info
= NULL
;
2736 DPRINTK(PROBE
, ERR
, "Unable to allocate memory for the transmit "
2737 "descriptor ring\n");
2742 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2743 * @adapter: board private structure
2744 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2746 * Returns 0 on success, negative on failure
2748 int ixgbe_setup_rx_resources(struct ixgbe_adapter
*adapter
,
2749 struct ixgbe_ring
*rx_ring
)
2751 struct pci_dev
*pdev
= adapter
->pdev
;
2754 size
= sizeof(struct net_lro_desc
) * IXGBE_MAX_LRO_DESCRIPTORS
;
2755 rx_ring
->lro_mgr
.lro_arr
= vmalloc(size
);
2756 if (!rx_ring
->lro_mgr
.lro_arr
)
2758 memset(rx_ring
->lro_mgr
.lro_arr
, 0, size
);
2760 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
2761 rx_ring
->rx_buffer_info
= vmalloc(size
);
2762 if (!rx_ring
->rx_buffer_info
) {
2764 "vmalloc allocation failed for the rx desc ring\n");
2767 memset(rx_ring
->rx_buffer_info
, 0, size
);
2769 /* Round up to nearest 4K */
2770 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
2771 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
2773 rx_ring
->desc
= pci_alloc_consistent(pdev
, rx_ring
->size
, &rx_ring
->dma
);
2775 if (!rx_ring
->desc
) {
2777 "Memory allocation failed for the rx desc ring\n");
2778 vfree(rx_ring
->rx_buffer_info
);
2782 rx_ring
->next_to_clean
= 0;
2783 rx_ring
->next_to_use
= 0;
2788 vfree(rx_ring
->lro_mgr
.lro_arr
);
2789 rx_ring
->lro_mgr
.lro_arr
= NULL
;
2794 * ixgbe_free_tx_resources - Free Tx Resources per Queue
2795 * @adapter: board private structure
2796 * @tx_ring: Tx descriptor ring for a specific queue
2798 * Free all transmit software resources
2800 void ixgbe_free_tx_resources(struct ixgbe_adapter
*adapter
,
2801 struct ixgbe_ring
*tx_ring
)
2803 struct pci_dev
*pdev
= adapter
->pdev
;
2805 ixgbe_clean_tx_ring(adapter
, tx_ring
);
2807 vfree(tx_ring
->tx_buffer_info
);
2808 tx_ring
->tx_buffer_info
= NULL
;
2810 pci_free_consistent(pdev
, tx_ring
->size
, tx_ring
->desc
, tx_ring
->dma
);
2812 tx_ring
->desc
= NULL
;
2816 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
2817 * @adapter: board private structure
2819 * Free all transmit software resources
2821 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
2825 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2826 ixgbe_free_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
2830 * ixgbe_ree_rx_resources - Free Rx Resources
2831 * @adapter: board private structure
2832 * @rx_ring: ring to clean the resources from
2834 * Free all receive software resources
2836 void ixgbe_free_rx_resources(struct ixgbe_adapter
*adapter
,
2837 struct ixgbe_ring
*rx_ring
)
2839 struct pci_dev
*pdev
= adapter
->pdev
;
2841 vfree(rx_ring
->lro_mgr
.lro_arr
);
2842 rx_ring
->lro_mgr
.lro_arr
= NULL
;
2844 ixgbe_clean_rx_ring(adapter
, rx_ring
);
2846 vfree(rx_ring
->rx_buffer_info
);
2847 rx_ring
->rx_buffer_info
= NULL
;
2849 pci_free_consistent(pdev
, rx_ring
->size
, rx_ring
->desc
, rx_ring
->dma
);
2851 rx_ring
->desc
= NULL
;
2855 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
2856 * @adapter: board private structure
2858 * Free all receive software resources
2860 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
2864 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2865 ixgbe_free_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
2869 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2870 * @adapter: board private structure
2872 * If this function returns with an error, then it's possible one or
2873 * more of the rings is populated (while the rest are not). It is the
2874 * callers duty to clean those orphaned rings.
2876 * Return 0 on success, negative on failure
2878 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
2882 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2883 err
= ixgbe_setup_tx_resources(adapter
, &adapter
->tx_ring
[i
]);
2886 "Allocation for Tx Queue %u failed\n", i
);
2895 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2896 * @adapter: board private structure
2898 * If this function returns with an error, then it's possible one or
2899 * more of the rings is populated (while the rest are not). It is the
2900 * callers duty to clean those orphaned rings.
2902 * Return 0 on success, negative on failure
2905 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
2909 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2910 err
= ixgbe_setup_rx_resources(adapter
, &adapter
->rx_ring
[i
]);
2913 "Allocation for Rx Queue %u failed\n", i
);
2922 * ixgbe_change_mtu - Change the Maximum Transfer Unit
2923 * @netdev: network interface device structure
2924 * @new_mtu: new value for maximum frame size
2926 * Returns 0 on success, negative on failure
2928 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
2930 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2931 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
2933 /* MTU < 68 is an error and causes problems on some kernels */
2934 if ((new_mtu
< 68) || (max_frame
> IXGBE_MAX_JUMBO_FRAME_SIZE
))
2937 DPRINTK(PROBE
, INFO
, "changing MTU from %d to %d\n",
2938 netdev
->mtu
, new_mtu
);
2939 /* must set new MTU before calling down or up */
2940 netdev
->mtu
= new_mtu
;
2942 if (netif_running(netdev
))
2943 ixgbe_reinit_locked(adapter
);
2949 * ixgbe_open - Called when a network interface is made active
2950 * @netdev: network interface device structure
2952 * Returns 0 on success, negative value on failure
2954 * The open entry point is called when a network interface is made
2955 * active by the system (IFF_UP). At this point all resources needed
2956 * for transmit and receive operations are allocated, the interrupt
2957 * handler is registered with the OS, the watchdog timer is started,
2958 * and the stack is notified that the interface is ready.
2960 static int ixgbe_open(struct net_device
*netdev
)
2962 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
2965 /* disallow open during test */
2966 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
2969 /* allocate transmit descriptors */
2970 err
= ixgbe_setup_all_tx_resources(adapter
);
2974 /* allocate receive descriptors */
2975 err
= ixgbe_setup_all_rx_resources(adapter
);
2979 ixgbe_configure(adapter
);
2981 err
= ixgbe_request_irq(adapter
);
2985 err
= ixgbe_up_complete(adapter
);
2989 netif_tx_start_all_queues(netdev
);
2994 ixgbe_release_hw_control(adapter
);
2995 ixgbe_free_irq(adapter
);
2997 ixgbe_free_all_rx_resources(adapter
);
2999 ixgbe_free_all_tx_resources(adapter
);
3001 ixgbe_reset(adapter
);
3007 * ixgbe_close - Disables a network interface
3008 * @netdev: network interface device structure
3010 * Returns 0, this is not allowed to fail
3012 * The close entry point is called when an interface is de-activated
3013 * by the OS. The hardware is still under the drivers control, but
3014 * needs to be disabled. A global MAC reset is issued to stop the
3015 * hardware, and all transmit and receive resources are freed.
3017 static int ixgbe_close(struct net_device
*netdev
)
3019 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3021 ixgbe_down(adapter
);
3022 ixgbe_free_irq(adapter
);
3024 ixgbe_free_all_tx_resources(adapter
);
3025 ixgbe_free_all_rx_resources(adapter
);
3027 ixgbe_release_hw_control(adapter
);
3033 * ixgbe_update_stats - Update the board statistics counters.
3034 * @adapter: board private structure
3036 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
3038 struct ixgbe_hw
*hw
= &adapter
->hw
;
3040 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
3042 adapter
->stats
.crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
3043 for (i
= 0; i
< 8; i
++) {
3044 /* for packet buffers not used, the register should read 0 */
3045 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
3047 adapter
->stats
.mpc
[i
] += mpc
;
3048 total_mpc
+= adapter
->stats
.mpc
[i
];
3049 adapter
->stats
.rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
3051 adapter
->stats
.gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
3052 /* work around hardware counting issue */
3053 adapter
->stats
.gprc
-= missed_rx
;
3055 /* 82598 hardware only has a 32 bit counter in the high register */
3056 adapter
->stats
.gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
3057 adapter
->stats
.gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
3058 adapter
->stats
.tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
3059 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
3060 adapter
->stats
.bprc
+= bprc
;
3061 adapter
->stats
.mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
3062 adapter
->stats
.mprc
-= bprc
;
3063 adapter
->stats
.roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
3064 adapter
->stats
.prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
3065 adapter
->stats
.prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
3066 adapter
->stats
.prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
3067 adapter
->stats
.prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
3068 adapter
->stats
.prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
3069 adapter
->stats
.prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
3070 adapter
->stats
.rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
3071 adapter
->stats
.lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
3072 adapter
->stats
.lxoffrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
3073 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
3074 adapter
->stats
.lxontxc
+= lxon
;
3075 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
3076 adapter
->stats
.lxofftxc
+= lxoff
;
3077 adapter
->stats
.ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
3078 adapter
->stats
.gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
3079 adapter
->stats
.mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
3081 * 82598 errata - tx of flow control packets is included in tx counters
3083 xon_off_tot
= lxon
+ lxoff
;
3084 adapter
->stats
.gptc
-= xon_off_tot
;
3085 adapter
->stats
.mptc
-= xon_off_tot
;
3086 adapter
->stats
.gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
3087 adapter
->stats
.ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
3088 adapter
->stats
.rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
3089 adapter
->stats
.rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
3090 adapter
->stats
.tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
3091 adapter
->stats
.ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
3092 adapter
->stats
.ptc64
-= xon_off_tot
;
3093 adapter
->stats
.ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
3094 adapter
->stats
.ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
3095 adapter
->stats
.ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
3096 adapter
->stats
.ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
3097 adapter
->stats
.ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
3098 adapter
->stats
.bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
3100 /* Fill out the OS statistics structure */
3101 adapter
->net_stats
.multicast
= adapter
->stats
.mprc
;
3104 adapter
->net_stats
.rx_errors
= adapter
->stats
.crcerrs
+
3105 adapter
->stats
.rlec
;
3106 adapter
->net_stats
.rx_dropped
= 0;
3107 adapter
->net_stats
.rx_length_errors
= adapter
->stats
.rlec
;
3108 adapter
->net_stats
.rx_crc_errors
= adapter
->stats
.crcerrs
;
3109 adapter
->net_stats
.rx_missed_errors
= total_mpc
;
3113 * ixgbe_watchdog - Timer Call-back
3114 * @data: pointer to adapter cast into an unsigned long
3116 static void ixgbe_watchdog(unsigned long data
)
3118 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
3119 struct ixgbe_hw
*hw
= &adapter
->hw
;
3121 /* Do the watchdog outside of interrupt context due to the lovely
3122 * delays that some of the newer hardware requires */
3123 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
3124 /* Cause software interrupt to ensure rx rings are cleaned */
3125 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3127 (1 << (adapter
->num_msix_vectors
- NON_Q_VECTORS
)) - 1;
3128 IXGBE_WRITE_REG(hw
, IXGBE_EICS
, eics
);
3130 /* For legacy and MSI interrupts don't set any bits that
3131 * are enabled for EIAM, because this operation would
3132 * set *both* EIMS and EICS for any bit in EIAM */
3133 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
3134 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
3136 /* Reset the timer */
3137 mod_timer(&adapter
->watchdog_timer
,
3138 round_jiffies(jiffies
+ 2 * HZ
));
3141 schedule_work(&adapter
->watchdog_task
);
3145 * ixgbe_watchdog_task - worker thread to bring link up
3146 * @work: pointer to work_struct containing our data
3148 static void ixgbe_watchdog_task(struct work_struct
*work
)
3150 struct ixgbe_adapter
*adapter
= container_of(work
,
3151 struct ixgbe_adapter
,
3153 struct net_device
*netdev
= adapter
->netdev
;
3154 struct ixgbe_hw
*hw
= &adapter
->hw
;
3155 u32 link_speed
= adapter
->link_speed
;
3156 bool link_up
= adapter
->link_up
;
3158 adapter
->flags
|= IXGBE_FLAG_IN_WATCHDOG_TASK
;
3160 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
) {
3161 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
3163 time_after(jiffies
, (adapter
->link_check_timeout
+
3164 IXGBE_TRY_LINK_TIMEOUT
))) {
3165 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMC_LSC
);
3166 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
3168 adapter
->link_up
= link_up
;
3169 adapter
->link_speed
= link_speed
;
3173 if (!netif_carrier_ok(netdev
)) {
3174 u32 frctl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
3175 u32 rmcs
= IXGBE_READ_REG(hw
, IXGBE_RMCS
);
3176 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
3177 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
3178 DPRINTK(LINK
, INFO
, "NIC Link is Up %s, "
3179 "Flow Control: %s\n",
3180 (link_speed
== IXGBE_LINK_SPEED_10GB_FULL
?
3182 (link_speed
== IXGBE_LINK_SPEED_1GB_FULL
?
3183 "1 Gbps" : "unknown speed")),
3184 ((FLOW_RX
&& FLOW_TX
) ? "RX/TX" :
3186 (FLOW_TX
? "TX" : "None"))));
3188 netif_carrier_on(netdev
);
3189 netif_tx_wake_all_queues(netdev
);
3191 /* Force detection of hung controller */
3192 adapter
->detect_tx_hung
= true;
3195 adapter
->link_up
= false;
3196 adapter
->link_speed
= 0;
3197 if (netif_carrier_ok(netdev
)) {
3198 DPRINTK(LINK
, INFO
, "NIC Link is Down\n");
3199 netif_carrier_off(netdev
);
3200 netif_tx_stop_all_queues(netdev
);
3204 ixgbe_update_stats(adapter
);
3205 adapter
->flags
&= ~IXGBE_FLAG_IN_WATCHDOG_TASK
;
3208 static int ixgbe_tso(struct ixgbe_adapter
*adapter
,
3209 struct ixgbe_ring
*tx_ring
, struct sk_buff
*skb
,
3210 u32 tx_flags
, u8
*hdr_len
)
3212 struct ixgbe_adv_tx_context_desc
*context_desc
;
3215 struct ixgbe_tx_buffer
*tx_buffer_info
;
3216 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
;
3217 u32 mss_l4len_idx
, l4len
;
3219 if (skb_is_gso(skb
)) {
3220 if (skb_header_cloned(skb
)) {
3221 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
3225 l4len
= tcp_hdrlen(skb
);
3228 if (skb
->protocol
== htons(ETH_P_IP
)) {
3229 struct iphdr
*iph
= ip_hdr(skb
);
3232 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
3236 adapter
->hw_tso_ctxt
++;
3237 } else if (skb_shinfo(skb
)->gso_type
== SKB_GSO_TCPV6
) {
3238 ipv6_hdr(skb
)->payload_len
= 0;
3239 tcp_hdr(skb
)->check
=
3240 ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
3241 &ipv6_hdr(skb
)->daddr
,
3243 adapter
->hw_tso6_ctxt
++;
3246 i
= tx_ring
->next_to_use
;
3248 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3249 context_desc
= IXGBE_TX_CTXTDESC_ADV(*tx_ring
, i
);
3251 /* VLAN MACLEN IPLEN */
3252 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
3254 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
3255 vlan_macip_lens
|= ((skb_network_offset(skb
)) <<
3256 IXGBE_ADVTXD_MACLEN_SHIFT
);
3257 *hdr_len
+= skb_network_offset(skb
);
3259 (skb_transport_header(skb
) - skb_network_header(skb
));
3261 (skb_transport_header(skb
) - skb_network_header(skb
));
3262 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
3263 context_desc
->seqnum_seed
= 0;
3265 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3266 type_tucmd_mlhl
= (IXGBE_TXD_CMD_DEXT
|
3267 IXGBE_ADVTXD_DTYP_CTXT
);
3269 if (skb
->protocol
== htons(ETH_P_IP
))
3270 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
3271 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
3272 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
3276 (skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
);
3277 mss_l4len_idx
|= (l4len
<< IXGBE_ADVTXD_L4LEN_SHIFT
);
3278 /* use index 1 for TSO */
3279 mss_l4len_idx
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
3280 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
3282 tx_buffer_info
->time_stamp
= jiffies
;
3283 tx_buffer_info
->next_to_watch
= i
;
3286 if (i
== tx_ring
->count
)
3288 tx_ring
->next_to_use
= i
;
3295 static bool ixgbe_tx_csum(struct ixgbe_adapter
*adapter
,
3296 struct ixgbe_ring
*tx_ring
,
3297 struct sk_buff
*skb
, u32 tx_flags
)
3299 struct ixgbe_adv_tx_context_desc
*context_desc
;
3301 struct ixgbe_tx_buffer
*tx_buffer_info
;
3302 u32 vlan_macip_lens
= 0, type_tucmd_mlhl
= 0;
3304 if (skb
->ip_summed
== CHECKSUM_PARTIAL
||
3305 (tx_flags
& IXGBE_TX_FLAGS_VLAN
)) {
3306 i
= tx_ring
->next_to_use
;
3307 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3308 context_desc
= IXGBE_TX_CTXTDESC_ADV(*tx_ring
, i
);
3310 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
3312 (tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
);
3313 vlan_macip_lens
|= (skb_network_offset(skb
) <<
3314 IXGBE_ADVTXD_MACLEN_SHIFT
);
3315 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
3316 vlan_macip_lens
|= (skb_transport_header(skb
) -
3317 skb_network_header(skb
));
3319 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
3320 context_desc
->seqnum_seed
= 0;
3322 type_tucmd_mlhl
|= (IXGBE_TXD_CMD_DEXT
|
3323 IXGBE_ADVTXD_DTYP_CTXT
);
3325 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
3326 switch (skb
->protocol
) {
3327 case __constant_htons(ETH_P_IP
):
3328 type_tucmd_mlhl
|= IXGBE_ADVTXD_TUCMD_IPV4
;
3329 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
)
3331 IXGBE_ADVTXD_TUCMD_L4T_TCP
;
3333 case __constant_htons(ETH_P_IPV6
):
3334 /* XXX what about other V6 headers?? */
3335 if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_TCP
)
3337 IXGBE_ADVTXD_TUCMD_L4T_TCP
;
3340 if (unlikely(net_ratelimit())) {
3341 DPRINTK(PROBE
, WARNING
,
3342 "partial checksum but proto=%x!\n",
3349 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd_mlhl
);
3350 /* use index zero for tx checksum offload */
3351 context_desc
->mss_l4len_idx
= 0;
3353 tx_buffer_info
->time_stamp
= jiffies
;
3354 tx_buffer_info
->next_to_watch
= i
;
3356 adapter
->hw_csum_tx_good
++;
3358 if (i
== tx_ring
->count
)
3360 tx_ring
->next_to_use
= i
;
3368 static int ixgbe_tx_map(struct ixgbe_adapter
*adapter
,
3369 struct ixgbe_ring
*tx_ring
,
3370 struct sk_buff
*skb
, unsigned int first
)
3372 struct ixgbe_tx_buffer
*tx_buffer_info
;
3373 unsigned int len
= skb
->len
;
3374 unsigned int offset
= 0, size
, count
= 0, i
;
3375 unsigned int nr_frags
= skb_shinfo(skb
)->nr_frags
;
3378 len
-= skb
->data_len
;
3380 i
= tx_ring
->next_to_use
;
3383 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3384 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
3386 tx_buffer_info
->length
= size
;
3387 tx_buffer_info
->dma
= pci_map_single(adapter
->pdev
,
3389 size
, PCI_DMA_TODEVICE
);
3390 tx_buffer_info
->time_stamp
= jiffies
;
3391 tx_buffer_info
->next_to_watch
= i
;
3397 if (i
== tx_ring
->count
)
3401 for (f
= 0; f
< nr_frags
; f
++) {
3402 struct skb_frag_struct
*frag
;
3404 frag
= &skb_shinfo(skb
)->frags
[f
];
3406 offset
= frag
->page_offset
;
3409 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3410 size
= min(len
, (uint
)IXGBE_MAX_DATA_PER_TXD
);
3412 tx_buffer_info
->length
= size
;
3413 tx_buffer_info
->dma
= pci_map_page(adapter
->pdev
,
3416 size
, PCI_DMA_TODEVICE
);
3417 tx_buffer_info
->time_stamp
= jiffies
;
3418 tx_buffer_info
->next_to_watch
= i
;
3424 if (i
== tx_ring
->count
)
3429 i
= tx_ring
->count
- 1;
3432 tx_ring
->tx_buffer_info
[i
].skb
= skb
;
3433 tx_ring
->tx_buffer_info
[first
].next_to_watch
= i
;
3438 static void ixgbe_tx_queue(struct ixgbe_adapter
*adapter
,
3439 struct ixgbe_ring
*tx_ring
,
3440 int tx_flags
, int count
, u32 paylen
, u8 hdr_len
)
3442 union ixgbe_adv_tx_desc
*tx_desc
= NULL
;
3443 struct ixgbe_tx_buffer
*tx_buffer_info
;
3444 u32 olinfo_status
= 0, cmd_type_len
= 0;
3446 u32 txd_cmd
= IXGBE_TXD_CMD_EOP
| IXGBE_TXD_CMD_RS
| IXGBE_TXD_CMD_IFCS
;
3448 cmd_type_len
|= IXGBE_ADVTXD_DTYP_DATA
;
3450 cmd_type_len
|= IXGBE_ADVTXD_DCMD_IFCS
| IXGBE_ADVTXD_DCMD_DEXT
;
3452 if (tx_flags
& IXGBE_TX_FLAGS_VLAN
)
3453 cmd_type_len
|= IXGBE_ADVTXD_DCMD_VLE
;
3455 if (tx_flags
& IXGBE_TX_FLAGS_TSO
) {
3456 cmd_type_len
|= IXGBE_ADVTXD_DCMD_TSE
;
3458 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
3459 IXGBE_ADVTXD_POPTS_SHIFT
;
3461 /* use index 1 context for tso */
3462 olinfo_status
|= (1 << IXGBE_ADVTXD_IDX_SHIFT
);
3463 if (tx_flags
& IXGBE_TX_FLAGS_IPV4
)
3464 olinfo_status
|= IXGBE_TXD_POPTS_IXSM
<<
3465 IXGBE_ADVTXD_POPTS_SHIFT
;
3467 } else if (tx_flags
& IXGBE_TX_FLAGS_CSUM
)
3468 olinfo_status
|= IXGBE_TXD_POPTS_TXSM
<<
3469 IXGBE_ADVTXD_POPTS_SHIFT
;
3471 olinfo_status
|= ((paylen
- hdr_len
) << IXGBE_ADVTXD_PAYLEN_SHIFT
);
3473 i
= tx_ring
->next_to_use
;
3475 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3476 tx_desc
= IXGBE_TX_DESC_ADV(*tx_ring
, i
);
3477 tx_desc
->read
.buffer_addr
= cpu_to_le64(tx_buffer_info
->dma
);
3478 tx_desc
->read
.cmd_type_len
=
3479 cpu_to_le32(cmd_type_len
| tx_buffer_info
->length
);
3480 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
3483 if (i
== tx_ring
->count
)
3487 tx_desc
->read
.cmd_type_len
|= cpu_to_le32(txd_cmd
);
3490 * Force memory writes to complete before letting h/w
3491 * know there are new descriptors to fetch. (Only
3492 * applicable for weak-ordered memory model archs,
3497 tx_ring
->next_to_use
= i
;
3498 writel(i
, adapter
->hw
.hw_addr
+ tx_ring
->tail
);
3501 static int __ixgbe_maybe_stop_tx(struct net_device
*netdev
,
3502 struct ixgbe_ring
*tx_ring
, int size
)
3504 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3506 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
3507 /* Herbert's original patch had:
3508 * smp_mb__after_netif_stop_queue();
3509 * but since that doesn't exist yet, just open code it. */
3512 /* We need to check again in a case another CPU has just
3513 * made room available. */
3514 if (likely(IXGBE_DESC_UNUSED(tx_ring
) < size
))
3517 /* A reprieve! - use start_queue because it doesn't call schedule */
3518 netif_start_subqueue(netdev
, tx_ring
->queue_index
);
3519 ++adapter
->restart_queue
;
3523 static int ixgbe_maybe_stop_tx(struct net_device
*netdev
,
3524 struct ixgbe_ring
*tx_ring
, int size
)
3526 if (likely(IXGBE_DESC_UNUSED(tx_ring
) >= size
))
3528 return __ixgbe_maybe_stop_tx(netdev
, tx_ring
, size
);
3532 static int ixgbe_xmit_frame(struct sk_buff
*skb
, struct net_device
*netdev
)
3534 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3535 struct ixgbe_ring
*tx_ring
;
3537 unsigned int tx_flags
= 0;
3543 r_idx
= (adapter
->num_tx_queues
- 1) & skb
->queue_mapping
;
3544 tx_ring
= &adapter
->tx_ring
[r_idx
];
3546 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
3547 tx_flags
|= vlan_tx_tag_get(skb
);
3548 tx_flags
<<= IXGBE_TX_FLAGS_VLAN_SHIFT
;
3549 tx_flags
|= IXGBE_TX_FLAGS_VLAN
;
3551 /* three things can cause us to need a context descriptor */
3552 if (skb_is_gso(skb
) ||
3553 (skb
->ip_summed
== CHECKSUM_PARTIAL
) ||
3554 (tx_flags
& IXGBE_TX_FLAGS_VLAN
))
3557 count
+= TXD_USE_COUNT(skb_headlen(skb
));
3558 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
3559 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
3561 if (ixgbe_maybe_stop_tx(netdev
, tx_ring
, count
)) {
3563 return NETDEV_TX_BUSY
;
3566 if (skb
->protocol
== htons(ETH_P_IP
))
3567 tx_flags
|= IXGBE_TX_FLAGS_IPV4
;
3568 first
= tx_ring
->next_to_use
;
3569 tso
= ixgbe_tso(adapter
, tx_ring
, skb
, tx_flags
, &hdr_len
);
3571 dev_kfree_skb_any(skb
);
3572 return NETDEV_TX_OK
;
3576 tx_flags
|= IXGBE_TX_FLAGS_TSO
;
3577 else if (ixgbe_tx_csum(adapter
, tx_ring
, skb
, tx_flags
) &&
3578 (skb
->ip_summed
== CHECKSUM_PARTIAL
))
3579 tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
3581 ixgbe_tx_queue(adapter
, tx_ring
, tx_flags
,
3582 ixgbe_tx_map(adapter
, tx_ring
, skb
, first
),
3585 netdev
->trans_start
= jiffies
;
3587 ixgbe_maybe_stop_tx(netdev
, tx_ring
, DESC_NEEDED
);
3589 return NETDEV_TX_OK
;
3593 * ixgbe_get_stats - Get System Network Statistics
3594 * @netdev: network interface device structure
3596 * Returns the address of the device statistics structure.
3597 * The statistics are actually updated from the timer callback.
3599 static struct net_device_stats
*ixgbe_get_stats(struct net_device
*netdev
)
3601 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3603 /* only return the current stats */
3604 return &adapter
->net_stats
;
3608 * ixgbe_set_mac - Change the Ethernet Address of the NIC
3609 * @netdev: network interface device structure
3610 * @p: pointer to an address structure
3612 * Returns 0 on success, negative on failure
3614 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
3616 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3617 struct sockaddr
*addr
= p
;
3619 if (!is_valid_ether_addr(addr
->sa_data
))
3620 return -EADDRNOTAVAIL
;
3622 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
3623 memcpy(adapter
->hw
.mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
3625 adapter
->hw
.mac
.ops
.set_rar(&adapter
->hw
, 0, adapter
->hw
.mac
.addr
, 0, IXGBE_RAH_AV
);
3630 #ifdef CONFIG_NET_POLL_CONTROLLER
3632 * Polling 'interrupt' - used by things like netconsole to send skbs
3633 * without having to re-enable interrupts. It's not called while
3634 * the interrupt routine is executing.
3636 static void ixgbe_netpoll(struct net_device
*netdev
)
3638 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3640 disable_irq(adapter
->pdev
->irq
);
3641 adapter
->flags
|= IXGBE_FLAG_IN_NETPOLL
;
3642 ixgbe_intr(adapter
->pdev
->irq
, netdev
);
3643 adapter
->flags
&= ~IXGBE_FLAG_IN_NETPOLL
;
3644 enable_irq(adapter
->pdev
->irq
);
3649 * ixgbe_link_config - set up initial link with default speed and duplex
3650 * @hw: pointer to private hardware struct
3652 * Returns 0 on success, negative on failure
3654 static int ixgbe_link_config(struct ixgbe_hw
*hw
)
3656 u32 autoneg
= IXGBE_LINK_SPEED_10GB_FULL
;
3658 /* must always autoneg for both 1G and 10G link */
3659 hw
->mac
.autoneg
= true;
3661 return hw
->mac
.ops
.setup_link_speed(hw
, autoneg
, true, true);
3665 * ixgbe_napi_add_all - prep napi structs for use
3666 * @adapter: private struct
3667 * helper function to napi_add each possible q_vector->napi
3669 static void ixgbe_napi_add_all(struct ixgbe_adapter
*adapter
)
3671 int i
, q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
3672 int (*poll
)(struct napi_struct
*, int);
3674 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3675 poll
= &ixgbe_clean_rxonly
;
3678 /* only one q_vector for legacy modes */
3682 for (i
= 0; i
< q_vectors
; i
++) {
3683 struct ixgbe_q_vector
*q_vector
= &adapter
->q_vector
[i
];
3684 netif_napi_add(adapter
->netdev
, &q_vector
->napi
,
3690 * ixgbe_probe - Device Initialization Routine
3691 * @pdev: PCI device information struct
3692 * @ent: entry in ixgbe_pci_tbl
3694 * Returns 0 on success, negative on failure
3696 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
3697 * The OS initialization, configuring of the adapter private structure,
3698 * and a hardware reset occur.
3700 static int __devinit
ixgbe_probe(struct pci_dev
*pdev
,
3701 const struct pci_device_id
*ent
)
3703 struct net_device
*netdev
;
3704 struct ixgbe_adapter
*adapter
= NULL
;
3705 struct ixgbe_hw
*hw
;
3706 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
3707 static int cards_found
;
3708 int i
, err
, pci_using_dac
;
3709 u16 link_status
, link_speed
, link_width
;
3712 err
= pci_enable_device(pdev
);
3716 if (!pci_set_dma_mask(pdev
, DMA_64BIT_MASK
) &&
3717 !pci_set_consistent_dma_mask(pdev
, DMA_64BIT_MASK
)) {
3720 err
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
3722 err
= pci_set_consistent_dma_mask(pdev
, DMA_32BIT_MASK
);
3724 dev_err(&pdev
->dev
, "No usable DMA configuration, "
3732 err
= pci_request_regions(pdev
, ixgbe_driver_name
);
3734 dev_err(&pdev
->dev
, "pci_request_regions failed 0x%x\n", err
);
3738 pci_set_master(pdev
);
3739 pci_save_state(pdev
);
3741 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), MAX_TX_QUEUES
);
3744 goto err_alloc_etherdev
;
3747 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
3749 pci_set_drvdata(pdev
, netdev
);
3750 adapter
= netdev_priv(netdev
);
3752 adapter
->netdev
= netdev
;
3753 adapter
->pdev
= pdev
;
3756 adapter
->msg_enable
= (1 << DEFAULT_DEBUG_LEVEL_SHIFT
) - 1;
3758 hw
->hw_addr
= ioremap(pci_resource_start(pdev
, 0),
3759 pci_resource_len(pdev
, 0));
3765 for (i
= 1; i
<= 5; i
++) {
3766 if (pci_resource_len(pdev
, i
) == 0)
3770 netdev
->open
= &ixgbe_open
;
3771 netdev
->stop
= &ixgbe_close
;
3772 netdev
->hard_start_xmit
= &ixgbe_xmit_frame
;
3773 netdev
->get_stats
= &ixgbe_get_stats
;
3774 netdev
->set_rx_mode
= &ixgbe_set_rx_mode
;
3775 netdev
->set_multicast_list
= &ixgbe_set_rx_mode
;
3776 netdev
->set_mac_address
= &ixgbe_set_mac
;
3777 netdev
->change_mtu
= &ixgbe_change_mtu
;
3778 ixgbe_set_ethtool_ops(netdev
);
3779 netdev
->tx_timeout
= &ixgbe_tx_timeout
;
3780 netdev
->watchdog_timeo
= 5 * HZ
;
3781 netdev
->vlan_rx_register
= ixgbe_vlan_rx_register
;
3782 netdev
->vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
;
3783 netdev
->vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
;
3784 #ifdef CONFIG_NET_POLL_CONTROLLER
3785 netdev
->poll_controller
= ixgbe_netpoll
;
3787 strcpy(netdev
->name
, pci_name(pdev
));
3789 adapter
->bd_number
= cards_found
;
3792 memcpy(&hw
->mac
.ops
, ii
->mac_ops
, sizeof(hw
->mac
.ops
));
3793 hw
->mac
.type
= ii
->mac
;
3796 memcpy(&hw
->eeprom
.ops
, ii
->eeprom_ops
, sizeof(hw
->eeprom
.ops
));
3797 eec
= IXGBE_READ_REG(hw
, IXGBE_EEC
);
3798 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
3799 if (!(eec
& (1 << 8)))
3800 hw
->eeprom
.ops
.read
= &ixgbe_read_eeprom_bit_bang_generic
;
3803 memcpy(&hw
->phy
.ops
, ii
->phy_ops
, sizeof(hw
->phy
.ops
));
3804 /* phy->sfp_type = ixgbe_sfp_type_unknown; */
3806 err
= ii
->get_invariants(hw
);
3810 /* setup the private structure */
3811 err
= ixgbe_sw_init(adapter
);
3815 /* reset_hw fills in the perm_addr as well */
3816 err
= hw
->mac
.ops
.reset_hw(hw
);
3818 dev_err(&adapter
->pdev
->dev
, "HW Init failed: %d\n", err
);
3822 netdev
->features
= NETIF_F_SG
|
3824 NETIF_F_HW_VLAN_TX
|
3825 NETIF_F_HW_VLAN_RX
|
3826 NETIF_F_HW_VLAN_FILTER
;
3828 netdev
->features
|= NETIF_F_IPV6_CSUM
;
3829 netdev
->features
|= NETIF_F_TSO
;
3830 netdev
->features
|= NETIF_F_TSO6
;
3831 netdev
->features
|= NETIF_F_LRO
;
3833 netdev
->vlan_features
|= NETIF_F_TSO
;
3834 netdev
->vlan_features
|= NETIF_F_TSO6
;
3835 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
3836 netdev
->vlan_features
|= NETIF_F_SG
;
3839 netdev
->features
|= NETIF_F_HIGHDMA
;
3841 /* make sure the EEPROM is good */
3842 if (hw
->eeprom
.ops
.validate_checksum(hw
, NULL
) < 0) {
3843 dev_err(&pdev
->dev
, "The EEPROM Checksum Is Not Valid\n");
3848 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
3849 memcpy(netdev
->perm_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
3851 if (ixgbe_validate_mac_addr(netdev
->perm_addr
)) {
3852 dev_err(&pdev
->dev
, "invalid MAC address\n");
3857 init_timer(&adapter
->watchdog_timer
);
3858 adapter
->watchdog_timer
.function
= &ixgbe_watchdog
;
3859 adapter
->watchdog_timer
.data
= (unsigned long)adapter
;
3861 INIT_WORK(&adapter
->reset_task
, ixgbe_reset_task
);
3862 INIT_WORK(&adapter
->watchdog_task
, ixgbe_watchdog_task
);
3864 err
= ixgbe_init_interrupt_scheme(adapter
);
3868 /* print bus type/speed/width info */
3869 pci_read_config_word(pdev
, IXGBE_PCI_LINK_STATUS
, &link_status
);
3870 link_speed
= link_status
& IXGBE_PCI_LINK_SPEED
;
3871 link_width
= link_status
& IXGBE_PCI_LINK_WIDTH
;
3872 dev_info(&pdev
->dev
, "(PCI Express:%s:%s) "
3873 "%02x:%02x:%02x:%02x:%02x:%02x\n",
3874 ((link_speed
== IXGBE_PCI_LINK_SPEED_5000
) ? "5.0Gb/s" :
3875 (link_speed
== IXGBE_PCI_LINK_SPEED_2500
) ? "2.5Gb/s" :
3877 ((link_width
== IXGBE_PCI_LINK_WIDTH_8
) ? "Width x8" :
3878 (link_width
== IXGBE_PCI_LINK_WIDTH_4
) ? "Width x4" :
3879 (link_width
== IXGBE_PCI_LINK_WIDTH_2
) ? "Width x2" :
3880 (link_width
== IXGBE_PCI_LINK_WIDTH_1
) ? "Width x1" :
3882 netdev
->dev_addr
[0], netdev
->dev_addr
[1], netdev
->dev_addr
[2],
3883 netdev
->dev_addr
[3], netdev
->dev_addr
[4], netdev
->dev_addr
[5]);
3884 ixgbe_read_pba_num_generic(hw
, &part_num
);
3885 dev_info(&pdev
->dev
, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
3886 hw
->mac
.type
, hw
->phy
.type
,
3887 (part_num
>> 8), (part_num
& 0xff));
3889 if (link_width
<= IXGBE_PCI_LINK_WIDTH_4
) {
3890 dev_warn(&pdev
->dev
, "PCI-Express bandwidth available for "
3891 "this card is not sufficient for optimal "
3893 dev_warn(&pdev
->dev
, "For optimal performance a x8 "
3894 "PCI-Express slot is required.\n");
3897 /* reset the hardware with the new settings */
3898 hw
->mac
.ops
.start_hw(hw
);
3900 /* link_config depends on start_hw being called at least once */
3901 err
= ixgbe_link_config(hw
);
3903 dev_err(&pdev
->dev
, "setup_link_speed FAILED %d\n", err
);
3907 netif_carrier_off(netdev
);
3908 netif_tx_stop_all_queues(netdev
);
3910 ixgbe_napi_add_all(adapter
);
3912 strcpy(netdev
->name
, "eth%d");
3913 err
= register_netdev(netdev
);
3917 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
3918 if (dca_add_requester(&pdev
->dev
) == 0) {
3919 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
3920 /* always use CB2 mode, difference is masked
3921 * in the CB driver */
3922 IXGBE_WRITE_REG(hw
, IXGBE_DCA_CTRL
, 2);
3923 ixgbe_setup_dca(adapter
);
3927 dev_info(&pdev
->dev
, "Intel(R) 10 Gigabit Network Connection\n");
3932 ixgbe_release_hw_control(adapter
);
3935 ixgbe_reset_interrupt_capability(adapter
);
3937 iounmap(hw
->hw_addr
);
3939 free_netdev(netdev
);
3941 pci_release_regions(pdev
);
3944 pci_disable_device(pdev
);
3949 * ixgbe_remove - Device Removal Routine
3950 * @pdev: PCI device information struct
3952 * ixgbe_remove is called by the PCI subsystem to alert the driver
3953 * that it should release a PCI device. The could be caused by a
3954 * Hot-Plug event, or because the driver is going to be removed from
3957 static void __devexit
ixgbe_remove(struct pci_dev
*pdev
)
3959 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3960 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3962 set_bit(__IXGBE_DOWN
, &adapter
->state
);
3963 del_timer_sync(&adapter
->watchdog_timer
);
3965 flush_scheduled_work();
3967 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
3968 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
3969 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
3970 dca_remove_requester(&pdev
->dev
);
3971 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
3975 unregister_netdev(netdev
);
3977 ixgbe_reset_interrupt_capability(adapter
);
3979 ixgbe_release_hw_control(adapter
);
3981 iounmap(adapter
->hw
.hw_addr
);
3982 pci_release_regions(pdev
);
3984 DPRINTK(PROBE
, INFO
, "complete\n");
3985 kfree(adapter
->tx_ring
);
3986 kfree(adapter
->rx_ring
);
3988 free_netdev(netdev
);
3990 pci_disable_device(pdev
);
3994 * ixgbe_io_error_detected - called when PCI error is detected
3995 * @pdev: Pointer to PCI device
3996 * @state: The current pci connection state
3998 * This function is called after a PCI bus error affecting
3999 * this device has been detected.
4001 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
4002 pci_channel_state_t state
)
4004 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4005 struct ixgbe_adapter
*adapter
= netdev
->priv
;
4007 netif_device_detach(netdev
);
4009 if (netif_running(netdev
))
4010 ixgbe_down(adapter
);
4011 pci_disable_device(pdev
);
4013 /* Request a slot slot reset. */
4014 return PCI_ERS_RESULT_NEED_RESET
;
4018 * ixgbe_io_slot_reset - called after the pci bus has been reset.
4019 * @pdev: Pointer to PCI device
4021 * Restart the card from scratch, as if from a cold-boot.
4023 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
4025 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4026 struct ixgbe_adapter
*adapter
= netdev
->priv
;
4028 if (pci_enable_device(pdev
)) {
4030 "Cannot re-enable PCI device after reset.\n");
4031 return PCI_ERS_RESULT_DISCONNECT
;
4033 pci_set_master(pdev
);
4034 pci_restore_state(pdev
);
4036 pci_enable_wake(pdev
, PCI_D3hot
, 0);
4037 pci_enable_wake(pdev
, PCI_D3cold
, 0);
4039 ixgbe_reset(adapter
);
4041 return PCI_ERS_RESULT_RECOVERED
;
4045 * ixgbe_io_resume - called when traffic can start flowing again.
4046 * @pdev: Pointer to PCI device
4048 * This callback is called when the error recovery driver tells us that
4049 * its OK to resume normal operation.
4051 static void ixgbe_io_resume(struct pci_dev
*pdev
)
4053 struct net_device
*netdev
= pci_get_drvdata(pdev
);
4054 struct ixgbe_adapter
*adapter
= netdev
->priv
;
4056 if (netif_running(netdev
)) {
4057 if (ixgbe_up(adapter
)) {
4058 DPRINTK(PROBE
, INFO
, "ixgbe_up failed after reset\n");
4063 netif_device_attach(netdev
);
4067 static struct pci_error_handlers ixgbe_err_handler
= {
4068 .error_detected
= ixgbe_io_error_detected
,
4069 .slot_reset
= ixgbe_io_slot_reset
,
4070 .resume
= ixgbe_io_resume
,
4073 static struct pci_driver ixgbe_driver
= {
4074 .name
= ixgbe_driver_name
,
4075 .id_table
= ixgbe_pci_tbl
,
4076 .probe
= ixgbe_probe
,
4077 .remove
= __devexit_p(ixgbe_remove
),
4079 .suspend
= ixgbe_suspend
,
4080 .resume
= ixgbe_resume
,
4082 .shutdown
= ixgbe_shutdown
,
4083 .err_handler
= &ixgbe_err_handler
4087 * ixgbe_init_module - Driver Registration Routine
4089 * ixgbe_init_module is the first routine called when the driver is
4090 * loaded. All it does is register with the PCI subsystem.
4092 static int __init
ixgbe_init_module(void)
4095 printk(KERN_INFO
"%s: %s - version %s\n", ixgbe_driver_name
,
4096 ixgbe_driver_string
, ixgbe_driver_version
);
4098 printk(KERN_INFO
"%s: %s\n", ixgbe_driver_name
, ixgbe_copyright
);
4100 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
4101 dca_register_notify(&dca_notifier
);
4104 ret
= pci_register_driver(&ixgbe_driver
);
4107 module_init(ixgbe_init_module
);
4110 * ixgbe_exit_module - Driver Exit Cleanup Routine
4112 * ixgbe_exit_module is called just before the driver is removed
4115 static void __exit
ixgbe_exit_module(void)
4117 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
4118 dca_unregister_notify(&dca_notifier
);
4120 pci_unregister_driver(&ixgbe_driver
);
4123 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
4124 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
4129 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
4130 __ixgbe_notify_dca
);
4132 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
4134 #endif /* CONFIG_DCA or CONFIG_DCA_MODULE */
4136 module_exit(ixgbe_exit_module
);