2 * linux/arch/arm/mach-integrator/core.c
4 * Copyright (C) 2000-2003 Deep Blue Solutions Ltd
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2, as
8 * published by the Free Software Foundation.
10 #include <linux/types.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/device.h>
14 #include <linux/spinlock.h>
15 #include <linux/interrupt.h>
16 #include <linux/irq.h>
17 #include <linux/sched.h>
18 #include <linux/smp.h>
19 #include <linux/termios.h>
20 #include <linux/amba/bus.h>
21 #include <linux/amba/serial.h>
24 #include <asm/clkdev.h>
25 #include <mach/clkdev.h>
26 #include <mach/hardware.h>
28 #include <asm/hardware/arm_timer.h>
30 #include <asm/system.h>
32 #include <asm/mach/time.h>
36 static struct amba_pl010_data integrator_uart_data
;
38 static struct amba_device rtc_device
= {
43 .start
= INTEGRATOR_RTC_BASE
,
44 .end
= INTEGRATOR_RTC_BASE
+ SZ_4K
- 1,
45 .flags
= IORESOURCE_MEM
,
47 .irq
= { IRQ_RTCINT
, NO_IRQ
},
48 .periphid
= 0x00041030,
51 static struct amba_device uart0_device
= {
54 .platform_data
= &integrator_uart_data
,
57 .start
= INTEGRATOR_UART0_BASE
,
58 .end
= INTEGRATOR_UART0_BASE
+ SZ_4K
- 1,
59 .flags
= IORESOURCE_MEM
,
61 .irq
= { IRQ_UARTINT0
, NO_IRQ
},
62 .periphid
= 0x0041010,
65 static struct amba_device uart1_device
= {
68 .platform_data
= &integrator_uart_data
,
71 .start
= INTEGRATOR_UART1_BASE
,
72 .end
= INTEGRATOR_UART1_BASE
+ SZ_4K
- 1,
73 .flags
= IORESOURCE_MEM
,
75 .irq
= { IRQ_UARTINT1
, NO_IRQ
},
76 .periphid
= 0x0041010,
79 static struct amba_device kmi0_device
= {
85 .end
= KMI0_BASE
+ SZ_4K
- 1,
86 .flags
= IORESOURCE_MEM
,
88 .irq
= { IRQ_KMIINT0
, NO_IRQ
},
89 .periphid
= 0x00041050,
92 static struct amba_device kmi1_device
= {
98 .end
= KMI1_BASE
+ SZ_4K
- 1,
99 .flags
= IORESOURCE_MEM
,
101 .irq
= { IRQ_KMIINT1
, NO_IRQ
},
102 .periphid
= 0x00041050,
105 static struct amba_device
*amba_devs
[] __initdata
= {
114 * These are fixed clocks.
116 static struct clk clk24mhz
= {
120 static struct clk uartclk
= {
124 static struct clk_lookup lookups
[] __initdata
= {
137 }, { /* MMCI - IntegratorCP */
143 static int __init
integrator_init(void)
147 for (i
= 0; i
< ARRAY_SIZE(lookups
); i
++)
148 clkdev_add(&lookups
[i
]);
150 for (i
= 0; i
< ARRAY_SIZE(amba_devs
); i
++) {
151 struct amba_device
*d
= amba_devs
[i
];
152 amba_device_register(d
, &iomem_resource
);
158 arch_initcall(integrator_init
);
161 * On the Integrator platform, the port RTS and DTR are provided by
162 * bits in the following SC_CTRLS register bits:
167 #define SC_CTRLC (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLC_OFFSET)
168 #define SC_CTRLS (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLS_OFFSET)
170 static void integrator_uart_set_mctrl(struct amba_device
*dev
, void __iomem
*base
, unsigned int mctrl
)
172 unsigned int ctrls
= 0, ctrlc
= 0, rts_mask
, dtr_mask
;
174 if (dev
== &uart0_device
) {
182 if (mctrl
& TIOCM_RTS
)
187 if (mctrl
& TIOCM_DTR
)
192 __raw_writel(ctrls
, SC_CTRLS
);
193 __raw_writel(ctrlc
, SC_CTRLC
);
196 static struct amba_pl010_data integrator_uart_data
= {
197 .set_mctrl
= integrator_uart_set_mctrl
,
200 #define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_CTRL_OFFSET
202 static DEFINE_SPINLOCK(cm_lock
);
205 * cm_control - update the CM_CTRL register.
206 * @mask: bits to change
209 void cm_control(u32 mask
, u32 set
)
214 spin_lock_irqsave(&cm_lock
, flags
);
215 val
= readl(CM_CTRL
) & ~mask
;
216 writel(val
| set
, CM_CTRL
);
217 spin_unlock_irqrestore(&cm_lock
, flags
);
220 EXPORT_SYMBOL(cm_control
);
223 * Where is the timer (VA)?
225 #define TIMER0_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000000)
226 #define TIMER1_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000100)
227 #define TIMER2_VA_BASE (IO_ADDRESS(INTEGRATOR_CT_BASE)+0x00000200)
228 #define VA_IC_BASE IO_ADDRESS(INTEGRATOR_IC_BASE)
231 * How long is the timer interval?
233 #define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_10)
234 #if TIMER_INTERVAL >= 0x100000
235 #define TICKS2USECS(x) (256 * (x) / TICKS_PER_uSEC)
236 #elif TIMER_INTERVAL >= 0x10000
237 #define TICKS2USECS(x) (16 * (x) / TICKS_PER_uSEC)
239 #define TICKS2USECS(x) ((x) / TICKS_PER_uSEC)
242 static unsigned long timer_reload
;
245 * Returns number of ms since last clock interrupt. Note that interrupts
246 * will have been disabled by do_gettimeoffset()
248 unsigned long integrator_gettimeoffset(void)
250 unsigned long ticks1
, ticks2
, status
;
253 * Get the current number of ticks. Note that there is a race
254 * condition between us reading the timer and checking for
255 * an interrupt. We get around this by ensuring that the
256 * counter has not reloaded between our two reads.
258 ticks2
= readl(TIMER1_VA_BASE
+ TIMER_VALUE
) & 0xffff;
261 status
= __raw_readl(VA_IC_BASE
+ IRQ_RAW_STATUS
);
262 ticks2
= readl(TIMER1_VA_BASE
+ TIMER_VALUE
) & 0xffff;
263 } while (ticks2
> ticks1
);
266 * Number of ticks since last interrupt.
268 ticks1
= timer_reload
- ticks2
;
271 * Interrupt pending? If so, we've reloaded once already.
273 if (status
& (1 << IRQ_TIMERINT1
))
274 ticks1
+= timer_reload
;
277 * Convert the ticks to usecs
279 return TICKS2USECS(ticks1
);
283 * IRQ handler for the timer
286 integrator_timer_interrupt(int irq
, void *dev_id
)
289 * clear the interrupt
291 writel(1, TIMER1_VA_BASE
+ TIMER_INTCLR
);
298 static struct irqaction integrator_timer_irq
= {
299 .name
= "Integrator Timer Tick",
300 .flags
= IRQF_DISABLED
| IRQF_TIMER
| IRQF_IRQPOLL
,
301 .handler
= integrator_timer_interrupt
,
305 * Set up timer interrupt, and return the current time in seconds.
307 void __init
integrator_time_init(unsigned long reload
, unsigned int ctrl
)
309 unsigned int timer_ctrl
= TIMER_CTRL_ENABLE
| TIMER_CTRL_PERIODIC
;
311 timer_reload
= reload
;
314 if (timer_reload
> 0x100000) {
316 timer_ctrl
|= TIMER_CTRL_DIV256
;
317 } else if (timer_reload
> 0x010000) {
319 timer_ctrl
|= TIMER_CTRL_DIV16
;
323 * Initialise to a known state (all timers off)
325 writel(0, TIMER0_VA_BASE
+ TIMER_CTRL
);
326 writel(0, TIMER1_VA_BASE
+ TIMER_CTRL
);
327 writel(0, TIMER2_VA_BASE
+ TIMER_CTRL
);
329 writel(timer_reload
, TIMER1_VA_BASE
+ TIMER_LOAD
);
330 writel(timer_reload
, TIMER1_VA_BASE
+ TIMER_VALUE
);
331 writel(timer_ctrl
, TIMER1_VA_BASE
+ TIMER_CTRL
);
334 * Make irqs happen for the system timer
336 setup_irq(IRQ_TIMERINT1
, &integrator_timer_irq
);