2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/acpi.h>
38 #include <linux/dmi.h>
39 #include <linux/moduleparam.h>
40 #include <linux/sched.h> /* need_resched() */
41 #include <linux/latency.h>
44 #include <asm/uaccess.h>
46 #include <acpi/acpi_bus.h>
47 #include <acpi/processor.h>
49 #define ACPI_PROCESSOR_COMPONENT 0x01000000
50 #define ACPI_PROCESSOR_CLASS "processor"
51 #define ACPI_PROCESSOR_DRIVER_NAME "ACPI Processor Driver"
52 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
53 ACPI_MODULE_NAME("acpi_processor")
54 #define ACPI_PROCESSOR_FILE_POWER "power"
55 #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
56 #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */
57 #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */
58 static void (*pm_idle_save
) (void) __read_mostly
;
59 module_param(max_cstate
, uint
, 0644);
61 static unsigned int nocst __read_mostly
;
62 module_param(nocst
, uint
, 0000);
65 * bm_history -- bit-mask with a bit per jiffy of bus-master activity
66 * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
67 * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
68 * 100 HZ: 0x0000000F: 4 jiffies = 40ms
69 * reduce history for more aggressive entry into C3
71 static unsigned int bm_history __read_mostly
=
72 (HZ
>= 800 ? 0xFFFFFFFF : ((1U << (HZ
/ 25)) - 1));
73 module_param(bm_history
, uint
, 0644);
74 /* --------------------------------------------------------------------------
76 -------------------------------------------------------------------------- */
79 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
80 * For now disable this. Probably a bug somewhere else.
82 * To skip this limit, boot/load with a large max_cstate limit.
84 static int set_max_cstate(struct dmi_system_id
*id
)
86 if (max_cstate
> ACPI_PROCESSOR_MAX_POWER
)
89 printk(KERN_NOTICE PREFIX
"%s detected - limiting to C%ld max_cstate."
90 " Override with \"processor.max_cstate=%d\"\n", id
->ident
,
91 (long)id
->driver_data
, ACPI_PROCESSOR_MAX_POWER
+ 1);
93 max_cstate
= (long)id
->driver_data
;
98 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
99 callers to only run once -AK */
100 static struct dmi_system_id __cpuinitdata processor_power_dmi_table
[] = {
101 { set_max_cstate
, "IBM ThinkPad R40e", {
102 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
103 DMI_MATCH(DMI_BIOS_VERSION
,"1SET70WW")}, (void *)1},
104 { set_max_cstate
, "IBM ThinkPad R40e", {
105 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
106 DMI_MATCH(DMI_BIOS_VERSION
,"1SET60WW")}, (void *)1},
107 { set_max_cstate
, "IBM ThinkPad R40e", {
108 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
109 DMI_MATCH(DMI_BIOS_VERSION
,"1SET43WW") }, (void*)1},
110 { set_max_cstate
, "IBM ThinkPad R40e", {
111 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
112 DMI_MATCH(DMI_BIOS_VERSION
,"1SET45WW") }, (void*)1},
113 { set_max_cstate
, "IBM ThinkPad R40e", {
114 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
115 DMI_MATCH(DMI_BIOS_VERSION
,"1SET47WW") }, (void*)1},
116 { set_max_cstate
, "IBM ThinkPad R40e", {
117 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
118 DMI_MATCH(DMI_BIOS_VERSION
,"1SET50WW") }, (void*)1},
119 { set_max_cstate
, "IBM ThinkPad R40e", {
120 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
121 DMI_MATCH(DMI_BIOS_VERSION
,"1SET52WW") }, (void*)1},
122 { set_max_cstate
, "IBM ThinkPad R40e", {
123 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
124 DMI_MATCH(DMI_BIOS_VERSION
,"1SET55WW") }, (void*)1},
125 { set_max_cstate
, "IBM ThinkPad R40e", {
126 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
127 DMI_MATCH(DMI_BIOS_VERSION
,"1SET56WW") }, (void*)1},
128 { set_max_cstate
, "IBM ThinkPad R40e", {
129 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
130 DMI_MATCH(DMI_BIOS_VERSION
,"1SET59WW") }, (void*)1},
131 { set_max_cstate
, "IBM ThinkPad R40e", {
132 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
133 DMI_MATCH(DMI_BIOS_VERSION
,"1SET60WW") }, (void*)1},
134 { set_max_cstate
, "IBM ThinkPad R40e", {
135 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
136 DMI_MATCH(DMI_BIOS_VERSION
,"1SET61WW") }, (void*)1},
137 { set_max_cstate
, "IBM ThinkPad R40e", {
138 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
139 DMI_MATCH(DMI_BIOS_VERSION
,"1SET62WW") }, (void*)1},
140 { set_max_cstate
, "IBM ThinkPad R40e", {
141 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
142 DMI_MATCH(DMI_BIOS_VERSION
,"1SET64WW") }, (void*)1},
143 { set_max_cstate
, "IBM ThinkPad R40e", {
144 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
145 DMI_MATCH(DMI_BIOS_VERSION
,"1SET65WW") }, (void*)1},
146 { set_max_cstate
, "IBM ThinkPad R40e", {
147 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
148 DMI_MATCH(DMI_BIOS_VERSION
,"1SET68WW") }, (void*)1},
149 { set_max_cstate
, "Medion 41700", {
150 DMI_MATCH(DMI_BIOS_VENDOR
,"Phoenix Technologies LTD"),
151 DMI_MATCH(DMI_BIOS_VERSION
,"R01-A1J")}, (void *)1},
152 { set_max_cstate
, "Clevo 5600D", {
153 DMI_MATCH(DMI_BIOS_VENDOR
,"Phoenix Technologies LTD"),
154 DMI_MATCH(DMI_BIOS_VERSION
,"SHE845M0.86C.0013.D.0302131307")},
159 static inline u32
ticks_elapsed(u32 t1
, u32 t2
)
163 else if (!acpi_fadt
.tmr_val_ext
)
164 return (((0x00FFFFFF - t1
) + t2
) & 0x00FFFFFF);
166 return ((0xFFFFFFFF - t1
) + t2
);
170 acpi_processor_power_activate(struct acpi_processor
*pr
,
171 struct acpi_processor_cx
*new)
173 struct acpi_processor_cx
*old
;
178 old
= pr
->power
.state
;
181 old
->promotion
.count
= 0;
182 new->demotion
.count
= 0;
184 /* Cleanup from old state. */
188 /* Disable bus master reload */
189 if (new->type
!= ACPI_STATE_C3
&& pr
->flags
.bm_check
)
190 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD
, 0,
191 ACPI_MTX_DO_NOT_LOCK
);
196 /* Prepare to use new state. */
199 /* Enable bus master reload */
200 if (old
->type
!= ACPI_STATE_C3
&& pr
->flags
.bm_check
)
201 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD
, 1,
202 ACPI_MTX_DO_NOT_LOCK
);
206 pr
->power
.state
= new;
211 static void acpi_safe_halt(void)
213 current_thread_info()->status
&= ~TS_POLLING
;
214 smp_mb__after_clear_bit();
217 current_thread_info()->status
|= TS_POLLING
;
220 static atomic_t c3_cpu_count
;
222 static void acpi_processor_idle(void)
224 struct acpi_processor
*pr
= NULL
;
225 struct acpi_processor_cx
*cx
= NULL
;
226 struct acpi_processor_cx
*next_state
= NULL
;
230 pr
= processors
[smp_processor_id()];
235 * Interrupts must be disabled during bus mastering calculations and
236 * for C2/C3 transitions.
241 * Check whether we truly need to go idle, or should
244 if (unlikely(need_resched())) {
249 cx
= pr
->power
.state
;
261 * Check for bus mastering activity (if required), record, and check
264 if (pr
->flags
.bm_check
) {
266 unsigned long diff
= jiffies
- pr
->power
.bm_check_timestamp
;
271 pr
->power
.bm_activity
<<= diff
;
273 acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS
,
274 &bm_status
, ACPI_MTX_DO_NOT_LOCK
);
276 pr
->power
.bm_activity
|= 0x1;
277 acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS
,
278 1, ACPI_MTX_DO_NOT_LOCK
);
281 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
282 * the true state of bus mastering activity; forcing us to
283 * manually check the BMIDEA bit of each IDE channel.
285 else if (errata
.piix4
.bmisx
) {
286 if ((inb_p(errata
.piix4
.bmisx
+ 0x02) & 0x01)
287 || (inb_p(errata
.piix4
.bmisx
+ 0x0A) & 0x01))
288 pr
->power
.bm_activity
|= 0x1;
291 pr
->power
.bm_check_timestamp
= jiffies
;
294 * If bus mastering is or was active this jiffy, demote
295 * to avoid a faulty transition. Note that the processor
296 * won't enter a low-power state during this call (to this
297 * function) but should upon the next.
299 * TBD: A better policy might be to fallback to the demotion
300 * state (use it for this quantum only) istead of
301 * demoting -- and rely on duration as our sole demotion
302 * qualification. This may, however, introduce DMA
303 * issues (e.g. floppy DMA transfer overrun/underrun).
305 if ((pr
->power
.bm_activity
& 0x1) &&
306 cx
->demotion
.threshold
.bm
) {
308 next_state
= cx
->demotion
.state
;
313 #ifdef CONFIG_HOTPLUG_CPU
315 * Check for P_LVL2_UP flag before entering C2 and above on
316 * an SMP system. We do it here instead of doing it at _CST/P_LVL
317 * detection phase, to work cleanly with logical CPU hotplug.
319 if ((cx
->type
!= ACPI_STATE_C1
) && (num_online_cpus() > 1) &&
320 !pr
->flags
.has_cst
&& !acpi_fadt
.plvl2_up
)
321 cx
= &pr
->power
.states
[ACPI_STATE_C1
];
327 * Invoke the current Cx state to put the processor to sleep.
329 if (cx
->type
== ACPI_STATE_C2
|| cx
->type
== ACPI_STATE_C3
) {
330 current_thread_info()->status
&= ~TS_POLLING
;
331 smp_mb__after_clear_bit();
332 if (need_resched()) {
333 current_thread_info()->status
|= TS_POLLING
;
344 * Use the appropriate idle routine, the one that would
345 * be used without acpi C-states.
353 * TBD: Can't get time duration while in C1, as resumes
354 * go to an ISR rather than here. Need to instrument
355 * base interrupt handler.
357 sleep_ticks
= 0xFFFFFFFF;
361 /* Get start time (ticks) */
362 t1
= inl(acpi_fadt
.xpm_tmr_blk
.address
);
365 /* Dummy wait op - must do something useless after P_LVL2 read
366 because chipsets cannot guarantee that STPCLK# signal
367 gets asserted in time to freeze execution properly. */
368 t2
= inl(acpi_fadt
.xpm_tmr_blk
.address
);
369 /* Get end time (ticks) */
370 t2
= inl(acpi_fadt
.xpm_tmr_blk
.address
);
372 #ifdef CONFIG_GENERIC_TIME
373 /* TSC halts in C2, so notify users */
376 /* Re-enable interrupts */
378 current_thread_info()->status
|= TS_POLLING
;
379 /* Compute time (ticks) that we were actually asleep */
381 ticks_elapsed(t1
, t2
) - cx
->latency_ticks
- C2_OVERHEAD
;
386 if (pr
->flags
.bm_check
) {
387 if (atomic_inc_return(&c3_cpu_count
) ==
390 * All CPUs are trying to go to C3
391 * Disable bus master arbitration
393 acpi_set_register(ACPI_BITREG_ARB_DISABLE
, 1,
394 ACPI_MTX_DO_NOT_LOCK
);
397 /* SMP with no shared cache... Invalidate cache */
398 ACPI_FLUSH_CPU_CACHE();
401 /* Get start time (ticks) */
402 t1
= inl(acpi_fadt
.xpm_tmr_blk
.address
);
405 /* Dummy wait op (see above) */
406 t2
= inl(acpi_fadt
.xpm_tmr_blk
.address
);
407 /* Get end time (ticks) */
408 t2
= inl(acpi_fadt
.xpm_tmr_blk
.address
);
409 if (pr
->flags
.bm_check
) {
410 /* Enable bus master arbitration */
411 atomic_dec(&c3_cpu_count
);
412 acpi_set_register(ACPI_BITREG_ARB_DISABLE
, 0,
413 ACPI_MTX_DO_NOT_LOCK
);
416 #ifdef CONFIG_GENERIC_TIME
417 /* TSC halts in C3, so notify users */
420 /* Re-enable interrupts */
422 current_thread_info()->status
|= TS_POLLING
;
423 /* Compute time (ticks) that we were actually asleep */
425 ticks_elapsed(t1
, t2
) - cx
->latency_ticks
- C3_OVERHEAD
;
433 if ((cx
->type
!= ACPI_STATE_C1
) && (sleep_ticks
> 0))
434 cx
->time
+= sleep_ticks
;
436 next_state
= pr
->power
.state
;
438 #ifdef CONFIG_HOTPLUG_CPU
439 /* Don't do promotion/demotion */
440 if ((cx
->type
== ACPI_STATE_C1
) && (num_online_cpus() > 1) &&
441 !pr
->flags
.has_cst
&& !acpi_fadt
.plvl2_up
) {
450 * Track the number of longs (time asleep is greater than threshold)
451 * and promote when the count threshold is reached. Note that bus
452 * mastering activity may prevent promotions.
453 * Do not promote above max_cstate.
455 if (cx
->promotion
.state
&&
456 ((cx
->promotion
.state
- pr
->power
.states
) <= max_cstate
)) {
457 if (sleep_ticks
> cx
->promotion
.threshold
.ticks
&&
458 cx
->promotion
.state
->latency
<= system_latency_constraint()) {
459 cx
->promotion
.count
++;
460 cx
->demotion
.count
= 0;
461 if (cx
->promotion
.count
>=
462 cx
->promotion
.threshold
.count
) {
463 if (pr
->flags
.bm_check
) {
465 (pr
->power
.bm_activity
& cx
->
466 promotion
.threshold
.bm
)) {
472 next_state
= cx
->promotion
.state
;
482 * Track the number of shorts (time asleep is less than time threshold)
483 * and demote when the usage threshold is reached.
485 if (cx
->demotion
.state
) {
486 if (sleep_ticks
< cx
->demotion
.threshold
.ticks
) {
487 cx
->demotion
.count
++;
488 cx
->promotion
.count
= 0;
489 if (cx
->demotion
.count
>= cx
->demotion
.threshold
.count
) {
490 next_state
= cx
->demotion
.state
;
498 * Demote if current state exceeds max_cstate
499 * or if the latency of the current state is unacceptable
501 if ((pr
->power
.state
- pr
->power
.states
) > max_cstate
||
502 pr
->power
.state
->latency
> system_latency_constraint()) {
503 if (cx
->demotion
.state
)
504 next_state
= cx
->demotion
.state
;
510 * If we're going to start using a new Cx state we must clean up
511 * from the previous and prepare to use the new.
513 if (next_state
!= pr
->power
.state
)
514 acpi_processor_power_activate(pr
, next_state
);
517 static int acpi_processor_set_power_policy(struct acpi_processor
*pr
)
520 unsigned int state_is_set
= 0;
521 struct acpi_processor_cx
*lower
= NULL
;
522 struct acpi_processor_cx
*higher
= NULL
;
523 struct acpi_processor_cx
*cx
;
530 * This function sets the default Cx state policy (OS idle handler).
531 * Our scheme is to promote quickly to C2 but more conservatively
532 * to C3. We're favoring C2 for its characteristics of low latency
533 * (quick response), good power savings, and ability to allow bus
534 * mastering activity. Note that the Cx state policy is completely
535 * customizable and can be altered dynamically.
539 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
540 cx
= &pr
->power
.states
[i
];
545 pr
->power
.state
= cx
;
554 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
555 cx
= &pr
->power
.states
[i
];
560 cx
->demotion
.state
= lower
;
561 cx
->demotion
.threshold
.ticks
= cx
->latency_ticks
;
562 cx
->demotion
.threshold
.count
= 1;
563 if (cx
->type
== ACPI_STATE_C3
)
564 cx
->demotion
.threshold
.bm
= bm_history
;
571 for (i
= (ACPI_PROCESSOR_MAX_POWER
- 1); i
> 0; i
--) {
572 cx
= &pr
->power
.states
[i
];
577 cx
->promotion
.state
= higher
;
578 cx
->promotion
.threshold
.ticks
= cx
->latency_ticks
;
579 if (cx
->type
>= ACPI_STATE_C2
)
580 cx
->promotion
.threshold
.count
= 4;
582 cx
->promotion
.threshold
.count
= 10;
583 if (higher
->type
== ACPI_STATE_C3
)
584 cx
->promotion
.threshold
.bm
= bm_history
;
593 static int acpi_processor_get_power_info_fadt(struct acpi_processor
*pr
)
602 /* if info is obtained from pblk/fadt, type equals state */
603 pr
->power
.states
[ACPI_STATE_C2
].type
= ACPI_STATE_C2
;
604 pr
->power
.states
[ACPI_STATE_C3
].type
= ACPI_STATE_C3
;
606 #ifndef CONFIG_HOTPLUG_CPU
608 * Check for P_LVL2_UP flag before entering C2 and above on
611 if ((num_online_cpus() > 1) && !acpi_fadt
.plvl2_up
)
615 /* determine C2 and C3 address from pblk */
616 pr
->power
.states
[ACPI_STATE_C2
].address
= pr
->pblk
+ 4;
617 pr
->power
.states
[ACPI_STATE_C3
].address
= pr
->pblk
+ 5;
619 /* determine latencies from FADT */
620 pr
->power
.states
[ACPI_STATE_C2
].latency
= acpi_fadt
.plvl2_lat
;
621 pr
->power
.states
[ACPI_STATE_C3
].latency
= acpi_fadt
.plvl3_lat
;
623 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
624 "lvl2[0x%08x] lvl3[0x%08x]\n",
625 pr
->power
.states
[ACPI_STATE_C2
].address
,
626 pr
->power
.states
[ACPI_STATE_C3
].address
));
631 static int acpi_processor_get_power_info_default_c1(struct acpi_processor
*pr
)
634 /* Zero initialize all the C-states info. */
635 memset(pr
->power
.states
, 0, sizeof(pr
->power
.states
));
637 /* set the first C-State to C1 */
638 pr
->power
.states
[ACPI_STATE_C1
].type
= ACPI_STATE_C1
;
640 /* the C0 state only exists as a filler in our array,
641 * and all processors need to support C1 */
642 pr
->power
.states
[ACPI_STATE_C0
].valid
= 1;
643 pr
->power
.states
[ACPI_STATE_C1
].valid
= 1;
648 static int acpi_processor_get_power_info_cst(struct acpi_processor
*pr
)
650 acpi_status status
= 0;
654 struct acpi_buffer buffer
= { ACPI_ALLOCATE_BUFFER
, NULL
};
655 union acpi_object
*cst
;
663 /* Zero initialize C2 onwards and prepare for fresh CST lookup */
664 for (i
= 2; i
< ACPI_PROCESSOR_MAX_POWER
; i
++)
665 memset(&(pr
->power
.states
[i
]), 0,
666 sizeof(struct acpi_processor_cx
));
668 status
= acpi_evaluate_object(pr
->handle
, "_CST", NULL
, &buffer
);
669 if (ACPI_FAILURE(status
)) {
670 ACPI_DEBUG_PRINT((ACPI_DB_INFO
, "No _CST, giving up\n"));
674 cst
= buffer
.pointer
;
676 /* There must be at least 2 elements */
677 if (!cst
|| (cst
->type
!= ACPI_TYPE_PACKAGE
) || cst
->package
.count
< 2) {
678 printk(KERN_ERR PREFIX
"not enough elements in _CST\n");
683 count
= cst
->package
.elements
[0].integer
.value
;
685 /* Validate number of power states. */
686 if (count
< 1 || count
!= cst
->package
.count
- 1) {
687 printk(KERN_ERR PREFIX
"count given by _CST is not valid\n");
692 /* Tell driver that at least _CST is supported. */
693 pr
->flags
.has_cst
= 1;
695 for (i
= 1; i
<= count
; i
++) {
696 union acpi_object
*element
;
697 union acpi_object
*obj
;
698 struct acpi_power_register
*reg
;
699 struct acpi_processor_cx cx
;
701 memset(&cx
, 0, sizeof(cx
));
703 element
= &(cst
->package
.elements
[i
]);
704 if (element
->type
!= ACPI_TYPE_PACKAGE
)
707 if (element
->package
.count
!= 4)
710 obj
= &(element
->package
.elements
[0]);
712 if (obj
->type
!= ACPI_TYPE_BUFFER
)
715 reg
= (struct acpi_power_register
*)obj
->buffer
.pointer
;
717 if (reg
->space_id
!= ACPI_ADR_SPACE_SYSTEM_IO
&&
718 (reg
->space_id
!= ACPI_ADR_SPACE_FIXED_HARDWARE
))
721 cx
.address
= (reg
->space_id
== ACPI_ADR_SPACE_FIXED_HARDWARE
) ?
724 /* There should be an easy way to extract an integer... */
725 obj
= &(element
->package
.elements
[1]);
726 if (obj
->type
!= ACPI_TYPE_INTEGER
)
729 cx
.type
= obj
->integer
.value
;
731 if ((cx
.type
!= ACPI_STATE_C1
) &&
732 (reg
->space_id
!= ACPI_ADR_SPACE_SYSTEM_IO
))
735 if ((cx
.type
< ACPI_STATE_C2
) || (cx
.type
> ACPI_STATE_C3
))
738 obj
= &(element
->package
.elements
[2]);
739 if (obj
->type
!= ACPI_TYPE_INTEGER
)
742 cx
.latency
= obj
->integer
.value
;
744 obj
= &(element
->package
.elements
[3]);
745 if (obj
->type
!= ACPI_TYPE_INTEGER
)
748 cx
.power
= obj
->integer
.value
;
751 memcpy(&(pr
->power
.states
[current_count
]), &cx
, sizeof(cx
));
754 * We support total ACPI_PROCESSOR_MAX_POWER - 1
755 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
757 if (current_count
>= (ACPI_PROCESSOR_MAX_POWER
- 1)) {
759 "Limiting number of power states to max (%d)\n",
760 ACPI_PROCESSOR_MAX_POWER
);
762 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
767 ACPI_DEBUG_PRINT((ACPI_DB_INFO
, "Found %d power states\n",
770 /* Validate number of power states discovered */
771 if (current_count
< 2)
775 kfree(buffer
.pointer
);
780 static void acpi_processor_power_verify_c2(struct acpi_processor_cx
*cx
)
787 * C2 latency must be less than or equal to 100
790 else if (cx
->latency
> ACPI_PROCESSOR_MAX_C2_LATENCY
) {
791 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
792 "latency too large [%d]\n", cx
->latency
));
797 * Otherwise we've met all of our C2 requirements.
798 * Normalize the C2 latency to expidite policy
801 cx
->latency_ticks
= US_TO_PM_TIMER_TICKS(cx
->latency
);
806 static void acpi_processor_power_verify_c3(struct acpi_processor
*pr
,
807 struct acpi_processor_cx
*cx
)
809 static int bm_check_flag
;
816 * C3 latency must be less than or equal to 1000
819 else if (cx
->latency
> ACPI_PROCESSOR_MAX_C3_LATENCY
) {
820 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
821 "latency too large [%d]\n", cx
->latency
));
826 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
827 * DMA transfers are used by any ISA device to avoid livelock.
828 * Note that we could disable Type-F DMA (as recommended by
829 * the erratum), but this is known to disrupt certain ISA
830 * devices thus we take the conservative approach.
832 else if (errata
.piix4
.fdma
) {
833 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
834 "C3 not supported on PIIX4 with Type-F DMA\n"));
838 /* All the logic here assumes flags.bm_check is same across all CPUs */
839 if (!bm_check_flag
) {
840 /* Determine whether bm_check is needed based on CPU */
841 acpi_processor_power_init_bm_check(&(pr
->flags
), pr
->id
);
842 bm_check_flag
= pr
->flags
.bm_check
;
844 pr
->flags
.bm_check
= bm_check_flag
;
847 if (pr
->flags
.bm_check
) {
848 /* bus mastering control is necessary */
849 if (!pr
->flags
.bm_control
) {
850 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
851 "C3 support requires bus mastering control\n"));
856 * WBINVD should be set in fadt, for C3 state to be
857 * supported on when bm_check is not required.
859 if (acpi_fadt
.wb_invd
!= 1) {
860 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
861 "Cache invalidation should work properly"
862 " for C3 to be enabled on SMP systems\n"));
865 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD
,
866 0, ACPI_MTX_DO_NOT_LOCK
);
870 * Otherwise we've met all of our C3 requirements.
871 * Normalize the C3 latency to expidite policy. Enable
872 * checking of bus mastering status (bm_check) so we can
873 * use this in our C3 policy
876 cx
->latency_ticks
= US_TO_PM_TIMER_TICKS(cx
->latency
);
881 static int acpi_processor_power_verify(struct acpi_processor
*pr
)
884 unsigned int working
= 0;
886 #ifdef ARCH_APICTIMER_STOPS_ON_C3
887 int timer_broadcast
= 0;
888 cpumask_t mask
= cpumask_of_cpu(pr
->id
);
889 on_each_cpu(switch_ipi_to_APIC_timer
, &mask
, 1, 1);
892 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
893 struct acpi_processor_cx
*cx
= &pr
->power
.states
[i
];
901 acpi_processor_power_verify_c2(cx
);
902 #ifdef ARCH_APICTIMER_STOPS_ON_C3
903 /* Some AMD systems fake C3 as C2, but still
904 have timer troubles */
906 boot_cpu_data
.x86_vendor
== X86_VENDOR_AMD
)
912 acpi_processor_power_verify_c3(pr
, cx
);
913 #ifdef ARCH_APICTIMER_STOPS_ON_C3
924 #ifdef ARCH_APICTIMER_STOPS_ON_C3
926 on_each_cpu(switch_APIC_timer_to_ipi
, &mask
, 1, 1);
932 static int acpi_processor_get_power_info(struct acpi_processor
*pr
)
938 /* NOTE: the idle thread may not be running while calling
941 /* Adding C1 state */
942 acpi_processor_get_power_info_default_c1(pr
);
943 result
= acpi_processor_get_power_info_cst(pr
);
944 if (result
== -ENODEV
)
945 acpi_processor_get_power_info_fadt(pr
);
947 pr
->power
.count
= acpi_processor_power_verify(pr
);
952 * Now that we know which states are supported, set the default
953 * policy. Note that this policy can be changed dynamically
954 * (e.g. encourage deeper sleeps to conserve battery life when
957 result
= acpi_processor_set_power_policy(pr
);
962 * if one state of type C2 or C3 is available, mark this
963 * CPU as being "idle manageable"
965 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
966 if (pr
->power
.states
[i
].valid
) {
968 if (pr
->power
.states
[i
].type
>= ACPI_STATE_C2
)
976 int acpi_processor_cst_has_changed(struct acpi_processor
*pr
)
988 if (!pr
->flags
.power_setup_done
)
991 /* Fall back to the default idle loop */
992 pm_idle
= pm_idle_save
;
993 synchronize_sched(); /* Relies on interrupts forcing exit from idle. */
996 result
= acpi_processor_get_power_info(pr
);
997 if ((pr
->flags
.power
== 1) && (pr
->flags
.power_setup_done
))
998 pm_idle
= acpi_processor_idle
;
1003 /* proc interface */
1005 static int acpi_processor_power_seq_show(struct seq_file
*seq
, void *offset
)
1007 struct acpi_processor
*pr
= seq
->private;
1014 seq_printf(seq
, "active state: C%zd\n"
1016 "bus master activity: %08x\n"
1017 "maximum allowed latency: %d usec\n",
1018 pr
->power
.state
? pr
->power
.state
- pr
->power
.states
: 0,
1019 max_cstate
, (unsigned)pr
->power
.bm_activity
,
1020 system_latency_constraint());
1022 seq_puts(seq
, "states:\n");
1024 for (i
= 1; i
<= pr
->power
.count
; i
++) {
1025 seq_printf(seq
, " %cC%d: ",
1026 (&pr
->power
.states
[i
] ==
1027 pr
->power
.state
? '*' : ' '), i
);
1029 if (!pr
->power
.states
[i
].valid
) {
1030 seq_puts(seq
, "<not supported>\n");
1034 switch (pr
->power
.states
[i
].type
) {
1036 seq_printf(seq
, "type[C1] ");
1039 seq_printf(seq
, "type[C2] ");
1042 seq_printf(seq
, "type[C3] ");
1045 seq_printf(seq
, "type[--] ");
1049 if (pr
->power
.states
[i
].promotion
.state
)
1050 seq_printf(seq
, "promotion[C%zd] ",
1051 (pr
->power
.states
[i
].promotion
.state
-
1054 seq_puts(seq
, "promotion[--] ");
1056 if (pr
->power
.states
[i
].demotion
.state
)
1057 seq_printf(seq
, "demotion[C%zd] ",
1058 (pr
->power
.states
[i
].demotion
.state
-
1061 seq_puts(seq
, "demotion[--] ");
1063 seq_printf(seq
, "latency[%03d] usage[%08d] duration[%020llu]\n",
1064 pr
->power
.states
[i
].latency
,
1065 pr
->power
.states
[i
].usage
,
1066 pr
->power
.states
[i
].time
);
1073 static int acpi_processor_power_open_fs(struct inode
*inode
, struct file
*file
)
1075 return single_open(file
, acpi_processor_power_seq_show
,
1079 static const struct file_operations acpi_processor_power_fops
= {
1080 .open
= acpi_processor_power_open_fs
,
1082 .llseek
= seq_lseek
,
1083 .release
= single_release
,
1086 static void smp_callback(void *v
)
1088 /* we already woke the CPU up, nothing more to do */
1092 * This function gets called when a part of the kernel has a new latency
1093 * requirement. This means we need to get all processors out of their C-state,
1094 * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that
1095 * wakes them all right up.
1097 static int acpi_processor_latency_notify(struct notifier_block
*b
,
1098 unsigned long l
, void *v
)
1100 smp_call_function(smp_callback
, NULL
, 0, 1);
1104 static struct notifier_block acpi_processor_latency_notifier
= {
1105 .notifier_call
= acpi_processor_latency_notify
,
1108 int acpi_processor_power_init(struct acpi_processor
*pr
,
1109 struct acpi_device
*device
)
1111 acpi_status status
= 0;
1112 static int first_run
;
1113 struct proc_dir_entry
*entry
= NULL
;
1118 dmi_check_system(processor_power_dmi_table
);
1119 if (max_cstate
< ACPI_C_STATES_MAX
)
1121 "ACPI: processor limited to max C-state %d\n",
1124 register_latency_notifier(&acpi_processor_latency_notifier
);
1130 if (acpi_fadt
.cst_cnt
&& !nocst
) {
1132 acpi_os_write_port(acpi_fadt
.smi_cmd
, acpi_fadt
.cst_cnt
, 8);
1133 if (ACPI_FAILURE(status
)) {
1134 ACPI_EXCEPTION((AE_INFO
, status
,
1135 "Notifying BIOS of _CST ability failed"));
1139 acpi_processor_get_power_info(pr
);
1142 * Install the idle handler if processor power management is supported.
1143 * Note that we use previously set idle handler will be used on
1144 * platforms that only support C1.
1146 if ((pr
->flags
.power
) && (!boot_option_idle_override
)) {
1147 printk(KERN_INFO PREFIX
"CPU%d (power states:", pr
->id
);
1148 for (i
= 1; i
<= pr
->power
.count
; i
++)
1149 if (pr
->power
.states
[i
].valid
)
1150 printk(" C%d[C%d]", i
,
1151 pr
->power
.states
[i
].type
);
1155 pm_idle_save
= pm_idle
;
1156 pm_idle
= acpi_processor_idle
;
1161 entry
= create_proc_entry(ACPI_PROCESSOR_FILE_POWER
,
1162 S_IRUGO
, acpi_device_dir(device
));
1166 entry
->proc_fops
= &acpi_processor_power_fops
;
1167 entry
->data
= acpi_driver_data(device
);
1168 entry
->owner
= THIS_MODULE
;
1171 pr
->flags
.power_setup_done
= 1;
1176 int acpi_processor_power_exit(struct acpi_processor
*pr
,
1177 struct acpi_device
*device
)
1180 pr
->flags
.power_setup_done
= 0;
1182 if (acpi_device_dir(device
))
1183 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER
,
1184 acpi_device_dir(device
));
1186 /* Unregister the idle handler when processor #0 is removed. */
1188 pm_idle
= pm_idle_save
;
1191 * We are about to unload the current idle thread pm callback
1192 * (pm_idle), Wait for all processors to update cached/local
1193 * copies of pm_idle before proceeding.
1196 unregister_latency_notifier(&acpi_processor_latency_notifier
);