4 #include "compat_linux.h" /* needed for psw_compat_t */
11 __u16 perc_atmid
; /* 0x096 */
12 __u32 address
; /* 0x098 */
13 __u8 access_id
; /* 0x0a1 */
14 } per_lowcore_words32
;
21 * Use these flags instead of setting em_instruction_fetch
22 * directly they are used so that single stepping can be
23 * switched on & off while not affecting other tracing
25 unsigned single_step
: 1;
26 unsigned instruction_fetch
: 1;
29 * These addresses are copied into cr10 & cr11 if single
30 * stepping is switched off
35 per_lowcore_words32 words
;
39 struct user_regs_struct32
45 /* nb: there's a 4-byte hole here */
48 * These per registers are in here so that gdb can modify them
49 * itself as there is no "official" ptrace interface for hardware
50 * watchpoints. This is the way intel does it.
52 per_struct32 per_info
;
53 u32 ieee_instruction_pointer
;
54 /* Used to give failing instruction back to user for ieee exceptions */
58 /* We start with the registers, to mimic the way that "memory"
59 is returned from the ptrace(3,...) function. */
60 struct user_regs_struct32 regs
; /* Where the registers are actually stored */
61 /* The rest of this junk is to help gdb figure out what goes where */
62 u32 u_tsize
; /* Text segment size (pages). */
63 u32 u_dsize
; /* Data segment size (pages). */
64 u32 u_ssize
; /* Stack segment size (pages). */
65 u32 start_code
; /* Starting virtual address of text. */
66 u32 start_stack
; /* Starting virtual address of stack area.
67 This is actually the bottom of the stack,
68 the top of the stack is always found in the
70 s32 signal
; /* Signal that caused the core dump. */
71 u32 u_ar0
; /* Used by gdb to help find the values for */
73 u32 magic
; /* To uniquely identify a core file */
74 char u_comm
[32]; /* User command that was responsible */
84 #endif /* _PTRACE32_H */