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[media] em28xx: Add support for devices with a separate audio interface
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / media / video / em28xx / em28xx-core.c
blob16c9b73b1c3f30d8deef937011616f526d604970
1 /*
2 em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
3
4 Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
5 Markus Rechberger <mrechberger@gmail.com>
6 Mauro Carvalho Chehab <mchehab@infradead.org>
7 Sascha Sommer <saschasommer@freenet.de>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 #include <linux/init.h>
25 #include <linux/list.h>
26 #include <linux/module.h>
27 #include <linux/slab.h>
28 #include <linux/usb.h>
29 #include <linux/vmalloc.h>
30 #include <media/v4l2-common.h>
31
32 #include "em28xx.h"
33
34 /* #define ENABLE_DEBUG_ISOC_FRAMES */
35
36 static unsigned int core_debug;
37 module_param(core_debug, int, 0644);
38 MODULE_PARM_DESC(core_debug, "enable debug messages [core]");
39
40 #define em28xx_coredbg(fmt, arg...) do {\
41 if (core_debug) \
42 printk(KERN_INFO "%s %s :"fmt, \
43 dev->name, __func__ , ##arg); } while (0)
44
45 static unsigned int reg_debug;
46 module_param(reg_debug, int, 0644);
47 MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]");
48
49 #define em28xx_regdbg(fmt, arg...) do {\
50 if (reg_debug) \
51 printk(KERN_INFO "%s %s :"fmt, \
52 dev->name, __func__ , ##arg); } while (0)
53
54 static int alt;
55 module_param(alt, int, 0644);
56 MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
57
58 static unsigned int disable_vbi;
59 module_param(disable_vbi, int, 0644);
60 MODULE_PARM_DESC(disable_vbi, "disable vbi support");
61
62 /* FIXME */
63 #define em28xx_isocdbg(fmt, arg...) do {\
64 if (core_debug) \
65 printk(KERN_INFO "%s %s :"fmt, \
66 dev->name, __func__ , ##arg); } while (0)
67
68 /*
69 * em28xx_read_reg_req()
70 * reads data from the usb device specifying bRequest
71 */
72 int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
73 char *buf, int len)
74 {
75 int ret;
76 int pipe = usb_rcvctrlpipe(dev->udev, 0);
77
78 if (dev->state & DEV_DISCONNECTED)
79 return -ENODEV;
80
81 if (len > URB_MAX_CTRL_SIZE)
82 return -EINVAL;
83
84 if (reg_debug) {
85 printk(KERN_DEBUG "(pipe 0x%08x): "
86 "IN: %02x %02x %02x %02x %02x %02x %02x %02x ",
87 pipe,
88 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
89 req, 0, 0,
90 reg & 0xff, reg >> 8,
91 len & 0xff, len >> 8);
92 }
93
94 mutex_lock(&dev->ctrl_urb_lock);
95 ret = usb_control_msg(dev->udev, pipe, req,
96 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
97 0x0000, reg, dev->urb_buf, len, HZ);
98 if (ret < 0) {
99 if (reg_debug)
100 printk(" failed!\n");
101 mutex_unlock(&dev->ctrl_urb_lock);
102 return ret;
103 }
104
105 if (len)
106 memcpy(buf, dev->urb_buf, len);
107
108 mutex_unlock(&dev->ctrl_urb_lock);
109
110 if (reg_debug) {
111 int byte;
112
113 printk("<<<");
114 for (byte = 0; byte < len; byte++)
115 printk(" %02x", (unsigned char)buf[byte]);
116 printk("\n");
117 }
118
119 return ret;
120 }
121
122 /*
123 * em28xx_read_reg_req()
124 * reads data from the usb device specifying bRequest
125 */
126 int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
127 {
128 int ret;
129 u8 val;
130
131 ret = em28xx_read_reg_req_len(dev, req, reg, &val, 1);
132 if (ret < 0)
133 return ret;
134
135 return val;
136 }
137
138 int em28xx_read_reg(struct em28xx *dev, u16 reg)
139 {
140 return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
141 }
142
143 /*
144 * em28xx_write_regs_req()
145 * sends data to the usb device, specifying bRequest
146 */
147 int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
148 int len)
149 {
150 int ret;
151 int pipe = usb_sndctrlpipe(dev->udev, 0);
152
153 if (dev->state & DEV_DISCONNECTED)
154 return -ENODEV;
155
156 if ((len < 1) || (len > URB_MAX_CTRL_SIZE))
157 return -EINVAL;
158
159 if (reg_debug) {
160 int byte;
161
162 printk(KERN_DEBUG "(pipe 0x%08x): "
163 "OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>",
164 pipe,
165 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
166 req, 0, 0,
167 reg & 0xff, reg >> 8,
168 len & 0xff, len >> 8);
169
170 for (byte = 0; byte < len; byte++)
171 printk(" %02x", (unsigned char)buf[byte]);
172 printk("\n");
173 }
174
175 mutex_lock(&dev->ctrl_urb_lock);
176 memcpy(dev->urb_buf, buf, len);
177 ret = usb_control_msg(dev->udev, pipe, req,
178 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
179 0x0000, reg, dev->urb_buf, len, HZ);
180 mutex_unlock(&dev->ctrl_urb_lock);
181
182 if (dev->wait_after_write)
183 msleep(dev->wait_after_write);
184
185 return ret;
186 }
187
188 int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
189 {
190 int rc;
191
192 rc = em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
193
194 /* Stores GPO/GPIO values at the cache, if changed
195 Only write values should be stored, since input on a GPIO
196 register will return the input bits.
197 Not sure what happens on reading GPO register.
198 */
199 if (rc >= 0) {
200 if (reg == dev->reg_gpo_num)
201 dev->reg_gpo = buf[0];
202 else if (reg == dev->reg_gpio_num)
203 dev->reg_gpio = buf[0];
204 }
205
206 return rc;
207 }
208
209 /* Write a single register */
210 int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val)
211 {
212 return em28xx_write_regs(dev, reg, &val, 1);
213 }
214
215 /*
216 * em28xx_write_reg_bits()
217 * sets only some bits (specified by bitmask) of a register, by first reading
218 * the actual value
219 */
220 int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
221 u8 bitmask)
222 {
223 int oldval;
224 u8 newval;
225
226 /* Uses cache for gpo/gpio registers */
227 if (reg == dev->reg_gpo_num)
228 oldval = dev->reg_gpo;
229 else if (reg == dev->reg_gpio_num)
230 oldval = dev->reg_gpio;
231 else
232 oldval = em28xx_read_reg(dev, reg);
233
234 if (oldval < 0)
235 return oldval;
236
237 newval = (((u8) oldval) & ~bitmask) | (val & bitmask);
238
239 return em28xx_write_regs(dev, reg, &newval, 1);
240 }
241
242 /*
243 * em28xx_is_ac97_ready()
244 * Checks if ac97 is ready
245 */
246 static int em28xx_is_ac97_ready(struct em28xx *dev)
247 {
248 int ret, i;
249
250 /* Wait up to 50 ms for AC97 command to complete */
251 for (i = 0; i < 10; i++, msleep(5)) {
252 ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY);
253 if (ret < 0)
254 return ret;
255
256 if (!(ret & 0x01))
257 return 0;
258 }
259
260 em28xx_warn("AC97 command still being executed: not handled properly!\n");
261 return -EBUSY;
262 }
263
264 /*
265 * em28xx_read_ac97()
266 * write a 16 bit value to the specified AC97 address (LSB first!)
267 */
268 int em28xx_read_ac97(struct em28xx *dev, u8 reg)
269 {
270 int ret;
271 u8 addr = (reg & 0x7f) | 0x80;
272 u16 val;
273
274 ret = em28xx_is_ac97_ready(dev);
275 if (ret < 0)
276 return ret;
277
278 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
279 if (ret < 0)
280 return ret;
281
282 ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB,
283 (u8 *)&val, sizeof(val));
284
285 if (ret < 0)
286 return ret;
287 return le16_to_cpu(val);
288 }
289 EXPORT_SYMBOL_GPL(em28xx_read_ac97);
290
291 /*
292 * em28xx_write_ac97()
293 * write a 16 bit value to the specified AC97 address (LSB first!)
294 */
295 int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val)
296 {
297 int ret;
298 u8 addr = reg & 0x7f;
299 __le16 value;
300
301 value = cpu_to_le16(val);
302
303 ret = em28xx_is_ac97_ready(dev);
304 if (ret < 0)
305 return ret;
306
307 ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *) &value, 2);
308 if (ret < 0)
309 return ret;
310
311 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
312 if (ret < 0)
313 return ret;
314
315 return 0;
316 }
317 EXPORT_SYMBOL_GPL(em28xx_write_ac97);
318
319 struct em28xx_vol_itable {
320 enum em28xx_amux mux;
321 u8 reg;
322 };
323
324 static struct em28xx_vol_itable inputs[] = {
325 { EM28XX_AMUX_VIDEO, AC97_VIDEO_VOL },
326 { EM28XX_AMUX_LINE_IN, AC97_LINEIN_VOL },
327 { EM28XX_AMUX_PHONE, AC97_PHONE_VOL },
328 { EM28XX_AMUX_MIC, AC97_MIC_VOL },
329 { EM28XX_AMUX_CD, AC97_CD_VOL },
330 { EM28XX_AMUX_AUX, AC97_AUX_VOL },
331 { EM28XX_AMUX_PCM_OUT, AC97_PCM_OUT_VOL },
332 };
333
334 static int set_ac97_input(struct em28xx *dev)
335 {
336 int ret, i;
337 enum em28xx_amux amux = dev->ctl_ainput;
338
339 /* EM28XX_AMUX_VIDEO2 is a special case used to indicate that
340 em28xx should point to LINE IN, while AC97 should use VIDEO
341 */
342 if (amux == EM28XX_AMUX_VIDEO2)
343 amux = EM28XX_AMUX_VIDEO;
344
345 /* Mute all entres but the one that were selected */
346 for (i = 0; i < ARRAY_SIZE(inputs); i++) {
347 if (amux == inputs[i].mux)
348 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808);
349 else
350 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000);
351
352 if (ret < 0)
353 em28xx_warn("couldn't setup AC97 register %d\n",
354 inputs[i].reg);
355 }
356 return 0;
357 }
358
359 static int em28xx_set_audio_source(struct em28xx *dev)
360 {
361 int ret;
362 u8 input;
363
364 if (dev->board.is_em2800) {
365 if (dev->ctl_ainput == EM28XX_AMUX_VIDEO)
366 input = EM2800_AUDIO_SRC_TUNER;
367 else
368 input = EM2800_AUDIO_SRC_LINE;
369
370 ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1);
371 if (ret < 0)
372 return ret;
373 }
374
375 if (dev->board.has_msp34xx)
376 input = EM28XX_AUDIO_SRC_TUNER;
377 else {
378 switch (dev->ctl_ainput) {
379 case EM28XX_AMUX_VIDEO:
380 input = EM28XX_AUDIO_SRC_TUNER;
381 break;
382 default:
383 input = EM28XX_AUDIO_SRC_LINE;
384 break;
385 }
386 }
387
388 if (dev->board.mute_gpio && dev->mute)
389 em28xx_gpio_set(dev, dev->board.mute_gpio);
390 else
391 em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
392
393 ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0);
394 if (ret < 0)
395 return ret;
396 msleep(5);
397
398 switch (dev->audio_mode.ac97) {
399 case EM28XX_NO_AC97:
400 break;
401 default:
402 ret = set_ac97_input(dev);
403 }
404
405 return ret;
406 }
407
408 struct em28xx_vol_otable {
409 enum em28xx_aout mux;
410 u8 reg;
411 };
412
413 static const struct em28xx_vol_otable outputs[] = {
414 { EM28XX_AOUT_MASTER, AC97_MASTER_VOL },
415 { EM28XX_AOUT_LINE, AC97_LINE_LEVEL_VOL },
416 { EM28XX_AOUT_MONO, AC97_MASTER_MONO_VOL },
417 { EM28XX_AOUT_LFE, AC97_LFE_MASTER_VOL },
418 { EM28XX_AOUT_SURR, AC97_SURR_MASTER_VOL },
419 };
420
421 int em28xx_audio_analog_set(struct em28xx *dev)
422 {
423 int ret, i;
424 u8 xclk;
425
426 if (!dev->audio_mode.has_audio)
427 return 0;
428
429 /* It is assumed that all devices use master volume for output.
430 It would be possible to use also line output.
431 */
432 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
433 /* Mute all outputs */
434 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
435 ret = em28xx_write_ac97(dev, outputs[i].reg, 0x8000);
436 if (ret < 0)
437 em28xx_warn("couldn't setup AC97 register %d\n",
438 outputs[i].reg);
439 }
440 }
441
442 xclk = dev->board.xclk & 0x7f;
443 if (!dev->mute)
444 xclk |= EM28XX_XCLK_AUDIO_UNMUTE;
445
446 ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk);
447 if (ret < 0)
448 return ret;
449 msleep(10);
450
451 /* Selects the proper audio input */
452 ret = em28xx_set_audio_source(dev);
453
454 /* Sets volume */
455 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
456 int vol;
457
458 em28xx_write_ac97(dev, AC97_POWER_DOWN_CTRL, 0x4200);
459 em28xx_write_ac97(dev, AC97_EXT_AUD_CTRL, 0x0031);
460 em28xx_write_ac97(dev, AC97_PCM_IN_SRATE, 0xbb80);
461
462 /* LSB: left channel - both channels with the same level */
463 vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8);
464
465 /* Mute device, if needed */
466 if (dev->mute)
467 vol |= 0x8000;
468
469 /* Sets volume */
470 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
471 if (dev->ctl_aoutput & outputs[i].mux)
472 ret = em28xx_write_ac97(dev, outputs[i].reg,
473 vol);
474 if (ret < 0)
475 em28xx_warn("couldn't setup AC97 register %d\n",
476 outputs[i].reg);
477 }
478
479 if (dev->ctl_aoutput & EM28XX_AOUT_PCM_IN) {
480 int sel = ac97_return_record_select(dev->ctl_aoutput);
481
482 /* Use the same input for both left and right
483 channels */
484 sel |= (sel << 8);
485
486 em28xx_write_ac97(dev, AC97_RECORD_SELECT, sel);
487 }
488 }
489
490 return ret;
491 }
492 EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
493
494 int em28xx_audio_setup(struct em28xx *dev)
495 {
496 int vid1, vid2, feat, cfg;
497 u32 vid;
498
499 if (dev->chip_id == CHIP_ID_EM2870 || dev->chip_id == CHIP_ID_EM2874
500 || dev->chip_id == CHIP_ID_EM28174) {
501 /* Digital only device - don't load any alsa module */
502 dev->audio_mode.has_audio = false;
503 dev->has_audio_class = false;
504 dev->has_alsa_audio = false;
505 return 0;
506 }
507
508 dev->audio_mode.has_audio = true;
509
510 /* See how this device is configured */
511 cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG);
512 em28xx_info("Config register raw data: 0x%02x\n", cfg);
513 if (cfg < 0) {
514 /* Register read error? */
515 cfg = EM28XX_CHIPCFG_AC97; /* Be conservative */
516 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == 0x00) {
517 /* The device doesn't have vendor audio at all */
518 dev->has_alsa_audio = false;
519 dev->audio_mode.has_audio = false;
520 return 0;
521 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
522 EM28XX_CHIPCFG_I2S_3_SAMPRATES) {
523 em28xx_info("I2S Audio (3 sample rates)\n");
524 dev->audio_mode.i2s_3rates = 1;
525 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
526 EM28XX_CHIPCFG_I2S_5_SAMPRATES) {
527 em28xx_info("I2S Audio (5 sample rates)\n");
528 dev->audio_mode.i2s_5rates = 1;
529 }
530
531 if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) != EM28XX_CHIPCFG_AC97) {
532 /* Skip the code that does AC97 vendor detection */
533 dev->audio_mode.ac97 = EM28XX_NO_AC97;
534 goto init_audio;
535 }
536
537 dev->audio_mode.ac97 = EM28XX_AC97_OTHER;
538
539 vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1);
540 if (vid1 < 0) {
541 /*
542 * Device likely doesn't support AC97
543 * Note: (some) em2800 devices without eeprom reports 0x91 on
544 * CHIPCFG register, even not having an AC97 chip
545 */
546 em28xx_warn("AC97 chip type couldn't be determined\n");
547 dev->audio_mode.ac97 = EM28XX_NO_AC97;
548 dev->has_alsa_audio = false;
549 dev->audio_mode.has_audio = false;
550 goto init_audio;
551 }
552
553 vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2);
554 if (vid2 < 0)
555 goto init_audio;
556
557 vid = vid1 << 16 | vid2;
558
559 dev->audio_mode.ac97_vendor_id = vid;
560 em28xx_warn("AC97 vendor ID = 0x%08x\n", vid);
561
562 feat = em28xx_read_ac97(dev, AC97_RESET);
563 if (feat < 0)
564 goto init_audio;
565
566 dev->audio_mode.ac97_feat = feat;
567 em28xx_warn("AC97 features = 0x%04x\n", feat);
568
569 /* Try to identify what audio processor we have */
570 if ((vid == 0xffffffff) && (feat == 0x6a90))
571 dev->audio_mode.ac97 = EM28XX_AC97_EM202;
572 else if ((vid >> 8) == 0x838476)
573 dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL;
574
575 init_audio:
576 /* Reports detected AC97 processor */
577 switch (dev->audio_mode.ac97) {
578 case EM28XX_NO_AC97:
579 em28xx_info("No AC97 audio processor\n");
580 break;
581 case EM28XX_AC97_EM202:
582 em28xx_info("Empia 202 AC97 audio processor detected\n");
583 break;
584 case EM28XX_AC97_SIGMATEL:
585 em28xx_info("Sigmatel audio processor detected(stac 97%02x)\n",
586 dev->audio_mode.ac97_vendor_id & 0xff);
587 break;
588 case EM28XX_AC97_OTHER:
589 em28xx_warn("Unknown AC97 audio processor detected!\n");
590 break;
591 default:
592 break;
593 }
594
595 return em28xx_audio_analog_set(dev);
596 }
597 EXPORT_SYMBOL_GPL(em28xx_audio_setup);
598
599 int em28xx_colorlevels_set_default(struct em28xx *dev)
600 {
601 em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10); /* contrast */
602 em28xx_write_reg(dev, EM28XX_R21_YOFFSET, 0x00); /* brightness */
603 em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10); /* saturation */
604 em28xx_write_reg(dev, EM28XX_R23_UOFFSET, 0x00);
605 em28xx_write_reg(dev, EM28XX_R24_VOFFSET, 0x00);
606 em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, 0x00);
607
608 em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20);
609 em28xx_write_reg(dev, EM28XX_R15_RGAIN, 0x20);
610 em28xx_write_reg(dev, EM28XX_R16_GGAIN, 0x20);
611 em28xx_write_reg(dev, EM28XX_R17_BGAIN, 0x20);
612 em28xx_write_reg(dev, EM28XX_R18_ROFFSET, 0x00);
613 em28xx_write_reg(dev, EM28XX_R19_GOFFSET, 0x00);
614 return em28xx_write_reg(dev, EM28XX_R1A_BOFFSET, 0x00);
615 }
616
617 int em28xx_capture_start(struct em28xx *dev, int start)
618 {
619 int rc;
620
621 if (dev->chip_id == CHIP_ID_EM2874 || dev->chip_id == CHIP_ID_EM28174) {
622 /* The Transport Stream Enable Register moved in em2874 */
623 if (!start) {
624 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
625 0x00,
626 EM2874_TS1_CAPTURE_ENABLE);
627 return rc;
628 }
629
630 /* Enable Transport Stream */
631 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
632 EM2874_TS1_CAPTURE_ENABLE,
633 EM2874_TS1_CAPTURE_ENABLE);
634 return rc;
635 }
636
637
638 /* FIXME: which is the best order? */
639 /* video registers are sampled by VREF */
640 rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP,
641 start ? 0x10 : 0x00, 0x10);
642 if (rc < 0)
643 return rc;
644
645 if (!start) {
646 /* disable video capture */
647 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
648 return rc;
649 }
650
651 if (dev->board.is_webcam)
652 rc = em28xx_write_reg(dev, 0x13, 0x0c);
653
654 /* enable video capture */
655 rc = em28xx_write_reg(dev, 0x48, 0x00);
656
657 if (dev->mode == EM28XX_ANALOG_MODE)
658 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
659 else
660 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
661
662 msleep(6);
663
664 return rc;
665 }
666
667 int em28xx_vbi_supported(struct em28xx *dev)
668 {
669 /* Modprobe option to manually disable */
670 if (disable_vbi == 1)
671 return 0;
672
673 if (dev->chip_id == CHIP_ID_EM2860 ||
674 dev->chip_id == CHIP_ID_EM2883)
675 return 1;
676
677 /* Version of em28xx that does not support VBI */
678 return 0;
679 }
680
681 int em28xx_set_outfmt(struct em28xx *dev)
682 {
683 int ret;
684 u8 vinctrl;
685
686 ret = em28xx_write_reg_bits(dev, EM28XX_R27_OUTFMT,
687 dev->format->reg | 0x20, 0xff);
688 if (ret < 0)
689 return ret;
690
691 ret = em28xx_write_reg(dev, EM28XX_R10_VINMODE, dev->vinmode);
692 if (ret < 0)
693 return ret;
694
695 vinctrl = dev->vinctl;
696 if (em28xx_vbi_supported(dev) == 1) {
697 vinctrl |= EM28XX_VINCTRL_VBI_RAW;
698 em28xx_write_reg(dev, EM28XX_R34_VBI_START_H, 0x00);
699 em28xx_write_reg(dev, EM28XX_R36_VBI_WIDTH, dev->vbi_width/4);
700 em28xx_write_reg(dev, EM28XX_R37_VBI_HEIGHT, dev->vbi_height);
701 if (dev->norm & V4L2_STD_525_60) {
702 /* NTSC */
703 em28xx_write_reg(dev, EM28XX_R35_VBI_START_V, 0x09);
704 } else if (dev->norm & V4L2_STD_625_50) {
705 /* PAL */
706 em28xx_write_reg(dev, EM28XX_R35_VBI_START_V, 0x07);
707 }
708 }
709
710 return em28xx_write_reg(dev, EM28XX_R11_VINCTRL, vinctrl);
711 }
712
713 static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
714 u8 ymin, u8 ymax)
715 {
716 em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n",
717 xmin, ymin, xmax, ymax);
718
719 em28xx_write_regs(dev, EM28XX_R28_XMIN, &xmin, 1);
720 em28xx_write_regs(dev, EM28XX_R29_XMAX, &xmax, 1);
721 em28xx_write_regs(dev, EM28XX_R2A_YMIN, &ymin, 1);
722 return em28xx_write_regs(dev, EM28XX_R2B_YMAX, &ymax, 1);
723 }
724
725 static int em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart,
726 u16 width, u16 height)
727 {
728 u8 cwidth = width;
729 u8 cheight = height;
730 u8 overflow = (height >> 7 & 0x02) | (width >> 8 & 0x01);
731
732 em28xx_coredbg("em28xx Area Set: (%d,%d)\n",
733 (width | (overflow & 2) << 7),
734 (height | (overflow & 1) << 8));
735
736 em28xx_write_regs(dev, EM28XX_R1C_HSTART, &hstart, 1);
737 em28xx_write_regs(dev, EM28XX_R1D_VSTART, &vstart, 1);
738 em28xx_write_regs(dev, EM28XX_R1E_CWIDTH, &cwidth, 1);
739 em28xx_write_regs(dev, EM28XX_R1F_CHEIGHT, &cheight, 1);
740 return em28xx_write_regs(dev, EM28XX_R1B_OFLOW, &overflow, 1);
741 }
742
743 static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v)
744 {
745 u8 mode;
746 /* the em2800 scaler only supports scaling down to 50% */
747
748 if (dev->board.is_em2800) {
749 mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00);
750 } else {
751 u8 buf[2];
752
753 buf[0] = h;
754 buf[1] = h >> 8;
755 em28xx_write_regs(dev, EM28XX_R30_HSCALELOW, (char *)buf, 2);
756
757 buf[0] = v;
758 buf[1] = v >> 8;
759 em28xx_write_regs(dev, EM28XX_R32_VSCALELOW, (char *)buf, 2);
760 /* it seems that both H and V scalers must be active
761 to work correctly */
762 mode = (h || v) ? 0x30 : 0x00;
763 }
764 return em28xx_write_reg_bits(dev, EM28XX_R26_COMPR, mode, 0x30);
765 }
766
767 /* FIXME: this only function read values from dev */
768 int em28xx_resolution_set(struct em28xx *dev)
769 {
770 int width, height;
771 width = norm_maxw(dev);
772 height = norm_maxh(dev);
773
774 /* Properly setup VBI */
775 dev->vbi_width = 720;
776 if (dev->norm & V4L2_STD_525_60)
777 dev->vbi_height = 12;
778 else
779 dev->vbi_height = 18;
780
781 if (!dev->progressive)
782 height >>= norm_maxh(dev);
783
784 em28xx_set_outfmt(dev);
785
786
787 em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2);
788
789 /* If we don't set the start position to 2 in VBI mode, we end up
790 with line 20/21 being YUYV encoded instead of being in 8-bit
791 greyscale. The core of the issue is that line 21 (and line 23 for
792 PAL WSS) are inside of active video region, and as a result they
793 get the pixelformatting associated with that area. So by cropping
794 it out, we end up with the same format as the rest of the VBI
795 region */
796 if (em28xx_vbi_supported(dev) == 1)
797 em28xx_capture_area_set(dev, 0, 2, width >> 2, height >> 2);
798 else
799 em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2);
800
801 return em28xx_scaler_set(dev, dev->hscale, dev->vscale);
802 }
803
804 int em28xx_set_alternate(struct em28xx *dev)
805 {
806 int errCode, prev_alt = dev->alt;
807 int i;
808 unsigned int min_pkt_size = dev->width * 2 + 4;
809
810 /*
811 * alt = 0 is used only for control messages, so, only values
812 * greater than 0 can be used for streaming.
813 */
814 if (alt && alt < dev->num_alt) {
815 em28xx_coredbg("alternate forced to %d\n", dev->alt);
816 dev->alt = alt;
817 goto set_alt;
818 }
819
820 /* When image size is bigger than a certain value,
821 the frame size should be increased, otherwise, only
822 green screen will be received.
823 */
824 if (dev->width * 2 * dev->height > 720 * 240 * 2)
825 min_pkt_size *= 2;
826
827 for (i = 0; i < dev->num_alt; i++) {
828 /* stop when the selected alt setting offers enough bandwidth */
829 if (dev->alt_max_pkt_size[i] >= min_pkt_size) {
830 dev->alt = i;
831 break;
832 /* otherwise make sure that we end up with the maximum bandwidth
833 because the min_pkt_size equation might be wrong...
834 */
835 } else if (dev->alt_max_pkt_size[i] >
836 dev->alt_max_pkt_size[dev->alt])
837 dev->alt = i;
838 }
839
840 set_alt:
841 if (dev->alt != prev_alt) {
842 em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
843 min_pkt_size, dev->alt);
844 dev->max_pkt_size = dev->alt_max_pkt_size[dev->alt];
845 em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
846 dev->alt, dev->max_pkt_size);
847 errCode = usb_set_interface(dev->udev, 0, dev->alt);
848 if (errCode < 0) {
849 em28xx_errdev("cannot change alternate number to %d (error=%i)\n",
850 dev->alt, errCode);
851 return errCode;
852 }
853 }
854 return 0;
855 }
856
857 int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio)
858 {
859 int rc = 0;
860
861 if (!gpio)
862 return rc;
863
864 if (dev->mode != EM28XX_SUSPEND) {
865 em28xx_write_reg(dev, 0x48, 0x00);
866 if (dev->mode == EM28XX_ANALOG_MODE)
867 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
868 else
869 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
870 msleep(6);
871 }
872
873 /* Send GPIO reset sequences specified at board entry */
874 while (gpio->sleep >= 0) {
875 if (gpio->reg >= 0) {
876 rc = em28xx_write_reg_bits(dev,
877 gpio->reg,
878 gpio->val,
879 gpio->mask);
880 if (rc < 0)
881 return rc;
882 }
883 if (gpio->sleep > 0)
884 msleep(gpio->sleep);
885
886 gpio++;
887 }
888 return rc;
889 }
890
891 int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode)
892 {
893 if (dev->mode == set_mode)
894 return 0;
895
896 if (set_mode == EM28XX_SUSPEND) {
897 dev->mode = set_mode;
898
899 /* FIXME: add suspend support for ac97 */
900
901 return em28xx_gpio_set(dev, dev->board.suspend_gpio);
902 }
903
904 dev->mode = set_mode;
905
906 if (dev->mode == EM28XX_DIGITAL_MODE)
907 return em28xx_gpio_set(dev, dev->board.dvb_gpio);
908 else
909 return em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
910 }
911 EXPORT_SYMBOL_GPL(em28xx_set_mode);
912
913 /* ------------------------------------------------------------------
914 URB control
915 ------------------------------------------------------------------*/
916
917 /*
918 * IRQ callback, called by URB callback
919 */
920 static void em28xx_irq_callback(struct urb *urb)
921 {
922 struct em28xx *dev = urb->context;
923 int i;
924
925 switch (urb->status) {
926 case 0: /* success */
927 case -ETIMEDOUT: /* NAK */
928 break;
929 case -ECONNRESET: /* kill */
930 case -ENOENT:
931 case -ESHUTDOWN:
932 return;
933 default: /* error */
934 em28xx_isocdbg("urb completition error %d.\n", urb->status);
935 break;
936 }
937
938 /* Copy data from URB */
939 spin_lock(&dev->slock);
940 dev->isoc_ctl.isoc_copy(dev, urb);
941 spin_unlock(&dev->slock);
942
943 /* Reset urb buffers */
944 for (i = 0; i < urb->number_of_packets; i++) {
945 urb->iso_frame_desc[i].status = 0;
946 urb->iso_frame_desc[i].actual_length = 0;
947 }
948 urb->status = 0;
949
950 urb->status = usb_submit_urb(urb, GFP_ATOMIC);
951 if (urb->status) {
952 em28xx_isocdbg("urb resubmit failed (error=%i)\n",
953 urb->status);
954 }
955 }
956
957 /*
958 * Stop and Deallocate URBs
959 */
960 void em28xx_uninit_isoc(struct em28xx *dev)
961 {
962 struct urb *urb;
963 int i;
964
965 em28xx_isocdbg("em28xx: called em28xx_uninit_isoc\n");
966
967 dev->isoc_ctl.nfields = -1;
968 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
969 urb = dev->isoc_ctl.urb[i];
970 if (urb) {
971 if (!irqs_disabled())
972 usb_kill_urb(urb);
973 else
974 usb_unlink_urb(urb);
975
976 if (dev->isoc_ctl.transfer_buffer[i]) {
977 usb_free_coherent(dev->udev,
978 urb->transfer_buffer_length,
979 dev->isoc_ctl.transfer_buffer[i],
980 urb->transfer_dma);
981 }
982 usb_free_urb(urb);
983 dev->isoc_ctl.urb[i] = NULL;
984 }
985 dev->isoc_ctl.transfer_buffer[i] = NULL;
986 }
987
988 kfree(dev->isoc_ctl.urb);
989 kfree(dev->isoc_ctl.transfer_buffer);
990
991 dev->isoc_ctl.urb = NULL;
992 dev->isoc_ctl.transfer_buffer = NULL;
993 dev->isoc_ctl.num_bufs = 0;
994
995 em28xx_capture_start(dev, 0);
996 }
997 EXPORT_SYMBOL_GPL(em28xx_uninit_isoc);
998
999 /*
1000 * Allocate URBs and start IRQ
1001 */
1002 int em28xx_init_isoc(struct em28xx *dev, int max_packets,
1003 int num_bufs, int max_pkt_size,
1004 int (*isoc_copy) (struct em28xx *dev, struct urb *urb))
1005 {
1006 struct em28xx_dmaqueue *dma_q = &dev->vidq;
1007 struct em28xx_dmaqueue *vbi_dma_q = &dev->vbiq;
1008 int i;
1009 int sb_size, pipe;
1010 struct urb *urb;
1011 int j, k;
1012 int rc;
1013
1014 em28xx_isocdbg("em28xx: called em28xx_prepare_isoc\n");
1015
1016 /* De-allocates all pending stuff */
1017 em28xx_uninit_isoc(dev);
1018
1019 dev->isoc_ctl.isoc_copy = isoc_copy;
1020 dev->isoc_ctl.num_bufs = num_bufs;
1021
1022 dev->isoc_ctl.urb = kzalloc(sizeof(void *)*num_bufs, GFP_KERNEL);
1023 if (!dev->isoc_ctl.urb) {
1024 em28xx_errdev("cannot alloc memory for usb buffers\n");
1025 return -ENOMEM;
1026 }
1027
1028 dev->isoc_ctl.transfer_buffer = kzalloc(sizeof(void *)*num_bufs,
1029 GFP_KERNEL);
1030 if (!dev->isoc_ctl.transfer_buffer) {
1031 em28xx_errdev("cannot allocate memory for usb transfer\n");
1032 kfree(dev->isoc_ctl.urb);
1033 return -ENOMEM;
1034 }
1035
1036 dev->isoc_ctl.max_pkt_size = max_pkt_size;
1037 dev->isoc_ctl.vid_buf = NULL;
1038 dev->isoc_ctl.vbi_buf = NULL;
1039
1040 sb_size = max_packets * dev->isoc_ctl.max_pkt_size;
1041
1042 /* allocate urbs and transfer buffers */
1043 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
1044 urb = usb_alloc_urb(max_packets, GFP_KERNEL);
1045 if (!urb) {
1046 em28xx_err("cannot alloc isoc_ctl.urb %i\n", i);
1047 em28xx_uninit_isoc(dev);
1048 return -ENOMEM;
1049 }
1050 dev->isoc_ctl.urb[i] = urb;
1051
1052 dev->isoc_ctl.transfer_buffer[i] = usb_alloc_coherent(dev->udev,
1053 sb_size, GFP_KERNEL, &urb->transfer_dma);
1054 if (!dev->isoc_ctl.transfer_buffer[i]) {
1055 em28xx_err("unable to allocate %i bytes for transfer"
1056 " buffer %i%s\n",
1057 sb_size, i,
1058 in_interrupt() ? " while in int" : "");
1059 em28xx_uninit_isoc(dev);
1060 return -ENOMEM;
1061 }
1062 memset(dev->isoc_ctl.transfer_buffer[i], 0, sb_size);
1063
1064 /* FIXME: this is a hack - should be
1065 'desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK'
1066 should also be using 'desc.bInterval'
1067 */
1068 pipe = usb_rcvisocpipe(dev->udev,
1069 dev->mode == EM28XX_ANALOG_MODE ? 0x82 : 0x84);
1070
1071 usb_fill_int_urb(urb, dev->udev, pipe,
1072 dev->isoc_ctl.transfer_buffer[i], sb_size,
1073 em28xx_irq_callback, dev, 1);
1074
1075 urb->number_of_packets = max_packets;
1076 urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP;
1077
1078 k = 0;
1079 for (j = 0; j < max_packets; j++) {
1080 urb->iso_frame_desc[j].offset = k;
1081 urb->iso_frame_desc[j].length =
1082 dev->isoc_ctl.max_pkt_size;
1083 k += dev->isoc_ctl.max_pkt_size;
1084 }
1085 }
1086
1087 init_waitqueue_head(&dma_q->wq);
1088 init_waitqueue_head(&vbi_dma_q->wq);
1089
1090 em28xx_capture_start(dev, 1);
1091
1092 /* submit urbs and enables IRQ */
1093 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
1094 rc = usb_submit_urb(dev->isoc_ctl.urb[i], GFP_ATOMIC);
1095 if (rc) {
1096 em28xx_err("submit of urb %i failed (error=%i)\n", i,
1097 rc);
1098 em28xx_uninit_isoc(dev);
1099 return rc;
1100 }
1101 }
1102
1103 return 0;
1104 }
1105 EXPORT_SYMBOL_GPL(em28xx_init_isoc);
1106
1107 /* Determine the packet size for the DVB stream for the given device
1108 (underlying value programmed into the eeprom) */
1109 int em28xx_isoc_dvb_max_packetsize(struct em28xx *dev)
1110 {
1111 unsigned int chip_cfg2;
1112 unsigned int packet_size = 564;
1113
1114 if (dev->chip_id == CHIP_ID_EM2874) {
1115 /* FIXME - for now assume 564 like it was before, but the
1116 em2874 code should be added to return the proper value... */
1117 packet_size = 564;
1118 } else if (dev->chip_id == CHIP_ID_EM28174) {
1119 /* FIXME same as em2874. 564 was enough for 22 Mbit DVB-T
1120 but too much for 44 Mbit DVB-C. */
1121 packet_size = 752;
1122 } else {
1123 /* TS max packet size stored in bits 1-0 of R01 */
1124 chip_cfg2 = em28xx_read_reg(dev, EM28XX_R01_CHIPCFG2);
1125 switch (chip_cfg2 & EM28XX_CHIPCFG2_TS_PACKETSIZE_MASK) {
1126 case EM28XX_CHIPCFG2_TS_PACKETSIZE_188:
1127 packet_size = 188;
1128 break;
1129 case EM28XX_CHIPCFG2_TS_PACKETSIZE_376:
1130 packet_size = 376;
1131 break;
1132 case EM28XX_CHIPCFG2_TS_PACKETSIZE_564:
1133 packet_size = 564;
1134 break;
1135 case EM28XX_CHIPCFG2_TS_PACKETSIZE_752:
1136 packet_size = 752;
1137 break;
1138 }
1139 }
1140
1141 em28xx_coredbg("dvb max packet size=%d\n", packet_size);
1142 return packet_size;
1143 }
1144 EXPORT_SYMBOL_GPL(em28xx_isoc_dvb_max_packetsize);
1145
1146 /*
1147 * em28xx_wake_i2c()
1148 * configure i2c attached devices
1149 */
1150 void em28xx_wake_i2c(struct em28xx *dev)
1151 {
1152 v4l2_device_call_all(&dev->v4l2_dev, 0, core, reset, 0);
1153 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_routing,
1154 INPUT(dev->ctl_input)->vmux, 0, 0);
1155 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_stream, 0);
1156 }
1157
1158 /*
1159 * Device control list
1160 */
1161
1162 static LIST_HEAD(em28xx_devlist);
1163 static DEFINE_MUTEX(em28xx_devlist_mutex);
1164
1165 /*
1166 * em28xx_realease_resources()
1167 * unregisters the v4l2,i2c and usb devices
1168 * called when the device gets disconected or at module unload
1169 */
1170 void em28xx_remove_from_devlist(struct em28xx *dev)
1171 {
1172 mutex_lock(&em28xx_devlist_mutex);
1173 list_del(&dev->devlist);
1174 mutex_unlock(&em28xx_devlist_mutex);
1175 };
1176
1177 void em28xx_add_into_devlist(struct em28xx *dev)
1178 {
1179 mutex_lock(&em28xx_devlist_mutex);
1180 list_add_tail(&dev->devlist, &em28xx_devlist);
1181 mutex_unlock(&em28xx_devlist_mutex);
1182 };
1183
1184 /*
1185 * Extension interface
1186 */
1187
1188 static LIST_HEAD(em28xx_extension_devlist);
1189
1190 int em28xx_register_extension(struct em28xx_ops *ops)
1191 {
1192 struct em28xx *dev = NULL;
1193
1194 mutex_lock(&em28xx_devlist_mutex);
1195 list_add_tail(&ops->next, &em28xx_extension_devlist);
1196 list_for_each_entry(dev, &em28xx_devlist, devlist) {
1197 ops->init(dev);
1198 }
1199 printk(KERN_INFO "Em28xx: Initialized (%s) extension\n", ops->name);
1200 mutex_unlock(&em28xx_devlist_mutex);
1201 return 0;
1202 }
1203 EXPORT_SYMBOL(em28xx_register_extension);
1204
1205 void em28xx_unregister_extension(struct em28xx_ops *ops)
1206 {
1207 struct em28xx *dev = NULL;
1208
1209 mutex_lock(&em28xx_devlist_mutex);
1210 list_for_each_entry(dev, &em28xx_devlist, devlist) {
1211 ops->fini(dev);
1212 }
1213 printk(KERN_INFO "Em28xx: Removed (%s) extension\n", ops->name);
1214 list_del(&ops->next);
1215 mutex_unlock(&em28xx_devlist_mutex);
1216 }
1217 EXPORT_SYMBOL(em28xx_unregister_extension);
1218
1219 void em28xx_init_extension(struct em28xx *dev)
1220 {
1221 struct em28xx_ops *ops = NULL;
1222
1223 mutex_lock(&em28xx_devlist_mutex);
1224 if (!list_empty(&em28xx_extension_devlist)) {
1225 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1226 if (ops->init)
1227 ops->init(dev);
1228 }
1229 }
1230 mutex_unlock(&em28xx_devlist_mutex);
1231 }
1232
1233 void em28xx_close_extension(struct em28xx *dev)
1234 {
1235 struct em28xx_ops *ops = NULL;
1236
1237 mutex_lock(&em28xx_devlist_mutex);
1238 if (!list_empty(&em28xx_extension_devlist)) {
1239 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1240 if (ops->fini)
1241 ops->fini(dev);
1242 }
1243 }
1244 mutex_unlock(&em28xx_devlist_mutex);
1245 }
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree