1 /* linux/arch/arm/plat-s3c24xx/gpiolib.c
3 * Copyright (c) 2008 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
7 * S3C24XX GPIOlib support
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License.
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/interrupt.h>
18 #include <linux/sysdev.h>
19 #include <linux/ioport.h>
21 #include <linux/gpio.h>
23 #include <mach/gpio-core.h>
24 #include <mach/hardware.h>
28 #include <mach/regs-gpio.h>
30 static int s3c24xx_gpiolib_banka_input(struct gpio_chip
*chip
, unsigned offset
)
35 static int s3c24xx_gpiolib_banka_output(struct gpio_chip
*chip
,
36 unsigned offset
, int value
)
38 struct s3c_gpio_chip
*ourchip
= to_s3c_gpio(chip
);
39 void __iomem
*base
= ourchip
->base
;
44 local_irq_save(flags
);
46 con
= __raw_readl(base
+ 0x00);
47 dat
= __raw_readl(base
+ 0x04);
49 dat
&= ~(1 << offset
);
53 __raw_writel(dat
, base
+ 0x04);
55 con
&= ~(1 << offset
);
57 __raw_writel(con
, base
+ 0x00);
58 __raw_writel(dat
, base
+ 0x04);
60 local_irq_restore(flags
);
64 static int s3c24xx_gpiolib_bankf_toirq(struct gpio_chip
*chip
, unsigned offset
)
67 return IRQ_EINT0
+ offset
;
70 return IRQ_EINT4
+ offset
- 4;
75 static int s3c24xx_gpiolib_bankg_toirq(struct gpio_chip
*chip
, unsigned offset
)
77 return IRQ_EINT8
+ offset
;
80 struct s3c_gpio_chip s3c24xx_gpios
[] = {
82 .base
= S3C2410_GPACON
,
83 .pm
= __gpio_pm(&s3c_gpio_pm_1bit
),
85 .base
= S3C2410_GPA(0),
89 .direction_input
= s3c24xx_gpiolib_banka_input
,
90 .direction_output
= s3c24xx_gpiolib_banka_output
,
94 .base
= S3C2410_GPBCON
,
95 .pm
= __gpio_pm(&s3c_gpio_pm_2bit
),
97 .base
= S3C2410_GPB(0),
104 .base
= S3C2410_GPCCON
,
105 .pm
= __gpio_pm(&s3c_gpio_pm_2bit
),
107 .base
= S3C2410_GPC(0),
108 .owner
= THIS_MODULE
,
114 .base
= S3C2410_GPDCON
,
115 .pm
= __gpio_pm(&s3c_gpio_pm_2bit
),
117 .base
= S3C2410_GPD(0),
118 .owner
= THIS_MODULE
,
124 .base
= S3C2410_GPECON
,
125 .pm
= __gpio_pm(&s3c_gpio_pm_2bit
),
127 .base
= S3C2410_GPE(0),
129 .owner
= THIS_MODULE
,
134 .base
= S3C2410_GPFCON
,
135 .pm
= __gpio_pm(&s3c_gpio_pm_2bit
),
137 .base
= S3C2410_GPF(0),
138 .owner
= THIS_MODULE
,
141 .to_irq
= s3c24xx_gpiolib_bankf_toirq
,
145 .base
= S3C2410_GPGCON
,
146 .pm
= __gpio_pm(&s3c_gpio_pm_2bit
),
148 .base
= S3C2410_GPG(0),
149 .owner
= THIS_MODULE
,
152 .to_irq
= s3c24xx_gpiolib_bankg_toirq
,
155 .base
= S3C2410_GPHCON
,
156 .pm
= __gpio_pm(&s3c_gpio_pm_2bit
),
158 .base
= S3C2410_GPH(0),
159 .owner
= THIS_MODULE
,
166 static __init
int s3c24xx_gpiolib_init(void)
168 struct s3c_gpio_chip
*chip
= s3c24xx_gpios
;
171 for (gpn
= 0; gpn
< ARRAY_SIZE(s3c24xx_gpios
); gpn
++, chip
++)
172 s3c_gpiolib_add(chip
);
177 core_initcall(s3c24xx_gpiolib_init
);