2 * linux/sound/arm/aaci.c - ARM PrimeCell AACI PL041 driver
4 * Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * Documentation: ARM DDI 0173B
12 #include <linux/module.h>
13 #include <linux/delay.h>
14 #include <linux/init.h>
15 #include <linux/ioport.h>
16 #include <linux/device.h>
17 #include <linux/spinlock.h>
18 #include <linux/interrupt.h>
19 #include <linux/err.h>
20 #include <linux/amba/bus.h>
24 #include <asm/sizes.h>
26 #include <sound/driver.h>
27 #include <sound/core.h>
28 #include <sound/initval.h>
29 #include <sound/ac97_codec.h>
30 #include <sound/pcm.h>
31 #include <sound/pcm_params.h>
36 #define DRIVER_NAME "aaci-pl041"
39 * PM support is not complete. Turn it off.
43 static void aaci_ac97_select_codec(struct aaci
*aaci
, struct snd_ac97
*ac97
)
45 u32 v
, maincr
= aaci
->maincr
| MAINCR_SCRA(ac97
->num
);
48 * Ensure that the slot 1/2 RX registers are empty.
50 v
= readl(aaci
->base
+ AACI_SLFR
);
52 readl(aaci
->base
+ AACI_SL2RX
);
54 readl(aaci
->base
+ AACI_SL1RX
);
56 writel(maincr
, aaci
->base
+ AACI_MAINCR
);
61 * The recommended use of programming the external codec through slot 1
62 * and slot 2 data is to use the channels during setup routines and the
63 * slot register at any other time. The data written into slot 1, slot 2
64 * and slot 12 registers is transmitted only when their corresponding
65 * SI1TxEn, SI2TxEn and SI12TxEn bits are set in the AACI_MAINCR
68 static void aaci_ac97_write(struct snd_ac97
*ac97
, unsigned short reg
, unsigned short val
)
70 struct aaci
*aaci
= ac97
->private_data
;
76 mutex_lock(&aaci
->ac97_sem
);
78 aaci_ac97_select_codec(aaci
, ac97
);
81 * P54: You must ensure that AACI_SL2TX is always written
82 * to, if required, before data is written to AACI_SL1TX.
84 writel(val
<< 4, aaci
->base
+ AACI_SL2TX
);
85 writel(reg
<< 12, aaci
->base
+ AACI_SL1TX
);
88 * Wait for the transmission of both slots to complete.
91 v
= readl(aaci
->base
+ AACI_SLFR
);
92 } while (v
& (SLFR_1TXB
|SLFR_2TXB
));
94 mutex_unlock(&aaci
->ac97_sem
);
98 * Read an AC'97 register.
100 static unsigned short aaci_ac97_read(struct snd_ac97
*ac97
, unsigned short reg
)
102 struct aaci
*aaci
= ac97
->private_data
;
108 mutex_lock(&aaci
->ac97_sem
);
110 aaci_ac97_select_codec(aaci
, ac97
);
113 * Write the register address to slot 1.
115 writel((reg
<< 12) | (1 << 19), aaci
->base
+ AACI_SL1TX
);
118 * Wait for the transmission to complete.
121 v
= readl(aaci
->base
+ AACI_SLFR
);
122 } while (v
& SLFR_1TXB
);
125 * Give the AC'97 codec more than enough time
126 * to respond. (42us = ~2 frames at 48kHz.)
131 * Wait for slot 2 to indicate data.
135 v
= readl(aaci
->base
+ AACI_SLFR
) & (SLFR_1RXV
|SLFR_2RXV
);
136 } while (v
!= (SLFR_1RXV
|SLFR_2RXV
));
138 v
= readl(aaci
->base
+ AACI_SL1RX
) >> 12;
140 v
= readl(aaci
->base
+ AACI_SL2RX
) >> 4;
142 dev_err(&aaci
->dev
->dev
,
143 "wrong ac97 register read back (%x != %x)\n",
148 mutex_unlock(&aaci
->ac97_sem
);
152 static inline void aaci_chan_wait_ready(struct aaci_runtime
*aacirun
)
158 val
= readl(aacirun
->base
+ AACI_SR
);
159 } while (val
& (SR_TXB
|SR_RXB
) && timeout
--);
167 static void aaci_fifo_irq(struct aaci
*aaci
, u32 mask
)
169 if (mask
& ISR_URINTR
) {
170 writel(ICLR_TXUEC1
, aaci
->base
+ AACI_INTCLR
);
173 if (mask
& ISR_TXINTR
) {
174 struct aaci_runtime
*aacirun
= &aaci
->playback
;
177 if (!aacirun
->substream
|| !aacirun
->start
) {
178 dev_warn(&aaci
->dev
->dev
, "TX interrupt???");
179 writel(0, aacirun
->base
+ AACI_IE
);
185 unsigned int len
= aacirun
->fifosz
;
188 if (aacirun
->bytes
<= 0) {
189 aacirun
->bytes
+= aacirun
->period
;
191 spin_unlock(&aaci
->lock
);
192 snd_pcm_period_elapsed(aacirun
->substream
);
193 spin_lock(&aaci
->lock
);
195 if (!(aacirun
->cr
& TXCR_TXEN
))
198 val
= readl(aacirun
->base
+ AACI_SR
);
199 if (!(val
& SR_TXHE
))
201 if (!(val
& SR_TXFE
))
204 aacirun
->bytes
-= len
;
206 /* writing 16 bytes at a time */
207 for ( ; len
> 0; len
-= 16) {
209 "ldmia %0!, {r0, r1, r2, r3}\n\t"
210 "stmia %1, {r0, r1, r2, r3}"
212 : "r" (aacirun
->fifo
)
213 : "r0", "r1", "r2", "r3", "cc");
215 if (ptr
>= aacirun
->end
)
216 ptr
= aacirun
->start
;
224 static irqreturn_t
aaci_irq(int irq
, void *devid
, struct pt_regs
*regs
)
226 struct aaci
*aaci
= devid
;
230 spin_lock(&aaci
->lock
);
231 mask
= readl(aaci
->base
+ AACI_ALLINTS
);
234 for (i
= 0; i
< 4; i
++, m
>>= 7) {
236 aaci_fifo_irq(aaci
, m
);
240 spin_unlock(&aaci
->lock
);
242 return mask
? IRQ_HANDLED
: IRQ_NONE
;
252 unsigned char codec_idx
;
253 unsigned char rate_idx
;
256 static struct aaci_stream aaci_streams
[] = {
259 .rate_idx
= AC97_RATES_FRONT_DAC
,
261 [ACSTREAM_SURROUND
] = {
263 .rate_idx
= AC97_RATES_SURR_DAC
,
267 .rate_idx
= AC97_RATES_LFE_DAC
,
271 static inline unsigned int aaci_rate_mask(struct aaci
*aaci
, int streamid
)
273 struct aaci_stream
*s
= aaci_streams
+ streamid
;
274 return aaci
->ac97_bus
->codec
[s
->codec_idx
]->rates
[s
->rate_idx
];
277 static unsigned int rate_list
[] = {
278 5512, 8000, 11025, 16000, 22050, 32000, 44100,
279 48000, 64000, 88200, 96000, 176400, 192000
283 * Double-rate rule: we can support double rate iff channels == 2
287 aaci_rule_rate_by_channels(struct snd_pcm_hw_params
*p
, struct snd_pcm_hw_rule
*rule
)
289 struct aaci
*aaci
= rule
->private;
290 unsigned int rate_mask
= SNDRV_PCM_RATE_8000_48000
|SNDRV_PCM_RATE_5512
;
291 struct snd_interval
*c
= hw_param_interval(p
, SNDRV_PCM_HW_PARAM_CHANNELS
);
295 rate_mask
&= aaci_rate_mask(aaci
, ACSTREAM_LFE
);
297 rate_mask
&= aaci_rate_mask(aaci
, ACSTREAM_SURROUND
);
299 rate_mask
&= aaci_rate_mask(aaci
, ACSTREAM_FRONT
);
302 return snd_interval_list(hw_param_interval(p
, rule
->var
),
303 ARRAY_SIZE(rate_list
), rate_list
,
307 static struct snd_pcm_hardware aaci_hw_info
= {
308 .info
= SNDRV_PCM_INFO_MMAP
|
309 SNDRV_PCM_INFO_MMAP_VALID
|
310 SNDRV_PCM_INFO_INTERLEAVED
|
311 SNDRV_PCM_INFO_BLOCK_TRANSFER
|
312 SNDRV_PCM_INFO_RESUME
,
315 * ALSA doesn't support 18-bit or 20-bit packed into 32-bit
316 * words. It also doesn't support 12-bit at all.
318 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,
320 /* should this be continuous or knot? */
321 .rates
= SNDRV_PCM_RATE_CONTINUOUS
,
326 .buffer_bytes_max
= 64 * 1024,
327 .period_bytes_min
= 256,
328 .period_bytes_max
= PAGE_SIZE
,
330 .periods_max
= PAGE_SIZE
/ 16,
333 static int aaci_pcm_open(struct aaci
*aaci
, struct snd_pcm_substream
*substream
,
334 struct aaci_runtime
*aacirun
)
336 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
339 aacirun
->substream
= substream
;
340 runtime
->private_data
= aacirun
;
341 runtime
->hw
= aaci_hw_info
;
344 * FIXME: ALSA specifies fifo_size in bytes. If we're in normal
345 * mode, each 32-bit word contains one sample. If we're in
346 * compact mode, each 32-bit word contains two samples, effectively
347 * halving the FIFO size. However, we don't know for sure which
348 * we'll be using at this point. We set this to the lower limit.
350 runtime
->hw
.fifo_size
= aaci
->fifosize
* 2;
353 * Add rule describing hardware rate dependency
354 * on the number of channels.
356 ret
= snd_pcm_hw_rule_add(runtime
, 0, SNDRV_PCM_HW_PARAM_RATE
,
357 aaci_rule_rate_by_channels
, aaci
,
358 SNDRV_PCM_HW_PARAM_CHANNELS
,
359 SNDRV_PCM_HW_PARAM_RATE
, -1);
363 ret
= request_irq(aaci
->dev
->irq
[0], aaci_irq
, IRQF_SHARED
|IRQF_DISABLED
,
378 static int aaci_pcm_close(struct snd_pcm_substream
*substream
)
380 struct aaci
*aaci
= substream
->private_data
;
381 struct aaci_runtime
*aacirun
= substream
->runtime
->private_data
;
383 WARN_ON(aacirun
->cr
& TXCR_TXEN
);
385 aacirun
->substream
= NULL
;
386 free_irq(aaci
->dev
->irq
[0], aaci
);
391 static int aaci_pcm_hw_free(struct snd_pcm_substream
*substream
)
393 struct aaci_runtime
*aacirun
= substream
->runtime
->private_data
;
396 * This must not be called with the device enabled.
398 WARN_ON(aacirun
->cr
& TXCR_TXEN
);
400 if (aacirun
->pcm_open
)
401 snd_ac97_pcm_close(aacirun
->pcm
);
402 aacirun
->pcm_open
= 0;
405 * Clear out the DMA and any allocated buffers.
407 devdma_hw_free(NULL
, substream
);
412 static int aaci_pcm_hw_params(struct snd_pcm_substream
*substream
,
413 struct aaci_runtime
*aacirun
,
414 struct snd_pcm_hw_params
*params
)
418 aaci_pcm_hw_free(substream
);
420 err
= devdma_hw_alloc(NULL
, substream
,
421 params_buffer_bytes(params
));
425 err
= snd_ac97_pcm_open(aacirun
->pcm
, params_rate(params
),
426 params_channels(params
),
427 aacirun
->pcm
->r
[0].slots
);
431 aacirun
->pcm_open
= 1;
437 static int aaci_pcm_prepare(struct snd_pcm_substream
*substream
)
439 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
440 struct aaci_runtime
*aacirun
= runtime
->private_data
;
442 aacirun
->start
= (void *)runtime
->dma_area
;
443 aacirun
->end
= aacirun
->start
+ runtime
->dma_bytes
;
444 aacirun
->ptr
= aacirun
->start
;
446 aacirun
->bytes
= frames_to_bytes(runtime
, runtime
->period_size
);
451 static snd_pcm_uframes_t
aaci_pcm_pointer(struct snd_pcm_substream
*substream
)
453 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
454 struct aaci_runtime
*aacirun
= runtime
->private_data
;
455 ssize_t bytes
= aacirun
->ptr
- aacirun
->start
;
457 return bytes_to_frames(runtime
, bytes
);
460 static int aaci_pcm_mmap(struct snd_pcm_substream
*substream
, struct vm_area_struct
*vma
)
462 return devdma_mmap(NULL
, substream
, vma
);
467 * Playback specific ALSA stuff
469 static const u32 channels_to_txmask
[] = {
470 [2] = TXCR_TX3
| TXCR_TX4
,
471 [4] = TXCR_TX3
| TXCR_TX4
| TXCR_TX7
| TXCR_TX8
,
472 [6] = TXCR_TX3
| TXCR_TX4
| TXCR_TX7
| TXCR_TX8
| TXCR_TX6
| TXCR_TX9
,
476 * We can support two and four channel audio. Unfortunately
477 * six channel audio requires a non-standard channel ordering:
479 * 4 -> FL(3), FR(4), SL(7), SR(8)
480 * 6 -> FL(3), FR(4), SL(7), SR(8), C(6), LFE(9) (required)
481 * FL(3), FR(4), C(6), SL(7), SR(8), LFE(9) (actual)
482 * This requires an ALSA configuration file to correct.
484 static unsigned int channel_list
[] = { 2, 4, 6 };
487 aaci_rule_channels(struct snd_pcm_hw_params
*p
, struct snd_pcm_hw_rule
*rule
)
489 struct aaci
*aaci
= rule
->private;
490 unsigned int chan_mask
= 1 << 0, slots
;
493 * pcms[0] is the our 5.1 PCM instance.
495 slots
= aaci
->ac97_bus
->pcms
[0].r
[0].slots
;
496 if (slots
& (1 << AC97_SLOT_PCM_SLEFT
)) {
498 if (slots
& (1 << AC97_SLOT_LFE
))
502 return snd_interval_list(hw_param_interval(p
, rule
->var
),
503 ARRAY_SIZE(channel_list
), channel_list
,
507 static int aaci_pcm_playback_open(struct snd_pcm_substream
*substream
)
509 struct aaci
*aaci
= substream
->private_data
;
513 * Add rule describing channel dependency.
515 ret
= snd_pcm_hw_rule_add(substream
->runtime
, 0,
516 SNDRV_PCM_HW_PARAM_CHANNELS
,
517 aaci_rule_channels
, aaci
,
518 SNDRV_PCM_HW_PARAM_CHANNELS
, -1);
522 return aaci_pcm_open(aaci
, substream
, &aaci
->playback
);
525 static int aaci_pcm_playback_hw_params(struct snd_pcm_substream
*substream
,
526 struct snd_pcm_hw_params
*params
)
528 struct aaci
*aaci
= substream
->private_data
;
529 struct aaci_runtime
*aacirun
= substream
->runtime
->private_data
;
530 unsigned int channels
= params_channels(params
);
533 WARN_ON(channels
>= ARRAY_SIZE(channels_to_txmask
) ||
534 !channels_to_txmask
[channels
]);
536 ret
= aaci_pcm_hw_params(substream
, aacirun
, params
);
539 * Enable FIFO, compact mode, 16 bits per sample.
540 * FIXME: double rate slots?
543 aacirun
->cr
= TXCR_FEN
| TXCR_COMPACT
| TXCR_TSZ16
;
544 aacirun
->cr
|= channels_to_txmask
[channels
];
546 aacirun
->fifosz
= aaci
->fifosize
* 4;
547 if (aacirun
->cr
& TXCR_COMPACT
)
548 aacirun
->fifosz
>>= 1;
553 static void aaci_pcm_playback_stop(struct aaci_runtime
*aacirun
)
557 ie
= readl(aacirun
->base
+ AACI_IE
);
558 ie
&= ~(IE_URIE
|IE_TXIE
);
559 writel(ie
, aacirun
->base
+ AACI_IE
);
560 aacirun
->cr
&= ~TXCR_TXEN
;
561 aaci_chan_wait_ready(aacirun
);
562 writel(aacirun
->cr
, aacirun
->base
+ AACI_TXCR
);
565 static void aaci_pcm_playback_start(struct aaci_runtime
*aacirun
)
569 aaci_chan_wait_ready(aacirun
);
570 aacirun
->cr
|= TXCR_TXEN
;
572 ie
= readl(aacirun
->base
+ AACI_IE
);
573 ie
|= IE_URIE
| IE_TXIE
;
574 writel(ie
, aacirun
->base
+ AACI_IE
);
575 writel(aacirun
->cr
, aacirun
->base
+ AACI_TXCR
);
578 static int aaci_pcm_playback_trigger(struct snd_pcm_substream
*substream
, int cmd
)
580 struct aaci
*aaci
= substream
->private_data
;
581 struct aaci_runtime
*aacirun
= substream
->runtime
->private_data
;
585 spin_lock_irqsave(&aaci
->lock
, flags
);
587 case SNDRV_PCM_TRIGGER_START
:
588 aaci_pcm_playback_start(aacirun
);
591 case SNDRV_PCM_TRIGGER_RESUME
:
592 aaci_pcm_playback_start(aacirun
);
595 case SNDRV_PCM_TRIGGER_STOP
:
596 aaci_pcm_playback_stop(aacirun
);
599 case SNDRV_PCM_TRIGGER_SUSPEND
:
600 aaci_pcm_playback_stop(aacirun
);
603 case SNDRV_PCM_TRIGGER_PAUSE_PUSH
:
606 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE
:
612 spin_unlock_irqrestore(&aaci
->lock
, flags
);
617 static struct snd_pcm_ops aaci_playback_ops
= {
618 .open
= aaci_pcm_playback_open
,
619 .close
= aaci_pcm_close
,
620 .ioctl
= snd_pcm_lib_ioctl
,
621 .hw_params
= aaci_pcm_playback_hw_params
,
622 .hw_free
= aaci_pcm_hw_free
,
623 .prepare
= aaci_pcm_prepare
,
624 .trigger
= aaci_pcm_playback_trigger
,
625 .pointer
= aaci_pcm_pointer
,
626 .mmap
= aaci_pcm_mmap
,
635 static int aaci_do_suspend(struct snd_card
*card
, unsigned int state
)
637 struct aaci
*aaci
= card
->private_data
;
638 snd_power_change_state(card
, SNDRV_CTL_POWER_D3cold
);
639 snd_pcm_suspend_all(aaci
->pcm
);
643 static int aaci_do_resume(struct snd_card
*card
, unsigned int state
)
645 snd_power_change_state(card
, SNDRV_CTL_POWER_D0
);
649 static int aaci_suspend(struct amba_device
*dev
, pm_message_t state
)
651 struct snd_card
*card
= amba_get_drvdata(dev
);
652 return card
? aaci_do_suspend(card
) : 0;
655 static int aaci_resume(struct amba_device
*dev
)
657 struct snd_card
*card
= amba_get_drvdata(dev
);
658 return card
? aaci_do_resume(card
) : 0;
661 #define aaci_do_suspend NULL
662 #define aaci_do_resume NULL
663 #define aaci_suspend NULL
664 #define aaci_resume NULL
668 static struct ac97_pcm ac97_defs
[] __devinitdata
= {
669 [0] = { /* Front PCM */
673 .slots
= (1 << AC97_SLOT_PCM_LEFT
) |
674 (1 << AC97_SLOT_PCM_RIGHT
) |
675 (1 << AC97_SLOT_PCM_CENTER
) |
676 (1 << AC97_SLOT_PCM_SLEFT
) |
677 (1 << AC97_SLOT_PCM_SRIGHT
) |
678 (1 << AC97_SLOT_LFE
),
687 .slots
= (1 << AC97_SLOT_PCM_LEFT
) |
688 (1 << AC97_SLOT_PCM_RIGHT
),
697 .slots
= (1 << AC97_SLOT_MIC
),
703 static struct snd_ac97_bus_ops aaci_bus_ops
= {
704 .write
= aaci_ac97_write
,
705 .read
= aaci_ac97_read
,
708 static int __devinit
aaci_probe_ac97(struct aaci
*aaci
)
710 struct snd_ac97_template ac97_template
;
711 struct snd_ac97_bus
*ac97_bus
;
712 struct snd_ac97
*ac97
;
716 * Assert AACIRESET for 2us
718 writel(0, aaci
->base
+ AACI_RESET
);
720 writel(RESET_NRST
, aaci
->base
+ AACI_RESET
);
723 * Give the AC'97 codec more than enough time
724 * to wake up. (42us = ~2 frames at 48kHz.)
728 ret
= snd_ac97_bus(aaci
->card
, 0, &aaci_bus_ops
, aaci
, &ac97_bus
);
732 ac97_bus
->clock
= 48000;
733 aaci
->ac97_bus
= ac97_bus
;
735 memset(&ac97_template
, 0, sizeof(struct snd_ac97_template
));
736 ac97_template
.private_data
= aaci
;
737 ac97_template
.num
= 0;
738 ac97_template
.scaps
= AC97_SCAP_SKIP_MODEM
;
740 ret
= snd_ac97_mixer(ac97_bus
, &ac97_template
, &ac97
);
745 * Disable AC97 PC Beep input on audio codecs.
747 if (ac97_is_audio(ac97
))
748 snd_ac97_write_cache(ac97
, AC97_PC_BEEP
, 0x801e);
750 ret
= snd_ac97_pcm_assign(ac97_bus
, ARRAY_SIZE(ac97_defs
), ac97_defs
);
754 aaci
->playback
.pcm
= &ac97_bus
->pcms
[0];
760 static void aaci_free_card(struct snd_card
*card
)
762 struct aaci
*aaci
= card
->private_data
;
767 static struct aaci
* __devinit
aaci_init_card(struct amba_device
*dev
)
770 struct snd_card
*card
;
772 card
= snd_card_new(SNDRV_DEFAULT_IDX1
, SNDRV_DEFAULT_STR1
,
773 THIS_MODULE
, sizeof(struct aaci
));
775 return ERR_PTR(-ENOMEM
);
777 card
->private_free
= aaci_free_card
;
779 strlcpy(card
->driver
, DRIVER_NAME
, sizeof(card
->driver
));
780 strlcpy(card
->shortname
, "ARM AC'97 Interface", sizeof(card
->shortname
));
781 snprintf(card
->longname
, sizeof(card
->longname
),
782 "%s at 0x%016llx, irq %d",
783 card
->shortname
, (unsigned long long)dev
->res
.start
,
786 aaci
= card
->private_data
;
787 mutex_init(&aaci
->ac97_sem
);
788 spin_lock_init(&aaci
->lock
);
792 /* Set MAINCR to allow slot 1 and 2 data IO */
793 aaci
->maincr
= MAINCR_IE
| MAINCR_SL1RXEN
| MAINCR_SL1TXEN
|
794 MAINCR_SL2RXEN
| MAINCR_SL2TXEN
;
799 static int __devinit
aaci_init_pcm(struct aaci
*aaci
)
804 ret
= snd_pcm_new(aaci
->card
, "AACI AC'97", 0, 1, 0, &pcm
);
807 pcm
->private_data
= aaci
;
810 strlcpy(pcm
->name
, DRIVER_NAME
, sizeof(pcm
->name
));
812 snd_pcm_set_ops(pcm
, SNDRV_PCM_STREAM_PLAYBACK
, &aaci_playback_ops
);
818 static unsigned int __devinit
aaci_size_fifo(struct aaci
*aaci
)
820 void __iomem
*base
= aaci
->base
+ AACI_CSCH1
;
823 writel(TXCR_FEN
| TXCR_TSZ16
| TXCR_TXEN
, base
+ AACI_TXCR
);
825 for (i
= 0; !(readl(base
+ AACI_SR
) & SR_TXFF
) && i
< 4096; i
++)
826 writel(0, aaci
->base
+ AACI_DR1
);
828 writel(0, base
+ AACI_TXCR
);
831 * Re-initialise the AACI after the FIFO depth test, to
832 * ensure that the FIFOs are empty. Unfortunately, merely
833 * disabling the channel doesn't clear the FIFO.
835 writel(aaci
->maincr
& ~MAINCR_IE
, aaci
->base
+ AACI_MAINCR
);
836 writel(aaci
->maincr
, aaci
->base
+ AACI_MAINCR
);
839 * If we hit 4096, we failed. Go back to the specified
848 static int __devinit
aaci_probe(struct amba_device
*dev
, void *id
)
853 ret
= amba_request_regions(dev
, NULL
);
857 aaci
= aaci_init_card(dev
);
863 aaci
->base
= ioremap(dev
->res
.start
, SZ_4K
);
870 * Playback uses AACI channel 0
872 aaci
->playback
.base
= aaci
->base
+ AACI_CSCH1
;
873 aaci
->playback
.fifo
= aaci
->base
+ AACI_DR1
;
875 for (i
= 0; i
< 4; i
++) {
876 void __iomem
*base
= aaci
->base
+ i
* 0x14;
878 writel(0, base
+ AACI_IE
);
879 writel(0, base
+ AACI_TXCR
);
880 writel(0, base
+ AACI_RXCR
);
883 writel(0x1fff, aaci
->base
+ AACI_INTCLR
);
884 writel(aaci
->maincr
, aaci
->base
+ AACI_MAINCR
);
886 ret
= aaci_probe_ac97(aaci
);
891 * Size the FIFOs (must be multiple of 16).
893 aaci
->fifosize
= aaci_size_fifo(aaci
);
894 if (aaci
->fifosize
& 15) {
895 printk(KERN_WARNING
"AACI: fifosize = %d not supported\n",
901 ret
= aaci_init_pcm(aaci
);
905 snd_card_set_dev(aaci
->card
, &dev
->dev
);
907 ret
= snd_card_register(aaci
->card
);
909 dev_info(&dev
->dev
, "%s, fifo %d\n", aaci
->card
->longname
,
911 amba_set_drvdata(dev
, aaci
->card
);
917 snd_card_free(aaci
->card
);
918 amba_release_regions(dev
);
922 static int __devexit
aaci_remove(struct amba_device
*dev
)
924 struct snd_card
*card
= amba_get_drvdata(dev
);
926 amba_set_drvdata(dev
, NULL
);
929 struct aaci
*aaci
= card
->private_data
;
930 writel(0, aaci
->base
+ AACI_MAINCR
);
933 amba_release_regions(dev
);
939 static struct amba_id aaci_ids
[] = {
947 static struct amba_driver aaci_driver
= {
952 .remove
= __devexit_p(aaci_remove
),
953 .suspend
= aaci_suspend
,
954 .resume
= aaci_resume
,
955 .id_table
= aaci_ids
,
958 static int __init
aaci_init(void)
960 return amba_driver_register(&aaci_driver
);
963 static void __exit
aaci_exit(void)
965 amba_driver_unregister(&aaci_driver
);
968 module_init(aaci_init
);
969 module_exit(aaci_exit
);
971 MODULE_LICENSE("GPL");
972 MODULE_DESCRIPTION("ARM PrimeCell PL041 Advanced Audio CODEC Interface driver");