p54: enable 2.4/5GHz spectrum by eeprom bits.
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / p54 / p54common.c
blob2d022f83774c6be9fc77d2485c6bd564e2203271
2 /*
3 * Common code for mac80211 Prism54 drivers
5 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
6 * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
8 * Based on the islsm (softmac prism54) driver, which is:
9 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #include <linux/init.h>
17 #include <linux/firmware.h>
18 #include <linux/etherdevice.h>
20 #include <net/mac80211.h>
22 #include "p54.h"
23 #include "p54common.h"
25 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
26 MODULE_DESCRIPTION("Softmac Prism54 common code");
27 MODULE_LICENSE("GPL");
28 MODULE_ALIAS("prism54common");
30 static struct ieee80211_rate p54_bgrates[] = {
31 { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
32 { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
33 { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
34 { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
35 { .bitrate = 60, .hw_value = 4, },
36 { .bitrate = 90, .hw_value = 5, },
37 { .bitrate = 120, .hw_value = 6, },
38 { .bitrate = 180, .hw_value = 7, },
39 { .bitrate = 240, .hw_value = 8, },
40 { .bitrate = 360, .hw_value = 9, },
41 { .bitrate = 480, .hw_value = 10, },
42 { .bitrate = 540, .hw_value = 11, },
45 static struct ieee80211_channel p54_bgchannels[] = {
46 { .center_freq = 2412, .hw_value = 1, },
47 { .center_freq = 2417, .hw_value = 2, },
48 { .center_freq = 2422, .hw_value = 3, },
49 { .center_freq = 2427, .hw_value = 4, },
50 { .center_freq = 2432, .hw_value = 5, },
51 { .center_freq = 2437, .hw_value = 6, },
52 { .center_freq = 2442, .hw_value = 7, },
53 { .center_freq = 2447, .hw_value = 8, },
54 { .center_freq = 2452, .hw_value = 9, },
55 { .center_freq = 2457, .hw_value = 10, },
56 { .center_freq = 2462, .hw_value = 11, },
57 { .center_freq = 2467, .hw_value = 12, },
58 { .center_freq = 2472, .hw_value = 13, },
59 { .center_freq = 2484, .hw_value = 14, },
62 static struct ieee80211_supported_band band_2GHz = {
63 .channels = p54_bgchannels,
64 .n_channels = ARRAY_SIZE(p54_bgchannels),
65 .bitrates = p54_bgrates,
66 .n_bitrates = ARRAY_SIZE(p54_bgrates),
69 static struct ieee80211_rate p54_arates[] = {
70 { .bitrate = 60, .hw_value = 4, },
71 { .bitrate = 90, .hw_value = 5, },
72 { .bitrate = 120, .hw_value = 6, },
73 { .bitrate = 180, .hw_value = 7, },
74 { .bitrate = 240, .hw_value = 8, },
75 { .bitrate = 360, .hw_value = 9, },
76 { .bitrate = 480, .hw_value = 10, },
77 { .bitrate = 540, .hw_value = 11, },
80 static struct ieee80211_channel p54_achannels[] = {
81 { .center_freq = 4920 },
82 { .center_freq = 4940 },
83 { .center_freq = 4960 },
84 { .center_freq = 4980 },
85 { .center_freq = 5040 },
86 { .center_freq = 5060 },
87 { .center_freq = 5080 },
88 { .center_freq = 5170 },
89 { .center_freq = 5180 },
90 { .center_freq = 5190 },
91 { .center_freq = 5200 },
92 { .center_freq = 5210 },
93 { .center_freq = 5220 },
94 { .center_freq = 5230 },
95 { .center_freq = 5240 },
96 { .center_freq = 5260 },
97 { .center_freq = 5280 },
98 { .center_freq = 5300 },
99 { .center_freq = 5320 },
100 { .center_freq = 5500 },
101 { .center_freq = 5520 },
102 { .center_freq = 5540 },
103 { .center_freq = 5560 },
104 { .center_freq = 5580 },
105 { .center_freq = 5600 },
106 { .center_freq = 5620 },
107 { .center_freq = 5640 },
108 { .center_freq = 5660 },
109 { .center_freq = 5680 },
110 { .center_freq = 5700 },
111 { .center_freq = 5745 },
112 { .center_freq = 5765 },
113 { .center_freq = 5785 },
114 { .center_freq = 5805 },
115 { .center_freq = 5825 },
118 static struct ieee80211_supported_band band_5GHz = {
119 .channels = p54_achannels,
120 .n_channels = ARRAY_SIZE(p54_achannels),
121 .bitrates = p54_arates,
122 .n_bitrates = ARRAY_SIZE(p54_arates),
125 int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
127 struct p54_common *priv = dev->priv;
128 struct bootrec_exp_if *exp_if;
129 struct bootrec *bootrec;
130 u32 *data = (u32 *)fw->data;
131 u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
132 u8 *fw_version = NULL;
133 size_t len;
134 int i;
136 if (priv->rx_start)
137 return 0;
139 while (data < end_data && *data)
140 data++;
142 while (data < end_data && !*data)
143 data++;
145 bootrec = (struct bootrec *) data;
147 while (bootrec->data <= end_data &&
148 (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
149 u32 code = le32_to_cpu(bootrec->code);
150 switch (code) {
151 case BR_CODE_COMPONENT_ID:
152 priv->fw_interface = be32_to_cpup((__be32 *)
153 bootrec->data);
154 switch (priv->fw_interface) {
155 case FW_FMAC:
156 printk(KERN_INFO "p54: FreeMAC firmware\n");
157 break;
158 case FW_LM20:
159 printk(KERN_INFO "p54: LM20 firmware\n");
160 break;
161 case FW_LM86:
162 printk(KERN_INFO "p54: LM86 firmware\n");
163 break;
164 case FW_LM87:
165 printk(KERN_INFO "p54: LM87 firmware\n");
166 break;
167 default:
168 printk(KERN_INFO "p54: unknown firmware\n");
169 break;
171 break;
172 case BR_CODE_COMPONENT_VERSION:
173 /* 24 bytes should be enough for all firmwares */
174 if (strnlen((unsigned char*)bootrec->data, 24) < 24)
175 fw_version = (unsigned char*)bootrec->data;
176 break;
177 case BR_CODE_DESCR: {
178 struct bootrec_desc *desc =
179 (struct bootrec_desc *)bootrec->data;
180 priv->rx_start = le32_to_cpu(desc->rx_start);
181 /* FIXME add sanity checking */
182 priv->rx_end = le32_to_cpu(desc->rx_end) - 0x3500;
183 priv->headroom = desc->headroom;
184 priv->tailroom = desc->tailroom;
185 if (le32_to_cpu(bootrec->len) == 11)
186 priv->rx_mtu = le16_to_cpu(bootrec->rx_mtu);
187 else
188 priv->rx_mtu = (size_t)
189 0x620 - priv->tx_hdr_len;
190 break;
192 case BR_CODE_EXPOSED_IF:
193 exp_if = (struct bootrec_exp_if *) bootrec->data;
194 for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
195 if (exp_if[i].if_id == cpu_to_le16(0x1a))
196 priv->fw_var = le16_to_cpu(exp_if[i].variant);
197 break;
198 case BR_CODE_DEPENDENT_IF:
199 break;
200 case BR_CODE_END_OF_BRA:
201 case LEGACY_BR_CODE_END_OF_BRA:
202 end_data = NULL;
203 break;
204 default:
205 break;
207 bootrec = (struct bootrec *)&bootrec->data[len];
210 if (fw_version)
211 printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
212 fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
214 if (priv->fw_var >= 0x300) {
215 /* Firmware supports QoS, use it! */
216 priv->tx_stats[4].limit = 3;
217 priv->tx_stats[5].limit = 4;
218 priv->tx_stats[6].limit = 3;
219 priv->tx_stats[7].limit = 1;
220 dev->queues = 4;
223 return 0;
225 EXPORT_SYMBOL_GPL(p54_parse_firmware);
227 static int p54_convert_rev0(struct ieee80211_hw *dev,
228 struct pda_pa_curve_data *curve_data)
230 struct p54_common *priv = dev->priv;
231 struct p54_pa_curve_data_sample *dst;
232 struct pda_pa_curve_data_sample_rev0 *src;
233 size_t cd_len = sizeof(*curve_data) +
234 (curve_data->points_per_channel*sizeof(*dst) + 2) *
235 curve_data->channels;
236 unsigned int i, j;
237 void *source, *target;
239 priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
240 if (!priv->curve_data)
241 return -ENOMEM;
243 memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
244 source = curve_data->data;
245 target = priv->curve_data->data;
246 for (i = 0; i < curve_data->channels; i++) {
247 __le16 *freq = source;
248 source += sizeof(__le16);
249 *((__le16 *)target) = *freq;
250 target += sizeof(__le16);
251 for (j = 0; j < curve_data->points_per_channel; j++) {
252 dst = target;
253 src = source;
255 dst->rf_power = src->rf_power;
256 dst->pa_detector = src->pa_detector;
257 dst->data_64qam = src->pcv;
258 /* "invent" the points for the other modulations */
259 #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
260 dst->data_16qam = SUB(src->pcv, 12);
261 dst->data_qpsk = SUB(dst->data_16qam, 12);
262 dst->data_bpsk = SUB(dst->data_qpsk, 12);
263 dst->data_barker = SUB(dst->data_bpsk, 14);
264 #undef SUB
265 target += sizeof(*dst);
266 source += sizeof(*src);
270 return 0;
273 static int p54_convert_rev1(struct ieee80211_hw *dev,
274 struct pda_pa_curve_data *curve_data)
276 struct p54_common *priv = dev->priv;
277 struct p54_pa_curve_data_sample *dst;
278 struct pda_pa_curve_data_sample_rev1 *src;
279 size_t cd_len = sizeof(*curve_data) +
280 (curve_data->points_per_channel*sizeof(*dst) + 2) *
281 curve_data->channels;
282 unsigned int i, j;
283 void *source, *target;
285 priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
286 if (!priv->curve_data)
287 return -ENOMEM;
289 memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
290 source = curve_data->data;
291 target = priv->curve_data->data;
292 for (i = 0; i < curve_data->channels; i++) {
293 __le16 *freq = source;
294 source += sizeof(__le16);
295 *((__le16 *)target) = *freq;
296 target += sizeof(__le16);
297 for (j = 0; j < curve_data->points_per_channel; j++) {
298 memcpy(target, source, sizeof(*src));
300 target += sizeof(*dst);
301 source += sizeof(*src);
303 source++;
306 return 0;
309 static const char *p54_rf_chips[] = { "NULL", "Duette3", "Duette2",
310 "Frisbee", "Xbow", "Longbow", "NULL", "NULL" };
311 static int p54_init_xbow_synth(struct ieee80211_hw *dev);
313 static int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
315 struct p54_common *priv = dev->priv;
316 struct eeprom_pda_wrap *wrap = NULL;
317 struct pda_entry *entry;
318 unsigned int data_len, entry_len;
319 void *tmp;
320 int err;
321 u8 *end = (u8 *)eeprom + len;
322 u16 synth;
323 DECLARE_MAC_BUF(mac);
325 wrap = (struct eeprom_pda_wrap *) eeprom;
326 entry = (void *)wrap->data + le16_to_cpu(wrap->len);
328 /* verify that at least the entry length/code fits */
329 while ((u8 *)entry <= end - sizeof(*entry)) {
330 entry_len = le16_to_cpu(entry->len);
331 data_len = ((entry_len - 1) << 1);
333 /* abort if entry exceeds whole structure */
334 if ((u8 *)entry + sizeof(*entry) + data_len > end)
335 break;
337 switch (le16_to_cpu(entry->code)) {
338 case PDR_MAC_ADDRESS:
339 SET_IEEE80211_PERM_ADDR(dev, entry->data);
340 break;
341 case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
342 if (data_len < 2) {
343 err = -EINVAL;
344 goto err;
347 if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
348 err = -EINVAL;
349 goto err;
352 priv->output_limit = kmalloc(entry->data[1] *
353 sizeof(*priv->output_limit), GFP_KERNEL);
355 if (!priv->output_limit) {
356 err = -ENOMEM;
357 goto err;
360 memcpy(priv->output_limit, &entry->data[2],
361 entry->data[1]*sizeof(*priv->output_limit));
362 priv->output_limit_len = entry->data[1];
363 break;
364 case PDR_PRISM_PA_CAL_CURVE_DATA: {
365 struct pda_pa_curve_data *curve_data =
366 (struct pda_pa_curve_data *)entry->data;
367 if (data_len < sizeof(*curve_data)) {
368 err = -EINVAL;
369 goto err;
372 switch (curve_data->cal_method_rev) {
373 case 0:
374 err = p54_convert_rev0(dev, curve_data);
375 break;
376 case 1:
377 err = p54_convert_rev1(dev, curve_data);
378 break;
379 default:
380 printk(KERN_ERR "p54: unknown curve data "
381 "revision %d\n",
382 curve_data->cal_method_rev);
383 err = -ENODEV;
384 break;
386 if (err)
387 goto err;
390 case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
391 priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
392 if (!priv->iq_autocal) {
393 err = -ENOMEM;
394 goto err;
397 memcpy(priv->iq_autocal, entry->data, data_len);
398 priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
399 break;
400 case PDR_INTERFACE_LIST:
401 tmp = entry->data;
402 while ((u8 *)tmp < entry->data + data_len) {
403 struct bootrec_exp_if *exp_if = tmp;
404 if (le16_to_cpu(exp_if->if_id) == 0xf)
405 synth = le16_to_cpu(exp_if->variant);
406 tmp += sizeof(struct bootrec_exp_if);
408 break;
409 case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
410 priv->version = *(u8 *)(entry->data + 1);
411 break;
412 case PDR_END:
413 /* make it overrun */
414 entry_len = len;
415 break;
416 default:
417 printk(KERN_INFO "p54: unknown eeprom code : 0x%x\n",
418 le16_to_cpu(entry->code));
419 break;
422 entry = (void *)entry + (entry_len + 1)*2;
425 if (!priv->iq_autocal || !priv->output_limit || !priv->curve_data) {
426 printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
427 err = -EINVAL;
428 goto err;
431 priv->rxhw = synth & 0x07;
432 if (priv->rxhw == 4)
433 p54_init_xbow_synth(dev);
434 if (!(synth & 0x40))
435 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
436 if (!(synth & 0x80))
437 dev->wiphy->bands[IEEE80211_BAND_5GHZ] = &band_5GHz;
439 if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
440 u8 perm_addr[ETH_ALEN];
442 printk(KERN_WARNING "%s: Invalid hwaddr! Using randomly generated MAC addr\n",
443 wiphy_name(dev->wiphy));
444 random_ether_addr(perm_addr);
445 SET_IEEE80211_PERM_ADDR(dev, perm_addr);
448 printk(KERN_INFO "%s: hwaddr %s, MAC:isl38%02x RF:%s\n",
449 wiphy_name(dev->wiphy),
450 print_mac(mac, dev->wiphy->perm_addr),
451 priv->version, p54_rf_chips[priv->rxhw]);
453 return 0;
455 err:
456 if (priv->iq_autocal) {
457 kfree(priv->iq_autocal);
458 priv->iq_autocal = NULL;
461 if (priv->output_limit) {
462 kfree(priv->output_limit);
463 priv->output_limit = NULL;
466 if (priv->curve_data) {
467 kfree(priv->curve_data);
468 priv->curve_data = NULL;
471 printk(KERN_ERR "p54: eeprom parse failed!\n");
472 return err;
475 static int p54_rssi_to_dbm(struct ieee80211_hw *dev, int rssi)
477 /* TODO: get the rssi_add & rssi_mul data from the eeprom */
478 return ((rssi * 0x83) / 64 - 400) / 4;
481 static int p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
483 struct p54_common *priv = dev->priv;
484 struct p54_rx_hdr *hdr = (struct p54_rx_hdr *) skb->data;
485 struct ieee80211_rx_status rx_status = {0};
486 u16 freq = le16_to_cpu(hdr->freq);
487 size_t header_len = sizeof(*hdr);
488 u32 tsf32;
490 if (!(hdr->magic & cpu_to_le16(0x0001))) {
491 if (priv->filter_flags & FIF_FCSFAIL)
492 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
493 else
494 return 0;
497 rx_status.signal = p54_rssi_to_dbm(dev, hdr->rssi);
498 rx_status.noise = priv->noise;
499 /* XX correct? */
500 rx_status.qual = (100 * hdr->rssi) / 127;
501 rx_status.rate_idx = (dev->conf.channel->band == IEEE80211_BAND_2GHZ ?
502 hdr->rate : (hdr->rate - 4)) & 0xf;
503 rx_status.freq = freq;
504 rx_status.band = dev->conf.channel->band;
505 rx_status.antenna = hdr->antenna;
507 tsf32 = le32_to_cpu(hdr->tsf32);
508 if (tsf32 < priv->tsf_low32)
509 priv->tsf_high32++;
510 rx_status.mactime = ((u64)priv->tsf_high32) << 32 | tsf32;
511 priv->tsf_low32 = tsf32;
513 rx_status.flag |= RX_FLAG_TSFT;
515 if (hdr->magic & cpu_to_le16(0x4000))
516 header_len += hdr->align[0];
518 skb_pull(skb, header_len);
519 skb_trim(skb, le16_to_cpu(hdr->len));
521 ieee80211_rx_irqsafe(dev, skb, &rx_status);
523 return -1;
526 static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
528 struct p54_common *priv = dev->priv;
529 int i;
531 for (i = 0; i < dev->queues; i++)
532 if (priv->tx_stats[i + 4].len < priv->tx_stats[i + 4].limit)
533 ieee80211_wake_queue(dev, i);
536 static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
538 struct p54_common *priv = dev->priv;
539 struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
540 struct p54_frame_sent_hdr *payload = (struct p54_frame_sent_hdr *) hdr->data;
541 struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
542 u32 addr = le32_to_cpu(hdr->req_id) - priv->headroom;
543 struct memrecord *range = NULL;
544 u32 freed = 0;
545 u32 last_addr = priv->rx_start;
546 unsigned long flags;
548 spin_lock_irqsave(&priv->tx_queue.lock, flags);
549 while (entry != (struct sk_buff *)&priv->tx_queue) {
550 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
551 range = (void *)info->driver_data;
552 if (range->start_addr == addr) {
553 struct p54_control_hdr *entry_hdr;
554 struct p54_tx_control_allocdata *entry_data;
555 int pad = 0;
557 if (entry->next != (struct sk_buff *)&priv->tx_queue) {
558 struct ieee80211_tx_info *ni;
559 struct memrecord *mr;
561 ni = IEEE80211_SKB_CB(entry->next);
562 mr = (struct memrecord *)ni->driver_data;
563 freed = mr->start_addr - last_addr;
564 } else
565 freed = priv->rx_end - last_addr;
567 last_addr = range->end_addr;
568 __skb_unlink(entry, &priv->tx_queue);
569 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
571 memset(&info->status, 0, sizeof(info->status));
572 entry_hdr = (struct p54_control_hdr *) entry->data;
573 entry_data = (struct p54_tx_control_allocdata *) entry_hdr->data;
574 if ((entry_hdr->magic1 & cpu_to_le16(0x4000)) != 0)
575 pad = entry_data->align[0];
577 priv->tx_stats[entry_data->hw_queue].len--;
578 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
579 if (!(payload->status & 0x01))
580 info->flags |= IEEE80211_TX_STAT_ACK;
581 else
582 info->status.excessive_retries = 1;
584 info->status.retry_count = payload->retries - 1;
585 info->status.ack_signal = p54_rssi_to_dbm(dev,
586 le16_to_cpu(payload->ack_rssi));
587 skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
588 ieee80211_tx_status_irqsafe(dev, entry);
589 goto out;
590 } else
591 last_addr = range->end_addr;
592 entry = entry->next;
594 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
596 out:
597 if (freed >= IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
598 sizeof(struct p54_control_hdr))
599 p54_wake_free_queues(dev);
602 static void p54_rx_eeprom_readback(struct ieee80211_hw *dev,
603 struct sk_buff *skb)
605 struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
606 struct p54_eeprom_lm86 *eeprom = (struct p54_eeprom_lm86 *) hdr->data;
607 struct p54_common *priv = dev->priv;
609 if (!priv->eeprom)
610 return ;
612 memcpy(priv->eeprom, eeprom->data, le16_to_cpu(eeprom->len));
614 complete(&priv->eeprom_comp);
617 static void p54_rx_stats(struct ieee80211_hw *dev, struct sk_buff *skb)
619 struct p54_common *priv = dev->priv;
620 struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
621 struct p54_statistics *stats = (struct p54_statistics *) hdr->data;
622 u32 tsf32 = le32_to_cpu(stats->tsf32);
624 if (tsf32 < priv->tsf_low32)
625 priv->tsf_high32++;
626 priv->tsf_low32 = tsf32;
628 priv->stats.dot11RTSFailureCount = le32_to_cpu(stats->rts_fail);
629 priv->stats.dot11RTSSuccessCount = le32_to_cpu(stats->rts_success);
630 priv->stats.dot11FCSErrorCount = le32_to_cpu(stats->rx_bad_fcs);
632 priv->noise = p54_rssi_to_dbm(dev, le32_to_cpu(stats->noise));
633 complete(&priv->stats_comp);
635 mod_timer(&priv->stats_timer, jiffies + 5 * HZ);
638 static int p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
640 struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
642 switch (le16_to_cpu(hdr->type)) {
643 case P54_CONTROL_TYPE_TXDONE:
644 p54_rx_frame_sent(dev, skb);
645 break;
646 case P54_CONTROL_TYPE_BBP:
647 break;
648 case P54_CONTROL_TYPE_STAT_READBACK:
649 p54_rx_stats(dev, skb);
650 break;
651 case P54_CONTROL_TYPE_EEPROM_READBACK:
652 p54_rx_eeprom_readback(dev, skb);
653 break;
654 default:
655 printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
656 wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
657 break;
660 return 0;
663 /* returns zero if skb can be reused */
664 int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
666 u8 type = le16_to_cpu(*((__le16 *)skb->data)) >> 8;
668 if (type == 0x80)
669 return p54_rx_control(dev, skb);
670 else
671 return p54_rx_data(dev, skb);
673 EXPORT_SYMBOL_GPL(p54_rx);
676 * So, the firmware is somewhat stupid and doesn't know what places in its
677 * memory incoming data should go to. By poking around in the firmware, we
678 * can find some unused memory to upload our packets to. However, data that we
679 * want the card to TX needs to stay intact until the card has told us that
680 * it is done with it. This function finds empty places we can upload to and
681 * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
682 * allocated areas.
684 static void p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
685 struct p54_control_hdr *data, u32 len)
687 struct p54_common *priv = dev->priv;
688 struct sk_buff *entry = priv->tx_queue.next;
689 struct sk_buff *target_skb = NULL;
690 u32 last_addr = priv->rx_start;
691 u32 largest_hole = 0;
692 u32 target_addr = priv->rx_start;
693 unsigned long flags;
694 unsigned int left;
695 len = (len + priv->headroom + priv->tailroom + 3) & ~0x3;
697 spin_lock_irqsave(&priv->tx_queue.lock, flags);
698 left = skb_queue_len(&priv->tx_queue);
699 while (left--) {
700 u32 hole_size;
701 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
702 struct memrecord *range = (void *)info->driver_data;
703 hole_size = range->start_addr - last_addr;
704 if (!target_skb && hole_size >= len) {
705 target_skb = entry->prev;
706 hole_size -= len;
707 target_addr = last_addr;
709 largest_hole = max(largest_hole, hole_size);
710 last_addr = range->end_addr;
711 entry = entry->next;
713 if (!target_skb && priv->rx_end - last_addr >= len) {
714 target_skb = priv->tx_queue.prev;
715 largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
716 if (!skb_queue_empty(&priv->tx_queue)) {
717 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(target_skb);
718 struct memrecord *range = (void *)info->driver_data;
719 target_addr = range->end_addr;
721 } else
722 largest_hole = max(largest_hole, priv->rx_end - last_addr);
724 if (skb) {
725 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
726 struct memrecord *range = (void *)info->driver_data;
727 range->start_addr = target_addr;
728 range->end_addr = target_addr + len;
729 __skb_queue_after(&priv->tx_queue, target_skb, skb);
730 if (largest_hole < priv->rx_mtu + priv->headroom +
731 priv->tailroom +
732 sizeof(struct p54_control_hdr))
733 ieee80211_stop_queues(dev);
735 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
737 data->req_id = cpu_to_le32(target_addr + priv->headroom);
740 int p54_read_eeprom(struct ieee80211_hw *dev)
742 struct p54_common *priv = dev->priv;
743 struct p54_control_hdr *hdr = NULL;
744 struct p54_eeprom_lm86 *eeprom_hdr;
745 size_t eeprom_size = 0x2020, offset = 0, blocksize;
746 int ret = -ENOMEM;
747 void *eeprom = NULL;
749 hdr = (struct p54_control_hdr *)kzalloc(sizeof(*hdr) +
750 sizeof(*eeprom_hdr) + EEPROM_READBACK_LEN, GFP_KERNEL);
751 if (!hdr)
752 goto free;
754 priv->eeprom = kzalloc(EEPROM_READBACK_LEN, GFP_KERNEL);
755 if (!priv->eeprom)
756 goto free;
758 eeprom = kzalloc(eeprom_size, GFP_KERNEL);
759 if (!eeprom)
760 goto free;
762 hdr->magic1 = cpu_to_le16(0x8000);
763 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_EEPROM_READBACK);
764 hdr->retry1 = hdr->retry2 = 0;
765 eeprom_hdr = (struct p54_eeprom_lm86 *) hdr->data;
767 while (eeprom_size) {
768 blocksize = min(eeprom_size, (size_t)EEPROM_READBACK_LEN);
769 hdr->len = cpu_to_le16(blocksize + sizeof(*eeprom_hdr));
770 eeprom_hdr->offset = cpu_to_le16(offset);
771 eeprom_hdr->len = cpu_to_le16(blocksize);
772 p54_assign_address(dev, NULL, hdr, le16_to_cpu(hdr->len) +
773 sizeof(*hdr));
774 priv->tx(dev, hdr, le16_to_cpu(hdr->len) + sizeof(*hdr), 0);
776 if (!wait_for_completion_interruptible_timeout(&priv->eeprom_comp, HZ)) {
777 printk(KERN_ERR "%s: device does not respond!\n",
778 wiphy_name(dev->wiphy));
779 ret = -EBUSY;
780 goto free;
783 memcpy(eeprom + offset, priv->eeprom, blocksize);
784 offset += blocksize;
785 eeprom_size -= blocksize;
788 ret = p54_parse_eeprom(dev, eeprom, offset);
789 free:
790 kfree(priv->eeprom);
791 priv->eeprom = NULL;
792 kfree(hdr);
793 kfree(eeprom);
795 return ret;
797 EXPORT_SYMBOL_GPL(p54_read_eeprom);
799 static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
801 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
802 struct ieee80211_tx_queue_stats *current_queue;
803 struct p54_common *priv = dev->priv;
804 struct p54_control_hdr *hdr;
805 struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data;
806 struct p54_tx_control_allocdata *txhdr;
807 size_t padding, len;
808 u8 rate;
809 u8 cts_rate = 0x20;
811 current_queue = &priv->tx_stats[skb_get_queue_mapping(skb) + 4];
812 if (unlikely(current_queue->len > current_queue->limit))
813 return NETDEV_TX_BUSY;
814 current_queue->len++;
815 current_queue->count++;
816 if (current_queue->len == current_queue->limit)
817 ieee80211_stop_queue(dev, skb_get_queue_mapping(skb));
819 padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
820 len = skb->len;
822 txhdr = (struct p54_tx_control_allocdata *)
823 skb_push(skb, sizeof(*txhdr) + padding);
824 hdr = (struct p54_control_hdr *) skb_push(skb, sizeof(*hdr));
826 if (padding)
827 hdr->magic1 = cpu_to_le16(0x4010);
828 else
829 hdr->magic1 = cpu_to_le16(0x0010);
830 hdr->len = cpu_to_le16(len);
831 hdr->type = (info->flags & IEEE80211_TX_CTL_NO_ACK) ? 0 : cpu_to_le16(1);
832 hdr->retry1 = hdr->retry2 = info->control.retry_limit;
834 /* TODO: add support for alternate retry TX rates */
835 rate = ieee80211_get_tx_rate(dev, info)->hw_value;
836 if (info->flags & IEEE80211_TX_CTL_SHORT_PREAMBLE) {
837 rate |= 0x10;
838 cts_rate |= 0x10;
840 if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
841 rate |= 0x40;
842 cts_rate |= ieee80211_get_rts_cts_rate(dev, info)->hw_value;
843 } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
844 rate |= 0x20;
845 cts_rate |= ieee80211_get_rts_cts_rate(dev, info)->hw_value;
847 memset(txhdr->rateset, rate, 8);
848 txhdr->key_type = 0;
849 txhdr->key_len = 0;
850 txhdr->hw_queue = skb_get_queue_mapping(skb) + 4;
851 txhdr->tx_antenna = (info->antenna_sel_tx == 0) ?
852 2 : info->antenna_sel_tx - 1;
853 txhdr->output_power = priv->output_power;
854 txhdr->cts_rate = (info->flags & IEEE80211_TX_CTL_NO_ACK) ?
855 0 : cts_rate;
856 if (padding)
857 txhdr->align[0] = padding;
859 /* FIXME: The sequence that follows is needed for this driver to
860 * work with mac80211 since "mac80211: fix TX sequence numbers".
861 * As with the temporary code in rt2x00, changes will be needed
862 * to get proper sequence numbers on beacons. In addition, this
863 * patch places the sequence number in the hardware state, which
864 * limits us to a single virtual state.
866 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
867 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
868 priv->seqno += 0x10;
869 ieee80211hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
870 ieee80211hdr->seq_ctrl |= cpu_to_le16(priv->seqno);
872 /* modifies skb->cb and with it info, so must be last! */
873 p54_assign_address(dev, skb, hdr, skb->len);
875 priv->tx(dev, hdr, skb->len, 0);
876 return 0;
879 static int p54_set_filter(struct ieee80211_hw *dev, u16 filter_type,
880 const u8 *bssid)
882 struct p54_common *priv = dev->priv;
883 struct p54_control_hdr *hdr;
884 struct p54_tx_control_filter *filter;
885 size_t data_len;
887 hdr = kzalloc(sizeof(*hdr) + sizeof(*filter) +
888 priv->tx_hdr_len, GFP_ATOMIC);
889 if (!hdr)
890 return -ENOMEM;
892 hdr = (void *)hdr + priv->tx_hdr_len;
894 filter = (struct p54_tx_control_filter *) hdr->data;
895 hdr->magic1 = cpu_to_le16(0x8001);
896 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_FILTER_SET);
898 priv->filter_type = filter->filter_type = cpu_to_le16(filter_type);
899 memcpy(filter->mac_addr, priv->mac_addr, ETH_ALEN);
900 if (!bssid)
901 memset(filter->bssid, ~0, ETH_ALEN);
902 else
903 memcpy(filter->bssid, bssid, ETH_ALEN);
905 filter->rx_antenna = priv->rx_antenna;
907 if (priv->fw_var < 0x500) {
908 data_len = P54_TX_CONTROL_FILTER_V1_LEN;
909 filter->v1.basic_rate_mask = cpu_to_le32(0x15F);
910 filter->v1.rx_addr = cpu_to_le32(priv->rx_end);
911 filter->v1.max_rx = cpu_to_le16(priv->rx_mtu);
912 filter->v1.rxhw = cpu_to_le16(priv->rxhw);
913 filter->v1.wakeup_timer = cpu_to_le16(500);
914 } else {
915 data_len = P54_TX_CONTROL_FILTER_V2_LEN;
916 filter->v2.rx_addr = cpu_to_le32(priv->rx_end);
917 filter->v2.max_rx = cpu_to_le16(priv->rx_mtu);
918 filter->v2.rxhw = cpu_to_le16(priv->rxhw);
919 filter->v2.timer = cpu_to_le16(1000);
922 hdr->len = cpu_to_le16(data_len);
923 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + data_len);
924 priv->tx(dev, hdr, sizeof(*hdr) + data_len, 1);
925 return 0;
928 static int p54_set_freq(struct ieee80211_hw *dev, __le16 freq)
930 struct p54_common *priv = dev->priv;
931 struct p54_control_hdr *hdr;
932 struct p54_tx_control_channel *chan;
933 unsigned int i;
934 size_t data_len;
935 void *entry;
937 hdr = kzalloc(sizeof(*hdr) + sizeof(*chan) +
938 priv->tx_hdr_len, GFP_KERNEL);
939 if (!hdr)
940 return -ENOMEM;
942 hdr = (void *)hdr + priv->tx_hdr_len;
944 chan = (struct p54_tx_control_channel *) hdr->data;
946 hdr->magic1 = cpu_to_le16(0x8001);
948 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_CHANNEL_CHANGE);
950 chan->flags = cpu_to_le16(0x1);
951 chan->dwell = cpu_to_le16(0x0);
953 for (i = 0; i < priv->iq_autocal_len; i++) {
954 if (priv->iq_autocal[i].freq != freq)
955 continue;
957 memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
958 sizeof(*priv->iq_autocal));
959 break;
961 if (i == priv->iq_autocal_len)
962 goto err;
964 for (i = 0; i < priv->output_limit_len; i++) {
965 if (priv->output_limit[i].freq != freq)
966 continue;
968 chan->val_barker = 0x38;
969 chan->val_bpsk = chan->dup_bpsk =
970 priv->output_limit[i].val_bpsk;
971 chan->val_qpsk = chan->dup_qpsk =
972 priv->output_limit[i].val_qpsk;
973 chan->val_16qam = chan->dup_16qam =
974 priv->output_limit[i].val_16qam;
975 chan->val_64qam = chan->dup_64qam =
976 priv->output_limit[i].val_64qam;
977 break;
979 if (i == priv->output_limit_len)
980 goto err;
982 entry = priv->curve_data->data;
983 for (i = 0; i < priv->curve_data->channels; i++) {
984 if (*((__le16 *)entry) != freq) {
985 entry += sizeof(__le16);
986 entry += sizeof(struct p54_pa_curve_data_sample) *
987 priv->curve_data->points_per_channel;
988 continue;
991 entry += sizeof(__le16);
992 chan->pa_points_per_curve =
993 min(priv->curve_data->points_per_channel, (u8) 8);
995 memcpy(chan->curve_data, entry, sizeof(*chan->curve_data) *
996 chan->pa_points_per_curve);
997 break;
1000 if (priv->fw_var < 0x500) {
1001 data_len = P54_TX_CONTROL_CHANNEL_V1_LEN;
1002 chan->v1.rssical_mul = cpu_to_le16(130);
1003 chan->v1.rssical_add = cpu_to_le16(0xfe70);
1004 } else {
1005 data_len = P54_TX_CONTROL_CHANNEL_V2_LEN;
1006 chan->v2.rssical_mul = cpu_to_le16(130);
1007 chan->v2.rssical_add = cpu_to_le16(0xfe70);
1008 chan->v2.basic_rate_mask = cpu_to_le32(0x15f);
1011 hdr->len = cpu_to_le16(data_len);
1012 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + data_len);
1013 priv->tx(dev, hdr, sizeof(*hdr) + data_len, 1);
1014 return 0;
1016 err:
1017 printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
1018 kfree(hdr);
1019 return -EINVAL;
1022 static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
1024 struct p54_common *priv = dev->priv;
1025 struct p54_control_hdr *hdr;
1026 struct p54_tx_control_led *led;
1028 hdr = kzalloc(sizeof(*hdr) + sizeof(*led) +
1029 priv->tx_hdr_len, GFP_KERNEL);
1030 if (!hdr)
1031 return -ENOMEM;
1033 hdr = (void *)hdr + priv->tx_hdr_len;
1034 hdr->magic1 = cpu_to_le16(0x8001);
1035 hdr->len = cpu_to_le16(sizeof(*led));
1036 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_LED);
1037 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*led));
1039 led = (struct p54_tx_control_led *) hdr->data;
1040 led->mode = cpu_to_le16(mode);
1041 led->led_permanent = cpu_to_le16(link);
1042 led->led_temporary = cpu_to_le16(act);
1043 led->duration = cpu_to_le16(1000);
1045 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*led), 1);
1047 return 0;
1050 #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
1051 do { \
1052 queue.aifs = cpu_to_le16(ai_fs); \
1053 queue.cwmin = cpu_to_le16(cw_min); \
1054 queue.cwmax = cpu_to_le16(cw_max); \
1055 queue.txop = cpu_to_le16(_txop); \
1056 } while(0)
1058 static void p54_init_vdcf(struct ieee80211_hw *dev)
1060 struct p54_common *priv = dev->priv;
1061 struct p54_control_hdr *hdr;
1062 struct p54_tx_control_vdcf *vdcf;
1064 /* all USB V1 adapters need a extra headroom */
1065 hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
1066 hdr->magic1 = cpu_to_le16(0x8001);
1067 hdr->len = cpu_to_le16(sizeof(*vdcf));
1068 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_DCFINIT);
1069 hdr->req_id = cpu_to_le32(priv->rx_start);
1071 vdcf = (struct p54_tx_control_vdcf *) hdr->data;
1073 P54_SET_QUEUE(vdcf->queue[0], 0x0002, 0x0003, 0x0007, 47);
1074 P54_SET_QUEUE(vdcf->queue[1], 0x0002, 0x0007, 0x000f, 94);
1075 P54_SET_QUEUE(vdcf->queue[2], 0x0003, 0x000f, 0x03ff, 0);
1076 P54_SET_QUEUE(vdcf->queue[3], 0x0007, 0x000f, 0x03ff, 0);
1079 static void p54_set_vdcf(struct ieee80211_hw *dev)
1081 struct p54_common *priv = dev->priv;
1082 struct p54_control_hdr *hdr;
1083 struct p54_tx_control_vdcf *vdcf;
1085 hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
1087 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*vdcf));
1089 vdcf = (struct p54_tx_control_vdcf *) hdr->data;
1091 if (dev->conf.flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
1092 vdcf->slottime = 9;
1093 vdcf->magic1 = 0x10;
1094 vdcf->magic2 = 0x00;
1095 } else {
1096 vdcf->slottime = 20;
1097 vdcf->magic1 = 0x0a;
1098 vdcf->magic2 = 0x06;
1101 /* (see prism54/isl_oid.h for further details) */
1102 vdcf->frameburst = cpu_to_le16(0);
1104 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*vdcf), 0);
1107 static int p54_start(struct ieee80211_hw *dev)
1109 struct p54_common *priv = dev->priv;
1110 int err;
1112 if (!priv->cached_vdcf) {
1113 priv->cached_vdcf = kzalloc(sizeof(struct p54_tx_control_vdcf)+
1114 priv->tx_hdr_len + sizeof(struct p54_control_hdr),
1115 GFP_KERNEL);
1117 if (!priv->cached_vdcf)
1118 return -ENOMEM;
1121 if (!priv->cached_stats) {
1122 priv->cached_stats = kzalloc(sizeof(struct p54_statistics) +
1123 priv->tx_hdr_len + sizeof(struct p54_control_hdr),
1124 GFP_KERNEL);
1126 if (!priv->cached_stats) {
1127 kfree(priv->cached_vdcf);
1128 priv->cached_vdcf = NULL;
1129 return -ENOMEM;
1133 err = priv->open(dev);
1134 if (!err)
1135 priv->mode = NL80211_IFTYPE_MONITOR;
1137 p54_init_vdcf(dev);
1139 mod_timer(&priv->stats_timer, jiffies + HZ);
1140 return err;
1143 static void p54_stop(struct ieee80211_hw *dev)
1145 struct p54_common *priv = dev->priv;
1146 struct sk_buff *skb;
1148 del_timer(&priv->stats_timer);
1149 while ((skb = skb_dequeue(&priv->tx_queue)))
1150 kfree_skb(skb);
1151 priv->stop(dev);
1152 priv->tsf_high32 = priv->tsf_low32 = 0;
1153 priv->mode = NL80211_IFTYPE_UNSPECIFIED;
1156 static int p54_add_interface(struct ieee80211_hw *dev,
1157 struct ieee80211_if_init_conf *conf)
1159 struct p54_common *priv = dev->priv;
1161 if (priv->mode != NL80211_IFTYPE_MONITOR)
1162 return -EOPNOTSUPP;
1164 switch (conf->type) {
1165 case NL80211_IFTYPE_STATION:
1166 priv->mode = conf->type;
1167 break;
1168 default:
1169 return -EOPNOTSUPP;
1172 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
1174 p54_set_filter(dev, 0, NULL);
1176 switch (conf->type) {
1177 case NL80211_IFTYPE_STATION:
1178 p54_set_filter(dev, 1, NULL);
1179 break;
1180 default:
1181 BUG(); /* impossible */
1182 break;
1185 p54_set_leds(dev, 1, 0, 0);
1187 return 0;
1190 static void p54_remove_interface(struct ieee80211_hw *dev,
1191 struct ieee80211_if_init_conf *conf)
1193 struct p54_common *priv = dev->priv;
1194 priv->mode = NL80211_IFTYPE_MONITOR;
1195 memset(priv->mac_addr, 0, ETH_ALEN);
1196 p54_set_filter(dev, 0, NULL);
1199 static int p54_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
1201 int ret;
1202 struct p54_common *priv = dev->priv;
1204 mutex_lock(&priv->conf_mutex);
1205 priv->rx_antenna = (conf->antenna_sel_rx == 0) ?
1206 2 : conf->antenna_sel_tx - 1;
1207 priv->output_power = conf->power_level << 2;
1208 ret = p54_set_freq(dev, cpu_to_le16(conf->channel->center_freq));
1209 p54_set_vdcf(dev);
1210 mutex_unlock(&priv->conf_mutex);
1211 return ret;
1214 static int p54_config_interface(struct ieee80211_hw *dev,
1215 struct ieee80211_vif *vif,
1216 struct ieee80211_if_conf *conf)
1218 struct p54_common *priv = dev->priv;
1220 mutex_lock(&priv->conf_mutex);
1221 p54_set_filter(dev, 0, conf->bssid);
1222 p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0);
1223 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
1224 mutex_unlock(&priv->conf_mutex);
1225 return 0;
1228 static void p54_configure_filter(struct ieee80211_hw *dev,
1229 unsigned int changed_flags,
1230 unsigned int *total_flags,
1231 int mc_count, struct dev_mc_list *mclist)
1233 struct p54_common *priv = dev->priv;
1235 *total_flags &= FIF_BCN_PRBRESP_PROMISC |
1236 FIF_PROMISC_IN_BSS |
1237 FIF_FCSFAIL;
1239 priv->filter_flags = *total_flags;
1241 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1242 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1243 p54_set_filter(dev, le16_to_cpu(priv->filter_type),
1244 NULL);
1245 else
1246 p54_set_filter(dev, le16_to_cpu(priv->filter_type),
1247 priv->bssid);
1250 if (changed_flags & FIF_PROMISC_IN_BSS) {
1251 if (*total_flags & FIF_PROMISC_IN_BSS)
1252 p54_set_filter(dev, le16_to_cpu(priv->filter_type) |
1253 0x8, NULL);
1254 else
1255 p54_set_filter(dev, le16_to_cpu(priv->filter_type) &
1256 ~0x8, priv->bssid);
1260 static int p54_conf_tx(struct ieee80211_hw *dev, u16 queue,
1261 const struct ieee80211_tx_queue_params *params)
1263 struct p54_common *priv = dev->priv;
1264 struct p54_tx_control_vdcf *vdcf;
1266 vdcf = (struct p54_tx_control_vdcf *)(((struct p54_control_hdr *)
1267 ((void *)priv->cached_vdcf + priv->tx_hdr_len))->data);
1269 if ((params) && !(queue > 4)) {
1270 P54_SET_QUEUE(vdcf->queue[queue], params->aifs,
1271 params->cw_min, params->cw_max, params->txop);
1272 } else
1273 return -EINVAL;
1275 p54_set_vdcf(dev);
1277 return 0;
1280 static int p54_init_xbow_synth(struct ieee80211_hw *dev)
1282 struct p54_common *priv = dev->priv;
1283 struct p54_control_hdr *hdr;
1284 struct p54_tx_control_xbow_synth *xbow;
1286 hdr = kzalloc(sizeof(*hdr) + sizeof(*xbow) +
1287 priv->tx_hdr_len, GFP_KERNEL);
1288 if (!hdr)
1289 return -ENOMEM;
1291 hdr = (void *)hdr + priv->tx_hdr_len;
1292 hdr->magic1 = cpu_to_le16(0x8001);
1293 hdr->len = cpu_to_le16(sizeof(*xbow));
1294 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_XBOW_SYNTH_CFG);
1295 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*xbow));
1297 xbow = (struct p54_tx_control_xbow_synth *) hdr->data;
1298 xbow->magic1 = cpu_to_le16(0x1);
1299 xbow->magic2 = cpu_to_le16(0x2);
1300 xbow->freq = cpu_to_le16(5390);
1302 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*xbow), 1);
1304 return 0;
1307 static void p54_statistics_timer(unsigned long data)
1309 struct ieee80211_hw *dev = (struct ieee80211_hw *) data;
1310 struct p54_common *priv = dev->priv;
1311 struct p54_control_hdr *hdr;
1312 struct p54_statistics *stats;
1314 BUG_ON(!priv->cached_stats);
1316 hdr = (void *)priv->cached_stats + priv->tx_hdr_len;
1317 hdr->magic1 = cpu_to_le16(0x8000);
1318 hdr->len = cpu_to_le16(sizeof(*stats));
1319 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_STAT_READBACK);
1320 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*stats));
1322 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*stats), 0);
1325 static int p54_get_stats(struct ieee80211_hw *dev,
1326 struct ieee80211_low_level_stats *stats)
1328 struct p54_common *priv = dev->priv;
1330 del_timer(&priv->stats_timer);
1331 p54_statistics_timer((unsigned long)dev);
1333 if (!wait_for_completion_interruptible_timeout(&priv->stats_comp, HZ)) {
1334 printk(KERN_ERR "%s: device does not respond!\n",
1335 wiphy_name(dev->wiphy));
1336 return -EBUSY;
1339 memcpy(stats, &priv->stats, sizeof(*stats));
1341 return 0;
1344 static int p54_get_tx_stats(struct ieee80211_hw *dev,
1345 struct ieee80211_tx_queue_stats *stats)
1347 struct p54_common *priv = dev->priv;
1349 memcpy(stats, &priv->tx_stats[4], sizeof(stats[0]) * dev->queues);
1351 return 0;
1354 static const struct ieee80211_ops p54_ops = {
1355 .tx = p54_tx,
1356 .start = p54_start,
1357 .stop = p54_stop,
1358 .add_interface = p54_add_interface,
1359 .remove_interface = p54_remove_interface,
1360 .config = p54_config,
1361 .config_interface = p54_config_interface,
1362 .configure_filter = p54_configure_filter,
1363 .conf_tx = p54_conf_tx,
1364 .get_stats = p54_get_stats,
1365 .get_tx_stats = p54_get_tx_stats
1368 struct ieee80211_hw *p54_init_common(size_t priv_data_len)
1370 struct ieee80211_hw *dev;
1371 struct p54_common *priv;
1373 dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
1374 if (!dev)
1375 return NULL;
1377 priv = dev->priv;
1378 priv->mode = NL80211_IFTYPE_UNSPECIFIED;
1379 skb_queue_head_init(&priv->tx_queue);
1380 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | /* not sure */
1381 IEEE80211_HW_RX_INCLUDES_FCS |
1382 IEEE80211_HW_SIGNAL_DBM |
1383 IEEE80211_HW_NOISE_DBM;
1385 dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1387 dev->channel_change_time = 1000; /* TODO: find actual value */
1389 priv->tx_stats[0].limit = 1;
1390 priv->tx_stats[1].limit = 1;
1391 priv->tx_stats[2].limit = 1;
1392 priv->tx_stats[3].limit = 1;
1393 priv->tx_stats[4].limit = 5;
1394 dev->queues = 1;
1395 priv->noise = -94;
1396 dev->extra_tx_headroom = sizeof(struct p54_control_hdr) + 4 +
1397 sizeof(struct p54_tx_control_allocdata);
1399 mutex_init(&priv->conf_mutex);
1400 init_completion(&priv->eeprom_comp);
1401 init_completion(&priv->stats_comp);
1402 setup_timer(&priv->stats_timer, p54_statistics_timer,
1403 (unsigned long)dev);
1405 return dev;
1407 EXPORT_SYMBOL_GPL(p54_init_common);
1409 void p54_free_common(struct ieee80211_hw *dev)
1411 struct p54_common *priv = dev->priv;
1412 kfree(priv->cached_stats);
1413 kfree(priv->iq_autocal);
1414 kfree(priv->output_limit);
1415 kfree(priv->curve_data);
1416 kfree(priv->cached_vdcf);
1418 EXPORT_SYMBOL_GPL(p54_free_common);
1420 static int __init p54_init(void)
1422 return 0;
1425 static void __exit p54_exit(void)
1429 module_init(p54_init);
1430 module_exit(p54_exit);