2 * coretemp.c - Linux kernel module for hardware monitoring
4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
6 * Inspired from many hwmon drivers
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
23 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/jiffies.h>
29 #include <linux/hwmon.h>
30 #include <linux/sysfs.h>
31 #include <linux/hwmon-sysfs.h>
32 #include <linux/err.h>
33 #include <linux/mutex.h>
34 #include <linux/list.h>
35 #include <linux/platform_device.h>
36 #include <linux/cpu.h>
37 #include <linux/pci.h>
38 #include <linux/smp.h>
40 #include <asm/processor.h>
42 #define DRVNAME "coretemp"
44 #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */
45 #define NUM_REAL_CORES 16 /* Number of Real cores per cpu */
46 #define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */
47 #define MAX_ATTRS 5 /* Maximum no of per-core attrs */
48 #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
51 #define TO_PHYS_ID(cpu) cpu_data(cpu).phys_proc_id
52 #define TO_CORE_ID(cpu) cpu_data(cpu).cpu_core_id
53 #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
55 #define TO_PHYS_ID(cpu) (cpu)
56 #define TO_CORE_ID(cpu) (cpu)
57 #define TO_ATTR_NO(cpu) (cpu)
61 * Per-Core Temperature Data
62 * @last_updated: The time when the current temperature value was updated
63 * earlier (in jiffies).
64 * @cpu_core_id: The CPU Core from which temperature values should be read
65 * This value is passed as "id" field to rdmsr/wrmsr functions.
66 * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
67 * from where the temperature values should be read.
68 * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
69 * Otherwise, temp_data holds coretemp data.
70 * @valid: If this is 1, the current temperature is valid.
76 unsigned long last_updated
;
82 struct sensor_device_attribute sd_attrs
[MAX_ATTRS
];
83 char attr_name
[MAX_ATTRS
][CORETEMP_NAME_LENGTH
];
84 struct mutex update_lock
;
87 /* Platform Data per Physical CPU */
88 struct platform_data
{
89 struct device
*hwmon_dev
;
91 struct temp_data
*core_data
[MAX_CORE_DATA
];
92 struct device_attribute name_attr
;
96 struct list_head list
;
97 struct platform_device
*pdev
;
103 static LIST_HEAD(pdev_list
);
104 static DEFINE_MUTEX(pdev_list_mutex
);
106 static ssize_t
show_name(struct device
*dev
,
107 struct device_attribute
*devattr
, char *buf
)
109 return sprintf(buf
, "%s\n", DRVNAME
);
112 static ssize_t
show_label(struct device
*dev
,
113 struct device_attribute
*devattr
, char *buf
)
115 struct sensor_device_attribute
*attr
= to_sensor_dev_attr(devattr
);
116 struct platform_data
*pdata
= dev_get_drvdata(dev
);
117 struct temp_data
*tdata
= pdata
->core_data
[attr
->index
];
119 if (tdata
->is_pkg_data
)
120 return sprintf(buf
, "Physical id %u\n", pdata
->phys_proc_id
);
122 return sprintf(buf
, "Core %u\n", tdata
->cpu_core_id
);
125 static ssize_t
show_crit_alarm(struct device
*dev
,
126 struct device_attribute
*devattr
, char *buf
)
129 struct sensor_device_attribute
*attr
= to_sensor_dev_attr(devattr
);
130 struct platform_data
*pdata
= dev_get_drvdata(dev
);
131 struct temp_data
*tdata
= pdata
->core_data
[attr
->index
];
133 rdmsr_on_cpu(tdata
->cpu
, tdata
->status_reg
, &eax
, &edx
);
135 return sprintf(buf
, "%d\n", (eax
>> 5) & 1);
138 static ssize_t
show_tjmax(struct device
*dev
,
139 struct device_attribute
*devattr
, char *buf
)
141 struct sensor_device_attribute
*attr
= to_sensor_dev_attr(devattr
);
142 struct platform_data
*pdata
= dev_get_drvdata(dev
);
144 return sprintf(buf
, "%d\n", pdata
->core_data
[attr
->index
]->tjmax
);
147 static ssize_t
show_ttarget(struct device
*dev
,
148 struct device_attribute
*devattr
, char *buf
)
150 struct sensor_device_attribute
*attr
= to_sensor_dev_attr(devattr
);
151 struct platform_data
*pdata
= dev_get_drvdata(dev
);
153 return sprintf(buf
, "%d\n", pdata
->core_data
[attr
->index
]->ttarget
);
156 static ssize_t
show_temp(struct device
*dev
,
157 struct device_attribute
*devattr
, char *buf
)
160 struct sensor_device_attribute
*attr
= to_sensor_dev_attr(devattr
);
161 struct platform_data
*pdata
= dev_get_drvdata(dev
);
162 struct temp_data
*tdata
= pdata
->core_data
[attr
->index
];
164 mutex_lock(&tdata
->update_lock
);
166 /* Check whether the time interval has elapsed */
167 if (!tdata
->valid
|| time_after(jiffies
, tdata
->last_updated
+ HZ
)) {
168 rdmsr_on_cpu(tdata
->cpu
, tdata
->status_reg
, &eax
, &edx
);
170 /* Check whether the data is valid */
171 if (eax
& 0x80000000) {
172 tdata
->temp
= tdata
->tjmax
-
173 ((eax
>> 16) & 0x7f) * 1000;
176 tdata
->last_updated
= jiffies
;
179 mutex_unlock(&tdata
->update_lock
);
180 return tdata
->valid
? sprintf(buf
, "%d\n", tdata
->temp
) : -EAGAIN
;
183 static int adjust_tjmax(struct cpuinfo_x86
*c
, u32 id
, struct device
*dev
)
185 /* The 100C is default for both mobile and non mobile CPUs */
188 int tjmax_ee
= 85000;
192 struct pci_dev
*host_bridge
;
194 /* Early chips have no MSR for TjMax */
196 if (c
->x86_model
== 0xf && c
->x86_mask
< 4)
201 if (c
->x86_model
== 0x1c) {
204 host_bridge
= pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
206 if (host_bridge
&& host_bridge
->vendor
== PCI_VENDOR_ID_INTEL
207 && (host_bridge
->device
== 0xa000 /* NM10 based nettop */
208 || host_bridge
->device
== 0xa010)) /* NM10 based netbook */
213 pci_dev_put(host_bridge
);
216 if (c
->x86_model
> 0xe && usemsr_ee
) {
220 * Now we can detect the mobile CPU using Intel provided table
221 * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
222 * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
224 err
= rdmsr_safe_on_cpu(id
, 0x17, &eax
, &edx
);
227 "Unable to access MSR 0x17, assuming desktop"
230 } else if (c
->x86_model
< 0x17 && !(eax
& 0x10000000)) {
232 * Trust bit 28 up to Penryn, I could not find any
233 * documentation on that; if you happen to know
234 * someone at Intel please ask
238 /* Platform ID bits 52:50 (EDX starts at bit 32) */
239 platform_id
= (edx
>> 18) & 0x7;
242 * Mobile Penryn CPU seems to be platform ID 7 or 5
245 if (c
->x86_model
== 0x17 &&
246 (platform_id
== 5 || platform_id
== 7)) {
248 * If MSR EE bit is set, set it to 90 degrees C,
249 * otherwise 105 degrees C
258 err
= rdmsr_safe_on_cpu(id
, 0xee, &eax
, &edx
);
261 "Unable to access MSR 0xEE, for Tjmax, left"
263 } else if (eax
& 0x40000000) {
266 } else if (tjmax
== 100000) {
268 * If we don't use msr EE it means we are desktop CPU
269 * (with exeception of Atom)
271 dev_warn(dev
, "Using relative temperature scale!\n");
277 static int get_tjmax(struct cpuinfo_x86
*c
, u32 id
, struct device
*dev
)
279 /* The 100C is default for both mobile and non mobile CPUs */
285 * A new feature of current Intel(R) processors, the
286 * IA32_TEMPERATURE_TARGET contains the TjMax value
288 err
= rdmsr_safe_on_cpu(id
, MSR_IA32_TEMPERATURE_TARGET
, &eax
, &edx
);
290 dev_warn(dev
, "Unable to read TjMax from CPU.\n");
292 val
= (eax
>> 16) & 0xff;
294 * If the TjMax is not plausible, an assumption
297 if (val
> 80 && val
< 120) {
298 dev_info(dev
, "TjMax is %d C.\n", val
);
304 * An assumption is made for early CPUs and unreadable MSR.
305 * NOTE: the given value may not be correct.
308 switch (c
->x86_model
) {
313 dev_warn(dev
, "TjMax is assumed as 100 C!\n");
316 case 0x1c: /* Atom CPUs */
317 return adjust_tjmax(c
, id
, dev
);
319 dev_warn(dev
, "CPU (model=0x%x) is not supported yet,"
320 " using default TjMax of 100C.\n", c
->x86_model
);
325 static void __devinit
get_ucode_rev_on_cpu(void *edx
)
329 wrmsr(MSR_IA32_UCODE_REV
, 0, 0);
331 rdmsr(MSR_IA32_UCODE_REV
, eax
, *(u32
*)edx
);
334 static int get_pkg_tjmax(unsigned int cpu
, struct device
*dev
)
339 err
= rdmsr_safe_on_cpu(cpu
, MSR_IA32_TEMPERATURE_TARGET
, &eax
, &edx
);
341 val
= (eax
>> 16) & 0xff;
342 if (val
> 80 && val
< 120)
345 dev_warn(dev
, "Unable to read Pkg-TjMax from CPU:%u\n", cpu
);
346 return 100000; /* Default TjMax: 100 degree celsius */
349 static int create_name_attr(struct platform_data
*pdata
, struct device
*dev
)
351 pdata
->name_attr
.attr
.name
= "name";
352 pdata
->name_attr
.attr
.mode
= S_IRUGO
;
353 pdata
->name_attr
.show
= show_name
;
354 return device_create_file(dev
, &pdata
->name_attr
);
357 static int create_core_attrs(struct temp_data
*tdata
, struct device
*dev
,
361 static ssize_t (*rd_ptr
[MAX_ATTRS
]) (struct device
*dev
,
362 struct device_attribute
*devattr
, char *buf
) = {
363 show_label
, show_crit_alarm
, show_ttarget
,
364 show_temp
, show_tjmax
};
365 static const char *names
[MAX_ATTRS
] = {
366 "temp%d_label", "temp%d_crit_alarm",
367 "temp%d_max", "temp%d_input",
370 for (i
= 0; i
< MAX_ATTRS
; i
++) {
371 snprintf(tdata
->attr_name
[i
], CORETEMP_NAME_LENGTH
, names
[i
],
373 tdata
->sd_attrs
[i
].dev_attr
.attr
.name
= tdata
->attr_name
[i
];
374 tdata
->sd_attrs
[i
].dev_attr
.attr
.mode
= S_IRUGO
;
375 tdata
->sd_attrs
[i
].dev_attr
.show
= rd_ptr
[i
];
376 tdata
->sd_attrs
[i
].dev_attr
.store
= NULL
;
377 tdata
->sd_attrs
[i
].index
= attr_no
;
378 err
= device_create_file(dev
, &tdata
->sd_attrs
[i
].dev_attr
);
386 device_remove_file(dev
, &tdata
->sd_attrs
[i
].dev_attr
);
390 static void update_ttarget(__u8 cpu_model
, struct temp_data
*tdata
,
397 * Initialize ttarget value. Eventually this will be
398 * initialized with the value from MSR_IA32_THERM_INTERRUPT
399 * register. If IA32_TEMPERATURE_TARGET is supported, this
400 * value will be over written below.
401 * To Do: Patch to initialize ttarget from MSR_IA32_THERM_INTERRUPT
403 tdata
->ttarget
= tdata
->tjmax
- 20000;
406 * Read the still undocumented IA32_TEMPERATURE_TARGET. It exists
407 * on older CPUs but not in this register,
408 * Atoms don't have it either.
410 if (cpu_model
> 0xe && cpu_model
!= 0x1c) {
411 err
= rdmsr_safe_on_cpu(tdata
->cpu
,
412 MSR_IA32_TEMPERATURE_TARGET
, &eax
, &edx
);
415 "Unable to read IA32_TEMPERATURE_TARGET MSR\n");
417 tdata
->ttarget
= tdata
->tjmax
-
418 ((eax
>> 8) & 0xff) * 1000;
423 static int chk_ucode_version(struct platform_device
*pdev
)
425 struct cpuinfo_x86
*c
= &cpu_data(pdev
->id
);
430 * Check if we have problem with errata AE18 of Core processors:
431 * Readings might stop update when processor visited too deep sleep,
432 * fixed for stepping D0 (6EC).
434 if (c
->x86_model
== 0xe && c
->x86_mask
< 0xc) {
435 /* check for microcode update */
436 err
= smp_call_function_single(pdev
->id
, get_ucode_rev_on_cpu
,
440 "Cannot determine microcode revision of "
441 "CPU#%u (%d)!\n", pdev
->id
, err
);
443 } else if (edx
< 0x39) {
445 "Errata AE18 not fixed, update BIOS or "
446 "microcode of the CPU!\n");
453 static struct platform_device
*coretemp_get_pdev(unsigned int cpu
)
455 u16 phys_proc_id
= TO_PHYS_ID(cpu
);
456 struct pdev_entry
*p
;
458 mutex_lock(&pdev_list_mutex
);
460 list_for_each_entry(p
, &pdev_list
, list
)
461 if (p
->phys_proc_id
== phys_proc_id
) {
462 mutex_unlock(&pdev_list_mutex
);
466 mutex_unlock(&pdev_list_mutex
);
470 static struct temp_data
*init_temp_data(unsigned int cpu
, int pkg_flag
)
472 struct temp_data
*tdata
;
474 tdata
= kzalloc(sizeof(struct temp_data
), GFP_KERNEL
);
478 tdata
->status_reg
= pkg_flag
? MSR_IA32_PACKAGE_THERM_STATUS
:
479 MSR_IA32_THERM_STATUS
;
480 tdata
->is_pkg_data
= pkg_flag
;
482 tdata
->cpu_core_id
= TO_CORE_ID(cpu
);
483 mutex_init(&tdata
->update_lock
);
487 static int create_core_data(struct platform_data
*pdata
,
488 struct platform_device
*pdev
,
489 unsigned int cpu
, int pkg_flag
)
491 struct temp_data
*tdata
;
492 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
497 * Find attr number for sysfs:
498 * We map the attr number to core id of the CPU
499 * The attr number is always core id + 2
500 * The Pkgtemp will always show up as temp1_*, if available
502 attr_no
= pkg_flag
? 1 : TO_ATTR_NO(cpu
);
504 if (attr_no
> MAX_CORE_DATA
- 1)
507 /* Skip if it is a HT core, Not an error */
508 if (pdata
->core_data
[attr_no
] != NULL
)
511 tdata
= init_temp_data(cpu
, pkg_flag
);
515 /* Test if we can access the status register */
516 err
= rdmsr_safe_on_cpu(cpu
, tdata
->status_reg
, &eax
, &edx
);
520 /* We can access status register. Get Critical Temperature */
522 tdata
->tjmax
= get_pkg_tjmax(pdev
->id
, &pdev
->dev
);
524 tdata
->tjmax
= get_tjmax(c
, cpu
, &pdev
->dev
);
526 update_ttarget(c
->x86_model
, tdata
, &pdev
->dev
);
527 pdata
->core_data
[attr_no
] = tdata
;
529 /* Create sysfs interfaces */
530 err
= create_core_attrs(tdata
, &pdev
->dev
, attr_no
);
540 static void coretemp_add_core(unsigned int cpu
, int pkg_flag
)
542 struct platform_data
*pdata
;
543 struct platform_device
*pdev
= coretemp_get_pdev(cpu
);
549 pdata
= platform_get_drvdata(pdev
);
551 err
= create_core_data(pdata
, pdev
, cpu
, pkg_flag
);
553 dev_err(&pdev
->dev
, "Adding Core %u failed\n", cpu
);
556 static void coretemp_remove_core(struct platform_data
*pdata
,
557 struct device
*dev
, int indx
)
560 struct temp_data
*tdata
= pdata
->core_data
[indx
];
562 /* Remove the sysfs attributes */
563 for (i
= 0; i
< MAX_ATTRS
; i
++)
564 device_remove_file(dev
, &tdata
->sd_attrs
[i
].dev_attr
);
566 kfree(pdata
->core_data
[indx
]);
567 pdata
->core_data
[indx
] = NULL
;
570 static int __devinit
coretemp_probe(struct platform_device
*pdev
)
572 struct platform_data
*pdata
;
575 /* Check the microcode version of the CPU */
576 err
= chk_ucode_version(pdev
);
580 /* Initialize the per-package data structures */
581 pdata
= kzalloc(sizeof(struct platform_data
), GFP_KERNEL
);
585 err
= create_name_attr(pdata
, &pdev
->dev
);
589 pdata
->phys_proc_id
= TO_PHYS_ID(pdev
->id
);
590 platform_set_drvdata(pdev
, pdata
);
592 pdata
->hwmon_dev
= hwmon_device_register(&pdev
->dev
);
593 if (IS_ERR(pdata
->hwmon_dev
)) {
594 err
= PTR_ERR(pdata
->hwmon_dev
);
595 dev_err(&pdev
->dev
, "Class registration failed (%d)\n", err
);
601 device_remove_file(&pdev
->dev
, &pdata
->name_attr
);
602 platform_set_drvdata(pdev
, NULL
);
608 static int __devexit
coretemp_remove(struct platform_device
*pdev
)
610 struct platform_data
*pdata
= platform_get_drvdata(pdev
);
613 for (i
= MAX_CORE_DATA
- 1; i
>= 0; --i
)
614 if (pdata
->core_data
[i
])
615 coretemp_remove_core(pdata
, &pdev
->dev
, i
);
617 device_remove_file(&pdev
->dev
, &pdata
->name_attr
);
618 hwmon_device_unregister(pdata
->hwmon_dev
);
619 platform_set_drvdata(pdev
, NULL
);
624 static struct platform_driver coretemp_driver
= {
626 .owner
= THIS_MODULE
,
629 .probe
= coretemp_probe
,
630 .remove
= __devexit_p(coretemp_remove
),
633 static int __cpuinit
coretemp_device_add(unsigned int cpu
)
636 struct platform_device
*pdev
;
637 struct pdev_entry
*pdev_entry
;
639 mutex_lock(&pdev_list_mutex
);
641 pdev
= platform_device_alloc(DRVNAME
, cpu
);
644 pr_err("Device allocation failed\n");
648 pdev_entry
= kzalloc(sizeof(struct pdev_entry
), GFP_KERNEL
);
651 goto exit_device_put
;
654 err
= platform_device_add(pdev
);
656 pr_err("Device addition failed (%d)\n", err
);
657 goto exit_device_free
;
660 pdev_entry
->pdev
= pdev
;
661 pdev_entry
->cpu
= cpu
;
662 pdev_entry
->phys_proc_id
= TO_PHYS_ID(cpu
);
663 pdev_entry
->cpu_core_id
= TO_CORE_ID(cpu
);
665 list_add_tail(&pdev_entry
->list
, &pdev_list
);
666 mutex_unlock(&pdev_list_mutex
);
673 platform_device_put(pdev
);
675 mutex_unlock(&pdev_list_mutex
);
679 static void coretemp_device_remove(unsigned int cpu
)
681 struct pdev_entry
*p
, *n
;
682 u16 phys_proc_id
= TO_PHYS_ID(cpu
);
684 mutex_lock(&pdev_list_mutex
);
685 list_for_each_entry_safe(p
, n
, &pdev_list
, list
) {
686 if (p
->phys_proc_id
!= phys_proc_id
)
688 platform_device_unregister(p
->pdev
);
692 mutex_unlock(&pdev_list_mutex
);
695 static bool is_any_core_online(struct platform_data
*pdata
)
699 /* Find online cores, except pkgtemp data */
700 for (i
= MAX_CORE_DATA
- 1; i
>= 0; --i
) {
701 if (pdata
->core_data
[i
] &&
702 !pdata
->core_data
[i
]->is_pkg_data
) {
709 static void __cpuinit
get_core_online(unsigned int cpu
)
711 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
712 struct platform_device
*pdev
= coretemp_get_pdev(cpu
);
716 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
717 * sensors. We check this bit only, all the early CPUs
718 * without thermal sensors will be filtered out.
720 if (!cpu_has(c
, X86_FEATURE_DTS
))
725 * Alright, we have DTS support.
726 * We are bringing the _first_ core in this pkg
727 * online. So, initialize per-pkg data structures and
728 * then bring this core online.
730 err
= coretemp_device_add(cpu
);
734 * Check whether pkgtemp support is available.
735 * If so, add interfaces for pkgtemp.
737 if (cpu_has(c
, X86_FEATURE_PTS
))
738 coretemp_add_core(cpu
, 1);
741 * Physical CPU device already exists.
742 * So, just add interfaces for this core.
744 coretemp_add_core(cpu
, 0);
747 static void __cpuinit
put_core_offline(unsigned int cpu
)
750 struct platform_data
*pdata
;
751 struct platform_device
*pdev
= coretemp_get_pdev(cpu
);
753 /* If the physical CPU device does not exist, just return */
757 pdata
= platform_get_drvdata(pdev
);
759 indx
= TO_ATTR_NO(cpu
);
761 if (pdata
->core_data
[indx
] && pdata
->core_data
[indx
]->cpu
== cpu
)
762 coretemp_remove_core(pdata
, &pdev
->dev
, indx
);
764 /* Online the HT version of this core, if any */
765 for_each_cpu(i
, cpu_sibling_mask(cpu
)) {
772 * If all cores in this pkg are offline, remove the device.
773 * coretemp_device_remove calls unregister_platform_device,
774 * which in turn calls coretemp_remove. This removes the
775 * pkgtemp entry and does other clean ups.
777 if (!is_any_core_online(pdata
))
778 coretemp_device_remove(cpu
);
781 static int __cpuinit
coretemp_cpu_callback(struct notifier_block
*nfb
,
782 unsigned long action
, void *hcpu
)
784 unsigned int cpu
= (unsigned long) hcpu
;
788 case CPU_DOWN_FAILED
:
789 get_core_online(cpu
);
791 case CPU_DOWN_PREPARE
:
792 put_core_offline(cpu
);
798 static struct notifier_block coretemp_cpu_notifier __refdata
= {
799 .notifier_call
= coretemp_cpu_callback
,
802 static int __init
coretemp_init(void)
804 int i
, err
= -ENODEV
;
806 /* quick check if we run Intel */
807 if (cpu_data(0).x86_vendor
!= X86_VENDOR_INTEL
)
810 err
= platform_driver_register(&coretemp_driver
);
814 for_each_online_cpu(i
)
817 #ifndef CONFIG_HOTPLUG_CPU
818 if (list_empty(&pdev_list
)) {
820 goto exit_driver_unreg
;
824 register_hotcpu_notifier(&coretemp_cpu_notifier
);
827 #ifndef CONFIG_HOTPLUG_CPU
829 platform_driver_unregister(&coretemp_driver
);
835 static void __exit
coretemp_exit(void)
837 struct pdev_entry
*p
, *n
;
839 unregister_hotcpu_notifier(&coretemp_cpu_notifier
);
840 mutex_lock(&pdev_list_mutex
);
841 list_for_each_entry_safe(p
, n
, &pdev_list
, list
) {
842 platform_device_unregister(p
->pdev
);
846 mutex_unlock(&pdev_list_mutex
);
847 platform_driver_unregister(&coretemp_driver
);
850 MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
851 MODULE_DESCRIPTION("Intel Core temperature monitor");
852 MODULE_LICENSE("GPL");
854 module_init(coretemp_init
)
855 module_exit(coretemp_exit
)