ARM: 5873/1: ARM: Fix the reset logic for ARM RealView boards
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / arm / mach-realview / realview_pba8.c
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1 /*
2 * linux/arch/arm/mach-realview/realview_pba8.c
4 * Copyright (C) 2008 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/init.h>
23 #include <linux/platform_device.h>
24 #include <linux/sysdev.h>
25 #include <linux/amba/bus.h>
26 #include <linux/amba/pl061.h>
27 #include <linux/amba/mmci.h>
28 #include <linux/io.h>
30 #include <asm/irq.h>
31 #include <asm/leds.h>
32 #include <asm/mach-types.h>
33 #include <asm/hardware/gic.h>
34 #include <asm/hardware/icst307.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/time.h>
40 #include <mach/hardware.h>
41 #include <mach/board-pba8.h>
42 #include <mach/irqs.h>
44 #include "core.h"
45 #include "clock.h"
47 static struct map_desc realview_pba8_io_desc[] __initdata = {
49 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
50 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
51 .length = SZ_4K,
52 .type = MT_DEVICE,
53 }, {
54 .virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_CPU_BASE),
55 .pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_CPU_BASE),
56 .length = SZ_4K,
57 .type = MT_DEVICE,
58 }, {
59 .virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_DIST_BASE),
60 .pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_DIST_BASE),
61 .length = SZ_4K,
62 .type = MT_DEVICE,
63 }, {
64 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
65 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
66 .length = SZ_4K,
67 .type = MT_DEVICE,
68 }, {
69 .virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER0_1_BASE),
70 .pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER0_1_BASE),
71 .length = SZ_4K,
72 .type = MT_DEVICE,
73 }, {
74 .virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER2_3_BASE),
75 .pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER2_3_BASE),
76 .length = SZ_4K,
77 .type = MT_DEVICE,
79 #ifdef CONFIG_PCI
81 .virtual = PCIX_UNIT_BASE,
82 .pfn = __phys_to_pfn(REALVIEW_PBA8_PCI_BASE),
83 .length = REALVIEW_PBA8_PCI_BASE_SIZE,
84 .type = MT_DEVICE
86 #endif
87 #ifdef CONFIG_DEBUG_LL
89 .virtual = IO_ADDRESS(REALVIEW_PBA8_UART0_BASE),
90 .pfn = __phys_to_pfn(REALVIEW_PBA8_UART0_BASE),
91 .length = SZ_4K,
92 .type = MT_DEVICE,
94 #endif
97 static void __init realview_pba8_map_io(void)
99 iotable_init(realview_pba8_io_desc, ARRAY_SIZE(realview_pba8_io_desc));
102 static struct pl061_platform_data gpio0_plat_data = {
103 .gpio_base = 0,
104 .irq_base = -1,
107 static struct pl061_platform_data gpio1_plat_data = {
108 .gpio_base = 8,
109 .irq_base = -1,
112 static struct pl061_platform_data gpio2_plat_data = {
113 .gpio_base = 16,
114 .irq_base = -1,
118 * RealView PBA8Core AMBA devices
121 #define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ }
122 #define GPIO2_DMA { 0, 0 }
123 #define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ }
124 #define GPIO3_DMA { 0, 0 }
125 #define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ }
126 #define AACI_DMA { 0x80, 0x81 }
127 #define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
128 #define MMCI0_DMA { 0x84, 0 }
129 #define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ }
130 #define KMI0_DMA { 0, 0 }
131 #define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ }
132 #define KMI1_DMA { 0, 0 }
133 #define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ }
134 #define PBA8_SMC_DMA { 0, 0 }
135 #define MPMC_IRQ { NO_IRQ, NO_IRQ }
136 #define MPMC_DMA { 0, 0 }
137 #define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ }
138 #define PBA8_CLCD_DMA { 0, 0 }
139 #define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ }
140 #define DMAC_DMA { 0, 0 }
141 #define SCTL_IRQ { NO_IRQ, NO_IRQ }
142 #define SCTL_DMA { 0, 0 }
143 #define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ }
144 #define PBA8_WATCHDOG_DMA { 0, 0 }
145 #define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ }
146 #define PBA8_GPIO0_DMA { 0, 0 }
147 #define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ }
148 #define GPIO1_DMA { 0, 0 }
149 #define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ }
150 #define PBA8_RTC_DMA { 0, 0 }
151 #define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ }
152 #define SCI_DMA { 7, 6 }
153 #define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ }
154 #define PBA8_UART0_DMA { 15, 14 }
155 #define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ }
156 #define PBA8_UART1_DMA { 13, 12 }
157 #define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ }
158 #define PBA8_UART2_DMA { 11, 10 }
159 #define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ }
160 #define PBA8_UART3_DMA { 0x86, 0x87 }
161 #define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ }
162 #define PBA8_SSP_DMA { 9, 8 }
164 /* FPGA Primecells */
165 AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
166 AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
167 AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
168 AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
169 AMBA_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL);
171 /* DevChip Primecells */
172 AMBA_DEVICE(smc, "dev:smc", PBA8_SMC, NULL);
173 AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL);
174 AMBA_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL);
175 AMBA_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data);
176 AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
177 AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
178 AMBA_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL);
179 AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL);
180 AMBA_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL);
181 AMBA_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL);
182 AMBA_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL);
183 AMBA_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, NULL);
185 /* Primecells on the NEC ISSP chip */
186 AMBA_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data);
187 AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL);
189 static struct amba_device *amba_devs[] __initdata = {
190 &dmac_device,
191 &uart0_device,
192 &uart1_device,
193 &uart2_device,
194 &uart3_device,
195 &smc_device,
196 &clcd_device,
197 &sctl_device,
198 &wdog_device,
199 &gpio0_device,
200 &gpio1_device,
201 &gpio2_device,
202 &rtc_device,
203 &sci0_device,
204 &ssp0_device,
205 &aaci_device,
206 &mmc0_device,
207 &kmi0_device,
208 &kmi1_device,
212 * RealView PB-A8 platform devices
214 static struct resource realview_pba8_flash_resource[] = {
215 [0] = {
216 .start = REALVIEW_PBA8_FLASH0_BASE,
217 .end = REALVIEW_PBA8_FLASH0_BASE + REALVIEW_PBA8_FLASH0_SIZE - 1,
218 .flags = IORESOURCE_MEM,
220 [1] = {
221 .start = REALVIEW_PBA8_FLASH1_BASE,
222 .end = REALVIEW_PBA8_FLASH1_BASE + REALVIEW_PBA8_FLASH1_SIZE - 1,
223 .flags = IORESOURCE_MEM,
227 static struct resource realview_pba8_smsc911x_resources[] = {
228 [0] = {
229 .start = REALVIEW_PBA8_ETH_BASE,
230 .end = REALVIEW_PBA8_ETH_BASE + SZ_64K - 1,
231 .flags = IORESOURCE_MEM,
233 [1] = {
234 .start = IRQ_PBA8_ETH,
235 .end = IRQ_PBA8_ETH,
236 .flags = IORESOURCE_IRQ,
240 static struct resource realview_pba8_isp1761_resources[] = {
241 [0] = {
242 .start = REALVIEW_PBA8_USB_BASE,
243 .end = REALVIEW_PBA8_USB_BASE + SZ_128K - 1,
244 .flags = IORESOURCE_MEM,
246 [1] = {
247 .start = IRQ_PBA8_USB,
248 .end = IRQ_PBA8_USB,
249 .flags = IORESOURCE_IRQ,
253 static void __init gic_init_irq(void)
255 /* ARM PB-A8 on-board GIC */
256 gic_cpu_base_addr = __io_address(REALVIEW_PBA8_GIC_CPU_BASE);
257 gic_dist_init(0, __io_address(REALVIEW_PBA8_GIC_DIST_BASE), IRQ_PBA8_GIC_START);
258 gic_cpu_init(0, __io_address(REALVIEW_PBA8_GIC_CPU_BASE));
261 static void __init realview_pba8_timer_init(void)
263 timer0_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE);
264 timer1_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE) + 0x20;
265 timer2_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE);
266 timer3_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE) + 0x20;
268 realview_timer_init(IRQ_PBA8_TIMER0_1);
271 static struct sys_timer realview_pba8_timer = {
272 .init = realview_pba8_timer_init,
275 static void realview_pba8_reset(char mode)
277 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
278 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
281 * To reset, we hit the on-board reset register
282 * in the system FPGA
284 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
285 __raw_writel(0x0000, reset_ctrl);
286 __raw_writel(0x0004, reset_ctrl);
289 static void __init realview_pba8_init(void)
291 int i;
293 realview_flash_register(realview_pba8_flash_resource,
294 ARRAY_SIZE(realview_pba8_flash_resource));
295 realview_eth_register(NULL, realview_pba8_smsc911x_resources);
296 platform_device_register(&realview_i2c_device);
297 platform_device_register(&realview_cf_device);
298 realview_usb_register(realview_pba8_isp1761_resources);
300 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
301 struct amba_device *d = amba_devs[i];
302 amba_device_register(d, &iomem_resource);
305 #ifdef CONFIG_LEDS
306 leds_event = realview_leds_event;
307 #endif
308 realview_reset = realview_pba8_reset;
311 MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
312 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
313 .phys_io = REALVIEW_PBA8_UART0_BASE,
314 .io_pg_offst = (IO_ADDRESS(REALVIEW_PBA8_UART0_BASE) >> 18) & 0xfffc,
315 .boot_params = PHYS_OFFSET + 0x00000100,
316 .fixup = realview_fixup,
317 .map_io = realview_pba8_map_io,
318 .init_irq = gic_init_irq,
319 .timer = &realview_pba8_timer,
320 .init_machine = realview_pba8_init,
321 MACHINE_END