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brcmsmac: fix tx queue flush infinite loop
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / usb / gadget / s3c2410_udc.c
blobb8643771fa80eb6a27c4eac0c481659970bcb245
1 /*
2 * linux/drivers/usb/gadget/s3c2410_udc.c
3 *
4 * Samsung S3C24xx series on-chip full speed USB device controllers
5 *
6 * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard
7 * Additional cleanups by Ben Dooks <ben-linux@fluff.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/delay.h>
18 #include <linux/ioport.h>
19 #include <linux/sched.h>
20 #include <linux/slab.h>
21 #include <linux/errno.h>
22 #include <linux/init.h>
23 #include <linux/timer.h>
24 #include <linux/list.h>
25 #include <linux/interrupt.h>
26 #include <linux/platform_device.h>
27 #include <linux/clk.h>
28 #include <linux/gpio.h>
29 #include <linux/prefetch.h>
30
31 #include <linux/debugfs.h>
32 #include <linux/seq_file.h>
33
34 #include <linux/usb.h>
35 #include <linux/usb/gadget.h>
36
37 #include <asm/byteorder.h>
38 #include <asm/io.h>
39 #include <asm/irq.h>
40 #include <asm/system.h>
41 #include <asm/unaligned.h>
42 #include <mach/irqs.h>
43
44 #include <mach/hardware.h>
45
46 #include <plat/regs-udc.h>
47 #include <plat/udc.h>
48
49
50 #include "s3c2410_udc.h"
51
52 #define DRIVER_DESC "S3C2410 USB Device Controller Gadget"
53 #define DRIVER_VERSION "29 Apr 2007"
54 #define DRIVER_AUTHOR "Herbert Pötzl <herbert@13thfloor.at>, " \
55 "Arnaud Patard <arnaud.patard@rtp-net.org>"
56
57 static const char gadget_name[] = "s3c2410_udc";
58 static const char driver_desc[] = DRIVER_DESC;
59
60 static struct s3c2410_udc *the_controller;
61 static struct clk *udc_clock;
62 static struct clk *usb_bus_clock;
63 static void __iomem *base_addr;
64 static u64 rsrc_start;
65 static u64 rsrc_len;
66 static struct dentry *s3c2410_udc_debugfs_root;
67
68 static inline u32 udc_read(u32 reg)
69 {
70 return readb(base_addr + reg);
71 }
72
73 static inline void udc_write(u32 value, u32 reg)
74 {
75 writeb(value, base_addr + reg);
76 }
77
78 static inline void udc_writeb(void __iomem *base, u32 value, u32 reg)
79 {
80 writeb(value, base + reg);
81 }
82
83 static struct s3c2410_udc_mach_info *udc_info;
84
85 /*************************** DEBUG FUNCTION ***************************/
86 #define DEBUG_NORMAL 1
87 #define DEBUG_VERBOSE 2
88
89 #ifdef CONFIG_USB_S3C2410_DEBUG
90 #define USB_S3C2410_DEBUG_LEVEL 0
91
92 static uint32_t s3c2410_ticks = 0;
93
94 static int dprintk(int level, const char *fmt, ...)
95 {
96 static char printk_buf[1024];
97 static long prevticks;
98 static int invocation;
99 va_list args;
100 int len;
101
102 if (level > USB_S3C2410_DEBUG_LEVEL)
103 return 0;
104
105 if (s3c2410_ticks != prevticks) {
106 prevticks = s3c2410_ticks;
107 invocation = 0;
108 }
109
110 len = scnprintf(printk_buf,
111 sizeof(printk_buf), "%1lu.%02d USB: ",
112 prevticks, invocation++);
113
114 va_start(args, fmt);
115 len = vscnprintf(printk_buf+len,
116 sizeof(printk_buf)-len, fmt, args);
117 va_end(args);
118
119 return printk(KERN_DEBUG "%s", printk_buf);
120 }
121 #else
122 static int dprintk(int level, const char *fmt, ...)
123 {
124 return 0;
125 }
126 #endif
127 static int s3c2410_udc_debugfs_seq_show(struct seq_file *m, void *p)
128 {
129 u32 addr_reg,pwr_reg,ep_int_reg,usb_int_reg;
130 u32 ep_int_en_reg, usb_int_en_reg, ep0_csr;
131 u32 ep1_i_csr1,ep1_i_csr2,ep1_o_csr1,ep1_o_csr2;
132 u32 ep2_i_csr1,ep2_i_csr2,ep2_o_csr1,ep2_o_csr2;
133
134 addr_reg = udc_read(S3C2410_UDC_FUNC_ADDR_REG);
135 pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
136 ep_int_reg = udc_read(S3C2410_UDC_EP_INT_REG);
137 usb_int_reg = udc_read(S3C2410_UDC_USB_INT_REG);
138 ep_int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
139 usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG);
140 udc_write(0, S3C2410_UDC_INDEX_REG);
141 ep0_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
142 udc_write(1, S3C2410_UDC_INDEX_REG);
143 ep1_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
144 ep1_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
145 ep1_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
146 ep1_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
147 udc_write(2, S3C2410_UDC_INDEX_REG);
148 ep2_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
149 ep2_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
150 ep2_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
151 ep2_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
152
153 seq_printf(m, "FUNC_ADDR_REG : 0x%04X\n"
154 "PWR_REG : 0x%04X\n"
155 "EP_INT_REG : 0x%04X\n"
156 "USB_INT_REG : 0x%04X\n"
157 "EP_INT_EN_REG : 0x%04X\n"
158 "USB_INT_EN_REG : 0x%04X\n"
159 "EP0_CSR : 0x%04X\n"
160 "EP1_I_CSR1 : 0x%04X\n"
161 "EP1_I_CSR2 : 0x%04X\n"
162 "EP1_O_CSR1 : 0x%04X\n"
163 "EP1_O_CSR2 : 0x%04X\n"
164 "EP2_I_CSR1 : 0x%04X\n"
165 "EP2_I_CSR2 : 0x%04X\n"
166 "EP2_O_CSR1 : 0x%04X\n"
167 "EP2_O_CSR2 : 0x%04X\n",
168 addr_reg,pwr_reg,ep_int_reg,usb_int_reg,
169 ep_int_en_reg, usb_int_en_reg, ep0_csr,
170 ep1_i_csr1,ep1_i_csr2,ep1_o_csr1,ep1_o_csr2,
171 ep2_i_csr1,ep2_i_csr2,ep2_o_csr1,ep2_o_csr2
172 );
173
174 return 0;
175 }
176
177 static int s3c2410_udc_debugfs_fops_open(struct inode *inode,
178 struct file *file)
179 {
180 return single_open(file, s3c2410_udc_debugfs_seq_show, NULL);
181 }
182
183 static const struct file_operations s3c2410_udc_debugfs_fops = {
184 .open = s3c2410_udc_debugfs_fops_open,
185 .read = seq_read,
186 .llseek = seq_lseek,
187 .release = single_release,
188 .owner = THIS_MODULE,
189 };
190
191 /* io macros */
192
193 static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base)
194 {
195 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
196 udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY,
197 S3C2410_UDC_EP0_CSR_REG);
198 }
199
200 static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base)
201 {
202 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
203 writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG);
204 }
205
206 static inline void s3c2410_udc_clear_ep0_se(void __iomem *base)
207 {
208 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
209 udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG);
210 }
211
212 static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base)
213 {
214 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
215 udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG);
216 }
217
218 static inline void s3c2410_udc_set_ep0_de(void __iomem *base)
219 {
220 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
221 udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG);
222 }
223
224 inline void s3c2410_udc_set_ep0_ss(void __iomem *b)
225 {
226 udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
227 udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG);
228 }
229
230 static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base)
231 {
232 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
233
234 udc_writeb(base,(S3C2410_UDC_EP0_CSR_SOPKTRDY
235 | S3C2410_UDC_EP0_CSR_DE),
236 S3C2410_UDC_EP0_CSR_REG);
237 }
238
239 static inline void s3c2410_udc_set_ep0_sse_out(void __iomem *base)
240 {
241 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
242 udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY
243 | S3C2410_UDC_EP0_CSR_SSE),
244 S3C2410_UDC_EP0_CSR_REG);
245 }
246
247 static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base)
248 {
249 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
250 udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY
251 | S3C2410_UDC_EP0_CSR_DE),
252 S3C2410_UDC_EP0_CSR_REG);
253 }
254
255 /*------------------------- I/O ----------------------------------*/
256
257 /*
258 * s3c2410_udc_done
259 */
260 static void s3c2410_udc_done(struct s3c2410_ep *ep,
261 struct s3c2410_request *req, int status)
262 {
263 unsigned halted = ep->halted;
264
265 list_del_init(&req->queue);
266
267 if (likely (req->req.status == -EINPROGRESS))
268 req->req.status = status;
269 else
270 status = req->req.status;
271
272 ep->halted = 1;
273 req->req.complete(&ep->ep, &req->req);
274 ep->halted = halted;
275 }
276
277 static void s3c2410_udc_nuke(struct s3c2410_udc *udc,
278 struct s3c2410_ep *ep, int status)
279 {
280 /* Sanity check */
281 if (&ep->queue == NULL)
282 return;
283
284 while (!list_empty (&ep->queue)) {
285 struct s3c2410_request *req;
286 req = list_entry (ep->queue.next, struct s3c2410_request,
287 queue);
288 s3c2410_udc_done(ep, req, status);
289 }
290 }
291
292 static inline void s3c2410_udc_clear_ep_state(struct s3c2410_udc *dev)
293 {
294 unsigned i;
295
296 /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
297 * fifos, and pending transactions mustn't be continued in any case.
298 */
299
300 for (i = 1; i < S3C2410_ENDPOINTS; i++)
301 s3c2410_udc_nuke(dev, &dev->ep[i], -ECONNABORTED);
302 }
303
304 static inline int s3c2410_udc_fifo_count_out(void)
305 {
306 int tmp;
307
308 tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8;
309 tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG);
310 return tmp;
311 }
312
313 /*
314 * s3c2410_udc_write_packet
315 */
316 static inline int s3c2410_udc_write_packet(int fifo,
317 struct s3c2410_request *req,
318 unsigned max)
319 {
320 unsigned len = min(req->req.length - req->req.actual, max);
321 u8 *buf = req->req.buf + req->req.actual;
322
323 prefetch(buf);
324
325 dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__,
326 req->req.actual, req->req.length, len, req->req.actual + len);
327
328 req->req.actual += len;
329
330 udelay(5);
331 writesb(base_addr + fifo, buf, len);
332 return len;
333 }
334
335 /*
336 * s3c2410_udc_write_fifo
337 *
338 * return: 0 = still running, 1 = completed, negative = errno
339 */
340 static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep,
341 struct s3c2410_request *req)
342 {
343 unsigned count;
344 int is_last;
345 u32 idx;
346 int fifo_reg;
347 u32 ep_csr;
348
349 idx = ep->bEndpointAddress & 0x7F;
350 switch (idx) {
351 default:
352 idx = 0;
353 case 0:
354 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
355 break;
356 case 1:
357 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
358 break;
359 case 2:
360 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
361 break;
362 case 3:
363 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
364 break;
365 case 4:
366 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
367 break;
368 }
369
370 count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket);
371
372 /* last packet is often short (sometimes a zlp) */
373 if (count != ep->ep.maxpacket)
374 is_last = 1;
375 else if (req->req.length != req->req.actual || req->req.zero)
376 is_last = 0;
377 else
378 is_last = 2;
379
380 /* Only ep0 debug messages are interesting */
381 if (idx == 0)
382 dprintk(DEBUG_NORMAL,
383 "Written ep%d %d.%d of %d b [last %d,z %d]\n",
384 idx, count, req->req.actual, req->req.length,
385 is_last, req->req.zero);
386
387 if (is_last) {
388 /* The order is important. It prevents sending 2 packets
389 * at the same time */
390
391 if (idx == 0) {
392 /* Reset signal => no need to say 'data sent' */
393 if (! (udc_read(S3C2410_UDC_USB_INT_REG)
394 & S3C2410_UDC_USBINT_RESET))
395 s3c2410_udc_set_ep0_de_in(base_addr);
396 ep->dev->ep0state=EP0_IDLE;
397 } else {
398 udc_write(idx, S3C2410_UDC_INDEX_REG);
399 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
400 udc_write(idx, S3C2410_UDC_INDEX_REG);
401 udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
402 S3C2410_UDC_IN_CSR1_REG);
403 }
404
405 s3c2410_udc_done(ep, req, 0);
406 is_last = 1;
407 } else {
408 if (idx == 0) {
409 /* Reset signal => no need to say 'data sent' */
410 if (! (udc_read(S3C2410_UDC_USB_INT_REG)
411 & S3C2410_UDC_USBINT_RESET))
412 s3c2410_udc_set_ep0_ipr(base_addr);
413 } else {
414 udc_write(idx, S3C2410_UDC_INDEX_REG);
415 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
416 udc_write(idx, S3C2410_UDC_INDEX_REG);
417 udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
418 S3C2410_UDC_IN_CSR1_REG);
419 }
420 }
421
422 return is_last;
423 }
424
425 static inline int s3c2410_udc_read_packet(int fifo, u8 *buf,
426 struct s3c2410_request *req, unsigned avail)
427 {
428 unsigned len;
429
430 len = min(req->req.length - req->req.actual, avail);
431 req->req.actual += len;
432
433 readsb(fifo + base_addr, buf, len);
434 return len;
435 }
436
437 /*
438 * return: 0 = still running, 1 = queue empty, negative = errno
439 */
440 static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep,
441 struct s3c2410_request *req)
442 {
443 u8 *buf;
444 u32 ep_csr;
445 unsigned bufferspace;
446 int is_last=1;
447 unsigned avail;
448 int fifo_count = 0;
449 u32 idx;
450 int fifo_reg;
451
452 idx = ep->bEndpointAddress & 0x7F;
453
454 switch (idx) {
455 default:
456 idx = 0;
457 case 0:
458 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
459 break;
460 case 1:
461 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
462 break;
463 case 2:
464 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
465 break;
466 case 3:
467 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
468 break;
469 case 4:
470 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
471 break;
472 }
473
474 if (!req->req.length)
475 return 1;
476
477 buf = req->req.buf + req->req.actual;
478 bufferspace = req->req.length - req->req.actual;
479 if (!bufferspace) {
480 dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__);
481 return -1;
482 }
483
484 udc_write(idx, S3C2410_UDC_INDEX_REG);
485
486 fifo_count = s3c2410_udc_fifo_count_out();
487 dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count);
488
489 if (fifo_count > ep->ep.maxpacket)
490 avail = ep->ep.maxpacket;
491 else
492 avail = fifo_count;
493
494 fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail);
495
496 /* checking this with ep0 is not accurate as we already
497 * read a control request
498 **/
499 if (idx != 0 && fifo_count < ep->ep.maxpacket) {
500 is_last = 1;
501 /* overflowed this request? flush extra data */
502 if (fifo_count != avail)
503 req->req.status = -EOVERFLOW;
504 } else {
505 is_last = (req->req.length <= req->req.actual) ? 1 : 0;
506 }
507
508 udc_write(idx, S3C2410_UDC_INDEX_REG);
509 fifo_count = s3c2410_udc_fifo_count_out();
510
511 /* Only ep0 debug messages are interesting */
512 if (idx == 0)
513 dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n",
514 __func__, fifo_count,is_last);
515
516 if (is_last) {
517 if (idx == 0) {
518 s3c2410_udc_set_ep0_de_out(base_addr);
519 ep->dev->ep0state = EP0_IDLE;
520 } else {
521 udc_write(idx, S3C2410_UDC_INDEX_REG);
522 ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
523 udc_write(idx, S3C2410_UDC_INDEX_REG);
524 udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
525 S3C2410_UDC_OUT_CSR1_REG);
526 }
527
528 s3c2410_udc_done(ep, req, 0);
529 } else {
530 if (idx == 0) {
531 s3c2410_udc_clear_ep0_opr(base_addr);
532 } else {
533 udc_write(idx, S3C2410_UDC_INDEX_REG);
534 ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
535 udc_write(idx, S3C2410_UDC_INDEX_REG);
536 udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
537 S3C2410_UDC_OUT_CSR1_REG);
538 }
539 }
540
541 return is_last;
542 }
543
544 static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq)
545 {
546 unsigned char *outbuf = (unsigned char*)crq;
547 int bytes_read = 0;
548
549 udc_write(0, S3C2410_UDC_INDEX_REG);
550
551 bytes_read = s3c2410_udc_fifo_count_out();
552
553 dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read);
554
555 if (bytes_read > sizeof(struct usb_ctrlrequest))
556 bytes_read = sizeof(struct usb_ctrlrequest);
557
558 readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read);
559
560 dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__,
561 bytes_read, crq->bRequest, crq->bRequestType,
562 crq->wValue, crq->wIndex, crq->wLength);
563
564 return bytes_read;
565 }
566
567 static int s3c2410_udc_get_status(struct s3c2410_udc *dev,
568 struct usb_ctrlrequest *crq)
569 {
570 u16 status = 0;
571 u8 ep_num = crq->wIndex & 0x7F;
572 u8 is_in = crq->wIndex & USB_DIR_IN;
573
574 switch (crq->bRequestType & USB_RECIP_MASK) {
575 case USB_RECIP_INTERFACE:
576 break;
577
578 case USB_RECIP_DEVICE:
579 status = dev->devstatus;
580 break;
581
582 case USB_RECIP_ENDPOINT:
583 if (ep_num > 4 || crq->wLength > 2)
584 return 1;
585
586 if (ep_num == 0) {
587 udc_write(0, S3C2410_UDC_INDEX_REG);
588 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
589 status = status & S3C2410_UDC_EP0_CSR_SENDSTL;
590 } else {
591 udc_write(ep_num, S3C2410_UDC_INDEX_REG);
592 if (is_in) {
593 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
594 status = status & S3C2410_UDC_ICSR1_SENDSTL;
595 } else {
596 status = udc_read(S3C2410_UDC_OUT_CSR1_REG);
597 status = status & S3C2410_UDC_OCSR1_SENDSTL;
598 }
599 }
600
601 status = status ? 1 : 0;
602 break;
603
604 default:
605 return 1;
606 }
607
608 /* Seems to be needed to get it working. ouch :( */
609 udelay(5);
610 udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG);
611 udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG);
612 s3c2410_udc_set_ep0_de_in(base_addr);
613
614 return 0;
615 }
616 /*------------------------- usb state machine -------------------------------*/
617 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value);
618
619 static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev,
620 struct s3c2410_ep *ep,
621 struct usb_ctrlrequest *crq,
622 u32 ep0csr)
623 {
624 int len, ret, tmp;
625
626 /* start control request? */
627 if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY))
628 return;
629
630 s3c2410_udc_nuke(dev, ep, -EPROTO);
631
632 len = s3c2410_udc_read_fifo_crq(crq);
633 if (len != sizeof(*crq)) {
634 dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR"
635 " wanted %d bytes got %d. Stalling out...\n",
636 sizeof(*crq), len);
637 s3c2410_udc_set_ep0_ss(base_addr);
638 return;
639 }
640
641 dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n",
642 crq->bRequest, crq->bRequestType, crq->wLength);
643
644 /* cope with automagic for some standard requests. */
645 dev->req_std = (crq->bRequestType & USB_TYPE_MASK)
646 == USB_TYPE_STANDARD;
647 dev->req_config = 0;
648 dev->req_pending = 1;
649
650 switch (crq->bRequest) {
651 case USB_REQ_SET_CONFIGURATION:
652 dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ... \n");
653
654 if (crq->bRequestType == USB_RECIP_DEVICE) {
655 dev->req_config = 1;
656 s3c2410_udc_set_ep0_de_out(base_addr);
657 }
658 break;
659
660 case USB_REQ_SET_INTERFACE:
661 dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ... \n");
662
663 if (crq->bRequestType == USB_RECIP_INTERFACE) {
664 dev->req_config = 1;
665 s3c2410_udc_set_ep0_de_out(base_addr);
666 }
667 break;
668
669 case USB_REQ_SET_ADDRESS:
670 dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ... \n");
671
672 if (crq->bRequestType == USB_RECIP_DEVICE) {
673 tmp = crq->wValue & 0x7F;
674 dev->address = tmp;
675 udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE),
676 S3C2410_UDC_FUNC_ADDR_REG);
677 s3c2410_udc_set_ep0_de_out(base_addr);
678 return;
679 }
680 break;
681
682 case USB_REQ_GET_STATUS:
683 dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ... \n");
684 s3c2410_udc_clear_ep0_opr(base_addr);
685
686 if (dev->req_std) {
687 if (!s3c2410_udc_get_status(dev, crq)) {
688 return;
689 }
690 }
691 break;
692
693 case USB_REQ_CLEAR_FEATURE:
694 s3c2410_udc_clear_ep0_opr(base_addr);
695
696 if (crq->bRequestType != USB_RECIP_ENDPOINT)
697 break;
698
699 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
700 break;
701
702 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0);
703 s3c2410_udc_set_ep0_de_out(base_addr);
704 return;
705
706 case USB_REQ_SET_FEATURE:
707 s3c2410_udc_clear_ep0_opr(base_addr);
708
709 if (crq->bRequestType != USB_RECIP_ENDPOINT)
710 break;
711
712 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
713 break;
714
715 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1);
716 s3c2410_udc_set_ep0_de_out(base_addr);
717 return;
718
719 default:
720 s3c2410_udc_clear_ep0_opr(base_addr);
721 break;
722 }
723
724 if (crq->bRequestType & USB_DIR_IN)
725 dev->ep0state = EP0_IN_DATA_PHASE;
726 else
727 dev->ep0state = EP0_OUT_DATA_PHASE;
728
729 if (!dev->driver)
730 return;
731
732 /* deliver the request to the gadget driver */
733 ret = dev->driver->setup(&dev->gadget, crq);
734 if (ret < 0) {
735 if (dev->req_config) {
736 dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n",
737 crq->bRequest, ret);
738 return;
739 }
740
741 if (ret == -EOPNOTSUPP)
742 dprintk(DEBUG_NORMAL, "Operation not supported\n");
743 else
744 dprintk(DEBUG_NORMAL,
745 "dev->driver->setup failed. (%d)\n", ret);
746
747 udelay(5);
748 s3c2410_udc_set_ep0_ss(base_addr);
749 s3c2410_udc_set_ep0_de_out(base_addr);
750 dev->ep0state = EP0_IDLE;
751 /* deferred i/o == no response yet */
752 } else if (dev->req_pending) {
753 dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n");
754 dev->req_pending=0;
755 }
756
757 dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]);
758 }
759
760 static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev)
761 {
762 u32 ep0csr;
763 struct s3c2410_ep *ep = &dev->ep[0];
764 struct s3c2410_request *req;
765 struct usb_ctrlrequest crq;
766
767 if (list_empty(&ep->queue))
768 req = NULL;
769 else
770 req = list_entry(ep->queue.next, struct s3c2410_request, queue);
771
772 /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to
773 * S3C2410_UDC_EP0_CSR_REG when index is zero */
774
775 udc_write(0, S3C2410_UDC_INDEX_REG);
776 ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
777
778 dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n",
779 ep0csr, ep0states[dev->ep0state]);
780
781 /* clear stall status */
782 if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) {
783 s3c2410_udc_nuke(dev, ep, -EPIPE);
784 dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n");
785 s3c2410_udc_clear_ep0_sst(base_addr);
786 dev->ep0state = EP0_IDLE;
787 return;
788 }
789
790 /* clear setup end */
791 if (ep0csr & S3C2410_UDC_EP0_CSR_SE) {
792 dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n");
793 s3c2410_udc_nuke(dev, ep, 0);
794 s3c2410_udc_clear_ep0_se(base_addr);
795 dev->ep0state = EP0_IDLE;
796 }
797
798 switch (dev->ep0state) {
799 case EP0_IDLE:
800 s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr);
801 break;
802
803 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */
804 dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n");
805 if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req) {
806 s3c2410_udc_write_fifo(ep, req);
807 }
808 break;
809
810 case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */
811 dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n");
812 if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req ) {
813 s3c2410_udc_read_fifo(ep,req);
814 }
815 break;
816
817 case EP0_END_XFER:
818 dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n");
819 dev->ep0state = EP0_IDLE;
820 break;
821
822 case EP0_STALL:
823 dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n");
824 dev->ep0state = EP0_IDLE;
825 break;
826 }
827 }
828
829 /*
830 * handle_ep - Manage I/O endpoints
831 */
832
833 static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep)
834 {
835 struct s3c2410_request *req;
836 int is_in = ep->bEndpointAddress & USB_DIR_IN;
837 u32 ep_csr1;
838 u32 idx;
839
840 if (likely (!list_empty(&ep->queue)))
841 req = list_entry(ep->queue.next,
842 struct s3c2410_request, queue);
843 else
844 req = NULL;
845
846 idx = ep->bEndpointAddress & 0x7F;
847
848 if (is_in) {
849 udc_write(idx, S3C2410_UDC_INDEX_REG);
850 ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
851 dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n",
852 idx, ep_csr1, req ? 1 : 0);
853
854 if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) {
855 dprintk(DEBUG_VERBOSE, "st\n");
856 udc_write(idx, S3C2410_UDC_INDEX_REG);
857 udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL,
858 S3C2410_UDC_IN_CSR1_REG);
859 return;
860 }
861
862 if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req) {
863 s3c2410_udc_write_fifo(ep,req);
864 }
865 } else {
866 udc_write(idx, S3C2410_UDC_INDEX_REG);
867 ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG);
868 dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1);
869
870 if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) {
871 udc_write(idx, S3C2410_UDC_INDEX_REG);
872 udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL,
873 S3C2410_UDC_OUT_CSR1_REG);
874 return;
875 }
876
877 if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req) {
878 s3c2410_udc_read_fifo(ep,req);
879 }
880 }
881 }
882
883 #include <mach/regs-irq.h>
884
885 /*
886 * s3c2410_udc_irq - interrupt handler
887 */
888 static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev)
889 {
890 struct s3c2410_udc *dev = _dev;
891 int usb_status;
892 int usbd_status;
893 int pwr_reg;
894 int ep0csr;
895 int i;
896 u32 idx, idx2;
897 unsigned long flags;
898
899 spin_lock_irqsave(&dev->lock, flags);
900
901 /* Driver connected ? */
902 if (!dev->driver) {
903 /* Clear interrupts */
904 udc_write(udc_read(S3C2410_UDC_USB_INT_REG),
905 S3C2410_UDC_USB_INT_REG);
906 udc_write(udc_read(S3C2410_UDC_EP_INT_REG),
907 S3C2410_UDC_EP_INT_REG);
908 }
909
910 /* Save index */
911 idx = udc_read(S3C2410_UDC_INDEX_REG);
912
913 /* Read status registers */
914 usb_status = udc_read(S3C2410_UDC_USB_INT_REG);
915 usbd_status = udc_read(S3C2410_UDC_EP_INT_REG);
916 pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
917
918 udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
919 ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
920
921 dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n",
922 usb_status, usbd_status, pwr_reg, ep0csr);
923
924 /*
925 * Now, handle interrupts. There's two types :
926 * - Reset, Resume, Suspend coming -> usb_int_reg
927 * - EP -> ep_int_reg
928 */
929
930 /* RESET */
931 if (usb_status & S3C2410_UDC_USBINT_RESET) {
932 /* two kind of reset :
933 * - reset start -> pwr reg = 8
934 * - reset end -> pwr reg = 0
935 **/
936 dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n",
937 ep0csr, pwr_reg);
938
939 dev->gadget.speed = USB_SPEED_UNKNOWN;
940 udc_write(0x00, S3C2410_UDC_INDEX_REG);
941 udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3,
942 S3C2410_UDC_MAXP_REG);
943 dev->address = 0;
944
945 dev->ep0state = EP0_IDLE;
946 dev->gadget.speed = USB_SPEED_FULL;
947
948 /* clear interrupt */
949 udc_write(S3C2410_UDC_USBINT_RESET,
950 S3C2410_UDC_USB_INT_REG);
951
952 udc_write(idx, S3C2410_UDC_INDEX_REG);
953 spin_unlock_irqrestore(&dev->lock, flags);
954 return IRQ_HANDLED;
955 }
956
957 /* RESUME */
958 if (usb_status & S3C2410_UDC_USBINT_RESUME) {
959 dprintk(DEBUG_NORMAL, "USB resume\n");
960
961 /* clear interrupt */
962 udc_write(S3C2410_UDC_USBINT_RESUME,
963 S3C2410_UDC_USB_INT_REG);
964
965 if (dev->gadget.speed != USB_SPEED_UNKNOWN
966 && dev->driver
967 && dev->driver->resume)
968 dev->driver->resume(&dev->gadget);
969 }
970
971 /* SUSPEND */
972 if (usb_status & S3C2410_UDC_USBINT_SUSPEND) {
973 dprintk(DEBUG_NORMAL, "USB suspend\n");
974
975 /* clear interrupt */
976 udc_write(S3C2410_UDC_USBINT_SUSPEND,
977 S3C2410_UDC_USB_INT_REG);
978
979 if (dev->gadget.speed != USB_SPEED_UNKNOWN
980 && dev->driver
981 && dev->driver->suspend)
982 dev->driver->suspend(&dev->gadget);
983
984 dev->ep0state = EP0_IDLE;
985 }
986
987 /* EP */
988 /* control traffic */
989 /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready
990 * generate an interrupt
991 */
992 if (usbd_status & S3C2410_UDC_INT_EP0) {
993 dprintk(DEBUG_VERBOSE, "USB ep0 irq\n");
994 /* Clear the interrupt bit by setting it to 1 */
995 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG);
996 s3c2410_udc_handle_ep0(dev);
997 }
998
999 /* endpoint data transfers */
1000 for (i = 1; i < S3C2410_ENDPOINTS; i++) {
1001 u32 tmp = 1 << i;
1002 if (usbd_status & tmp) {
1003 dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i);
1004
1005 /* Clear the interrupt bit by setting it to 1 */
1006 udc_write(tmp, S3C2410_UDC_EP_INT_REG);
1007 s3c2410_udc_handle_ep(&dev->ep[i]);
1008 }
1009 }
1010
1011 /* what else causes this interrupt? a receive! who is it? */
1012 if (!usb_status && !usbd_status && !pwr_reg && !ep0csr) {
1013 for (i = 1; i < S3C2410_ENDPOINTS; i++) {
1014 idx2 = udc_read(S3C2410_UDC_INDEX_REG);
1015 udc_write(i, S3C2410_UDC_INDEX_REG);
1016
1017 if (udc_read(S3C2410_UDC_OUT_CSR1_REG) & 0x1)
1018 s3c2410_udc_handle_ep(&dev->ep[i]);
1019
1020 /* restore index */
1021 udc_write(idx2, S3C2410_UDC_INDEX_REG);
1022 }
1023 }
1024
1025 dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", IRQ_USBD);
1026
1027 /* Restore old index */
1028 udc_write(idx, S3C2410_UDC_INDEX_REG);
1029
1030 spin_unlock_irqrestore(&dev->lock, flags);
1031
1032 return IRQ_HANDLED;
1033 }
1034 /*------------------------- s3c2410_ep_ops ----------------------------------*/
1035
1036 static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep)
1037 {
1038 return container_of(ep, struct s3c2410_ep, ep);
1039 }
1040
1041 static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget)
1042 {
1043 return container_of(gadget, struct s3c2410_udc, gadget);
1044 }
1045
1046 static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req)
1047 {
1048 return container_of(req, struct s3c2410_request, req);
1049 }
1050
1051 /*
1052 * s3c2410_udc_ep_enable
1053 */
1054 static int s3c2410_udc_ep_enable(struct usb_ep *_ep,
1055 const struct usb_endpoint_descriptor *desc)
1056 {
1057 struct s3c2410_udc *dev;
1058 struct s3c2410_ep *ep;
1059 u32 max, tmp;
1060 unsigned long flags;
1061 u32 csr1,csr2;
1062 u32 int_en_reg;
1063
1064 ep = to_s3c2410_ep(_ep);
1065
1066 if (!_ep || !desc || ep->desc
1067 || _ep->name == ep0name
1068 || desc->bDescriptorType != USB_DT_ENDPOINT)
1069 return -EINVAL;
1070
1071 dev = ep->dev;
1072 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1073 return -ESHUTDOWN;
1074
1075 max = usb_endpoint_maxp(desc) & 0x1fff;
1076
1077 local_irq_save (flags);
1078 _ep->maxpacket = max & 0x7ff;
1079 ep->desc = desc;
1080 ep->halted = 0;
1081 ep->bEndpointAddress = desc->bEndpointAddress;
1082
1083 /* set max packet */
1084 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1085 udc_write(max >> 3, S3C2410_UDC_MAXP_REG);
1086
1087 /* set type, direction, address; reset fifo counters */
1088 if (desc->bEndpointAddress & USB_DIR_IN) {
1089 csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT;
1090 csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN;
1091
1092 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1093 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1094 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1095 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1096 } else {
1097 /* don't flush in fifo or it will cause endpoint interrupt */
1098 csr1 = S3C2410_UDC_ICSR1_CLRDT;
1099 csr2 = S3C2410_UDC_ICSR2_DMAIEN;
1100
1101 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1102 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1103 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1104 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1105
1106 csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT;
1107 csr2 = S3C2410_UDC_OCSR2_DMAIEN;
1108
1109 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1110 udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG);
1111 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1112 udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG);
1113 }
1114
1115 /* enable irqs */
1116 int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1117 udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG);
1118
1119 /* print some debug message */
1120 tmp = desc->bEndpointAddress;
1121 dprintk (DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n",
1122 _ep->name,ep->num, tmp,
1123 desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max);
1124
1125 local_irq_restore (flags);
1126 s3c2410_udc_set_halt(_ep, 0);
1127
1128 return 0;
1129 }
1130
1131 /*
1132 * s3c2410_udc_ep_disable
1133 */
1134 static int s3c2410_udc_ep_disable(struct usb_ep *_ep)
1135 {
1136 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1137 unsigned long flags;
1138 u32 int_en_reg;
1139
1140 if (!_ep || !ep->desc) {
1141 dprintk(DEBUG_NORMAL, "%s not enabled\n",
1142 _ep ? ep->ep.name : NULL);
1143 return -EINVAL;
1144 }
1145
1146 local_irq_save(flags);
1147
1148 dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name);
1149
1150 ep->desc = NULL;
1151 ep->halted = 1;
1152
1153 s3c2410_udc_nuke (ep->dev, ep, -ESHUTDOWN);
1154
1155 /* disable irqs */
1156 int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1157 udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG);
1158
1159 local_irq_restore(flags);
1160
1161 dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name);
1162
1163 return 0;
1164 }
1165
1166 /*
1167 * s3c2410_udc_alloc_request
1168 */
1169 static struct usb_request *
1170 s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags)
1171 {
1172 struct s3c2410_request *req;
1173
1174 dprintk(DEBUG_VERBOSE,"%s(%p,%d)\n", __func__, _ep, mem_flags);
1175
1176 if (!_ep)
1177 return NULL;
1178
1179 req = kzalloc (sizeof(struct s3c2410_request), mem_flags);
1180 if (!req)
1181 return NULL;
1182
1183 INIT_LIST_HEAD (&req->queue);
1184 return &req->req;
1185 }
1186
1187 /*
1188 * s3c2410_udc_free_request
1189 */
1190 static void
1191 s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req)
1192 {
1193 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1194 struct s3c2410_request *req = to_s3c2410_req(_req);
1195
1196 dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1197
1198 if (!ep || !_req || (!ep->desc && _ep->name != ep0name))
1199 return;
1200
1201 WARN_ON (!list_empty (&req->queue));
1202 kfree(req);
1203 }
1204
1205 /*
1206 * s3c2410_udc_queue
1207 */
1208 static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req,
1209 gfp_t gfp_flags)
1210 {
1211 struct s3c2410_request *req = to_s3c2410_req(_req);
1212 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1213 struct s3c2410_udc *dev;
1214 u32 ep_csr = 0;
1215 int fifo_count = 0;
1216 unsigned long flags;
1217
1218 if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1219 dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__);
1220 return -EINVAL;
1221 }
1222
1223 dev = ep->dev;
1224 if (unlikely (!dev->driver
1225 || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1226 return -ESHUTDOWN;
1227 }
1228
1229 local_irq_save (flags);
1230
1231 if (unlikely(!_req || !_req->complete
1232 || !_req->buf || !list_empty(&req->queue))) {
1233 if (!_req)
1234 dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__);
1235 else {
1236 dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n",
1237 __func__, !_req->complete,!_req->buf,
1238 !list_empty(&req->queue));
1239 }
1240
1241 local_irq_restore(flags);
1242 return -EINVAL;
1243 }
1244
1245 _req->status = -EINPROGRESS;
1246 _req->actual = 0;
1247
1248 dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n",
1249 __func__, ep->bEndpointAddress, _req->length);
1250
1251 if (ep->bEndpointAddress) {
1252 udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG);
1253
1254 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1255 ? S3C2410_UDC_IN_CSR1_REG
1256 : S3C2410_UDC_OUT_CSR1_REG);
1257 fifo_count = s3c2410_udc_fifo_count_out();
1258 } else {
1259 udc_write(0, S3C2410_UDC_INDEX_REG);
1260 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
1261 fifo_count = s3c2410_udc_fifo_count_out();
1262 }
1263
1264 /* kickstart this i/o queue? */
1265 if (list_empty(&ep->queue) && !ep->halted) {
1266 if (ep->bEndpointAddress == 0 /* ep0 */) {
1267 switch (dev->ep0state) {
1268 case EP0_IN_DATA_PHASE:
1269 if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY)
1270 && s3c2410_udc_write_fifo(ep,
1271 req)) {
1272 dev->ep0state = EP0_IDLE;
1273 req = NULL;
1274 }
1275 break;
1276
1277 case EP0_OUT_DATA_PHASE:
1278 if ((!_req->length)
1279 || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1280 && s3c2410_udc_read_fifo(ep,
1281 req))) {
1282 dev->ep0state = EP0_IDLE;
1283 req = NULL;
1284 }
1285 break;
1286
1287 default:
1288 local_irq_restore(flags);
1289 return -EL2HLT;
1290 }
1291 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0
1292 && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY))
1293 && s3c2410_udc_write_fifo(ep, req)) {
1294 req = NULL;
1295 } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1296 && fifo_count
1297 && s3c2410_udc_read_fifo(ep, req)) {
1298 req = NULL;
1299 }
1300 }
1301
1302 /* pio or dma irq handler advances the queue. */
1303 if (likely (req != 0))
1304 list_add_tail(&req->queue, &ep->queue);
1305
1306 local_irq_restore(flags);
1307
1308 dprintk(DEBUG_VERBOSE, "%s ok\n", __func__);
1309 return 0;
1310 }
1311
1312 /*
1313 * s3c2410_udc_dequeue
1314 */
1315 static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1316 {
1317 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1318 struct s3c2410_udc *udc;
1319 int retval = -EINVAL;
1320 unsigned long flags;
1321 struct s3c2410_request *req = NULL;
1322
1323 dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1324
1325 if (!the_controller->driver)
1326 return -ESHUTDOWN;
1327
1328 if (!_ep || !_req)
1329 return retval;
1330
1331 udc = to_s3c2410_udc(ep->gadget);
1332
1333 local_irq_save (flags);
1334
1335 list_for_each_entry (req, &ep->queue, queue) {
1336 if (&req->req == _req) {
1337 list_del_init (&req->queue);
1338 _req->status = -ECONNRESET;
1339 retval = 0;
1340 break;
1341 }
1342 }
1343
1344 if (retval == 0) {
1345 dprintk(DEBUG_VERBOSE,
1346 "dequeued req %p from %s, len %d buf %p\n",
1347 req, _ep->name, _req->length, _req->buf);
1348
1349 s3c2410_udc_done(ep, req, -ECONNRESET);
1350 }
1351
1352 local_irq_restore (flags);
1353 return retval;
1354 }
1355
1356 /*
1357 * s3c2410_udc_set_halt
1358 */
1359 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value)
1360 {
1361 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1362 u32 ep_csr = 0;
1363 unsigned long flags;
1364 u32 idx;
1365
1366 if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1367 dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__);
1368 return -EINVAL;
1369 }
1370
1371 local_irq_save (flags);
1372
1373 idx = ep->bEndpointAddress & 0x7F;
1374
1375 if (idx == 0) {
1376 s3c2410_udc_set_ep0_ss(base_addr);
1377 s3c2410_udc_set_ep0_de_out(base_addr);
1378 } else {
1379 udc_write(idx, S3C2410_UDC_INDEX_REG);
1380 ep_csr = udc_read((ep->bEndpointAddress &USB_DIR_IN)
1381 ? S3C2410_UDC_IN_CSR1_REG
1382 : S3C2410_UDC_OUT_CSR1_REG);
1383
1384 if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
1385 if (value)
1386 udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL,
1387 S3C2410_UDC_IN_CSR1_REG);
1388 else {
1389 ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL;
1390 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1391 ep_csr |= S3C2410_UDC_ICSR1_CLRDT;
1392 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1393 }
1394 } else {
1395 if (value)
1396 udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL,
1397 S3C2410_UDC_OUT_CSR1_REG);
1398 else {
1399 ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL;
1400 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1401 ep_csr |= S3C2410_UDC_OCSR1_CLRDT;
1402 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1403 }
1404 }
1405 }
1406
1407 ep->halted = value ? 1 : 0;
1408 local_irq_restore (flags);
1409
1410 return 0;
1411 }
1412
1413 static const struct usb_ep_ops s3c2410_ep_ops = {
1414 .enable = s3c2410_udc_ep_enable,
1415 .disable = s3c2410_udc_ep_disable,
1416
1417 .alloc_request = s3c2410_udc_alloc_request,
1418 .free_request = s3c2410_udc_free_request,
1419
1420 .queue = s3c2410_udc_queue,
1421 .dequeue = s3c2410_udc_dequeue,
1422
1423 .set_halt = s3c2410_udc_set_halt,
1424 };
1425
1426 /*------------------------- usb_gadget_ops ----------------------------------*/
1427
1428 /*
1429 * s3c2410_udc_get_frame
1430 */
1431 static int s3c2410_udc_get_frame(struct usb_gadget *_gadget)
1432 {
1433 int tmp;
1434
1435 dprintk(DEBUG_VERBOSE, "%s()\n", __func__);
1436
1437 tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8;
1438 tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG);
1439 return tmp;
1440 }
1441
1442 /*
1443 * s3c2410_udc_wakeup
1444 */
1445 static int s3c2410_udc_wakeup(struct usb_gadget *_gadget)
1446 {
1447 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1448 return 0;
1449 }
1450
1451 /*
1452 * s3c2410_udc_set_selfpowered
1453 */
1454 static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value)
1455 {
1456 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1457
1458 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1459
1460 if (value)
1461 udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED);
1462 else
1463 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1464
1465 return 0;
1466 }
1467
1468 static void s3c2410_udc_disable(struct s3c2410_udc *dev);
1469 static void s3c2410_udc_enable(struct s3c2410_udc *dev);
1470
1471 static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on)
1472 {
1473 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1474
1475 if (udc_info && (udc_info->udc_command ||
1476 gpio_is_valid(udc_info->pullup_pin))) {
1477
1478 if (is_on)
1479 s3c2410_udc_enable(udc);
1480 else {
1481 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1482 if (udc->driver && udc->driver->disconnect)
1483 udc->driver->disconnect(&udc->gadget);
1484
1485 }
1486 s3c2410_udc_disable(udc);
1487 }
1488 }
1489 else
1490 return -EOPNOTSUPP;
1491
1492 return 0;
1493 }
1494
1495 static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active)
1496 {
1497 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1498
1499 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1500
1501 udc->vbus = (is_active != 0);
1502 s3c2410_udc_set_pullup(udc, is_active);
1503 return 0;
1504 }
1505
1506 static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on)
1507 {
1508 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1509
1510 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1511
1512 s3c2410_udc_set_pullup(udc, is_on ? 0 : 1);
1513 return 0;
1514 }
1515
1516 static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev)
1517 {
1518 struct s3c2410_udc *dev = _dev;
1519 unsigned int value;
1520
1521 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1522
1523 value = gpio_get_value(udc_info->vbus_pin) ? 1 : 0;
1524 if (udc_info->vbus_pin_inverted)
1525 value = !value;
1526
1527 if (value != dev->vbus)
1528 s3c2410_udc_vbus_session(&dev->gadget, value);
1529
1530 return IRQ_HANDLED;
1531 }
1532
1533 static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1534 {
1535 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1536
1537 if (udc_info && udc_info->vbus_draw) {
1538 udc_info->vbus_draw(ma);
1539 return 0;
1540 }
1541
1542 return -ENOTSUPP;
1543 }
1544
1545 static int s3c2410_udc_start(struct usb_gadget_driver *driver,
1546 int (*bind)(struct usb_gadget *));
1547 static int s3c2410_udc_stop(struct usb_gadget_driver *driver);
1548
1549 static const struct usb_gadget_ops s3c2410_ops = {
1550 .get_frame = s3c2410_udc_get_frame,
1551 .wakeup = s3c2410_udc_wakeup,
1552 .set_selfpowered = s3c2410_udc_set_selfpowered,
1553 .pullup = s3c2410_udc_pullup,
1554 .vbus_session = s3c2410_udc_vbus_session,
1555 .vbus_draw = s3c2410_vbus_draw,
1556 .start = s3c2410_udc_start,
1557 .stop = s3c2410_udc_stop,
1558 };
1559
1560 static void s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd)
1561 {
1562 if (!udc_info)
1563 return;
1564
1565 if (udc_info->udc_command) {
1566 udc_info->udc_command(cmd);
1567 } else if (gpio_is_valid(udc_info->pullup_pin)) {
1568 int value;
1569
1570 switch (cmd) {
1571 case S3C2410_UDC_P_ENABLE:
1572 value = 1;
1573 break;
1574 case S3C2410_UDC_P_DISABLE:
1575 value = 0;
1576 break;
1577 default:
1578 return;
1579 }
1580 value ^= udc_info->pullup_pin_inverted;
1581
1582 gpio_set_value(udc_info->pullup_pin, value);
1583 }
1584 }
1585
1586 /*------------------------- gadget driver handling---------------------------*/
1587 /*
1588 * s3c2410_udc_disable
1589 */
1590 static void s3c2410_udc_disable(struct s3c2410_udc *dev)
1591 {
1592 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1593
1594 /* Disable all interrupts */
1595 udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG);
1596 udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG);
1597
1598 /* Clear the interrupt registers */
1599 udc_write(S3C2410_UDC_USBINT_RESET
1600 | S3C2410_UDC_USBINT_RESUME
1601 | S3C2410_UDC_USBINT_SUSPEND,
1602 S3C2410_UDC_USB_INT_REG);
1603
1604 udc_write(0x1F, S3C2410_UDC_EP_INT_REG);
1605
1606 /* Good bye, cruel world */
1607 s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1608
1609 /* Set speed to unknown */
1610 dev->gadget.speed = USB_SPEED_UNKNOWN;
1611 }
1612
1613 /*
1614 * s3c2410_udc_reinit
1615 */
1616 static void s3c2410_udc_reinit(struct s3c2410_udc *dev)
1617 {
1618 u32 i;
1619
1620 /* device/ep0 records init */
1621 INIT_LIST_HEAD (&dev->gadget.ep_list);
1622 INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1623 dev->ep0state = EP0_IDLE;
1624
1625 for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1626 struct s3c2410_ep *ep = &dev->ep[i];
1627
1628 if (i != 0)
1629 list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1630
1631 ep->dev = dev;
1632 ep->desc = NULL;
1633 ep->halted = 0;
1634 INIT_LIST_HEAD (&ep->queue);
1635 }
1636 }
1637
1638 /*
1639 * s3c2410_udc_enable
1640 */
1641 static void s3c2410_udc_enable(struct s3c2410_udc *dev)
1642 {
1643 int i;
1644
1645 dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n");
1646
1647 /* dev->gadget.speed = USB_SPEED_UNKNOWN; */
1648 dev->gadget.speed = USB_SPEED_FULL;
1649
1650 /* Set MAXP for all endpoints */
1651 for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1652 udc_write(i, S3C2410_UDC_INDEX_REG);
1653 udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3,
1654 S3C2410_UDC_MAXP_REG);
1655 }
1656
1657 /* Set default power state */
1658 udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG);
1659
1660 /* Enable reset and suspend interrupt interrupts */
1661 udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND,
1662 S3C2410_UDC_USB_INT_EN_REG);
1663
1664 /* Enable ep0 interrupt */
1665 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG);
1666
1667 /* time to say "hello, world" */
1668 s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1669 }
1670
1671 static int s3c2410_udc_start(struct usb_gadget_driver *driver,
1672 int (*bind)(struct usb_gadget *))
1673 {
1674 struct s3c2410_udc *udc = the_controller;
1675 int retval;
1676
1677 dprintk(DEBUG_NORMAL, "%s() '%s'\n", __func__, driver->driver.name);
1678
1679 /* Sanity checks */
1680 if (!udc)
1681 return -ENODEV;
1682
1683 if (udc->driver)
1684 return -EBUSY;
1685
1686 if (!bind || !driver->setup || driver->speed < USB_SPEED_FULL) {
1687 printk(KERN_ERR "Invalid driver: bind %p setup %p speed %d\n",
1688 bind, driver->setup, driver->speed);
1689 return -EINVAL;
1690 }
1691 #if defined(MODULE)
1692 if (!driver->unbind) {
1693 printk(KERN_ERR "Invalid driver: no unbind method\n");
1694 return -EINVAL;
1695 }
1696 #endif
1697
1698 /* Hook the driver */
1699 udc->driver = driver;
1700 udc->gadget.dev.driver = &driver->driver;
1701
1702 /* Bind the driver */
1703 if ((retval = device_add(&udc->gadget.dev)) != 0) {
1704 printk(KERN_ERR "Error in device_add() : %d\n",retval);
1705 goto register_error;
1706 }
1707
1708 dprintk(DEBUG_NORMAL, "binding gadget driver '%s'\n",
1709 driver->driver.name);
1710
1711 if ((retval = bind(&udc->gadget)) != 0) {
1712 device_del(&udc->gadget.dev);
1713 goto register_error;
1714 }
1715
1716 /* Enable udc */
1717 s3c2410_udc_enable(udc);
1718
1719 return 0;
1720
1721 register_error:
1722 udc->driver = NULL;
1723 udc->gadget.dev.driver = NULL;
1724 return retval;
1725 }
1726
1727 static int s3c2410_udc_stop(struct usb_gadget_driver *driver)
1728 {
1729 struct s3c2410_udc *udc = the_controller;
1730
1731 if (!udc)
1732 return -ENODEV;
1733
1734 if (!driver || driver != udc->driver || !driver->unbind)
1735 return -EINVAL;
1736
1737 dprintk(DEBUG_NORMAL, "usb_gadget_unregister_driver() '%s'\n",
1738 driver->driver.name);
1739
1740 /* report disconnect */
1741 if (driver->disconnect)
1742 driver->disconnect(&udc->gadget);
1743
1744 driver->unbind(&udc->gadget);
1745
1746 device_del(&udc->gadget.dev);
1747 udc->driver = NULL;
1748
1749 /* Disable udc */
1750 s3c2410_udc_disable(udc);
1751
1752 return 0;
1753 }
1754
1755 /*---------------------------------------------------------------------------*/
1756 static struct s3c2410_udc memory = {
1757 .gadget = {
1758 .ops = &s3c2410_ops,
1759 .ep0 = &memory.ep[0].ep,
1760 .name = gadget_name,
1761 .dev = {
1762 .init_name = "gadget",
1763 },
1764 },
1765
1766 /* control endpoint */
1767 .ep[0] = {
1768 .num = 0,
1769 .ep = {
1770 .name = ep0name,
1771 .ops = &s3c2410_ep_ops,
1772 .maxpacket = EP0_FIFO_SIZE,
1773 },
1774 .dev = &memory,
1775 },
1776
1777 /* first group of endpoints */
1778 .ep[1] = {
1779 .num = 1,
1780 .ep = {
1781 .name = "ep1-bulk",
1782 .ops = &s3c2410_ep_ops,
1783 .maxpacket = EP_FIFO_SIZE,
1784 },
1785 .dev = &memory,
1786 .fifo_size = EP_FIFO_SIZE,
1787 .bEndpointAddress = 1,
1788 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1789 },
1790 .ep[2] = {
1791 .num = 2,
1792 .ep = {
1793 .name = "ep2-bulk",
1794 .ops = &s3c2410_ep_ops,
1795 .maxpacket = EP_FIFO_SIZE,
1796 },
1797 .dev = &memory,
1798 .fifo_size = EP_FIFO_SIZE,
1799 .bEndpointAddress = 2,
1800 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1801 },
1802 .ep[3] = {
1803 .num = 3,
1804 .ep = {
1805 .name = "ep3-bulk",
1806 .ops = &s3c2410_ep_ops,
1807 .maxpacket = EP_FIFO_SIZE,
1808 },
1809 .dev = &memory,
1810 .fifo_size = EP_FIFO_SIZE,
1811 .bEndpointAddress = 3,
1812 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1813 },
1814 .ep[4] = {
1815 .num = 4,
1816 .ep = {
1817 .name = "ep4-bulk",
1818 .ops = &s3c2410_ep_ops,
1819 .maxpacket = EP_FIFO_SIZE,
1820 },
1821 .dev = &memory,
1822 .fifo_size = EP_FIFO_SIZE,
1823 .bEndpointAddress = 4,
1824 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1825 }
1826
1827 };
1828
1829 /*
1830 * probe - binds to the platform device
1831 */
1832 static int s3c2410_udc_probe(struct platform_device *pdev)
1833 {
1834 struct s3c2410_udc *udc = &memory;
1835 struct device *dev = &pdev->dev;
1836 int retval;
1837 int irq;
1838
1839 dev_dbg(dev, "%s()\n", __func__);
1840
1841 usb_bus_clock = clk_get(NULL, "usb-bus-gadget");
1842 if (IS_ERR(usb_bus_clock)) {
1843 dev_err(dev, "failed to get usb bus clock source\n");
1844 return PTR_ERR(usb_bus_clock);
1845 }
1846
1847 clk_enable(usb_bus_clock);
1848
1849 udc_clock = clk_get(NULL, "usb-device");
1850 if (IS_ERR(udc_clock)) {
1851 dev_err(dev, "failed to get udc clock source\n");
1852 return PTR_ERR(udc_clock);
1853 }
1854
1855 clk_enable(udc_clock);
1856
1857 mdelay(10);
1858
1859 dev_dbg(dev, "got and enabled clocks\n");
1860
1861 if (strncmp(pdev->name, "s3c2440", 7) == 0) {
1862 dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n");
1863 memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE;
1864 memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE;
1865 memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE;
1866 memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE;
1867 }
1868
1869 spin_lock_init (&udc->lock);
1870 udc_info = pdev->dev.platform_data;
1871
1872 rsrc_start = S3C2410_PA_USBDEV;
1873 rsrc_len = S3C24XX_SZ_USBDEV;
1874
1875 if (!request_mem_region(rsrc_start, rsrc_len, gadget_name))
1876 return -EBUSY;
1877
1878 base_addr = ioremap(rsrc_start, rsrc_len);
1879 if (!base_addr) {
1880 retval = -ENOMEM;
1881 goto err_mem;
1882 }
1883
1884 device_initialize(&udc->gadget.dev);
1885 udc->gadget.dev.parent = &pdev->dev;
1886 udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
1887
1888 the_controller = udc;
1889 platform_set_drvdata(pdev, udc);
1890
1891 s3c2410_udc_disable(udc);
1892 s3c2410_udc_reinit(udc);
1893
1894 /* irq setup after old hardware state is cleaned up */
1895 retval = request_irq(IRQ_USBD, s3c2410_udc_irq,
1896 0, gadget_name, udc);
1897
1898 if (retval != 0) {
1899 dev_err(dev, "cannot get irq %i, err %d\n", IRQ_USBD, retval);
1900 retval = -EBUSY;
1901 goto err_map;
1902 }
1903
1904 dev_dbg(dev, "got irq %i\n", IRQ_USBD);
1905
1906 if (udc_info && udc_info->vbus_pin > 0) {
1907 retval = gpio_request(udc_info->vbus_pin, "udc vbus");
1908 if (retval < 0) {
1909 dev_err(dev, "cannot claim vbus pin\n");
1910 goto err_int;
1911 }
1912
1913 irq = gpio_to_irq(udc_info->vbus_pin);
1914 if (irq < 0) {
1915 dev_err(dev, "no irq for gpio vbus pin\n");
1916 goto err_gpio_claim;
1917 }
1918
1919 retval = request_irq(irq, s3c2410_udc_vbus_irq,
1920 IRQF_TRIGGER_RISING
1921 | IRQF_TRIGGER_FALLING | IRQF_SHARED,
1922 gadget_name, udc);
1923
1924 if (retval != 0) {
1925 dev_err(dev, "can't get vbus irq %d, err %d\n",
1926 irq, retval);
1927 retval = -EBUSY;
1928 goto err_gpio_claim;
1929 }
1930
1931 dev_dbg(dev, "got irq %i\n", irq);
1932 } else {
1933 udc->vbus = 1;
1934 }
1935
1936 if (udc_info && !udc_info->udc_command &&
1937 gpio_is_valid(udc_info->pullup_pin)) {
1938
1939 retval = gpio_request_one(udc_info->pullup_pin,
1940 udc_info->vbus_pin_inverted ?
1941 GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW,
1942 "udc pullup");
1943 if (retval)
1944 goto err_vbus_irq;
1945 }
1946
1947 retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
1948 if (retval)
1949 goto err_add_udc;
1950
1951 if (s3c2410_udc_debugfs_root) {
1952 udc->regs_info = debugfs_create_file("registers", S_IRUGO,
1953 s3c2410_udc_debugfs_root,
1954 udc, &s3c2410_udc_debugfs_fops);
1955 if (!udc->regs_info)
1956 dev_warn(dev, "debugfs file creation failed\n");
1957 }
1958
1959 dev_dbg(dev, "probe ok\n");
1960
1961 return 0;
1962
1963 err_add_udc:
1964 if (udc_info && !udc_info->udc_command &&
1965 gpio_is_valid(udc_info->pullup_pin))
1966 gpio_free(udc_info->pullup_pin);
1967 err_vbus_irq:
1968 if (udc_info && udc_info->vbus_pin > 0)
1969 free_irq(gpio_to_irq(udc_info->vbus_pin), udc);
1970 err_gpio_claim:
1971 if (udc_info && udc_info->vbus_pin > 0)
1972 gpio_free(udc_info->vbus_pin);
1973 err_int:
1974 free_irq(IRQ_USBD, udc);
1975 err_map:
1976 iounmap(base_addr);
1977 err_mem:
1978 release_mem_region(rsrc_start, rsrc_len);
1979
1980 return retval;
1981 }
1982
1983 /*
1984 * s3c2410_udc_remove
1985 */
1986 static int s3c2410_udc_remove(struct platform_device *pdev)
1987 {
1988 struct s3c2410_udc *udc = platform_get_drvdata(pdev);
1989 unsigned int irq;
1990
1991 dev_dbg(&pdev->dev, "%s()\n", __func__);
1992
1993 usb_del_gadget_udc(&udc->gadget);
1994 if (udc->driver)
1995 return -EBUSY;
1996
1997 debugfs_remove(udc->regs_info);
1998
1999 if (udc_info && !udc_info->udc_command &&
2000 gpio_is_valid(udc_info->pullup_pin))
2001 gpio_free(udc_info->pullup_pin);
2002
2003 if (udc_info && udc_info->vbus_pin > 0) {
2004 irq = gpio_to_irq(udc_info->vbus_pin);
2005 free_irq(irq, udc);
2006 }
2007
2008 free_irq(IRQ_USBD, udc);
2009
2010 iounmap(base_addr);
2011 release_mem_region(rsrc_start, rsrc_len);
2012
2013 platform_set_drvdata(pdev, NULL);
2014
2015 if (!IS_ERR(udc_clock) && udc_clock != NULL) {
2016 clk_disable(udc_clock);
2017 clk_put(udc_clock);
2018 udc_clock = NULL;
2019 }
2020
2021 if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) {
2022 clk_disable(usb_bus_clock);
2023 clk_put(usb_bus_clock);
2024 usb_bus_clock = NULL;
2025 }
2026
2027 dev_dbg(&pdev->dev, "%s: remove ok\n", __func__);
2028 return 0;
2029 }
2030
2031 #ifdef CONFIG_PM
2032 static int s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message)
2033 {
2034 s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
2035
2036 return 0;
2037 }
2038
2039 static int s3c2410_udc_resume(struct platform_device *pdev)
2040 {
2041 s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
2042
2043 return 0;
2044 }
2045 #else
2046 #define s3c2410_udc_suspend NULL
2047 #define s3c2410_udc_resume NULL
2048 #endif
2049
2050 static const struct platform_device_id s3c_udc_ids[] = {
2051 { "s3c2410-usbgadget", },
2052 { "s3c2440-usbgadget", },
2053 { }
2054 };
2055 MODULE_DEVICE_TABLE(platform, s3c_udc_ids);
2056
2057 static struct platform_driver udc_driver_24x0 = {
2058 .driver = {
2059 .name = "s3c24x0-usbgadget",
2060 .owner = THIS_MODULE,
2061 },
2062 .probe = s3c2410_udc_probe,
2063 .remove = s3c2410_udc_remove,
2064 .suspend = s3c2410_udc_suspend,
2065 .resume = s3c2410_udc_resume,
2066 .id_table = s3c_udc_ids,
2067 };
2068
2069 static int __init udc_init(void)
2070 {
2071 int retval;
2072
2073 dprintk(DEBUG_NORMAL, "%s: version %s\n", gadget_name, DRIVER_VERSION);
2074
2075 s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name, NULL);
2076 if (IS_ERR(s3c2410_udc_debugfs_root)) {
2077 printk(KERN_ERR "%s: debugfs dir creation failed %ld\n",
2078 gadget_name, PTR_ERR(s3c2410_udc_debugfs_root));
2079 s3c2410_udc_debugfs_root = NULL;
2080 }
2081
2082 retval = platform_driver_register(&udc_driver_24x0);
2083 if (retval)
2084 goto err;
2085
2086 return 0;
2087
2088 err:
2089 debugfs_remove(s3c2410_udc_debugfs_root);
2090 return retval;
2091 }
2092
2093 static void __exit udc_exit(void)
2094 {
2095 platform_driver_unregister(&udc_driver_24x0);
2096 debugfs_remove(s3c2410_udc_debugfs_root);
2097 }
2098
2099 module_init(udc_init);
2100 module_exit(udc_exit);
2101
2102 MODULE_AUTHOR(DRIVER_AUTHOR);
2103 MODULE_DESCRIPTION(DRIVER_DESC);
2104 MODULE_VERSION(DRIVER_VERSION);
2105 MODULE_LICENSE("GPL");
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree