3 * device driver for Conexant 2388x based TV cards
4 * MPEG Transport Stream (DVB) routines
6 * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
28 #include <linux/kthread.h>
29 #include <linux/file.h>
30 #include <linux/suspend.h>
34 #include <media/v4l2-common.h>
37 #include "mt352_priv.h"
38 #ifdef HAVE_VP3054_I2C
39 # include "cx88-vp3054-i2c.h"
50 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
51 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
52 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
53 MODULE_LICENSE("GPL");
55 static unsigned int debug
= 0;
56 module_param(debug
, int, 0644);
57 MODULE_PARM_DESC(debug
,"enable debug messages [dvb]");
59 #define dprintk(level,fmt, arg...) if (debug >= level) \
60 printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->core->name , ## arg)
62 /* ------------------------------------------------------------------ */
64 static int dvb_buf_setup(struct videobuf_queue
*q
,
65 unsigned int *count
, unsigned int *size
)
67 struct cx8802_dev
*dev
= q
->priv_data
;
69 dev
->ts_packet_size
= 188 * 4;
70 dev
->ts_packet_count
= 32;
72 *size
= dev
->ts_packet_size
* dev
->ts_packet_count
;
77 static int dvb_buf_prepare(struct videobuf_queue
*q
, struct videobuf_buffer
*vb
,
78 enum v4l2_field field
)
80 struct cx8802_dev
*dev
= q
->priv_data
;
81 return cx8802_buf_prepare(q
, dev
, (struct cx88_buffer
*)vb
,field
);
84 static void dvb_buf_queue(struct videobuf_queue
*q
, struct videobuf_buffer
*vb
)
86 struct cx8802_dev
*dev
= q
->priv_data
;
87 cx8802_buf_queue(dev
, (struct cx88_buffer
*)vb
);
90 static void dvb_buf_release(struct videobuf_queue
*q
, struct videobuf_buffer
*vb
)
92 cx88_free_buffer(q
, (struct cx88_buffer
*)vb
);
95 static struct videobuf_queue_ops dvb_qops
= {
96 .buf_setup
= dvb_buf_setup
,
97 .buf_prepare
= dvb_buf_prepare
,
98 .buf_queue
= dvb_buf_queue
,
99 .buf_release
= dvb_buf_release
,
102 /* ------------------------------------------------------------------ */
103 static int dvico_fusionhdtv_demod_init(struct dvb_frontend
* fe
)
105 static u8 clock_config
[] = { CLOCK_CTL
, 0x38, 0x39 };
106 static u8 reset
[] = { RESET
, 0x80 };
107 static u8 adc_ctl_1_cfg
[] = { ADC_CTL_1
, 0x40 };
108 static u8 agc_cfg
[] = { AGC_TARGET
, 0x24, 0x20 };
109 static u8 gpp_ctl_cfg
[] = { GPP_CTL
, 0x33 };
110 static u8 capt_range_cfg
[] = { CAPT_RANGE
, 0x32 };
112 mt352_write(fe
, clock_config
, sizeof(clock_config
));
114 mt352_write(fe
, reset
, sizeof(reset
));
115 mt352_write(fe
, adc_ctl_1_cfg
, sizeof(adc_ctl_1_cfg
));
117 mt352_write(fe
, agc_cfg
, sizeof(agc_cfg
));
118 mt352_write(fe
, gpp_ctl_cfg
, sizeof(gpp_ctl_cfg
));
119 mt352_write(fe
, capt_range_cfg
, sizeof(capt_range_cfg
));
123 static int dvico_dual_demod_init(struct dvb_frontend
*fe
)
125 static u8 clock_config
[] = { CLOCK_CTL
, 0x38, 0x38 };
126 static u8 reset
[] = { RESET
, 0x80 };
127 static u8 adc_ctl_1_cfg
[] = { ADC_CTL_1
, 0x40 };
128 static u8 agc_cfg
[] = { AGC_TARGET
, 0x28, 0x20 };
129 static u8 gpp_ctl_cfg
[] = { GPP_CTL
, 0x33 };
130 static u8 capt_range_cfg
[] = { CAPT_RANGE
, 0x32 };
132 mt352_write(fe
, clock_config
, sizeof(clock_config
));
134 mt352_write(fe
, reset
, sizeof(reset
));
135 mt352_write(fe
, adc_ctl_1_cfg
, sizeof(adc_ctl_1_cfg
));
137 mt352_write(fe
, agc_cfg
, sizeof(agc_cfg
));
138 mt352_write(fe
, gpp_ctl_cfg
, sizeof(gpp_ctl_cfg
));
139 mt352_write(fe
, capt_range_cfg
, sizeof(capt_range_cfg
));
144 static int dntv_live_dvbt_demod_init(struct dvb_frontend
* fe
)
146 static u8 clock_config
[] = { 0x89, 0x38, 0x39 };
147 static u8 reset
[] = { 0x50, 0x80 };
148 static u8 adc_ctl_1_cfg
[] = { 0x8E, 0x40 };
149 static u8 agc_cfg
[] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
150 0x00, 0xFF, 0x00, 0x40, 0x40 };
151 static u8 dntv_extra
[] = { 0xB5, 0x7A };
152 static u8 capt_range_cfg
[] = { 0x75, 0x32 };
154 mt352_write(fe
, clock_config
, sizeof(clock_config
));
156 mt352_write(fe
, reset
, sizeof(reset
));
157 mt352_write(fe
, adc_ctl_1_cfg
, sizeof(adc_ctl_1_cfg
));
159 mt352_write(fe
, agc_cfg
, sizeof(agc_cfg
));
161 mt352_write(fe
, dntv_extra
, sizeof(dntv_extra
));
162 mt352_write(fe
, capt_range_cfg
, sizeof(capt_range_cfg
));
167 static struct mt352_config dvico_fusionhdtv
= {
168 .demod_address
= 0x0F,
169 .demod_init
= dvico_fusionhdtv_demod_init
,
172 static struct mt352_config dntv_live_dvbt_config
= {
173 .demod_address
= 0x0f,
174 .demod_init
= dntv_live_dvbt_demod_init
,
177 static struct mt352_config dvico_fusionhdtv_dual
= {
178 .demod_address
= 0x0F,
179 .demod_init
= dvico_dual_demod_init
,
182 #ifdef HAVE_VP3054_I2C
183 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend
* fe
)
185 static u8 clock_config
[] = { 0x89, 0x38, 0x38 };
186 static u8 reset
[] = { 0x50, 0x80 };
187 static u8 adc_ctl_1_cfg
[] = { 0x8E, 0x40 };
188 static u8 agc_cfg
[] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
189 0x00, 0xFF, 0x00, 0x40, 0x40 };
190 static u8 dntv_extra
[] = { 0xB5, 0x7A };
191 static u8 capt_range_cfg
[] = { 0x75, 0x32 };
193 mt352_write(fe
, clock_config
, sizeof(clock_config
));
195 mt352_write(fe
, reset
, sizeof(reset
));
196 mt352_write(fe
, adc_ctl_1_cfg
, sizeof(adc_ctl_1_cfg
));
198 mt352_write(fe
, agc_cfg
, sizeof(agc_cfg
));
200 mt352_write(fe
, dntv_extra
, sizeof(dntv_extra
));
201 mt352_write(fe
, capt_range_cfg
, sizeof(capt_range_cfg
));
206 static int philips_fmd1216_pll_init(struct dvb_frontend
*fe
)
208 struct cx8802_dev
*dev
= fe
->dvb
->priv
;
210 /* this message is to set up ATC and ALC */
211 static u8 fmd1216_init
[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
213 { .addr
= dev
->core
->pll_addr
, .flags
= 0,
214 .buf
= fmd1216_init
, .len
= sizeof(fmd1216_init
) };
217 if (fe
->ops
.i2c_gate_ctrl
)
218 fe
->ops
.i2c_gate_ctrl(fe
, 1);
219 if ((err
= i2c_transfer(&dev
->core
->i2c_adap
, &msg
, 1)) != 1) {
229 static int dntv_live_dvbt_pro_tuner_set_params(struct dvb_frontend
* fe
,
230 struct dvb_frontend_parameters
* params
)
232 struct cx8802_dev
*dev
= fe
->dvb
->priv
;
235 { .addr
= dev
->core
->pll_addr
, .flags
= 0,
236 .buf
= buf
, .len
= 4 };
239 /* Switch PLL to DVB mode */
240 err
= philips_fmd1216_pll_init(fe
);
245 dvb_pll_configure(dev
->core
->pll_desc
, buf
,
247 params
->u
.ofdm
.bandwidth
);
248 if (fe
->ops
.i2c_gate_ctrl
)
249 fe
->ops
.i2c_gate_ctrl(fe
, 1);
250 if ((err
= i2c_transfer(&dev
->core
->i2c_adap
, &msg
, 1)) != 1) {
252 printk(KERN_WARNING
"cx88-dvb: %s error "
253 "(addr %02x <- %02x, err = %i)\n",
254 __FUNCTION__
, dev
->core
->pll_addr
, buf
[0], err
);
264 static struct mt352_config dntv_live_dvbt_pro_config
= {
265 .demod_address
= 0x0f,
267 .demod_init
= dntv_live_dvbt_pro_demod_init
,
271 static int dvico_hybrid_tuner_set_params(struct dvb_frontend
*fe
,
272 struct dvb_frontend_parameters
*params
)
275 struct cx8802_dev
*dev
= fe
->dvb
->priv
;
277 { .addr
= dev
->core
->pll_addr
, .flags
= 0,
278 .buf
= pllbuf
, .len
= 4 };
281 dvb_pll_configure(dev
->core
->pll_desc
, pllbuf
,
283 params
->u
.ofdm
.bandwidth
);
285 if (fe
->ops
.i2c_gate_ctrl
)
286 fe
->ops
.i2c_gate_ctrl(fe
, 1);
287 if ((err
= i2c_transfer(&dev
->core
->i2c_adap
, &msg
, 1)) != 1) {
288 printk(KERN_WARNING
"cx88-dvb: %s error "
289 "(addr %02x <- %02x, err = %i)\n",
290 __FUNCTION__
, pllbuf
[0], pllbuf
[1], err
);
300 static struct zl10353_config dvico_fusionhdtv_hybrid
= {
301 .demod_address
= 0x0F,
305 static struct zl10353_config dvico_fusionhdtv_plus_v1_1
= {
306 .demod_address
= 0x0F,
309 static struct cx22702_config connexant_refboard_config
= {
310 .demod_address
= 0x43,
311 .output_mode
= CX22702_SERIAL_OUTPUT
,
314 static struct cx22702_config hauppauge_novat_config
= {
315 .demod_address
= 0x43,
316 .output_mode
= CX22702_SERIAL_OUTPUT
,
318 static struct cx22702_config hauppauge_hvr1100_config
= {
319 .demod_address
= 0x63,
320 .output_mode
= CX22702_SERIAL_OUTPUT
,
323 static int or51132_set_ts_param(struct dvb_frontend
* fe
,
326 struct cx8802_dev
*dev
= fe
->dvb
->priv
;
327 dev
->ts_gen_cntrl
= is_punctured
? 0x04 : 0x00;
331 static struct or51132_config pchdtv_hd3000
= {
332 .demod_address
= 0x15,
333 .set_ts_params
= or51132_set_ts_param
,
336 static int lgdt3302_tuner_set_params(struct dvb_frontend
* fe
,
337 struct dvb_frontend_parameters
* params
)
339 /* FIXME make this routine use the tuner-simple code.
340 * It could probably be shared with a number of ATSC
341 * frontends. Many share the same tuner with analog TV. */
343 struct cx8802_dev
*dev
= fe
->dvb
->priv
;
344 struct cx88_core
*core
= dev
->core
;
347 { .addr
= dev
->core
->pll_addr
, .flags
= 0, .buf
= buf
, .len
= 4 };
350 dvb_pll_configure(core
->pll_desc
, buf
, params
->frequency
, 0);
351 dprintk(1, "%s: tuner at 0x%02x bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n",
352 __FUNCTION__
, msg
.addr
, buf
[0],buf
[1],buf
[2],buf
[3]);
354 if (fe
->ops
.i2c_gate_ctrl
)
355 fe
->ops
.i2c_gate_ctrl(fe
, 1);
356 if ((err
= i2c_transfer(&core
->i2c_adap
, &msg
, 1)) != 1) {
357 printk(KERN_WARNING
"cx88-dvb: %s error "
358 "(addr %02x <- %02x, err = %i)\n",
359 __FUNCTION__
, buf
[0], buf
[1], err
);
368 static int lgdt3303_tuner_set_params(struct dvb_frontend
* fe
,
369 struct dvb_frontend_parameters
* params
)
371 struct cx8802_dev
*dev
= fe
->dvb
->priv
;
372 struct cx88_core
*core
= dev
->core
;
374 /* Put the analog decoder in standby to keep it quiet */
375 cx88_call_i2c_clients (dev
->core
, TUNER_SET_STANDBY
, NULL
);
377 return lg_h06xf_pll_set(fe
, &core
->i2c_adap
, params
);
380 static int lgdt330x_pll_rf_set(struct dvb_frontend
* fe
, int index
)
382 struct cx8802_dev
*dev
= fe
->dvb
->priv
;
383 struct cx88_core
*core
= dev
->core
;
385 dprintk(1, "%s: index = %d\n", __FUNCTION__
, index
);
387 cx_clear(MO_GP0_IO
, 8);
389 cx_set(MO_GP0_IO
, 8);
393 static int lgdt330x_set_ts_param(struct dvb_frontend
* fe
, int is_punctured
)
395 struct cx8802_dev
*dev
= fe
->dvb
->priv
;
397 dev
->ts_gen_cntrl
|= 0x04;
399 dev
->ts_gen_cntrl
&= ~0x04;
403 static struct lgdt330x_config fusionhdtv_3_gold
= {
404 .demod_address
= 0x0e,
405 .demod_chip
= LGDT3302
,
406 .serial_mpeg
= 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
407 .set_ts_params
= lgdt330x_set_ts_param
,
410 static struct lgdt330x_config fusionhdtv_5_gold
= {
411 .demod_address
= 0x0e,
412 .demod_chip
= LGDT3303
,
413 .serial_mpeg
= 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
414 .set_ts_params
= lgdt330x_set_ts_param
,
417 static struct lgdt330x_config pchdtv_hd5500
= {
418 .demod_address
= 0x59,
419 .demod_chip
= LGDT3303
,
420 .serial_mpeg
= 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
421 .set_ts_params
= lgdt330x_set_ts_param
,
424 static int nxt200x_set_ts_param(struct dvb_frontend
* fe
,
427 struct cx8802_dev
*dev
= fe
->dvb
->priv
;
428 dev
->ts_gen_cntrl
= is_punctured
? 0x04 : 0x00;
432 static int nxt200x_set_pll_input(u8
* buf
, int input
)
441 static struct nxt200x_config ati_hdtvwonder
= {
442 .demod_address
= 0x0a,
443 .set_pll_input
= nxt200x_set_pll_input
,
444 .set_ts_params
= nxt200x_set_ts_param
,
447 static int cx24123_set_ts_param(struct dvb_frontend
* fe
,
450 struct cx8802_dev
*dev
= fe
->dvb
->priv
;
451 dev
->ts_gen_cntrl
= 0x2;
455 static int kworld_dvbs_100_set_voltage(struct dvb_frontend
* fe
, fe_sec_voltage_t voltage
)
457 struct cx8802_dev
*dev
= fe
->dvb
->priv
;
458 struct cx88_core
*core
= dev
->core
;
460 if (voltage
== SEC_VOLTAGE_OFF
) {
461 cx_write(MO_GP0_IO
, 0x000006fB);
463 cx_write(MO_GP0_IO
, 0x000006f9);
466 if (core
->prev_set_voltage
)
467 return core
->prev_set_voltage(fe
, voltage
);
471 static int geniatech_dvbs_set_voltage(struct dvb_frontend
*fe
, fe_sec_voltage_t voltage
)
473 struct cx8802_dev
*dev
= fe
->dvb
->priv
;
474 struct cx88_core
*core
= dev
->core
;
476 if (voltage
== SEC_VOLTAGE_OFF
) {
477 dprintk(1,"LNB Voltage OFF\n");
478 cx_write(MO_GP0_IO
, 0x0000efff);
481 if (core
->prev_set_voltage
)
482 return core
->prev_set_voltage(fe
, voltage
);
486 static struct cx24123_config geniatech_dvbs_config
= {
487 .demod_address
= 0x55,
488 .set_ts_params
= cx24123_set_ts_param
,
491 static struct cx24123_config hauppauge_novas_config
= {
492 .demod_address
= 0x55,
493 .set_ts_params
= cx24123_set_ts_param
,
496 static struct cx24123_config kworld_dvbs_100_config
= {
497 .demod_address
= 0x15,
498 .set_ts_params
= cx24123_set_ts_param
,
501 static int dvb_register(struct cx8802_dev
*dev
)
503 /* init struct videobuf_dvb */
504 dev
->dvb
.name
= dev
->core
->name
;
505 dev
->ts_gen_cntrl
= 0x0c;
508 switch (dev
->core
->board
) {
509 case CX88_BOARD_HAUPPAUGE_DVB_T1
:
510 dev
->dvb
.frontend
= dvb_attach(cx22702_attach
, &hauppauge_novat_config
,
511 &dev
->core
->i2c_adap
);
512 if (dev
->dvb
.frontend
!= NULL
) {
513 dvb_attach(dvb_pll_attach
, dev
->dvb
.frontend
, 0x61,
514 &dev
->core
->i2c_adap
,
515 &dvb_pll_thomson_dtt759x
);
518 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1
:
519 case CX88_BOARD_CONEXANT_DVB_T1
:
520 case CX88_BOARD_KWORLD_DVB_T_CX22702
:
521 case CX88_BOARD_WINFAST_DTV1000
:
522 dev
->dvb
.frontend
= dvb_attach(cx22702_attach
, &connexant_refboard_config
,
523 &dev
->core
->i2c_adap
);
524 if (dev
->dvb
.frontend
!= NULL
) {
525 dvb_attach(dvb_pll_attach
, dev
->dvb
.frontend
, 0x60,
526 &dev
->core
->i2c_adap
,
527 &dvb_pll_thomson_dtt7579
);
530 case CX88_BOARD_WINFAST_DTV2000H
:
531 case CX88_BOARD_HAUPPAUGE_HVR1100
:
532 case CX88_BOARD_HAUPPAUGE_HVR1100LP
:
533 dev
->dvb
.frontend
= dvb_attach(cx22702_attach
, &hauppauge_hvr1100_config
,
534 &dev
->core
->i2c_adap
);
535 if (dev
->dvb
.frontend
!= NULL
) {
536 dvb_attach(dvb_pll_attach
, dev
->dvb
.frontend
, 0x61,
537 &dev
->core
->i2c_adap
,
541 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS
:
542 dev
->dvb
.frontend
= dvb_attach(mt352_attach
, &dvico_fusionhdtv
,
543 &dev
->core
->i2c_adap
);
544 if (dev
->dvb
.frontend
!= NULL
) {
545 dvb_attach(dvb_pll_attach
, dev
->dvb
.frontend
, 0x60,
546 NULL
, &dvb_pll_thomson_dtt7579
);
549 /* ZL10353 replaces MT352 on later cards */
550 dev
->dvb
.frontend
= dvb_attach(zl10353_attach
, &dvico_fusionhdtv_plus_v1_1
,
551 &dev
->core
->i2c_adap
);
552 if (dev
->dvb
.frontend
!= NULL
) {
553 dvb_attach(dvb_pll_attach
, dev
->dvb
.frontend
, 0x60,
554 NULL
, &dvb_pll_thomson_dtt7579
);
557 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL
:
558 /* The tin box says DEE1601, but it seems to be DTT7579
559 * compatible, with a slightly different MT352 AGC gain. */
560 dev
->dvb
.frontend
= dvb_attach(mt352_attach
, &dvico_fusionhdtv_dual
,
561 &dev
->core
->i2c_adap
);
562 if (dev
->dvb
.frontend
!= NULL
) {
563 dvb_attach(dvb_pll_attach
, dev
->dvb
.frontend
, 0x61,
564 NULL
, &dvb_pll_thomson_dtt7579
);
567 /* ZL10353 replaces MT352 on later cards */
568 dev
->dvb
.frontend
= dvb_attach(zl10353_attach
, &dvico_fusionhdtv_plus_v1_1
,
569 &dev
->core
->i2c_adap
);
570 if (dev
->dvb
.frontend
!= NULL
) {
571 dvb_attach(dvb_pll_attach
, dev
->dvb
.frontend
, 0x61,
572 NULL
, &dvb_pll_thomson_dtt7579
);
575 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1
:
576 dev
->dvb
.frontend
= dvb_attach(mt352_attach
, &dvico_fusionhdtv
,
577 &dev
->core
->i2c_adap
);
578 if (dev
->dvb
.frontend
!= NULL
) {
579 dvb_attach(dvb_pll_attach
, dev
->dvb
.frontend
, 0x61,
580 NULL
, &dvb_pll_lg_z201
);
583 case CX88_BOARD_KWORLD_DVB_T
:
584 case CX88_BOARD_DNTV_LIVE_DVB_T
:
585 case CX88_BOARD_ADSTECH_DVB_T_PCI
:
586 dev
->dvb
.frontend
= dvb_attach(mt352_attach
, &dntv_live_dvbt_config
,
587 &dev
->core
->i2c_adap
);
588 if (dev
->dvb
.frontend
!= NULL
) {
589 dvb_attach(dvb_pll_attach
, dev
->dvb
.frontend
, 0x61,
590 NULL
, &dvb_pll_unknown_1
);
593 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO
:
594 #ifdef HAVE_VP3054_I2C
595 dev
->core
->pll_addr
= 0x61;
596 dev
->core
->pll_desc
= &dvb_pll_fmd1216me
;
597 dev
->dvb
.frontend
= dvb_attach(mt352_attach
, &dntv_live_dvbt_pro_config
,
598 &((struct vp3054_i2c_state
*)dev
->card_priv
)->adap
);
599 if (dev
->dvb
.frontend
!= NULL
) {
600 dev
->dvb
.frontend
->ops
.tuner_ops
.set_params
= dntv_live_dvbt_pro_tuner_set_params
;
603 printk("%s: built without vp3054 support\n", dev
->core
->name
);
606 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID
:
607 dev
->core
->pll_addr
= 0x61;
608 dev
->core
->pll_desc
= &dvb_pll_thomson_fe6600
;
609 dev
->dvb
.frontend
= dvb_attach(zl10353_attach
, &dvico_fusionhdtv_hybrid
,
610 &dev
->core
->i2c_adap
);
611 if (dev
->dvb
.frontend
!= NULL
) {
612 dev
->dvb
.frontend
->ops
.tuner_ops
.set_params
= dvico_hybrid_tuner_set_params
;
615 case CX88_BOARD_PCHDTV_HD3000
:
616 dev
->dvb
.frontend
= dvb_attach(or51132_attach
, &pchdtv_hd3000
,
617 &dev
->core
->i2c_adap
);
618 if (dev
->dvb
.frontend
!= NULL
) {
619 dvb_attach(dvb_pll_attach
, dev
->dvb
.frontend
, 0x61,
620 &dev
->core
->i2c_adap
,
621 &dvb_pll_thomson_dtt761x
);
624 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q
:
625 dev
->ts_gen_cntrl
= 0x08;
627 /* Do a hardware reset of chip before using it. */
628 struct cx88_core
*core
= dev
->core
;
630 cx_clear(MO_GP0_IO
, 1);
632 cx_set(MO_GP0_IO
, 1);
635 /* Select RF connector callback */
636 fusionhdtv_3_gold
.pll_rf_set
= lgdt330x_pll_rf_set
;
637 dev
->core
->pll_addr
= 0x61;
638 dev
->core
->pll_desc
= &dvb_pll_microtune_4042
;
639 dev
->dvb
.frontend
= dvb_attach(lgdt330x_attach
, &fusionhdtv_3_gold
,
640 &dev
->core
->i2c_adap
);
641 if (dev
->dvb
.frontend
!= NULL
) {
642 dev
->dvb
.frontend
->ops
.tuner_ops
.set_params
= lgdt3302_tuner_set_params
;
646 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T
:
647 dev
->ts_gen_cntrl
= 0x08;
649 /* Do a hardware reset of chip before using it. */
650 struct cx88_core
*core
= dev
->core
;
652 cx_clear(MO_GP0_IO
, 1);
654 cx_set(MO_GP0_IO
, 9);
656 dev
->core
->pll_addr
= 0x61;
657 dev
->core
->pll_desc
= &dvb_pll_thomson_dtt761x
;
658 dev
->dvb
.frontend
= dvb_attach(lgdt330x_attach
, &fusionhdtv_3_gold
,
659 &dev
->core
->i2c_adap
);
660 if (dev
->dvb
.frontend
!= NULL
) {
661 dev
->dvb
.frontend
->ops
.tuner_ops
.set_params
= lgdt3302_tuner_set_params
;
665 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD
:
666 dev
->ts_gen_cntrl
= 0x08;
668 /* Do a hardware reset of chip before using it. */
669 struct cx88_core
*core
= dev
->core
;
671 cx_clear(MO_GP0_IO
, 1);
673 cx_set(MO_GP0_IO
, 1);
675 dev
->dvb
.frontend
= dvb_attach(lgdt330x_attach
, &fusionhdtv_5_gold
,
676 &dev
->core
->i2c_adap
);
677 if (dev
->dvb
.frontend
!= NULL
) {
678 dev
->dvb
.frontend
->ops
.tuner_ops
.set_params
= lgdt3303_tuner_set_params
;
682 case CX88_BOARD_PCHDTV_HD5500
:
683 dev
->ts_gen_cntrl
= 0x08;
685 /* Do a hardware reset of chip before using it. */
686 struct cx88_core
*core
= dev
->core
;
688 cx_clear(MO_GP0_IO
, 1);
690 cx_set(MO_GP0_IO
, 1);
692 dev
->dvb
.frontend
= dvb_attach(lgdt330x_attach
, &pchdtv_hd5500
,
693 &dev
->core
->i2c_adap
);
694 if (dev
->dvb
.frontend
!= NULL
) {
695 dev
->dvb
.frontend
->ops
.tuner_ops
.set_params
= lgdt3303_tuner_set_params
;
699 case CX88_BOARD_ATI_HDTVWONDER
:
700 dev
->dvb
.frontend
= dvb_attach(nxt200x_attach
, &ati_hdtvwonder
,
701 &dev
->core
->i2c_adap
);
702 if (dev
->dvb
.frontend
!= NULL
) {
703 dvb_attach(dvb_pll_attach
, dev
->dvb
.frontend
, 0x61,
704 NULL
, &dvb_pll_tuv1236d
);
707 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1
:
708 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1
:
709 dev
->dvb
.frontend
= dvb_attach(cx24123_attach
, &hauppauge_novas_config
,
710 &dev
->core
->i2c_adap
);
711 if (dev
->dvb
.frontend
) {
712 dvb_attach(isl6421_attach
, dev
->dvb
.frontend
, &dev
->core
->i2c_adap
,
716 case CX88_BOARD_KWORLD_DVBS_100
:
717 dev
->dvb
.frontend
= dvb_attach(cx24123_attach
, &kworld_dvbs_100_config
,
718 &dev
->core
->i2c_adap
);
719 if (dev
->dvb
.frontend
) {
720 dev
->core
->prev_set_voltage
= dev
->dvb
.frontend
->ops
.set_voltage
;
721 dev
->dvb
.frontend
->ops
.set_voltage
= kworld_dvbs_100_set_voltage
;
724 case CX88_BOARD_GENIATECH_DVBS
:
725 dev
->dvb
.frontend
= dvb_attach(cx24123_attach
, &geniatech_dvbs_config
,
726 &dev
->core
->i2c_adap
);
727 if (dev
->dvb
.frontend
) {
728 dev
->core
->prev_set_voltage
= dev
->dvb
.frontend
->ops
.set_voltage
;
729 dev
->dvb
.frontend
->ops
.set_voltage
= geniatech_dvbs_set_voltage
;
733 printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
737 if (NULL
== dev
->dvb
.frontend
) {
738 printk("%s: frontend initialization failed\n",dev
->core
->name
);
742 if (dev
->core
->pll_desc
) {
743 dev
->dvb
.frontend
->ops
.info
.frequency_min
= dev
->core
->pll_desc
->min
;
744 dev
->dvb
.frontend
->ops
.info
.frequency_max
= dev
->core
->pll_desc
->max
;
747 /* Put the analog decoder in standby to keep it quiet */
748 cx88_call_i2c_clients (dev
->core
, TUNER_SET_STANDBY
, NULL
);
750 /* register everything */
751 return videobuf_dvb_register(&dev
->dvb
, THIS_MODULE
, dev
, &dev
->pci
->dev
);
754 /* ----------------------------------------------------------- */
756 static int __devinit
dvb_probe(struct pci_dev
*pci_dev
,
757 const struct pci_device_id
*pci_id
)
759 struct cx8802_dev
*dev
;
760 struct cx88_core
*core
;
764 core
= cx88_core_get(pci_dev
);
769 if (!cx88_boards
[core
->board
].dvb
)
773 dev
= kzalloc(sizeof(*dev
),GFP_KERNEL
);
779 err
= cx8802_init_common(dev
);
783 #ifdef HAVE_VP3054_I2C
784 err
= vp3054_i2c_probe(dev
);
790 printk("%s/2: cx2388x based dvb card\n", core
->name
);
791 videobuf_queue_init(&dev
->dvb
.dvbq
, &dvb_qops
,
792 dev
->pci
, &dev
->slock
,
793 V4L2_BUF_TYPE_VIDEO_CAPTURE
,
795 sizeof(struct cx88_buffer
),
797 err
= dvb_register(dev
);
801 /* Maintain a reference to cx88-video can query the 8802 device. */
806 cx8802_fini_common(dev
);
810 cx88_core_put(core
,pci_dev
);
814 static void __devexit
dvb_remove(struct pci_dev
*pci_dev
)
816 struct cx8802_dev
*dev
= pci_get_drvdata(pci_dev
);
818 /* Destroy any 8802 reference. */
819 dev
->core
->dvbdev
= NULL
;
822 videobuf_dvb_unregister(&dev
->dvb
);
824 #ifdef HAVE_VP3054_I2C
825 vp3054_i2c_remove(dev
);
829 cx8802_fini_common(dev
);
830 cx88_core_put(dev
->core
,dev
->pci
);
834 static struct pci_device_id cx8802_pci_tbl
[] = {
838 .subvendor
= PCI_ANY_ID
,
839 .subdevice
= PCI_ANY_ID
,
841 /* --- end of list --- */
844 MODULE_DEVICE_TABLE(pci
, cx8802_pci_tbl
);
846 static struct pci_driver dvb_pci_driver
= {
848 .id_table
= cx8802_pci_tbl
,
850 .remove
= __devexit_p(dvb_remove
),
851 .suspend
= cx8802_suspend_common
,
852 .resume
= cx8802_resume_common
,
855 static int dvb_init(void)
857 printk(KERN_INFO
"cx2388x dvb driver version %d.%d.%d loaded\n",
858 (CX88_VERSION_CODE
>> 16) & 0xff,
859 (CX88_VERSION_CODE
>> 8) & 0xff,
860 CX88_VERSION_CODE
& 0xff);
862 printk(KERN_INFO
"cx2388x: snapshot date %04d-%02d-%02d\n",
863 SNAPSHOT
/10000, (SNAPSHOT
/100)%100, SNAPSHOT
%100);
865 return pci_register_driver(&dvb_pci_driver
);
868 static void dvb_fini(void)
870 pci_unregister_driver(&dvb_pci_driver
);
873 module_init(dvb_init
);
874 module_exit(dvb_fini
);
879 * compile-command: "make DVB=1"