1 /******************************************************************************
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *****************************************************************************/
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/version.h>
30 #include <linux/init.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/wireless.h>
37 #include <net/mac80211.h>
38 #include <linux/etherdevice.h>
39 #include <asm/unaligned.h>
41 #include "iwl-eeprom.h"
45 #include "iwl-helpers.h"
46 #include "iwl-calib.h"
49 static int iwl4965_send_tx_power(struct iwl_priv
*priv
);
50 static int iwl4965_hw_get_temperature(const struct iwl_priv
*priv
);
52 /* Change firmware file name, using "-" and incrementing number,
53 * *only* when uCode interface or architecture changes so that it
54 * is not compatible with earlier drivers.
55 * This number will also appear in << 8 position of 1st dword of uCode file */
56 #define IWL4965_UCODE_API "-2"
59 /* module parameters */
60 static struct iwl_mod_params iwl4965_mod_params
= {
61 .num_of_queues
= IWL49_NUM_QUEUES
,
62 .num_of_ampdu_queues
= IWL49_NUM_AMPDU_QUEUES
,
66 /* the rest are 0 by default */
69 /* check contents of special bootstrap uCode SRAM */
70 static int iwl4965_verify_bsm(struct iwl_priv
*priv
)
72 __le32
*image
= priv
->ucode_boot
.v_addr
;
73 u32 len
= priv
->ucode_boot
.len
;
77 IWL_DEBUG_INFO("Begin verify bsm\n");
79 /* verify BSM SRAM contents */
80 val
= iwl_read_prph(priv
, BSM_WR_DWCOUNT_REG
);
81 for (reg
= BSM_SRAM_LOWER_BOUND
;
82 reg
< BSM_SRAM_LOWER_BOUND
+ len
;
83 reg
+= sizeof(u32
), image
++) {
84 val
= iwl_read_prph(priv
, reg
);
85 if (val
!= le32_to_cpu(*image
)) {
86 IWL_ERROR("BSM uCode verification failed at "
87 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
89 reg
- BSM_SRAM_LOWER_BOUND
, len
,
90 val
, le32_to_cpu(*image
));
95 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
101 * iwl4965_load_bsm - Load bootstrap instructions
105 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
106 * in special SRAM that does not power down during RFKILL. When powering back
107 * up after power-saving sleeps (or during initial uCode load), the BSM loads
108 * the bootstrap program into the on-board processor, and starts it.
110 * The bootstrap program loads (via DMA) instructions and data for a new
111 * program from host DRAM locations indicated by the host driver in the
112 * BSM_DRAM_* registers. Once the new program is loaded, it starts
115 * When initializing the NIC, the host driver points the BSM to the
116 * "initialize" uCode image. This uCode sets up some internal data, then
117 * notifies host via "initialize alive" that it is complete.
119 * The host then replaces the BSM_DRAM_* pointer values to point to the
120 * normal runtime uCode instructions and a backup uCode data cache buffer
121 * (filled initially with starting data values for the on-board processor),
122 * then triggers the "initialize" uCode to load and launch the runtime uCode,
123 * which begins normal operation.
125 * When doing a power-save shutdown, runtime uCode saves data SRAM into
126 * the backup data cache in DRAM before SRAM is powered down.
128 * When powering back up, the BSM loads the bootstrap program. This reloads
129 * the runtime uCode instructions and the backup data cache into SRAM,
130 * and re-launches the runtime uCode from where it left off.
132 static int iwl4965_load_bsm(struct iwl_priv
*priv
)
134 __le32
*image
= priv
->ucode_boot
.v_addr
;
135 u32 len
= priv
->ucode_boot
.len
;
145 IWL_DEBUG_INFO("Begin load bsm\n");
147 priv
->ucode_type
= UCODE_RT
;
149 /* make sure bootstrap program is no larger than BSM's SRAM size */
150 if (len
> IWL_MAX_BSM_SIZE
)
153 /* Tell bootstrap uCode where to find the "Initialize" uCode
154 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
155 * NOTE: iwl_init_alive_start() will replace these values,
156 * after the "initialize" uCode has run, to point to
157 * runtime/protocol instructions and backup data cache.
159 pinst
= priv
->ucode_init
.p_addr
>> 4;
160 pdata
= priv
->ucode_init_data
.p_addr
>> 4;
161 inst_len
= priv
->ucode_init
.len
;
162 data_len
= priv
->ucode_init_data
.len
;
164 ret
= iwl_grab_nic_access(priv
);
168 iwl_write_prph(priv
, BSM_DRAM_INST_PTR_REG
, pinst
);
169 iwl_write_prph(priv
, BSM_DRAM_DATA_PTR_REG
, pdata
);
170 iwl_write_prph(priv
, BSM_DRAM_INST_BYTECOUNT_REG
, inst_len
);
171 iwl_write_prph(priv
, BSM_DRAM_DATA_BYTECOUNT_REG
, data_len
);
173 /* Fill BSM memory with bootstrap instructions */
174 for (reg_offset
= BSM_SRAM_LOWER_BOUND
;
175 reg_offset
< BSM_SRAM_LOWER_BOUND
+ len
;
176 reg_offset
+= sizeof(u32
), image
++)
177 _iwl_write_prph(priv
, reg_offset
, le32_to_cpu(*image
));
179 ret
= iwl4965_verify_bsm(priv
);
181 iwl_release_nic_access(priv
);
185 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
186 iwl_write_prph(priv
, BSM_WR_MEM_SRC_REG
, 0x0);
187 iwl_write_prph(priv
, BSM_WR_MEM_DST_REG
, RTC_INST_LOWER_BOUND
);
188 iwl_write_prph(priv
, BSM_WR_DWCOUNT_REG
, len
/ sizeof(u32
));
190 /* Load bootstrap code into instruction SRAM now,
191 * to prepare to load "initialize" uCode */
192 iwl_write_prph(priv
, BSM_WR_CTRL_REG
, BSM_WR_CTRL_REG_BIT_START
);
194 /* Wait for load of bootstrap uCode to finish */
195 for (i
= 0; i
< 100; i
++) {
196 done
= iwl_read_prph(priv
, BSM_WR_CTRL_REG
);
197 if (!(done
& BSM_WR_CTRL_REG_BIT_START
))
202 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i
);
204 IWL_ERROR("BSM write did not complete!\n");
208 /* Enable future boot loads whenever power management unit triggers it
209 * (e.g. when powering back up after power-save shutdown) */
210 iwl_write_prph(priv
, BSM_WR_CTRL_REG
, BSM_WR_CTRL_REG_BIT_START_EN
);
212 iwl_release_nic_access(priv
);
218 * iwl4965_set_ucode_ptrs - Set uCode address location
220 * Tell initialization uCode where to find runtime uCode.
222 * BSM registers initially contain pointers to initialization uCode.
223 * We need to replace them to load runtime uCode inst and data,
224 * and to save runtime data when powering down.
226 static int iwl4965_set_ucode_ptrs(struct iwl_priv
*priv
)
233 /* bits 35:4 for 4965 */
234 pinst
= priv
->ucode_code
.p_addr
>> 4;
235 pdata
= priv
->ucode_data_backup
.p_addr
>> 4;
237 spin_lock_irqsave(&priv
->lock
, flags
);
238 ret
= iwl_grab_nic_access(priv
);
240 spin_unlock_irqrestore(&priv
->lock
, flags
);
244 /* Tell bootstrap uCode where to find image to load */
245 iwl_write_prph(priv
, BSM_DRAM_INST_PTR_REG
, pinst
);
246 iwl_write_prph(priv
, BSM_DRAM_DATA_PTR_REG
, pdata
);
247 iwl_write_prph(priv
, BSM_DRAM_DATA_BYTECOUNT_REG
,
248 priv
->ucode_data
.len
);
250 /* Inst bytecount must be last to set up, bit 31 signals uCode
251 * that all new ptr/size info is in place */
252 iwl_write_prph(priv
, BSM_DRAM_INST_BYTECOUNT_REG
,
253 priv
->ucode_code
.len
| BSM_DRAM_INST_LOAD
);
254 iwl_release_nic_access(priv
);
256 spin_unlock_irqrestore(&priv
->lock
, flags
);
258 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
264 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
266 * Called after REPLY_ALIVE notification received from "initialize" uCode.
268 * The 4965 "initialize" ALIVE reply contains calibration data for:
269 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
270 * (3945 does not contain this data).
272 * Tell "initialize" uCode to go ahead and load the runtime uCode.
274 static void iwl4965_init_alive_start(struct iwl_priv
*priv
)
276 /* Check alive response for "valid" sign from uCode */
277 if (priv
->card_alive_init
.is_valid
!= UCODE_VALID_OK
) {
278 /* We had an error bringing up the hardware, so take it
279 * all the way back down so we can try again */
280 IWL_DEBUG_INFO("Initialize Alive failed.\n");
284 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
285 * This is a paranoid check, because we would not have gotten the
286 * "initialize" alive if code weren't properly loaded. */
287 if (iwl_verify_ucode(priv
)) {
288 /* Runtime instruction load was bad;
289 * take it all the way back down so we can try again */
290 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
294 /* Calculate temperature */
295 priv
->temperature
= iwl4965_hw_get_temperature(priv
);
297 /* Send pointers to protocol/runtime uCode image ... init code will
298 * load and launch runtime uCode, which will send us another "Alive"
300 IWL_DEBUG_INFO("Initialization Alive received.\n");
301 if (iwl4965_set_ucode_ptrs(priv
)) {
302 /* Runtime instruction load won't happen;
303 * take it all the way back down so we can try again */
304 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
310 queue_work(priv
->workqueue
, &priv
->restart
);
313 static int is_fat_channel(__le32 rxon_flags
)
315 return (rxon_flags
& RXON_FLG_CHANNEL_MODE_PURE_40_MSK
) ||
316 (rxon_flags
& RXON_FLG_CHANNEL_MODE_MIXED_MSK
);
323 static int iwl4965_eeprom_check_version(struct iwl_priv
*priv
)
328 eeprom_ver
= iwl_eeprom_query16(priv
, EEPROM_VERSION
);
330 calib_ver
= iwl_eeprom_query16(priv
, EEPROM_4965_CALIB_VERSION_OFFSET
);
332 if (eeprom_ver
< EEPROM_4965_EEPROM_VERSION
||
333 calib_ver
< EEPROM_4965_TX_POWER_VERSION
)
338 IWL_ERROR("Unsuported EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
339 eeprom_ver
, EEPROM_4965_EEPROM_VERSION
,
340 calib_ver
, EEPROM_4965_TX_POWER_VERSION
);
346 * Activate/Deactivat Tx DMA/FIFO channels according tx fifos mask
347 * must be called under priv->lock and mac access
349 static void iwl4965_txq_set_sched(struct iwl_priv
*priv
, u32 mask
)
351 iwl_write_prph(priv
, IWL49_SCD_TXFACT
, mask
);
354 static int iwl4965_apm_init(struct iwl_priv
*priv
)
358 iwl_set_bit(priv
, CSR_GIO_CHICKEN_BITS
,
359 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER
);
361 /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
362 iwl_set_bit(priv
, CSR_GIO_CHICKEN_BITS
,
363 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX
);
365 /* set "initialization complete" bit to move adapter
366 * D0U* --> D0A* state */
367 iwl_set_bit(priv
, CSR_GP_CNTRL
, CSR_GP_CNTRL_REG_FLAG_INIT_DONE
);
369 /* wait for clock stabilization */
370 ret
= iwl_poll_bit(priv
, CSR_GP_CNTRL
,
371 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
,
372 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
, 25000);
374 IWL_DEBUG_INFO("Failed to init the card\n");
378 ret
= iwl_grab_nic_access(priv
);
383 iwl_write_prph(priv
, APMG_CLK_CTRL_REG
, APMG_CLK_VAL_DMA_CLK_RQT
|
384 APMG_CLK_VAL_BSM_CLK_RQT
);
388 /* disable L1-Active */
389 iwl_set_bits_prph(priv
, APMG_PCIDEV_STT_REG
,
390 APMG_PCIDEV_STT_VAL_L1_ACT_DIS
);
392 iwl_release_nic_access(priv
);
398 static void iwl4965_nic_config(struct iwl_priv
*priv
)
405 spin_lock_irqsave(&priv
->lock
, flags
);
407 if ((priv
->rev_id
& 0x80) == 0x80 && (priv
->rev_id
& 0x7f) < 8) {
408 pci_read_config_dword(priv
->pci_dev
, PCI_REG_WUM8
, &val
);
409 /* Enable No Snoop field */
410 pci_write_config_dword(priv
->pci_dev
, PCI_REG_WUM8
,
414 pci_read_config_byte(priv
->pci_dev
, PCI_LINK_CTRL
, &val_link
);
416 /* L1 is enabled by BIOS */
417 if ((val_link
& PCI_LINK_VAL_L1_EN
) == PCI_LINK_VAL_L1_EN
)
418 /* diable L0S disabled L1A enabled */
419 iwl_set_bit(priv
, CSR_GIO_REG
, CSR_GIO_REG_VAL_L0S_ENABLED
);
421 /* L0S enabled L1A disabled */
422 iwl_clear_bit(priv
, CSR_GIO_REG
, CSR_GIO_REG_VAL_L0S_ENABLED
);
424 radio_cfg
= iwl_eeprom_query16(priv
, EEPROM_RADIO_CONFIG
);
426 /* write radio config values to register */
427 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg
) == EEPROM_4965_RF_CFG_TYPE_MAX
)
428 iwl_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
429 EEPROM_RF_CFG_TYPE_MSK(radio_cfg
) |
430 EEPROM_RF_CFG_STEP_MSK(radio_cfg
) |
431 EEPROM_RF_CFG_DASH_MSK(radio_cfg
));
433 /* set CSR_HW_CONFIG_REG for uCode use */
434 iwl_set_bit(priv
, CSR_HW_IF_CONFIG_REG
,
435 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI
|
436 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI
);
438 priv
->calib_info
= (struct iwl_eeprom_calib_info
*)
439 iwl_eeprom_query_addr(priv
, EEPROM_4965_CALIB_TXPOWER_OFFSET
);
441 spin_unlock_irqrestore(&priv
->lock
, flags
);
444 static int iwl4965_apm_stop_master(struct iwl_priv
*priv
)
449 spin_lock_irqsave(&priv
->lock
, flags
);
451 /* set stop master bit */
452 iwl_set_bit(priv
, CSR_RESET
, CSR_RESET_REG_FLAG_STOP_MASTER
);
454 ret
= iwl_poll_bit(priv
, CSR_RESET
,
455 CSR_RESET_REG_FLAG_MASTER_DISABLED
,
456 CSR_RESET_REG_FLAG_MASTER_DISABLED
, 100);
461 spin_unlock_irqrestore(&priv
->lock
, flags
);
462 IWL_DEBUG_INFO("stop master\n");
467 static void iwl4965_apm_stop(struct iwl_priv
*priv
)
471 iwl4965_apm_stop_master(priv
);
473 spin_lock_irqsave(&priv
->lock
, flags
);
475 iwl_set_bit(priv
, CSR_RESET
, CSR_RESET_REG_FLAG_SW_RESET
);
479 iwl_set_bit(priv
, CSR_GP_CNTRL
, CSR_GP_CNTRL_REG_FLAG_INIT_DONE
);
480 spin_unlock_irqrestore(&priv
->lock
, flags
);
483 static int iwl4965_apm_reset(struct iwl_priv
*priv
)
488 iwl4965_apm_stop_master(priv
);
490 spin_lock_irqsave(&priv
->lock
, flags
);
492 iwl_set_bit(priv
, CSR_RESET
, CSR_RESET_REG_FLAG_SW_RESET
);
496 /* FIXME: put here L1A -L0S w/a */
498 iwl_set_bit(priv
, CSR_GP_CNTRL
, CSR_GP_CNTRL_REG_FLAG_INIT_DONE
);
500 ret
= iwl_poll_bit(priv
, CSR_RESET
,
501 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
,
502 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY
, 25);
509 ret
= iwl_grab_nic_access(priv
);
512 /* Enable DMA and BSM Clock */
513 iwl_write_prph(priv
, APMG_CLK_EN_REG
, APMG_CLK_VAL_DMA_CLK_RQT
|
514 APMG_CLK_VAL_BSM_CLK_RQT
);
519 iwl_set_bits_prph(priv
, APMG_PCIDEV_STT_REG
,
520 APMG_PCIDEV_STT_VAL_L1_ACT_DIS
);
522 iwl_release_nic_access(priv
);
524 clear_bit(STATUS_HCMD_ACTIVE
, &priv
->status
);
525 wake_up_interruptible(&priv
->wait_command_queue
);
528 spin_unlock_irqrestore(&priv
->lock
, flags
);
533 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
534 * Called after every association, but this runs only once!
535 * ... once chain noise is calibrated the first time, it's good forever. */
536 static void iwl4965_chain_noise_reset(struct iwl_priv
*priv
)
538 struct iwl_chain_noise_data
*data
= &(priv
->chain_noise_data
);
540 if ((data
->state
== IWL_CHAIN_NOISE_ALIVE
) && iwl_is_associated(priv
)) {
541 struct iwl4965_calibration_cmd cmd
;
543 memset(&cmd
, 0, sizeof(cmd
));
544 cmd
.opCode
= PHY_CALIBRATE_DIFF_GAIN_CMD
;
548 if (iwl_send_cmd_pdu(priv
, REPLY_PHY_CALIBRATION_CMD
,
550 IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
551 data
->state
= IWL_CHAIN_NOISE_ACCUMULATE
;
552 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
556 static void iwl4965_gain_computation(struct iwl_priv
*priv
,
558 u16 min_average_noise_antenna_i
,
559 u32 min_average_noise
)
562 struct iwl_chain_noise_data
*data
= &priv
->chain_noise_data
;
564 data
->delta_gain_code
[min_average_noise_antenna_i
] = 0;
566 for (i
= 0; i
< NUM_RX_CHAINS
; i
++) {
569 if (!(data
->disconn_array
[i
]) &&
570 (data
->delta_gain_code
[i
] ==
571 CHAIN_NOISE_DELTA_GAIN_INIT_VAL
)) {
572 delta_g
= average_noise
[i
] - min_average_noise
;
573 data
->delta_gain_code
[i
] = (u8
)((delta_g
* 10) / 15);
574 data
->delta_gain_code
[i
] =
575 min(data
->delta_gain_code
[i
],
576 (u8
) CHAIN_NOISE_MAX_DELTA_GAIN_CODE
);
578 data
->delta_gain_code
[i
] =
579 (data
->delta_gain_code
[i
] | (1 << 2));
581 data
->delta_gain_code
[i
] = 0;
584 IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
585 data
->delta_gain_code
[0],
586 data
->delta_gain_code
[1],
587 data
->delta_gain_code
[2]);
589 /* Differential gain gets sent to uCode only once */
590 if (!data
->radio_write
) {
591 struct iwl4965_calibration_cmd cmd
;
592 data
->radio_write
= 1;
594 memset(&cmd
, 0, sizeof(cmd
));
595 cmd
.opCode
= PHY_CALIBRATE_DIFF_GAIN_CMD
;
596 cmd
.diff_gain_a
= data
->delta_gain_code
[0];
597 cmd
.diff_gain_b
= data
->delta_gain_code
[1];
598 cmd
.diff_gain_c
= data
->delta_gain_code
[2];
599 ret
= iwl_send_cmd_pdu(priv
, REPLY_PHY_CALIBRATION_CMD
,
602 IWL_DEBUG_CALIB("fail sending cmd "
603 "REPLY_PHY_CALIBRATION_CMD \n");
605 /* TODO we might want recalculate
606 * rx_chain in rxon cmd */
608 /* Mark so we run this algo only once! */
609 data
->state
= IWL_CHAIN_NOISE_CALIBRATED
;
611 data
->chain_noise_a
= 0;
612 data
->chain_noise_b
= 0;
613 data
->chain_noise_c
= 0;
614 data
->chain_signal_a
= 0;
615 data
->chain_signal_b
= 0;
616 data
->chain_signal_c
= 0;
617 data
->beacon_count
= 0;
620 static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info
*info
,
623 if (info
->flags
& IEEE80211_TX_CTL_USE_RTS_CTS
) {
624 *tx_flags
|= TX_CMD_FLG_RTS_MSK
;
625 *tx_flags
&= ~TX_CMD_FLG_CTS_MSK
;
626 } else if (info
->flags
& IEEE80211_TX_CTL_USE_CTS_PROTECT
) {
627 *tx_flags
&= ~TX_CMD_FLG_RTS_MSK
;
628 *tx_flags
|= TX_CMD_FLG_CTS_MSK
;
632 static void iwl4965_bg_txpower_work(struct work_struct
*work
)
634 struct iwl_priv
*priv
= container_of(work
, struct iwl_priv
,
637 /* If a scan happened to start before we got here
638 * then just return; the statistics notification will
639 * kick off another scheduled work to compensate for
640 * any temperature delta we missed here. */
641 if (test_bit(STATUS_EXIT_PENDING
, &priv
->status
) ||
642 test_bit(STATUS_SCANNING
, &priv
->status
))
645 mutex_lock(&priv
->mutex
);
647 /* Regardless of if we are assocaited, we must reconfigure the
648 * TX power since frames can be sent on non-radar channels while
650 iwl4965_send_tx_power(priv
);
652 /* Update last_temperature to keep is_calib_needed from running
653 * when it isn't needed... */
654 priv
->last_temperature
= priv
->temperature
;
656 mutex_unlock(&priv
->mutex
);
660 * Acquire priv->lock before calling this function !
662 static void iwl4965_set_wr_ptrs(struct iwl_priv
*priv
, int txq_id
, u32 index
)
664 iwl_write_direct32(priv
, HBUS_TARG_WRPTR
,
665 (index
& 0xff) | (txq_id
<< 8));
666 iwl_write_prph(priv
, IWL49_SCD_QUEUE_RDPTR(txq_id
), index
);
670 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
671 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
672 * @scd_retry: (1) Indicates queue will be used in aggregation mode
674 * NOTE: Acquire priv->lock before calling this function !
676 static void iwl4965_tx_queue_set_status(struct iwl_priv
*priv
,
677 struct iwl_tx_queue
*txq
,
678 int tx_fifo_id
, int scd_retry
)
680 int txq_id
= txq
->q
.id
;
682 /* Find out whether to activate Tx queue */
683 int active
= test_bit(txq_id
, &priv
->txq_ctx_active_msk
)?1:0;
685 /* Set up and activate */
686 iwl_write_prph(priv
, IWL49_SCD_QUEUE_STATUS_BITS(txq_id
),
687 (active
<< IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE
) |
688 (tx_fifo_id
<< IWL49_SCD_QUEUE_STTS_REG_POS_TXF
) |
689 (scd_retry
<< IWL49_SCD_QUEUE_STTS_REG_POS_WSL
) |
690 (scd_retry
<< IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK
) |
691 IWL49_SCD_QUEUE_STTS_REG_MSK
);
693 txq
->sched_retry
= scd_retry
;
695 IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
696 active
? "Activate" : "Deactivate",
697 scd_retry
? "BA" : "AC", txq_id
, tx_fifo_id
);
700 static const u16 default_queue_to_tx_fifo
[] = {
710 static int iwl4965_alive_notify(struct iwl_priv
*priv
)
717 spin_lock_irqsave(&priv
->lock
, flags
);
719 ret
= iwl_grab_nic_access(priv
);
721 spin_unlock_irqrestore(&priv
->lock
, flags
);
725 /* Clear 4965's internal Tx Scheduler data base */
726 priv
->scd_base_addr
= iwl_read_prph(priv
, IWL49_SCD_SRAM_BASE_ADDR
);
727 a
= priv
->scd_base_addr
+ IWL49_SCD_CONTEXT_DATA_OFFSET
;
728 for (; a
< priv
->scd_base_addr
+ IWL49_SCD_TX_STTS_BITMAP_OFFSET
; a
+= 4)
729 iwl_write_targ_mem(priv
, a
, 0);
730 for (; a
< priv
->scd_base_addr
+ IWL49_SCD_TRANSLATE_TBL_OFFSET
; a
+= 4)
731 iwl_write_targ_mem(priv
, a
, 0);
732 for (; a
< sizeof(u16
) * priv
->hw_params
.max_txq_num
; a
+= 4)
733 iwl_write_targ_mem(priv
, a
, 0);
735 /* Tel 4965 where to find Tx byte count tables */
736 iwl_write_prph(priv
, IWL49_SCD_DRAM_BASE_ADDR
,
738 offsetof(struct iwl4965_shared
, queues_byte_cnt_tbls
)) >> 10);
740 /* Disable chain mode for all queues */
741 iwl_write_prph(priv
, IWL49_SCD_QUEUECHAIN_SEL
, 0);
743 /* Initialize each Tx queue (including the command queue) */
744 for (i
= 0; i
< priv
->hw_params
.max_txq_num
; i
++) {
746 /* TFD circular buffer read/write indexes */
747 iwl_write_prph(priv
, IWL49_SCD_QUEUE_RDPTR(i
), 0);
748 iwl_write_direct32(priv
, HBUS_TARG_WRPTR
, 0 | (i
<< 8));
750 /* Max Tx Window size for Scheduler-ACK mode */
751 iwl_write_targ_mem(priv
, priv
->scd_base_addr
+
752 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i
),
754 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS
) &
755 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK
);
758 iwl_write_targ_mem(priv
, priv
->scd_base_addr
+
759 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i
) +
762 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS
) &
763 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK
);
766 iwl_write_prph(priv
, IWL49_SCD_INTERRUPT_MASK
,
767 (1 << priv
->hw_params
.max_txq_num
) - 1);
769 /* Activate all Tx DMA/FIFO channels */
770 priv
->cfg
->ops
->lib
->txq_set_sched(priv
, IWL_MASK(0, 7));
772 iwl4965_set_wr_ptrs(priv
, IWL_CMD_QUEUE_NUM
, 0);
774 /* Map each Tx/cmd queue to its corresponding fifo */
775 for (i
= 0; i
< ARRAY_SIZE(default_queue_to_tx_fifo
); i
++) {
776 int ac
= default_queue_to_tx_fifo
[i
];
777 iwl_txq_ctx_activate(priv
, i
);
778 iwl4965_tx_queue_set_status(priv
, &priv
->txq
[i
], ac
, 0);
781 iwl_release_nic_access(priv
);
782 spin_unlock_irqrestore(&priv
->lock
, flags
);
787 static struct iwl_sensitivity_ranges iwl4965_sensitivity
= {
791 .auto_corr_min_ofdm
= 85,
792 .auto_corr_min_ofdm_mrc
= 170,
793 .auto_corr_min_ofdm_x1
= 105,
794 .auto_corr_min_ofdm_mrc_x1
= 220,
796 .auto_corr_max_ofdm
= 120,
797 .auto_corr_max_ofdm_mrc
= 210,
798 .auto_corr_max_ofdm_x1
= 140,
799 .auto_corr_max_ofdm_mrc_x1
= 270,
801 .auto_corr_min_cck
= 125,
802 .auto_corr_max_cck
= 200,
803 .auto_corr_min_cck_mrc
= 200,
804 .auto_corr_max_cck_mrc
= 400,
811 * iwl4965_hw_set_hw_params
813 * Called when initializing driver
815 static int iwl4965_hw_set_hw_params(struct iwl_priv
*priv
)
818 if ((priv
->cfg
->mod_params
->num_of_queues
> IWL49_NUM_QUEUES
) ||
819 (priv
->cfg
->mod_params
->num_of_queues
< IWL_MIN_NUM_QUEUES
)) {
820 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
821 IWL_MIN_NUM_QUEUES
, IWL49_NUM_QUEUES
);
825 priv
->hw_params
.max_txq_num
= priv
->cfg
->mod_params
->num_of_queues
;
826 priv
->hw_params
.first_ampdu_q
= IWL49_FIRST_AMPDU_QUEUE
;
827 priv
->hw_params
.max_stations
= IWL4965_STATION_COUNT
;
828 priv
->hw_params
.bcast_sta_id
= IWL4965_BROADCAST_ID
;
829 priv
->hw_params
.max_data_size
= IWL49_RTC_DATA_SIZE
;
830 priv
->hw_params
.max_inst_size
= IWL49_RTC_INST_SIZE
;
831 priv
->hw_params
.max_bsm_size
= BSM_SRAM_SIZE
;
832 priv
->hw_params
.fat_channel
= BIT(IEEE80211_BAND_5GHZ
);
834 priv
->hw_params
.tx_chains_num
= 2;
835 priv
->hw_params
.rx_chains_num
= 2;
836 priv
->hw_params
.valid_tx_ant
= ANT_A
| ANT_B
;
837 priv
->hw_params
.valid_rx_ant
= ANT_A
| ANT_B
;
838 priv
->hw_params
.ct_kill_threshold
= CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD
);
840 priv
->hw_params
.sens
= &iwl4965_sensitivity
;
845 static s32
iwl4965_math_div_round(s32 num
, s32 denom
, s32
*res
)
858 *res
= ((num
* 2 + denom
) / (denom
* 2)) * sign
;
864 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
866 * Determines power supply voltage compensation for txpower calculations.
867 * Returns number of 1/2-dB steps to subtract from gain table index,
868 * to compensate for difference between power supply voltage during
869 * factory measurements, vs. current power supply voltage.
871 * Voltage indication is higher for lower voltage.
872 * Lower voltage requires more gain (lower gain table index).
874 static s32
iwl4965_get_voltage_compensation(s32 eeprom_voltage
,
879 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE
== eeprom_voltage
) ||
880 (TX_POWER_IWL_ILLEGAL_VOLTAGE
== current_voltage
))
883 iwl4965_math_div_round(current_voltage
- eeprom_voltage
,
884 TX_POWER_IWL_VOLTAGE_CODES_PER_03V
, &comp
);
886 if (current_voltage
> eeprom_voltage
)
888 if ((comp
< -2) || (comp
> 2))
894 static s32
iwl4965_get_tx_atten_grp(u16 channel
)
896 if (channel
>= CALIB_IWL_TX_ATTEN_GR5_FCH
&&
897 channel
<= CALIB_IWL_TX_ATTEN_GR5_LCH
)
898 return CALIB_CH_GROUP_5
;
900 if (channel
>= CALIB_IWL_TX_ATTEN_GR1_FCH
&&
901 channel
<= CALIB_IWL_TX_ATTEN_GR1_LCH
)
902 return CALIB_CH_GROUP_1
;
904 if (channel
>= CALIB_IWL_TX_ATTEN_GR2_FCH
&&
905 channel
<= CALIB_IWL_TX_ATTEN_GR2_LCH
)
906 return CALIB_CH_GROUP_2
;
908 if (channel
>= CALIB_IWL_TX_ATTEN_GR3_FCH
&&
909 channel
<= CALIB_IWL_TX_ATTEN_GR3_LCH
)
910 return CALIB_CH_GROUP_3
;
912 if (channel
>= CALIB_IWL_TX_ATTEN_GR4_FCH
&&
913 channel
<= CALIB_IWL_TX_ATTEN_GR4_LCH
)
914 return CALIB_CH_GROUP_4
;
916 IWL_ERROR("Can't find txatten group for channel %d.\n", channel
);
920 static u32
iwl4965_get_sub_band(const struct iwl_priv
*priv
, u32 channel
)
924 for (b
= 0; b
< EEPROM_TX_POWER_BANDS
; b
++) {
925 if (priv
->calib_info
->band_info
[b
].ch_from
== 0)
928 if ((channel
>= priv
->calib_info
->band_info
[b
].ch_from
)
929 && (channel
<= priv
->calib_info
->band_info
[b
].ch_to
))
936 static s32
iwl4965_interpolate_value(s32 x
, s32 x1
, s32 y1
, s32 x2
, s32 y2
)
943 iwl4965_math_div_round((x2
- x
) * (y1
- y2
), (x2
- x1
), &val
);
949 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
951 * Interpolates factory measurements from the two sample channels within a
952 * sub-band, to apply to channel of interest. Interpolation is proportional to
953 * differences in channel frequencies, which is proportional to differences
956 static int iwl4965_interpolate_chan(struct iwl_priv
*priv
, u32 channel
,
957 struct iwl_eeprom_calib_ch_info
*chan_info
)
962 const struct iwl_eeprom_calib_measure
*m1
;
963 const struct iwl_eeprom_calib_measure
*m2
;
964 struct iwl_eeprom_calib_measure
*omeas
;
968 s
= iwl4965_get_sub_band(priv
, channel
);
969 if (s
>= EEPROM_TX_POWER_BANDS
) {
970 IWL_ERROR("Tx Power can not find channel %d ", channel
);
974 ch_i1
= priv
->calib_info
->band_info
[s
].ch1
.ch_num
;
975 ch_i2
= priv
->calib_info
->band_info
[s
].ch2
.ch_num
;
976 chan_info
->ch_num
= (u8
) channel
;
978 IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
979 channel
, s
, ch_i1
, ch_i2
);
981 for (c
= 0; c
< EEPROM_TX_POWER_TX_CHAINS
; c
++) {
982 for (m
= 0; m
< EEPROM_TX_POWER_MEASUREMENTS
; m
++) {
983 m1
= &(priv
->calib_info
->band_info
[s
].ch1
.
985 m2
= &(priv
->calib_info
->band_info
[s
].ch2
.
987 omeas
= &(chan_info
->measurements
[c
][m
]);
990 (u8
) iwl4965_interpolate_value(channel
, ch_i1
,
995 (u8
) iwl4965_interpolate_value(channel
, ch_i1
,
999 (u8
) iwl4965_interpolate_value(channel
, ch_i1
,
1004 (s8
) iwl4965_interpolate_value(channel
, ch_i1
,
1009 ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c
, m
,
1010 m1
->actual_pow
, m2
->actual_pow
, omeas
->actual_pow
);
1012 ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c
, m
,
1013 m1
->gain_idx
, m2
->gain_idx
, omeas
->gain_idx
);
1015 ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c
, m
,
1016 m1
->pa_det
, m2
->pa_det
, omeas
->pa_det
);
1018 ("chain %d meas %d T1=%d T2=%d T=%d\n", c
, m
,
1019 m1
->temperature
, m2
->temperature
,
1020 omeas
->temperature
);
1027 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1028 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1029 static s32 back_off_table
[] = {
1030 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1031 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1032 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1033 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1037 /* Thermal compensation values for txpower for various frequency ranges ...
1038 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1039 static struct iwl4965_txpower_comp_entry
{
1040 s32 degrees_per_05db_a
;
1041 s32 degrees_per_05db_a_denom
;
1042 } tx_power_cmp_tble
[CALIB_CH_GROUP_MAX
] = {
1043 {9, 2}, /* group 0 5.2, ch 34-43 */
1044 {4, 1}, /* group 1 5.2, ch 44-70 */
1045 {4, 1}, /* group 2 5.2, ch 71-124 */
1046 {4, 1}, /* group 3 5.2, ch 125-200 */
1047 {3, 1} /* group 4 2.4, ch all */
1050 static s32
get_min_power_index(s32 rate_power_index
, u32 band
)
1053 if ((rate_power_index
& 7) <= 4)
1054 return MIN_TX_GAIN_INDEX_52GHZ_EXT
;
1056 return MIN_TX_GAIN_INDEX
;
1064 static const struct gain_entry gain_table
[2][108] = {
1065 /* 5.2GHz power gain index table */
1067 {123, 0x3F}, /* highest txpower */
1176 /* 2.4GHz power gain index table */
1178 {110, 0x3f}, /* highest txpower */
1289 static int iwl4965_fill_txpower_tbl(struct iwl_priv
*priv
, u8 band
, u16 channel
,
1290 u8 is_fat
, u8 ctrl_chan_high
,
1291 struct iwl4965_tx_power_db
*tx_power_tbl
)
1293 u8 saturation_power
;
1295 s32 user_target_power
;
1299 s32 current_regulatory
;
1300 s32 txatten_grp
= CALIB_CH_GROUP_MAX
;
1303 const struct iwl_channel_info
*ch_info
= NULL
;
1304 struct iwl_eeprom_calib_ch_info ch_eeprom_info
;
1305 const struct iwl_eeprom_calib_measure
*measurement
;
1308 s32 voltage_compensation
;
1309 s32 degrees_per_05db_num
;
1310 s32 degrees_per_05db_denom
;
1312 s32 temperature_comp
[2];
1313 s32 factory_gain_index
[2];
1314 s32 factory_actual_pwr
[2];
1317 /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
1318 * are used for indexing into txpower table) */
1319 user_target_power
= 2 * priv
->tx_power_user_lmt
;
1321 /* Get current (RXON) channel, band, width */
1322 IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel
, band
,
1325 ch_info
= iwl_get_channel_info(priv
, priv
->band
, channel
);
1327 if (!is_channel_valid(ch_info
))
1330 /* get txatten group, used to select 1) thermal txpower adjustment
1331 * and 2) mimo txpower balance between Tx chains. */
1332 txatten_grp
= iwl4965_get_tx_atten_grp(channel
);
1333 if (txatten_grp
< 0)
1336 IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
1337 channel
, txatten_grp
);
1346 /* hardware txpower limits ...
1347 * saturation (clipping distortion) txpowers are in half-dBm */
1349 saturation_power
= priv
->calib_info
->saturation_power24
;
1351 saturation_power
= priv
->calib_info
->saturation_power52
;
1353 if (saturation_power
< IWL_TX_POWER_SATURATION_MIN
||
1354 saturation_power
> IWL_TX_POWER_SATURATION_MAX
) {
1356 saturation_power
= IWL_TX_POWER_DEFAULT_SATURATION_24
;
1358 saturation_power
= IWL_TX_POWER_DEFAULT_SATURATION_52
;
1361 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1362 * max_power_avg values are in dBm, convert * 2 */
1364 reg_limit
= ch_info
->fat_max_power_avg
* 2;
1366 reg_limit
= ch_info
->max_power_avg
* 2;
1368 if ((reg_limit
< IWL_TX_POWER_REGULATORY_MIN
) ||
1369 (reg_limit
> IWL_TX_POWER_REGULATORY_MAX
)) {
1371 reg_limit
= IWL_TX_POWER_DEFAULT_REGULATORY_24
;
1373 reg_limit
= IWL_TX_POWER_DEFAULT_REGULATORY_52
;
1376 /* Interpolate txpower calibration values for this channel,
1377 * based on factory calibration tests on spaced channels. */
1378 iwl4965_interpolate_chan(priv
, channel
, &ch_eeprom_info
);
1380 /* calculate tx gain adjustment based on power supply voltage */
1381 voltage
= priv
->calib_info
->voltage
;
1382 init_voltage
= (s32
)le32_to_cpu(priv
->card_alive_init
.voltage
);
1383 voltage_compensation
=
1384 iwl4965_get_voltage_compensation(voltage
, init_voltage
);
1386 IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1388 voltage
, voltage_compensation
);
1390 /* get current temperature (Celsius) */
1391 current_temp
= max(priv
->temperature
, IWL_TX_POWER_TEMPERATURE_MIN
);
1392 current_temp
= min(priv
->temperature
, IWL_TX_POWER_TEMPERATURE_MAX
);
1393 current_temp
= KELVIN_TO_CELSIUS(current_temp
);
1395 /* select thermal txpower adjustment params, based on channel group
1396 * (same frequency group used for mimo txatten adjustment) */
1397 degrees_per_05db_num
=
1398 tx_power_cmp_tble
[txatten_grp
].degrees_per_05db_a
;
1399 degrees_per_05db_denom
=
1400 tx_power_cmp_tble
[txatten_grp
].degrees_per_05db_a_denom
;
1402 /* get per-chain txpower values from factory measurements */
1403 for (c
= 0; c
< 2; c
++) {
1404 measurement
= &ch_eeprom_info
.measurements
[c
][1];
1406 /* txgain adjustment (in half-dB steps) based on difference
1407 * between factory and current temperature */
1408 factory_temp
= measurement
->temperature
;
1409 iwl4965_math_div_round((current_temp
- factory_temp
) *
1410 degrees_per_05db_denom
,
1411 degrees_per_05db_num
,
1412 &temperature_comp
[c
]);
1414 factory_gain_index
[c
] = measurement
->gain_idx
;
1415 factory_actual_pwr
[c
] = measurement
->actual_pow
;
1417 IWL_DEBUG_TXPOWER("chain = %d\n", c
);
1418 IWL_DEBUG_TXPOWER("fctry tmp %d, "
1419 "curr tmp %d, comp %d steps\n",
1420 factory_temp
, current_temp
,
1421 temperature_comp
[c
]);
1423 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
1424 factory_gain_index
[c
],
1425 factory_actual_pwr
[c
]);
1428 /* for each of 33 bit-rates (including 1 for CCK) */
1429 for (i
= 0; i
< POWER_TABLE_NUM_ENTRIES
; i
++) {
1431 union iwl4965_tx_power_dual_stream tx_power
;
1433 /* for mimo, reduce each chain's txpower by half
1434 * (3dB, 6 steps), so total output power is regulatory
1437 current_regulatory
= reg_limit
-
1438 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION
;
1441 current_regulatory
= reg_limit
;
1445 /* find txpower limit, either hardware or regulatory */
1446 power_limit
= saturation_power
- back_off_table
[i
];
1447 if (power_limit
> current_regulatory
)
1448 power_limit
= current_regulatory
;
1450 /* reduce user's txpower request if necessary
1451 * for this rate on this channel */
1452 target_power
= user_target_power
;
1453 if (target_power
> power_limit
)
1454 target_power
= power_limit
;
1456 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1457 i
, saturation_power
- back_off_table
[i
],
1458 current_regulatory
, user_target_power
,
1461 /* for each of 2 Tx chains (radio transmitters) */
1462 for (c
= 0; c
< 2; c
++) {
1467 (s32
)le32_to_cpu(priv
->card_alive_init
.
1468 tx_atten
[txatten_grp
][c
]);
1472 /* calculate index; higher index means lower txpower */
1473 power_index
= (u8
) (factory_gain_index
[c
] -
1475 factory_actual_pwr
[c
]) -
1476 temperature_comp
[c
] -
1477 voltage_compensation
+
1480 /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
1483 if (power_index
< get_min_power_index(i
, band
))
1484 power_index
= get_min_power_index(i
, band
);
1486 /* adjust 5 GHz index to support negative indexes */
1490 /* CCK, rate 32, reduce txpower for CCK */
1491 if (i
== POWER_TABLE_CCK_ENTRY
)
1493 IWL_TX_POWER_CCK_COMPENSATION_C_STEP
;
1495 /* stay within the table! */
1496 if (power_index
> 107) {
1497 IWL_WARNING("txpower index %d > 107\n",
1501 if (power_index
< 0) {
1502 IWL_WARNING("txpower index %d < 0\n",
1507 /* fill txpower command for this rate/chain */
1508 tx_power
.s
.radio_tx_gain
[c
] =
1509 gain_table
[band
][power_index
].radio
;
1510 tx_power
.s
.dsp_predis_atten
[c
] =
1511 gain_table
[band
][power_index
].dsp
;
1513 IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
1514 "gain 0x%02x dsp %d\n",
1515 c
, atten_value
, power_index
,
1516 tx_power
.s
.radio_tx_gain
[c
],
1517 tx_power
.s
.dsp_predis_atten
[c
]);
1518 }/* for each chain */
1520 tx_power_tbl
->power_tbl
[i
].dw
= cpu_to_le32(tx_power
.dw
);
1522 }/* for each rate */
1528 * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1530 * Uses the active RXON for channel, band, and characteristics (fat, high)
1531 * The power limit is taken from priv->tx_power_user_lmt.
1533 static int iwl4965_send_tx_power(struct iwl_priv
*priv
)
1535 struct iwl4965_txpowertable_cmd cmd
= { 0 };
1539 u8 ctrl_chan_high
= 0;
1541 if (test_bit(STATUS_SCANNING
, &priv
->status
)) {
1542 /* If this gets hit a lot, switch it to a BUG() and catch
1543 * the stack trace to find out who is calling this during
1545 IWL_WARNING("TX Power requested while scanning!\n");
1549 band
= priv
->band
== IEEE80211_BAND_2GHZ
;
1551 is_fat
= is_fat_channel(priv
->active_rxon
.flags
);
1554 (priv
->active_rxon
.flags
& RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK
))
1558 cmd
.channel
= priv
->active_rxon
.channel
;
1560 ret
= iwl4965_fill_txpower_tbl(priv
, band
,
1561 le16_to_cpu(priv
->active_rxon
.channel
),
1562 is_fat
, ctrl_chan_high
, &cmd
.tx_power
);
1566 ret
= iwl_send_cmd_pdu(priv
, REPLY_TX_PWR_TABLE_CMD
, sizeof(cmd
), &cmd
);
1572 static int iwl4965_send_rxon_assoc(struct iwl_priv
*priv
)
1575 struct iwl4965_rxon_assoc_cmd rxon_assoc
;
1576 const struct iwl_rxon_cmd
*rxon1
= &priv
->staging_rxon
;
1577 const struct iwl_rxon_cmd
*rxon2
= &priv
->active_rxon
;
1579 if ((rxon1
->flags
== rxon2
->flags
) &&
1580 (rxon1
->filter_flags
== rxon2
->filter_flags
) &&
1581 (rxon1
->cck_basic_rates
== rxon2
->cck_basic_rates
) &&
1582 (rxon1
->ofdm_ht_single_stream_basic_rates
==
1583 rxon2
->ofdm_ht_single_stream_basic_rates
) &&
1584 (rxon1
->ofdm_ht_dual_stream_basic_rates
==
1585 rxon2
->ofdm_ht_dual_stream_basic_rates
) &&
1586 (rxon1
->rx_chain
== rxon2
->rx_chain
) &&
1587 (rxon1
->ofdm_basic_rates
== rxon2
->ofdm_basic_rates
)) {
1588 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1592 rxon_assoc
.flags
= priv
->staging_rxon
.flags
;
1593 rxon_assoc
.filter_flags
= priv
->staging_rxon
.filter_flags
;
1594 rxon_assoc
.ofdm_basic_rates
= priv
->staging_rxon
.ofdm_basic_rates
;
1595 rxon_assoc
.cck_basic_rates
= priv
->staging_rxon
.cck_basic_rates
;
1596 rxon_assoc
.reserved
= 0;
1597 rxon_assoc
.ofdm_ht_single_stream_basic_rates
=
1598 priv
->staging_rxon
.ofdm_ht_single_stream_basic_rates
;
1599 rxon_assoc
.ofdm_ht_dual_stream_basic_rates
=
1600 priv
->staging_rxon
.ofdm_ht_dual_stream_basic_rates
;
1601 rxon_assoc
.rx_chain_select_flags
= priv
->staging_rxon
.rx_chain
;
1603 ret
= iwl_send_cmd_pdu_async(priv
, REPLY_RXON_ASSOC
,
1604 sizeof(rxon_assoc
), &rxon_assoc
, NULL
);
1612 int iwl4965_hw_channel_switch(struct iwl_priv
*priv
, u16 channel
)
1617 u8 ctrl_chan_high
= 0;
1618 struct iwl4965_channel_switch_cmd cmd
= { 0 };
1619 const struct iwl_channel_info
*ch_info
;
1621 band
= priv
->band
== IEEE80211_BAND_2GHZ
;
1623 ch_info
= iwl_get_channel_info(priv
, priv
->band
, channel
);
1625 is_fat
= is_fat_channel(priv
->staging_rxon
.flags
);
1628 (priv
->active_rxon
.flags
& RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK
))
1632 cmd
.expect_beacon
= 0;
1633 cmd
.channel
= cpu_to_le16(channel
);
1634 cmd
.rxon_flags
= priv
->active_rxon
.flags
;
1635 cmd
.rxon_filter_flags
= priv
->active_rxon
.filter_flags
;
1636 cmd
.switch_time
= cpu_to_le32(priv
->ucode_beacon_time
);
1638 cmd
.expect_beacon
= is_channel_radar(ch_info
);
1640 cmd
.expect_beacon
= 1;
1642 rc
= iwl4965_fill_txpower_tbl(priv
, band
, channel
, is_fat
,
1643 ctrl_chan_high
, &cmd
.tx_power
);
1645 IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc
);
1649 rc
= iwl_send_cmd_pdu(priv
, REPLY_CHANNEL_SWITCH
, sizeof(cmd
), &cmd
);
1653 static int iwl4965_shared_mem_rx_idx(struct iwl_priv
*priv
)
1655 struct iwl4965_shared
*s
= priv
->shared_virt
;
1656 return le32_to_cpu(s
->rb_closed
) & 0xFFF;
1659 static int iwl4965_alloc_shared_mem(struct iwl_priv
*priv
)
1661 priv
->shared_virt
= pci_alloc_consistent(priv
->pci_dev
,
1662 sizeof(struct iwl4965_shared
),
1663 &priv
->shared_phys
);
1664 if (!priv
->shared_virt
)
1667 memset(priv
->shared_virt
, 0, sizeof(struct iwl4965_shared
));
1669 priv
->rb_closed_offset
= offsetof(struct iwl4965_shared
, rb_closed
);
1674 static void iwl4965_free_shared_mem(struct iwl_priv
*priv
)
1676 if (priv
->shared_virt
)
1677 pci_free_consistent(priv
->pci_dev
,
1678 sizeof(struct iwl4965_shared
),
1684 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1686 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv
*priv
,
1687 struct iwl_tx_queue
*txq
,
1691 int txq_id
= txq
->q
.id
;
1692 struct iwl4965_shared
*shared_data
= priv
->shared_virt
;
1694 len
= byte_cnt
+ IWL_TX_CRC_SIZE
+ IWL_TX_DELIMITER_SIZE
;
1696 /* Set up byte count within first 256 entries */
1697 IWL_SET_BITS16(shared_data
->queues_byte_cnt_tbls
[txq_id
].
1698 tfd_offset
[txq
->q
.write_ptr
], byte_cnt
, len
);
1700 /* If within first 64 entries, duplicate at end */
1701 if (txq
->q
.write_ptr
< IWL49_MAX_WIN_SIZE
)
1702 IWL_SET_BITS16(shared_data
->queues_byte_cnt_tbls
[txq_id
].
1703 tfd_offset
[IWL49_QUEUE_SIZE
+ txq
->q
.write_ptr
],
1708 * sign_extend - Sign extend a value using specified bit as sign-bit
1710 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1711 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1713 * @param oper value to sign extend
1714 * @param index 0 based bit index (0<=index<32) to sign bit
1716 static s32
sign_extend(u32 oper
, int index
)
1718 u8 shift
= 31 - index
;
1720 return (s32
)(oper
<< shift
) >> shift
;
1724 * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1725 * @statistics: Provides the temperature reading from the uCode
1727 * A return of <0 indicates bogus data in the statistics
1729 static int iwl4965_hw_get_temperature(const struct iwl_priv
*priv
)
1736 if (test_bit(STATUS_TEMPERATURE
, &priv
->status
) &&
1737 (priv
->statistics
.flag
& STATISTICS_REPLY_FLG_FAT_MODE_MSK
)) {
1738 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
1739 R1
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r1
[1]);
1740 R2
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r2
[1]);
1741 R3
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r3
[1]);
1742 R4
= le32_to_cpu(priv
->card_alive_init
.therm_r4
[1]);
1744 IWL_DEBUG_TEMP("Running temperature calibration\n");
1745 R1
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r1
[0]);
1746 R2
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r2
[0]);
1747 R3
= (s32
)le32_to_cpu(priv
->card_alive_init
.therm_r3
[0]);
1748 R4
= le32_to_cpu(priv
->card_alive_init
.therm_r4
[0]);
1752 * Temperature is only 23 bits, so sign extend out to 32.
1754 * NOTE If we haven't received a statistics notification yet
1755 * with an updated temperature, use R4 provided to us in the
1756 * "initialize" ALIVE response.
1758 if (!test_bit(STATUS_TEMPERATURE
, &priv
->status
))
1759 vt
= sign_extend(R4
, 23);
1762 le32_to_cpu(priv
->statistics
.general
.temperature
), 23);
1764 IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1
, R2
, R3
, vt
);
1767 IWL_ERROR("Calibration conflict R1 == R3\n");
1771 /* Calculate temperature in degrees Kelvin, adjust by 97%.
1772 * Add offset to center the adjustment around 0 degrees Centigrade. */
1773 temperature
= TEMPERATURE_CALIB_A_VAL
* (vt
- R2
);
1774 temperature
/= (R3
- R1
);
1775 temperature
= (temperature
* 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET
;
1777 IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n",
1778 temperature
, KELVIN_TO_CELSIUS(temperature
));
1783 /* Adjust Txpower only if temperature variance is greater than threshold. */
1784 #define IWL_TEMPERATURE_THRESHOLD 3
1787 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1789 * If the temperature changed has changed sufficiently, then a recalibration
1792 * Assumes caller will replace priv->last_temperature once calibration
1795 static int iwl4965_is_temp_calib_needed(struct iwl_priv
*priv
)
1799 if (!test_bit(STATUS_STATISTICS
, &priv
->status
)) {
1800 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
1804 temp_diff
= priv
->temperature
- priv
->last_temperature
;
1806 /* get absolute value */
1807 if (temp_diff
< 0) {
1808 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff
);
1809 temp_diff
= -temp_diff
;
1810 } else if (temp_diff
== 0)
1811 IWL_DEBUG_POWER("Same temp, \n");
1813 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff
);
1815 if (temp_diff
< IWL_TEMPERATURE_THRESHOLD
) {
1816 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
1820 IWL_DEBUG_POWER("Thermal txpower calib needed\n");
1825 static void iwl4965_temperature_calib(struct iwl_priv
*priv
)
1829 temp
= iwl4965_hw_get_temperature(priv
);
1833 if (priv
->temperature
!= temp
) {
1834 if (priv
->temperature
)
1835 IWL_DEBUG_TEMP("Temperature changed "
1836 "from %dC to %dC\n",
1837 KELVIN_TO_CELSIUS(priv
->temperature
),
1838 KELVIN_TO_CELSIUS(temp
));
1840 IWL_DEBUG_TEMP("Temperature "
1841 "initialized to %dC\n",
1842 KELVIN_TO_CELSIUS(temp
));
1845 priv
->temperature
= temp
;
1846 set_bit(STATUS_TEMPERATURE
, &priv
->status
);
1848 if (!priv
->disable_tx_power_cal
&&
1849 unlikely(!test_bit(STATUS_SCANNING
, &priv
->status
)) &&
1850 iwl4965_is_temp_calib_needed(priv
))
1851 queue_work(priv
->workqueue
, &priv
->txpower_work
);
1855 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1857 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv
*priv
,
1860 /* Simply stop the queue, but don't change any configuration;
1861 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1862 iwl_write_prph(priv
,
1863 IWL49_SCD_QUEUE_STATUS_BITS(txq_id
),
1864 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE
)|
1865 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN
));
1869 * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1870 * priv->lock must be held by the caller
1872 static int iwl4965_txq_agg_disable(struct iwl_priv
*priv
, u16 txq_id
,
1873 u16 ssn_idx
, u8 tx_fifo
)
1877 if ((IWL49_FIRST_AMPDU_QUEUE
> txq_id
) ||
1878 (IWL49_FIRST_AMPDU_QUEUE
+ IWL49_NUM_AMPDU_QUEUES
<= txq_id
)) {
1879 IWL_WARNING("queue number out of range: %d, must be %d to %d\n",
1880 txq_id
, IWL49_FIRST_AMPDU_QUEUE
,
1881 IWL49_FIRST_AMPDU_QUEUE
+ IWL49_NUM_AMPDU_QUEUES
- 1);
1885 ret
= iwl_grab_nic_access(priv
);
1889 iwl4965_tx_queue_stop_scheduler(priv
, txq_id
);
1891 iwl_clear_bits_prph(priv
, IWL49_SCD_QUEUECHAIN_SEL
, (1 << txq_id
));
1893 priv
->txq
[txq_id
].q
.read_ptr
= (ssn_idx
& 0xff);
1894 priv
->txq
[txq_id
].q
.write_ptr
= (ssn_idx
& 0xff);
1895 /* supposes that ssn_idx is valid (!= 0xFFF) */
1896 iwl4965_set_wr_ptrs(priv
, txq_id
, ssn_idx
);
1898 iwl_clear_bits_prph(priv
, IWL49_SCD_INTERRUPT_MASK
, (1 << txq_id
));
1899 iwl_txq_ctx_deactivate(priv
, txq_id
);
1900 iwl4965_tx_queue_set_status(priv
, &priv
->txq
[txq_id
], tx_fifo
, 0);
1902 iwl_release_nic_access(priv
);
1908 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1910 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv
*priv
, u16 ra_tid
,
1917 scd_q2ratid
= ra_tid
& IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK
;
1919 tbl_dw_addr
= priv
->scd_base_addr
+
1920 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id
);
1922 tbl_dw
= iwl_read_targ_mem(priv
, tbl_dw_addr
);
1925 tbl_dw
= (scd_q2ratid
<< 16) | (tbl_dw
& 0x0000FFFF);
1927 tbl_dw
= scd_q2ratid
| (tbl_dw
& 0xFFFF0000);
1929 iwl_write_targ_mem(priv
, tbl_dw_addr
, tbl_dw
);
1936 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1938 * NOTE: txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1939 * i.e. it must be one of the higher queues used for aggregation
1941 static int iwl4965_txq_agg_enable(struct iwl_priv
*priv
, int txq_id
,
1942 int tx_fifo
, int sta_id
, int tid
, u16 ssn_idx
)
1944 unsigned long flags
;
1948 if ((IWL49_FIRST_AMPDU_QUEUE
> txq_id
) ||
1949 (IWL49_FIRST_AMPDU_QUEUE
+ IWL49_NUM_AMPDU_QUEUES
<= txq_id
)) {
1950 IWL_WARNING("queue number out of range: %d, must be %d to %d\n",
1951 txq_id
, IWL49_FIRST_AMPDU_QUEUE
,
1952 IWL49_FIRST_AMPDU_QUEUE
+ IWL49_NUM_AMPDU_QUEUES
- 1);
1956 ra_tid
= BUILD_RAxTID(sta_id
, tid
);
1958 /* Modify device's station table to Tx this TID */
1959 iwl_sta_modify_enable_tid_tx(priv
, sta_id
, tid
);
1961 spin_lock_irqsave(&priv
->lock
, flags
);
1962 ret
= iwl_grab_nic_access(priv
);
1964 spin_unlock_irqrestore(&priv
->lock
, flags
);
1968 /* Stop this Tx queue before configuring it */
1969 iwl4965_tx_queue_stop_scheduler(priv
, txq_id
);
1971 /* Map receiver-address / traffic-ID to this queue */
1972 iwl4965_tx_queue_set_q2ratid(priv
, ra_tid
, txq_id
);
1974 /* Set this queue as a chain-building queue */
1975 iwl_set_bits_prph(priv
, IWL49_SCD_QUEUECHAIN_SEL
, (1 << txq_id
));
1977 /* Place first TFD at index corresponding to start sequence number.
1978 * Assumes that ssn_idx is valid (!= 0xFFF) */
1979 priv
->txq
[txq_id
].q
.read_ptr
= (ssn_idx
& 0xff);
1980 priv
->txq
[txq_id
].q
.write_ptr
= (ssn_idx
& 0xff);
1981 iwl4965_set_wr_ptrs(priv
, txq_id
, ssn_idx
);
1983 /* Set up Tx window size and frame limit for this queue */
1984 iwl_write_targ_mem(priv
,
1985 priv
->scd_base_addr
+ IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id
),
1986 (SCD_WIN_SIZE
<< IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS
) &
1987 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK
);
1989 iwl_write_targ_mem(priv
, priv
->scd_base_addr
+
1990 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id
) + sizeof(u32
),
1991 (SCD_FRAME_LIMIT
<< IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS
)
1992 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK
);
1994 iwl_set_bits_prph(priv
, IWL49_SCD_INTERRUPT_MASK
, (1 << txq_id
));
1996 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1997 iwl4965_tx_queue_set_status(priv
, &priv
->txq
[txq_id
], tx_fifo
, 1);
1999 iwl_release_nic_access(priv
);
2000 spin_unlock_irqrestore(&priv
->lock
, flags
);
2006 static u16
iwl4965_get_hcmd_size(u8 cmd_id
, u16 len
)
2010 return (u16
) sizeof(struct iwl4965_rxon_cmd
);
2016 static u16
iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd
*cmd
, u8
*data
)
2018 struct iwl4965_addsta_cmd
*addsta
= (struct iwl4965_addsta_cmd
*)data
;
2019 addsta
->mode
= cmd
->mode
;
2020 memcpy(&addsta
->sta
, &cmd
->sta
, sizeof(struct sta_id_modify
));
2021 memcpy(&addsta
->key
, &cmd
->key
, sizeof(struct iwl4965_keyinfo
));
2022 addsta
->station_flags
= cmd
->station_flags
;
2023 addsta
->station_flags_msk
= cmd
->station_flags_msk
;
2024 addsta
->tid_disable_tx
= cmd
->tid_disable_tx
;
2025 addsta
->add_immediate_ba_tid
= cmd
->add_immediate_ba_tid
;
2026 addsta
->remove_immediate_ba_tid
= cmd
->remove_immediate_ba_tid
;
2027 addsta
->add_immediate_ba_ssn
= cmd
->add_immediate_ba_ssn
;
2028 addsta
->reserved1
= __constant_cpu_to_le16(0);
2029 addsta
->reserved2
= __constant_cpu_to_le32(0);
2031 return (u16
)sizeof(struct iwl4965_addsta_cmd
);
2034 static inline u32
iwl4965_get_scd_ssn(struct iwl4965_tx_resp
*tx_resp
)
2036 return le32_to_cpup(&tx_resp
->u
.status
+ tx_resp
->frame_count
) & MAX_SN
;
2040 * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
2042 static int iwl4965_tx_status_reply_tx(struct iwl_priv
*priv
,
2043 struct iwl_ht_agg
*agg
,
2044 struct iwl4965_tx_resp
*tx_resp
,
2045 int txq_id
, u16 start_idx
)
2048 struct agg_tx_status
*frame_status
= tx_resp
->u
.agg_status
;
2049 struct ieee80211_tx_info
*info
= NULL
;
2050 struct ieee80211_hdr
*hdr
= NULL
;
2051 u32 rate_n_flags
= le32_to_cpu(tx_resp
->rate_n_flags
);
2054 if (agg
->wait_for_ba
)
2055 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
2057 agg
->frame_count
= tx_resp
->frame_count
;
2058 agg
->start_idx
= start_idx
;
2059 agg
->rate_n_flags
= rate_n_flags
;
2062 /* # frames attempted by Tx command */
2063 if (agg
->frame_count
== 1) {
2064 /* Only one frame was attempted; no block-ack will arrive */
2065 status
= le16_to_cpu(frame_status
[0].status
);
2068 /* FIXME: code repetition */
2069 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
2070 agg
->frame_count
, agg
->start_idx
, idx
);
2072 info
= IEEE80211_SKB_CB(priv
->txq
[txq_id
].txb
[idx
].skb
[0]);
2073 info
->status
.retry_count
= tx_resp
->failure_frame
;
2074 info
->flags
&= ~IEEE80211_TX_CTL_AMPDU
;
2075 info
->flags
|= iwl_is_tx_success(status
)?
2076 IEEE80211_TX_STAT_ACK
: 0;
2077 iwl_hwrate_to_tx_control(priv
, rate_n_flags
, info
);
2078 /* FIXME: code repetition end */
2080 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
2081 status
& 0xff, tx_resp
->failure_frame
);
2082 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags
);
2084 agg
->wait_for_ba
= 0;
2086 /* Two or more frames were attempted; expect block-ack */
2088 int start
= agg
->start_idx
;
2090 /* Construct bit-map of pending frames within Tx window */
2091 for (i
= 0; i
< agg
->frame_count
; i
++) {
2093 status
= le16_to_cpu(frame_status
[i
].status
);
2094 seq
= le16_to_cpu(frame_status
[i
].sequence
);
2095 idx
= SEQ_TO_INDEX(seq
);
2096 txq_id
= SEQ_TO_QUEUE(seq
);
2098 if (status
& (AGG_TX_STATE_FEW_BYTES_MSK
|
2099 AGG_TX_STATE_ABORT_MSK
))
2102 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
2103 agg
->frame_count
, txq_id
, idx
);
2105 hdr
= iwl_tx_queue_get_hdr(priv
, txq_id
, idx
);
2107 sc
= le16_to_cpu(hdr
->seq_ctrl
);
2108 if (idx
!= (SEQ_TO_SN(sc
) & 0xff)) {
2109 IWL_ERROR("BUG_ON idx doesn't match seq control"
2110 " idx=%d, seq_idx=%d, seq=%d\n",
2116 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
2117 i
, idx
, SEQ_TO_SN(sc
));
2121 sh
= (start
- idx
) + 0xff;
2122 bitmap
= bitmap
<< sh
;
2125 } else if (sh
< -64)
2126 sh
= 0xff - (start
- idx
);
2130 bitmap
= bitmap
<< sh
;
2133 bitmap
|= 1ULL << sh
;
2134 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%llx\n",
2135 start
, (unsigned long long)bitmap
);
2138 agg
->bitmap
= bitmap
;
2139 agg
->start_idx
= start
;
2140 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
2141 agg
->frame_count
, agg
->start_idx
,
2142 (unsigned long long)agg
->bitmap
);
2145 agg
->wait_for_ba
= 1;
2151 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2153 static void iwl4965_rx_reply_tx(struct iwl_priv
*priv
,
2154 struct iwl_rx_mem_buffer
*rxb
)
2156 struct iwl_rx_packet
*pkt
= (struct iwl_rx_packet
*)rxb
->skb
->data
;
2157 u16 sequence
= le16_to_cpu(pkt
->hdr
.sequence
);
2158 int txq_id
= SEQ_TO_QUEUE(sequence
);
2159 int index
= SEQ_TO_INDEX(sequence
);
2160 struct iwl_tx_queue
*txq
= &priv
->txq
[txq_id
];
2161 struct ieee80211_tx_info
*info
;
2162 struct iwl4965_tx_resp
*tx_resp
= (void *)&pkt
->u
.raw
[0];
2163 u32 status
= le32_to_cpu(tx_resp
->u
.status
);
2164 int tid
= MAX_TID_COUNT
, sta_id
= IWL_INVALID_STATION
;
2166 struct ieee80211_hdr
*hdr
;
2169 if ((index
>= txq
->q
.n_bd
) || (iwl_queue_used(&txq
->q
, index
) == 0)) {
2170 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
2171 "is out of range [0-%d] %d %d\n", txq_id
,
2172 index
, txq
->q
.n_bd
, txq
->q
.write_ptr
,
2177 info
= IEEE80211_SKB_CB(txq
->txb
[txq
->q
.read_ptr
].skb
[0]);
2178 memset(&info
->status
, 0, sizeof(info
->status
));
2180 hdr
= iwl_tx_queue_get_hdr(priv
, txq_id
, index
);
2181 fc
= hdr
->frame_control
;
2182 if (ieee80211_is_data_qos(fc
)) {
2183 qc
= ieee80211_get_qos_ctl(hdr
);
2187 sta_id
= iwl_get_ra_sta_id(priv
, hdr
);
2188 if (txq
->sched_retry
&& unlikely(sta_id
== IWL_INVALID_STATION
)) {
2189 IWL_ERROR("Station not known\n");
2193 if (txq
->sched_retry
) {
2194 const u32 scd_ssn
= iwl4965_get_scd_ssn(tx_resp
);
2195 struct iwl_ht_agg
*agg
= NULL
;
2200 agg
= &priv
->stations
[sta_id
].tid
[tid
].agg
;
2202 iwl4965_tx_status_reply_tx(priv
, agg
, tx_resp
, txq_id
, index
);
2204 /* check if BAR is needed */
2205 if ((tx_resp
->frame_count
== 1) && !iwl_is_tx_success(status
))
2206 info
->flags
|= IEEE80211_TX_STAT_AMPDU_NO_BACK
;
2208 if (txq
->q
.read_ptr
!= (scd_ssn
& 0xff)) {
2210 index
= iwl_queue_dec_wrap(scd_ssn
& 0xff, txq
->q
.n_bd
);
2211 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
2212 "%d index %d\n", scd_ssn
, index
);
2213 freed
= iwl_tx_queue_reclaim(priv
, txq_id
, index
);
2214 priv
->stations
[sta_id
].tid
[tid
].tfds_in_queue
-= freed
;
2216 if (iwl_queue_space(&txq
->q
) > txq
->q
.low_mark
&&
2217 txq_id
>= 0 && priv
->mac80211_registered
&&
2218 agg
->state
!= IWL_EMPTYING_HW_QUEUE_DELBA
) {
2219 /* calculate mac80211 ampdu sw queue to wake */
2220 ampdu_q
= txq_id
- IWL49_FIRST_AMPDU_QUEUE
+
2222 if (agg
->state
== IWL_AGG_OFF
)
2223 ieee80211_wake_queue(priv
->hw
, txq_id
);
2225 ieee80211_wake_queue(priv
->hw
, ampdu_q
);
2227 iwl_txq_check_empty(priv
, sta_id
, tid
, txq_id
);
2230 info
->status
.retry_count
= tx_resp
->failure_frame
;
2232 iwl_is_tx_success(status
) ? IEEE80211_TX_STAT_ACK
: 0;
2233 iwl_hwrate_to_tx_control(priv
,
2234 le32_to_cpu(tx_resp
->rate_n_flags
),
2237 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags "
2238 "0x%x retries %d\n", txq_id
,
2239 iwl_get_tx_fail_reason(status
),
2240 status
, le32_to_cpu(tx_resp
->rate_n_flags
),
2241 tx_resp
->failure_frame
);
2243 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index
);
2246 int freed
= iwl_tx_queue_reclaim(priv
, txq_id
, index
);
2247 if (tid
!= MAX_TID_COUNT
)
2248 priv
->stations
[sta_id
].tid
[tid
].tfds_in_queue
-= freed
;
2249 if (iwl_queue_space(&txq
->q
) > txq
->q
.low_mark
&&
2250 (txq_id
>= 0) && priv
->mac80211_registered
)
2251 ieee80211_wake_queue(priv
->hw
, txq_id
);
2252 if (tid
!= MAX_TID_COUNT
)
2253 iwl_txq_check_empty(priv
, sta_id
, tid
, txq_id
);
2257 if (iwl_check_bits(status
, TX_ABORT_REQUIRED_MSK
))
2258 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
2262 /* Set up 4965-specific Rx frame reply handlers */
2263 static void iwl4965_rx_handler_setup(struct iwl_priv
*priv
)
2265 /* Legacy Rx frames */
2266 priv
->rx_handlers
[REPLY_RX
] = iwl_rx_reply_rx
;
2268 priv
->rx_handlers
[REPLY_TX
] = iwl4965_rx_reply_tx
;
2271 static void iwl4965_setup_deferred_work(struct iwl_priv
*priv
)
2273 INIT_WORK(&priv
->txpower_work
, iwl4965_bg_txpower_work
);
2276 static void iwl4965_cancel_deferred_work(struct iwl_priv
*priv
)
2278 cancel_work_sync(&priv
->txpower_work
);
2282 static struct iwl_hcmd_ops iwl4965_hcmd
= {
2283 .rxon_assoc
= iwl4965_send_rxon_assoc
,
2286 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils
= {
2287 .get_hcmd_size
= iwl4965_get_hcmd_size
,
2288 .build_addsta_hcmd
= iwl4965_build_addsta_hcmd
,
2289 .chain_noise_reset
= iwl4965_chain_noise_reset
,
2290 .gain_computation
= iwl4965_gain_computation
,
2291 .rts_tx_cmd_flag
= iwl4965_rts_tx_cmd_flag
,
2294 static struct iwl_lib_ops iwl4965_lib
= {
2295 .set_hw_params
= iwl4965_hw_set_hw_params
,
2296 .alloc_shared_mem
= iwl4965_alloc_shared_mem
,
2297 .free_shared_mem
= iwl4965_free_shared_mem
,
2298 .shared_mem_rx_idx
= iwl4965_shared_mem_rx_idx
,
2299 .txq_update_byte_cnt_tbl
= iwl4965_txq_update_byte_cnt_tbl
,
2300 .txq_set_sched
= iwl4965_txq_set_sched
,
2301 .txq_agg_enable
= iwl4965_txq_agg_enable
,
2302 .txq_agg_disable
= iwl4965_txq_agg_disable
,
2303 .rx_handler_setup
= iwl4965_rx_handler_setup
,
2304 .setup_deferred_work
= iwl4965_setup_deferred_work
,
2305 .cancel_deferred_work
= iwl4965_cancel_deferred_work
,
2306 .is_valid_rtc_data_addr
= iwl4965_hw_valid_rtc_data_addr
,
2307 .alive_notify
= iwl4965_alive_notify
,
2308 .init_alive_start
= iwl4965_init_alive_start
,
2309 .load_ucode
= iwl4965_load_bsm
,
2311 .init
= iwl4965_apm_init
,
2312 .reset
= iwl4965_apm_reset
,
2313 .stop
= iwl4965_apm_stop
,
2314 .config
= iwl4965_nic_config
,
2315 .set_pwr_src
= iwl4965_set_pwr_src
,
2318 .regulatory_bands
= {
2319 EEPROM_REGULATORY_BAND_1_CHANNELS
,
2320 EEPROM_REGULATORY_BAND_2_CHANNELS
,
2321 EEPROM_REGULATORY_BAND_3_CHANNELS
,
2322 EEPROM_REGULATORY_BAND_4_CHANNELS
,
2323 EEPROM_REGULATORY_BAND_5_CHANNELS
,
2324 EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS
,
2325 EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
2327 .verify_signature
= iwlcore_eeprom_verify_signature
,
2328 .acquire_semaphore
= iwlcore_eeprom_acquire_semaphore
,
2329 .release_semaphore
= iwlcore_eeprom_release_semaphore
,
2330 .check_version
= iwl4965_eeprom_check_version
,
2331 .query_addr
= iwlcore_eeprom_query_addr
,
2333 .send_tx_power
= iwl4965_send_tx_power
,
2334 .update_chain_flags
= iwl4965_update_chain_flags
,
2335 .temperature
= iwl4965_temperature_calib
,
2338 static struct iwl_ops iwl4965_ops
= {
2339 .lib
= &iwl4965_lib
,
2340 .hcmd
= &iwl4965_hcmd
,
2341 .utils
= &iwl4965_hcmd_utils
,
2344 struct iwl_cfg iwl4965_agn_cfg
= {
2346 .fw_name
= "iwlwifi-4965" IWL4965_UCODE_API
".ucode",
2347 .sku
= IWL_SKU_A
|IWL_SKU_G
|IWL_SKU_N
,
2348 .eeprom_size
= IWL4965_EEPROM_IMG_SIZE
,
2349 .ops
= &iwl4965_ops
,
2350 .mod_params
= &iwl4965_mod_params
,
2353 /* Module firmware */
2354 MODULE_FIRMWARE("iwlwifi-4965" IWL4965_UCODE_API
".ucode");
2356 module_param_named(antenna
, iwl4965_mod_params
.antenna
, int, 0444);
2357 MODULE_PARM_DESC(antenna
, "select antenna (1=Main, 2=Aux, default 0 [both])");
2358 module_param_named(disable
, iwl4965_mod_params
.disable
, int, 0444);
2359 MODULE_PARM_DESC(disable
, "manually disable the radio (default 0 [radio on])");
2360 module_param_named(swcrypto
, iwl4965_mod_params
.sw_crypto
, int, 0444);
2361 MODULE_PARM_DESC(swcrypto
, "using crypto in software (default 0 [hardware])");
2362 module_param_named(debug
, iwl4965_mod_params
.debug
, int, 0444);
2363 MODULE_PARM_DESC(debug
, "debug output mask");
2365 disable_hw_scan
, iwl4965_mod_params
.disable_hw_scan
, int, 0444);
2366 MODULE_PARM_DESC(disable_hw_scan
, "disable hardware scanning (default 0)");
2368 module_param_named(queues_num
, iwl4965_mod_params
.num_of_queues
, int, 0444);
2369 MODULE_PARM_DESC(queues_num
, "number of hw queues.");
2371 module_param_named(qos_enable
, iwl4965_mod_params
.enable_qos
, int, 0444);
2372 MODULE_PARM_DESC(qos_enable
, "enable all QoS functionality");
2374 module_param_named(11n_disable
, iwl4965_mod_params
.disable_11n
, int, 0444);
2375 MODULE_PARM_DESC(11n_disable
, "disable 11n functionality");
2376 module_param_named(amsdu_size_8K
, iwl4965_mod_params
.amsdu_size_8K
, int, 0444);
2377 MODULE_PARM_DESC(amsdu_size_8K
, "enable 8K amsdu size");
2379 module_param_named(fw_restart4965
, iwl4965_mod_params
.restart_fw
, int, 0444);
2380 MODULE_PARM_DESC(fw_restart4965
, "restart firmware in case of error");