5 select HAVE_ARCH_TRACEHOOK
7 select HAVE_PERF_EVENTS
8 select HAVE_GENERIC_HARDIRQS
9 select GENERIC_IRQ_SHOW
15 config RWSEM_GENERIC_SPINLOCK
19 config RWSEM_XCHGADD_ALGORITHM
22 config GENERIC_HWEIGHT
26 config GENERIC_CALIBRATE_DELAY
38 config ARCH_HAS_ILOG2_U32
42 config ARCH_HAS_ILOG2_U64
52 source "kernel/Kconfig.freezer"
55 menu "Fujitsu FR-V system setup"
60 This options switches on and off support for the FR-V MMU
61 (effectively switching between vmlinux and uClinux). Not all FR-V
62 CPUs support this. Currently only the FR451 has a sufficiently
65 config FRV_OUTOFLINE_ATOMIC_OPS
66 bool "Out-of-line the FRV atomic operations"
69 Setting this option causes the FR-V atomic operations to be mostly
70 implemented out-of-line.
72 See Documentation/frv/atomic-ops.txt for more information.
75 bool "High memory support"
79 If you wish to use more than 256MB of memory with your MMU based
80 system, you will need to select this option. The kernel can only see
81 the memory between 0xC0000000 and 0xD0000000 directly... everything
84 The arch is, however, capable of supporting up to 3GB of SDRAM.
87 bool "Allocate page tables in highmem"
91 The VM uses one page of memory for each page table. For systems
92 with a lot of RAM, this can be wasteful of precious low memory.
93 Setting this option will put user-space page tables in high memory.
98 prompt "uClinux kernel load address"
100 default UCPAGE_OFFSET_C0000000
102 This option sets the base address for the uClinux kernel. The kernel
103 will rearrange the SDRAM layout to start at this address, and move
104 itself to start there. It must be greater than 0, and it must be
105 sufficiently less than 0xE0000000 that the SDRAM does not intersect
108 The base address must also be aligned such that the SDRAM controller
109 can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
111 config UCPAGE_OFFSET_20000000
114 config UCPAGE_OFFSET_40000000
117 config UCPAGE_OFFSET_60000000
120 config UCPAGE_OFFSET_80000000
123 config UCPAGE_OFFSET_A0000000
126 config UCPAGE_OFFSET_C0000000
127 bool "0xC0000000 (Recommended)"
133 default 0x20000000 if UCPAGE_OFFSET_20000000
134 default 0x40000000 if UCPAGE_OFFSET_40000000
135 default 0x60000000 if UCPAGE_OFFSET_60000000
136 default 0x80000000 if UCPAGE_OFFSET_80000000
137 default 0xA0000000 if UCPAGE_OFFSET_A0000000
140 config PROTECT_KERNEL
141 bool "Protect core kernel against userspace"
145 Selecting this option causes the uClinux kernel to change the
146 permittivity of DAMPR register covering the core kernel image to
147 prevent userspace accessing the underlying memory directly.
150 prompt "CPU Caching mode"
151 default FRV_DEFL_CACHE_WBACK
153 This option determines the default caching mode for the kernel.
155 Write-Back caching mode involves the all reads and writes causing
156 the affected cacheline to be read into the cache first before being
157 operated upon. Memory is not then updated by a write until the cache
158 is filled and a cacheline needs to be displaced from the cache to
159 make room. Only at that point is it written back.
161 Write-Behind caching is similar to Write-Back caching, except that a
162 write won't fetch a cacheline into the cache if there isn't already
163 one there; it will write directly to memory instead.
165 Write-Through caching only fetches cachelines from memory on a
166 read. Writes always get written directly to memory. If the affected
167 cacheline is also in cache, it will be updated too.
169 The final option is to turn of caching entirely.
171 Note that not all CPUs support Write-Behind caching. If the CPU on
172 which the kernel is running doesn't, it'll fall back to Write-Back
175 config FRV_DEFL_CACHE_WBACK
178 config FRV_DEFL_CACHE_WBEHIND
181 config FRV_DEFL_CACHE_WTHRU
184 config FRV_DEFL_CACHE_DISABLED
189 menu "CPU core support"
192 bool "Include FR401 core support"
196 This enables support for the FR401, FR401A and FR403 CPUs
199 bool "Include FR405 core support"
203 This enables support for the FR405 CPU
206 bool "Include FR451 core support"
209 This enables support for the FR451 CPU
211 config CPU_FR451_COMPILE
212 bool "Specifically compile for FR451 core"
213 depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
216 This causes appropriate flags to be passed to the compiler to
217 optimise for the FR451 CPU
220 bool "Include FR551 core support"
224 This enables support for the FR555 CPU
226 config CPU_FR551_COMPILE
227 bool "Specifically compile for FR551 core"
228 depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
231 This causes appropriate flags to be passed to the compiler to
232 optimise for the FR555 CPU
234 config FRV_L1_CACHE_SHIFT
236 default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451
237 default "6" if CPU_FR551
242 prompt "System support"
246 bool "MB93091 CPU board with or without motherboard"
249 bool "MB93093 PDK unit"
255 prompt "Motherboard support"
259 bool "Use the MB93090-MB00 motherboard"
261 Select this option if the MB93091 CPU board is going to be used with
262 a MB93090-MB00 VDK motherboard
265 bool "Use standalone"
267 Select this option if the MB93091 CPU board is going to be used
268 without a motherboard
273 config FUJITSU_MB93493
274 bool "MB93493 Multimedia chip"
276 Select this option if the MB93493 multimedia chip is going to be
280 prompt "GP-Relative data support"
283 This option controls what data, if any, should be placed in the GP
284 relative data sections. Using this means that the compiler can
285 generate accesses to the data using GR16-relative addressing which
286 is faster than absolute instructions and saves space (2 instructions
289 However, the GPREL region is limited in size because the immediate
290 value used in the load and store instructions is limited to a 12-bit
293 So if the linker starts complaining that accesses to GPREL data are
294 out of range, try changing this option from the default.
296 Note that modules will always be compiled with this feature disabled
297 as the module data will not be in range of the GP base address.
300 bool "Put data objects of up to 8 bytes into GP-REL"
303 bool "Put data objects of up to 4 bytes into GP-REL"
305 config GPREL_DATA_NONE
306 bool "Don't use GP-REL"
310 config FRV_ONCPU_SERIAL
311 bool "Use on-CPU serial ports"
317 depends on MB93090_MB00
320 Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
321 onboard. If you have one of these boards and you wish to use the PCI
322 facilities, say Y here.
324 config RESERVE_DMA_COHERENT
325 bool "Reserve DMA coherent memory"
326 depends on PCI && !MMU
329 Many PCI drivers require access to uncached memory for DMA device
330 communications (such as is done with some Ethernet buffer rings). If
331 a fully featured MMU is available, this can be done through page
332 table settings, but if not, a region has to be set aside and marked
333 with a special DAMPR register.
335 Setting this option causes uClinux to set aside a portion of the
336 available memory for use in this manner. The memory will then be
337 unavailable for normal kernel use.
339 source "drivers/pci/Kconfig"
341 source "drivers/pcmcia/Kconfig"
343 #config MATH_EMULATION
344 # bool "Math emulation support (EXPERIMENTAL)"
345 # depends on EXPERIMENTAL
347 # At some point in the future, this will cause floating-point math
348 # instructions to be emulated by the kernel on machines that lack a
349 # floating-point math coprocessor. Thrill-seekers and chronically
350 # sleep-deprived psychotic hacker types can say Y now, everyone else
351 # should probably wait a while.
353 menu "Power management options"
355 config ARCH_SUSPEND_POSSIBLE
358 source kernel/power/Kconfig
364 menu "Executable formats"
366 source "fs/Kconfig.binfmt"
372 source "drivers/Kconfig"
376 source "arch/frv/Kconfig.debug"
378 source "security/Kconfig"
380 source "crypto/Kconfig"