arch/powerpc/platforms/85xx/mpc85xx_ads.c

   1 /*
   2  * MPC85xx setup and early boot code plus other random bits.
   3  *
   4  * Maintained by Kumar Gala (see MAINTAINERS for contact information)
   5  *
   6  * Copyright 2005 Freescale Semiconductor Inc.
   7  *
   8  * This program is free software; you can redistribute  it and/or modify it
   9  * under  the terms of  the GNU General  Public License as published by the
  10  * Free Software Foundation;  either version 2 of the  License, or (at your
  11  * option) any later version.
  12  */
  13
  14 #include <linux/stddef.h>
  15 #include <linux/kernel.h>
  16 #include <linux/pci.h>
  17 #include <linux/kdev_t.h>
  18 #include <linux/delay.h>
  19 #include <linux/seq_file.h>
  20 #include <linux/root_dev.h>
  21
  22 #include <asm/system.h>
  23 #include <asm/time.h>
  24 #include <asm/machdep.h>
  25 #include <asm/pci-bridge.h>
  26 #include <asm/mpc85xx.h>
  27 #include <asm/prom.h>
  28 #include <asm/mpic.h>
  29 #include <mm/mmu_decl.h>
  30 #include <asm/udbg.h>
  31
  32 #include <sysdev/fsl_soc.h>
  33 #include "mpc85xx.h"
  34
  35 #ifdef CONFIG_CPM2
  36 #include <linux/fs_enet_pd.h>
  37 #include <asm/cpm2.h>
  38 #include <sysdev/cpm2_pic.h>
  39 #include <asm/fs_pd.h>
  40 #endif
  41
  42 #ifndef CONFIG_PCI
  43 unsigned long isa_io_base = 0;
  44 unsigned long isa_mem_base = 0;
  45 #endif
  46
  47 #ifdef CONFIG_PCI
  48 int
  49 mpc85xx_exclude_device(u_char bus, u_char devfn)
  50 {
  51         if (bus == 0 && PCI_SLOT(devfn) == 0)
  52                 return PCIBIOS_DEVICE_NOT_FOUND;
  53         else
  54                 return PCIBIOS_SUCCESSFUL;
  55 }
  56
  57 void __init
  58 mpc85xx_pcibios_fixup(void)
  59 {
  60         struct pci_dev *dev = NULL;
  61
  62         for_each_pci_dev(dev)
  63                 pci_read_irq_line(dev);
  64 }
  65 #endif /* CONFIG_PCI */
  66
  67 #ifdef CONFIG_CPM2
  68
  69 static void cpm2_cascade(unsigned int irq, struct irq_desc *desc,
  70                          struct pt_regs *regs)
  71 {
  72         int cascade_irq;
  73
  74         while ((cascade_irq = cpm2_get_irq(regs)) >= 0) {
  75                 generic_handle_irq(cascade_irq);
  76         }
  77         desc->chip->eoi(irq);
  78 }
  79
  80 #endif /* CONFIG_CPM2 */
  81
  82 void __init mpc85xx_ads_pic_init(void)
  83 {
  84         struct mpic *mpic;
  85         struct resource r;
  86         struct device_node *np = NULL;
  87 #ifdef CONFIG_CPM2
  88         int irq;
  89 #endif
  90
  91         np = of_find_node_by_type(np, "open-pic");
  92
  93         if (np == NULL) {
  94                 printk(KERN_ERR "Could not find open-pic node\n");
  95                 return;
  96         }
  97
  98         if(of_address_to_resource(np, 0, &r)) {
  99                 printk(KERN_ERR "Could not map mpic register space\n");
 100                 of_node_put(np);
 101                 return;
 102         }
 103
 104         mpic = mpic_alloc(np, r.start,
 105                         MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
 106                         4, 0, " OpenPIC  ");
 107         BUG_ON(mpic == NULL);
 108         of_node_put(np);
 109
 110         mpic_assign_isu(mpic, 0, r.start + 0x10200);
 111         mpic_assign_isu(mpic, 1, r.start + 0x10280);
 112         mpic_assign_isu(mpic, 2, r.start + 0x10300);
 113         mpic_assign_isu(mpic, 3, r.start + 0x10380);
 114         mpic_assign_isu(mpic, 4, r.start + 0x10400);
 115         mpic_assign_isu(mpic, 5, r.start + 0x10480);
 116         mpic_assign_isu(mpic, 6, r.start + 0x10500);
 117         mpic_assign_isu(mpic, 7, r.start + 0x10580);
 118
 119         /* Unused on this platform (leave room for 8548) */
 120         mpic_assign_isu(mpic, 8, r.start + 0x10600);
 121         mpic_assign_isu(mpic, 9, r.start + 0x10680);
 122         mpic_assign_isu(mpic, 10, r.start + 0x10700);
 123         mpic_assign_isu(mpic, 11, r.start + 0x10780);
 124
 125         /* External Interrupts */
 126         mpic_assign_isu(mpic, 12, r.start + 0x10000);
 127         mpic_assign_isu(mpic, 13, r.start + 0x10080);
 128         mpic_assign_isu(mpic, 14, r.start + 0x10100);
 129
 130         mpic_init(mpic);
 131
 132 #ifdef CONFIG_CPM2
 133         /* Setup CPM2 PIC */
 134         np = of_find_node_by_type(NULL, "cpm-pic");
 135         if (np == NULL) {
 136                 printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
 137                 return;
 138         }
 139         irq = irq_of_parse_and_map(np, 0);
 140
 141         cpm2_pic_init(np);
 142         set_irq_chained_handler(irq, cpm2_cascade);
 143 #endif
 144 }
 145
 146 /*
 147  * Setup the architecture
 148  */
 149 #ifdef CONFIG_CPM2
 150 void init_fcc_ioports(struct fs_platform_info *fpi)
 151 {
 152         struct io_port *io = cpm2_map(im_ioport);
 153         int fcc_no = fs_get_fcc_index(fpi->fs_no);
 154         int target;
 155         u32 tempval;
 156
 157         switch(fcc_no) {
 158         case 1:
 159                 tempval = in_be32(&io->iop_pdirb);
 160                 tempval &= ~PB2_DIRB0;
 161                 tempval |= PB2_DIRB1;
 162                 out_be32(&io->iop_pdirb, tempval);
 163
 164                 tempval = in_be32(&io->iop_psorb);
 165                 tempval &= ~PB2_PSORB0;
 166                 tempval |= PB2_PSORB1;
 167                 out_be32(&io->iop_psorb, tempval);
 168
 169                 tempval = in_be32(&io->iop_pparb);
 170                 tempval |= (PB2_DIRB0 | PB2_DIRB1);
 171                 out_be32(&io->iop_pparb, tempval);
 172
 173                 target = CPM_CLK_FCC2;
 174                 break;
 175         case 2:
 176                 tempval = in_be32(&io->iop_pdirb);
 177                 tempval &= ~PB3_DIRB0;
 178                 tempval |= PB3_DIRB1;
 179                 out_be32(&io->iop_pdirb, tempval);
 180
 181                 tempval = in_be32(&io->iop_psorb);
 182                 tempval &= ~PB3_PSORB0;
 183                 tempval |= PB3_PSORB1;
 184                 out_be32(&io->iop_psorb, tempval);
 185
 186                 tempval = in_be32(&io->iop_pparb);
 187                 tempval |= (PB3_DIRB0 | PB3_DIRB1);
 188                 out_be32(&io->iop_pparb, tempval);
 189
 190                 tempval = in_be32(&io->iop_pdirc);
 191                 tempval |= PC3_DIRC1;
 192                 out_be32(&io->iop_pdirc, tempval);
 193
 194                 tempval = in_be32(&io->iop_pparc);
 195                 tempval |= PC3_DIRC1;
 196                 out_be32(&io->iop_pparc, tempval);
 197
 198                 target = CPM_CLK_FCC3;
 199                 break;
 200         default:
 201                 printk(KERN_ERR "init_fcc_ioports: invalid FCC number\n");
 202                 return;
 203         }
 204
 205         /* Port C has clocks......  */
 206         tempval = in_be32(&io->iop_psorc);
 207         tempval &= ~(PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8));
 208         out_be32(&io->iop_psorc, tempval);
 209
 210         tempval = in_be32(&io->iop_pdirc);
 211         tempval &= ~(PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8));
 212         out_be32(&io->iop_pdirc, tempval);
 213         tempval = in_be32(&io->iop_pparc);
 214         tempval |= (PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8));
 215         out_be32(&io->iop_pparc, tempval);
 216
 217         cpm2_unmap(io);
 218
 219         /* Configure Serial Interface clock routing.
 220          * First,  clear FCC bits to zero,
 221          * then set the ones we want.
 222          */
 223         cpm2_clk_setup(target, fpi->clk_rx, CPM_CLK_RX);
 224         cpm2_clk_setup(target, fpi->clk_tx, CPM_CLK_TX);
 225 }
 226 #endif
 227
 228 static void __init mpc85xx_ads_setup_arch(void)
 229 {
 230         struct device_node *cpu;
 231 #ifdef CONFIG_PCI
 232         struct device_node *np;
 233 #endif
 234
 235         if (ppc_md.progress)
 236                 ppc_md.progress("mpc85xx_ads_setup_arch()", 0);
 237
 238         cpu = of_find_node_by_type(NULL, "cpu");
 239         if (cpu != 0) {
 240                 const unsigned int *fp;
 241
 242                 fp = get_property(cpu, "clock-frequency", NULL);
 243                 if (fp != 0)
 244                         loops_per_jiffy = *fp / HZ;
 245                 else
 246                         loops_per_jiffy = 50000000 / HZ;
 247                 of_node_put(cpu);
 248         }
 249
 250 #ifdef CONFIG_CPM2
 251         cpm2_reset();
 252 #endif
 253
 254 #ifdef CONFIG_PCI
 255         for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
 256                 add_bridge(np);
 257
 258         ppc_md.pcibios_fixup = mpc85xx_pcibios_fixup;
 259         ppc_md.pci_exclude_device = mpc85xx_exclude_device;
 260 #endif
 261
 262 #ifdef  CONFIG_ROOT_NFS
 263         ROOT_DEV = Root_NFS;
 264 #else
 265         ROOT_DEV = Root_HDA1;
 266 #endif
 267 }
 268
 269 void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
 270 {
 271         uint pvid, svid, phid1;
 272         uint memsize = total_memory;
 273
 274         pvid = mfspr(SPRN_PVR);
 275         svid = mfspr(SPRN_SVR);
 276
 277         seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
 278         seq_printf(m, "Machine\t\t: mpc85xx\n");
 279         seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
 280         seq_printf(m, "SVR\t\t: 0x%x\n", svid);
 281
 282         /* Display cpu Pll setting */
 283         phid1 = mfspr(SPRN_HID1);
 284         seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
 285
 286         /* Display the amount of memory */
 287         seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
 288 }
 289
 290 /*
 291  * Called very early, device-tree isn't unflattened
 292  */
 293 static int __init mpc85xx_ads_probe(void)
 294 {
 295         /* We always match for now, eventually we should look at the flat
 296            dev tree to ensure this is the board we are suppose to run on
 297         */
 298         return 1;
 299 }
 300
 301 define_machine(mpc85xx_ads) {
 302         .name                   = "MPC85xx ADS",
 303         .probe                  = mpc85xx_ads_probe,
 304         .setup_arch             = mpc85xx_ads_setup_arch,
 305         .init_IRQ               = mpc85xx_ads_pic_init,
 306         .show_cpuinfo           = mpc85xx_ads_show_cpuinfo,
 307         .get_irq                = mpic_get_irq,
 308         .restart                = mpc85xx_restart,
 309         .calibrate_decr         = generic_calibrate_decr,
 310         .progress               = udbg_progress,
 311 };