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atl1c: Add support for Atheros AR8152 and AR8152
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / atl1c / atl1c_main.c
blob3d4c0a5a77eb55e2e5d9c2cece9b9a93d5549a97
1 /*
2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
3 *
4 * Derived from Intel e1000 driver
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22 #include "atl1c.h"
23
24 #define ATL1C_DRV_VERSION "1.0.0.2-NAPI"
25 char atl1c_driver_name[] = "atl1c";
26 char atl1c_driver_version[] = ATL1C_DRV_VERSION;
27 #define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062
28 #define PCI_DEVICE_ID_ATTANSIC_L1C 0x1063
29 #define PCI_DEVICE_ID_ATHEROS_L2C_B 0x2060 /* AR8152 v1.1 Fast 10/100 */
30 #define PCI_DEVICE_ID_ATHEROS_L2C_B2 0x2062 /* AR8152 v2.0 Fast 10/100 */
31 #define PCI_DEVICE_ID_ATHEROS_L1D 0x1073 /* AR8151 v1.0 Gigabit 1000 */
32
33 #define L2CB_V10 0xc0
34 #define L2CB_V11 0xc1
35
36 /*
37 * atl1c_pci_tbl - PCI Device ID Table
38 *
39 * Wildcard entries (PCI_ANY_ID) should come last
40 * Last entry must be all 0s
41 *
42 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
43 * Class, Class Mask, private data (not used) }
44 */
45 static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = {
46 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
47 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
48 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
49 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
50 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
51 /* required last entry */
52 { 0 }
53 };
54 MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
55
56 MODULE_AUTHOR("Jie Yang <jie.yang@atheros.com>");
57 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
58 MODULE_LICENSE("GPL");
59 MODULE_VERSION(ATL1C_DRV_VERSION);
60
61 static int atl1c_stop_mac(struct atl1c_hw *hw);
62 static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw);
63 static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw);
64 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
65 static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup);
66 static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter);
67 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
68 int *work_done, int work_to_do);
69
70 static const u16 atl1c_pay_load_size[] = {
71 128, 256, 512, 1024, 2048, 4096,
72 };
73
74 static const u16 atl1c_rfd_prod_idx_regs[AT_MAX_RECEIVE_QUEUE] =
75 {
76 REG_MB_RFD0_PROD_IDX,
77 REG_MB_RFD1_PROD_IDX,
78 REG_MB_RFD2_PROD_IDX,
79 REG_MB_RFD3_PROD_IDX
80 };
81
82 static const u16 atl1c_rfd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
83 {
84 REG_RFD0_HEAD_ADDR_LO,
85 REG_RFD1_HEAD_ADDR_LO,
86 REG_RFD2_HEAD_ADDR_LO,
87 REG_RFD3_HEAD_ADDR_LO
88 };
89
90 static const u16 atl1c_rrd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
91 {
92 REG_RRD0_HEAD_ADDR_LO,
93 REG_RRD1_HEAD_ADDR_LO,
94 REG_RRD2_HEAD_ADDR_LO,
95 REG_RRD3_HEAD_ADDR_LO
96 };
97
98 static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
99 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
100
101 /*
102 * atl1c_init_pcie - init PCIE module
103 */
104 static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
105 {
106 u32 data;
107 u32 pci_cmd;
108 struct pci_dev *pdev = hw->adapter->pdev;
109
110 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
111 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
112 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
113 PCI_COMMAND_IO);
114 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
115
116 /*
117 * Clear any PowerSaveing Settings
118 */
119 pci_enable_wake(pdev, PCI_D3hot, 0);
120 pci_enable_wake(pdev, PCI_D3cold, 0);
121
122 /*
123 * Mask some pcie error bits
124 */
125 AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &data);
126 data &= ~PCIE_UC_SERVRITY_DLP;
127 data &= ~PCIE_UC_SERVRITY_FCP;
128 AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data);
129
130 if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
131 atl1c_disable_l0s_l1(hw);
132 if (flag & ATL1C_PCIE_PHY_RESET)
133 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT);
134 else
135 AT_WRITE_REG(hw, REG_GPHY_CTRL,
136 GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET);
137
138 msleep(1);
139 }
140
141 /*
142 * atl1c_irq_enable - Enable default interrupt generation settings
143 * @adapter: board private structure
144 */
145 static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
146 {
147 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
148 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
149 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
150 AT_WRITE_FLUSH(&adapter->hw);
151 }
152 }
153
154 /*
155 * atl1c_irq_disable - Mask off interrupt generation on the NIC
156 * @adapter: board private structure
157 */
158 static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
159 {
160 atomic_inc(&adapter->irq_sem);
161 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
162 AT_WRITE_FLUSH(&adapter->hw);
163 synchronize_irq(adapter->pdev->irq);
164 }
165
166 /*
167 * atl1c_irq_reset - reset interrupt confiure on the NIC
168 * @adapter: board private structure
169 */
170 static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
171 {
172 atomic_set(&adapter->irq_sem, 1);
173 atl1c_irq_enable(adapter);
174 }
175
176 /*
177 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
178 * of the idle status register until the device is actually idle
179 */
180 static u32 atl1c_wait_until_idle(struct atl1c_hw *hw)
181 {
182 int timeout;
183 u32 data;
184
185 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
186 AT_READ_REG(hw, REG_IDLE_STATUS, &data);
187 if ((data & IDLE_STATUS_MASK) == 0)
188 return 0;
189 msleep(1);
190 }
191 return data;
192 }
193
194 /*
195 * atl1c_phy_config - Timer Call-back
196 * @data: pointer to netdev cast into an unsigned long
197 */
198 static void atl1c_phy_config(unsigned long data)
199 {
200 struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
201 struct atl1c_hw *hw = &adapter->hw;
202 unsigned long flags;
203
204 spin_lock_irqsave(&adapter->mdio_lock, flags);
205 atl1c_restart_autoneg(hw);
206 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
207 }
208
209 void atl1c_reinit_locked(struct atl1c_adapter *adapter)
210 {
211 WARN_ON(in_interrupt());
212 atl1c_down(adapter);
213 atl1c_up(adapter);
214 clear_bit(__AT_RESETTING, &adapter->flags);
215 }
216
217 static void atl1c_check_link_status(struct atl1c_adapter *adapter)
218 {
219 struct atl1c_hw *hw = &adapter->hw;
220 struct net_device *netdev = adapter->netdev;
221 struct pci_dev *pdev = adapter->pdev;
222 int err;
223 unsigned long flags;
224 u16 speed, duplex, phy_data;
225
226 spin_lock_irqsave(&adapter->mdio_lock, flags);
227 /* MII_BMSR must read twise */
228 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
229 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
230 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
231
232 if ((phy_data & BMSR_LSTATUS) == 0) {
233 /* link down */
234 if (netif_carrier_ok(netdev)) {
235 hw->hibernate = true;
236 if (atl1c_stop_mac(hw) != 0)
237 if (netif_msg_hw(adapter))
238 dev_warn(&pdev->dev,
239 "stop mac failed\n");
240 atl1c_set_aspm(hw, false);
241 }
242 netif_carrier_off(netdev);
243 } else {
244 /* Link Up */
245 hw->hibernate = false;
246 spin_lock_irqsave(&adapter->mdio_lock, flags);
247 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
248 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
249 if (unlikely(err))
250 return;
251 /* link result is our setting */
252 if (adapter->link_speed != speed ||
253 adapter->link_duplex != duplex) {
254 adapter->link_speed = speed;
255 adapter->link_duplex = duplex;
256 atl1c_set_aspm(hw, true);
257 atl1c_enable_tx_ctrl(hw);
258 atl1c_enable_rx_ctrl(hw);
259 atl1c_setup_mac_ctrl(adapter);
260 if (netif_msg_link(adapter))
261 dev_info(&pdev->dev,
262 "%s: %s NIC Link is Up<%d Mbps %s>\n",
263 atl1c_driver_name, netdev->name,
264 adapter->link_speed,
265 adapter->link_duplex == FULL_DUPLEX ?
266 "Full Duplex" : "Half Duplex");
267 }
268 if (!netif_carrier_ok(netdev))
269 netif_carrier_on(netdev);
270 }
271 }
272
273 static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
274 {
275 struct net_device *netdev = adapter->netdev;
276 struct pci_dev *pdev = adapter->pdev;
277 u16 phy_data;
278 u16 link_up;
279
280 spin_lock(&adapter->mdio_lock);
281 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
282 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
283 spin_unlock(&adapter->mdio_lock);
284 link_up = phy_data & BMSR_LSTATUS;
285 /* notify upper layer link down ASAP */
286 if (!link_up) {
287 if (netif_carrier_ok(netdev)) {
288 /* old link state: Up */
289 netif_carrier_off(netdev);
290 if (netif_msg_link(adapter))
291 dev_info(&pdev->dev,
292 "%s: %s NIC Link is Down\n",
293 atl1c_driver_name, netdev->name);
294 adapter->link_speed = SPEED_0;
295 }
296 }
297
298 adapter->work_event |= ATL1C_WORK_EVENT_LINK_CHANGE;
299 schedule_work(&adapter->common_task);
300 }
301
302 static void atl1c_common_task(struct work_struct *work)
303 {
304 struct atl1c_adapter *adapter;
305 struct net_device *netdev;
306
307 adapter = container_of(work, struct atl1c_adapter, common_task);
308 netdev = adapter->netdev;
309
310 if (adapter->work_event & ATL1C_WORK_EVENT_RESET) {
311 netif_device_detach(netdev);
312 atl1c_down(adapter);
313 atl1c_up(adapter);
314 netif_device_attach(netdev);
315 return;
316 }
317
318 if (adapter->work_event & ATL1C_WORK_EVENT_LINK_CHANGE)
319 atl1c_check_link_status(adapter);
320
321 return;
322 }
323
324
325 static void atl1c_del_timer(struct atl1c_adapter *adapter)
326 {
327 del_timer_sync(&adapter->phy_config_timer);
328 }
329
330
331 /*
332 * atl1c_tx_timeout - Respond to a Tx Hang
333 * @netdev: network interface device structure
334 */
335 static void atl1c_tx_timeout(struct net_device *netdev)
336 {
337 struct atl1c_adapter *adapter = netdev_priv(netdev);
338
339 /* Do the reset outside of interrupt context */
340 adapter->work_event |= ATL1C_WORK_EVENT_RESET;
341 schedule_work(&adapter->common_task);
342 }
343
344 /*
345 * atl1c_set_multi - Multicast and Promiscuous mode set
346 * @netdev: network interface device structure
347 *
348 * The set_multi entry point is called whenever the multicast address
349 * list or the network interface flags are updated. This routine is
350 * responsible for configuring the hardware for proper multicast,
351 * promiscuous mode, and all-multi behavior.
352 */
353 static void atl1c_set_multi(struct net_device *netdev)
354 {
355 struct atl1c_adapter *adapter = netdev_priv(netdev);
356 struct atl1c_hw *hw = &adapter->hw;
357 struct dev_mc_list *mc_ptr;
358 u32 mac_ctrl_data;
359 u32 hash_value;
360
361 /* Check for Promiscuous and All Multicast modes */
362 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
363
364 if (netdev->flags & IFF_PROMISC) {
365 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
366 } else if (netdev->flags & IFF_ALLMULTI) {
367 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
368 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
369 } else {
370 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
371 }
372
373 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
374
375 /* clear the old settings from the multicast hash table */
376 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
377 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
378
379 /* comoute mc addresses' hash value ,and put it into hash table */
380 for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
381 hash_value = atl1c_hash_mc_addr(hw, mc_ptr->dmi_addr);
382 atl1c_hash_set(hw, hash_value);
383 }
384 }
385
386 static void atl1c_vlan_rx_register(struct net_device *netdev,
387 struct vlan_group *grp)
388 {
389 struct atl1c_adapter *adapter = netdev_priv(netdev);
390 struct pci_dev *pdev = adapter->pdev;
391 u32 mac_ctrl_data = 0;
392
393 if (netif_msg_pktdata(adapter))
394 dev_dbg(&pdev->dev, "atl1c_vlan_rx_register\n");
395
396 atl1c_irq_disable(adapter);
397
398 adapter->vlgrp = grp;
399 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
400
401 if (grp) {
402 /* enable VLAN tag insert/strip */
403 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
404 } else {
405 /* disable VLAN tag insert/strip */
406 mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
407 }
408
409 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
410 atl1c_irq_enable(adapter);
411 }
412
413 static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
414 {
415 struct pci_dev *pdev = adapter->pdev;
416
417 if (netif_msg_pktdata(adapter))
418 dev_dbg(&pdev->dev, "atl1c_restore_vlan !");
419 atl1c_vlan_rx_register(adapter->netdev, adapter->vlgrp);
420 }
421 /*
422 * atl1c_set_mac - Change the Ethernet Address of the NIC
423 * @netdev: network interface device structure
424 * @p: pointer to an address structure
425 *
426 * Returns 0 on success, negative on failure
427 */
428 static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
429 {
430 struct atl1c_adapter *adapter = netdev_priv(netdev);
431 struct sockaddr *addr = p;
432
433 if (!is_valid_ether_addr(addr->sa_data))
434 return -EADDRNOTAVAIL;
435
436 if (netif_running(netdev))
437 return -EBUSY;
438
439 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
440 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
441
442 atl1c_hw_set_mac_addr(&adapter->hw);
443
444 return 0;
445 }
446
447 static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
448 struct net_device *dev)
449 {
450 int mtu = dev->mtu;
451
452 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
453 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
454 }
455 /*
456 * atl1c_change_mtu - Change the Maximum Transfer Unit
457 * @netdev: network interface device structure
458 * @new_mtu: new value for maximum frame size
459 *
460 * Returns 0 on success, negative on failure
461 */
462 static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
463 {
464 struct atl1c_adapter *adapter = netdev_priv(netdev);
465 int old_mtu = netdev->mtu;
466 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
467
468 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
469 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
470 if (netif_msg_link(adapter))
471 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
472 return -EINVAL;
473 }
474 /* set MTU */
475 if (old_mtu != new_mtu && netif_running(netdev)) {
476 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
477 msleep(1);
478 netdev->mtu = new_mtu;
479 adapter->hw.max_frame_size = new_mtu;
480 atl1c_set_rxbufsize(adapter, netdev);
481 atl1c_down(adapter);
482 atl1c_up(adapter);
483 clear_bit(__AT_RESETTING, &adapter->flags);
484 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
485 u32 phy_data;
486
487 AT_READ_REG(&adapter->hw, 0x1414, &phy_data);
488 phy_data |= 0x10000000;
489 AT_WRITE_REG(&adapter->hw, 0x1414, phy_data);
490 }
491
492 }
493 return 0;
494 }
495
496 /*
497 * caller should hold mdio_lock
498 */
499 static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
500 {
501 struct atl1c_adapter *adapter = netdev_priv(netdev);
502 u16 result;
503
504 atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
505 return result;
506 }
507
508 static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
509 int reg_num, int val)
510 {
511 struct atl1c_adapter *adapter = netdev_priv(netdev);
512
513 atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
514 }
515
516 /*
517 * atl1c_mii_ioctl -
518 * @netdev:
519 * @ifreq:
520 * @cmd:
521 */
522 static int atl1c_mii_ioctl(struct net_device *netdev,
523 struct ifreq *ifr, int cmd)
524 {
525 struct atl1c_adapter *adapter = netdev_priv(netdev);
526 struct pci_dev *pdev = adapter->pdev;
527 struct mii_ioctl_data *data = if_mii(ifr);
528 unsigned long flags;
529 int retval = 0;
530
531 if (!netif_running(netdev))
532 return -EINVAL;
533
534 spin_lock_irqsave(&adapter->mdio_lock, flags);
535 switch (cmd) {
536 case SIOCGMIIPHY:
537 data->phy_id = 0;
538 break;
539
540 case SIOCGMIIREG:
541 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
542 &data->val_out)) {
543 retval = -EIO;
544 goto out;
545 }
546 break;
547
548 case SIOCSMIIREG:
549 if (data->reg_num & ~(0x1F)) {
550 retval = -EFAULT;
551 goto out;
552 }
553
554 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
555 data->reg_num, data->val_in);
556 if (atl1c_write_phy_reg(&adapter->hw,
557 data->reg_num, data->val_in)) {
558 retval = -EIO;
559 goto out;
560 }
561 break;
562
563 default:
564 retval = -EOPNOTSUPP;
565 break;
566 }
567 out:
568 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
569 return retval;
570 }
571
572 /*
573 * atl1c_ioctl -
574 * @netdev:
575 * @ifreq:
576 * @cmd:
577 */
578 static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
579 {
580 switch (cmd) {
581 case SIOCGMIIPHY:
582 case SIOCGMIIREG:
583 case SIOCSMIIREG:
584 return atl1c_mii_ioctl(netdev, ifr, cmd);
585 default:
586 return -EOPNOTSUPP;
587 }
588 }
589
590 /*
591 * atl1c_alloc_queues - Allocate memory for all rings
592 * @adapter: board private structure to initialize
593 *
594 */
595 static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter)
596 {
597 return 0;
598 }
599
600 static void atl1c_set_mac_type(struct atl1c_hw *hw)
601 {
602 switch (hw->device_id) {
603 case PCI_DEVICE_ID_ATTANSIC_L2C:
604 hw->nic_type = athr_l2c;
605 break;
606 case PCI_DEVICE_ID_ATTANSIC_L1C:
607 hw->nic_type = athr_l1c;
608 break;
609 case PCI_DEVICE_ID_ATHEROS_L2C_B:
610 hw->nic_type = athr_l2c_b;
611 break;
612 case PCI_DEVICE_ID_ATHEROS_L2C_B2:
613 hw->nic_type = athr_l2c_b2;
614 break;
615 case PCI_DEVICE_ID_ATHEROS_L1D:
616 hw->nic_type = athr_l1d;
617 break;
618 default:
619 break;
620 }
621 }
622
623 static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
624 {
625 u32 phy_status_data;
626 u32 link_ctrl_data;
627
628 atl1c_set_mac_type(hw);
629 AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data);
630 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
631
632 hw->ctrl_flags = ATL1C_INTR_CLEAR_ON_READ |
633 ATL1C_INTR_MODRT_ENABLE |
634 ATL1C_RX_IPV6_CHKSUM |
635 ATL1C_TXQ_MODE_ENHANCE;
636 if (link_ctrl_data & LINK_CTRL_L0S_EN)
637 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT;
638 if (link_ctrl_data & LINK_CTRL_L1_EN)
639 hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT;
640 if (link_ctrl_data & LINK_CTRL_EXT_SYNC)
641 hw->ctrl_flags |= ATL1C_LINK_EXT_SYNC;
642
643 if (hw->nic_type == athr_l1c ||
644 hw->nic_type == athr_l1d) {
645 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
646 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
647 }
648 return 0;
649 }
650 /*
651 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
652 * @adapter: board private structure to initialize
653 *
654 * atl1c_sw_init initializes the Adapter private data structure.
655 * Fields are initialized based on PCI device information and
656 * OS network device settings (MTU size).
657 */
658 static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
659 {
660 struct atl1c_hw *hw = &adapter->hw;
661 struct pci_dev *pdev = adapter->pdev;
662
663 adapter->wol = 0;
664 adapter->link_speed = SPEED_0;
665 adapter->link_duplex = FULL_DUPLEX;
666 adapter->num_rx_queues = AT_DEF_RECEIVE_QUEUE;
667 adapter->tpd_ring[0].count = 1024;
668 adapter->rfd_ring[0].count = 512;
669
670 hw->vendor_id = pdev->vendor;
671 hw->device_id = pdev->device;
672 hw->subsystem_vendor_id = pdev->subsystem_vendor;
673 hw->subsystem_id = pdev->subsystem_device;
674
675 /* before link up, we assume hibernate is true */
676 hw->hibernate = true;
677 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
678 if (atl1c_setup_mac_funcs(hw) != 0) {
679 dev_err(&pdev->dev, "set mac function pointers failed\n");
680 return -1;
681 }
682 hw->intr_mask = IMR_NORMAL_MASK;
683 hw->phy_configured = false;
684 hw->preamble_len = 7;
685 hw->max_frame_size = adapter->netdev->mtu;
686 if (adapter->num_rx_queues < 2) {
687 hw->rss_type = atl1c_rss_disable;
688 hw->rss_mode = atl1c_rss_mode_disable;
689 } else {
690 hw->rss_type = atl1c_rss_ipv4;
691 hw->rss_mode = atl1c_rss_mul_que_mul_int;
692 hw->rss_hash_bits = 16;
693 }
694 hw->autoneg_advertised = ADVERTISED_Autoneg;
695 hw->indirect_tab = 0xE4E4E4E4;
696 hw->base_cpu = 0;
697
698 hw->ict = 50000; /* 100ms */
699 hw->smb_timer = 200000; /* 400ms */
700 hw->cmb_tpd = 4;
701 hw->cmb_tx_timer = 1; /* 2 us */
702 hw->rx_imt = 200;
703 hw->tx_imt = 1000;
704
705 hw->tpd_burst = 5;
706 hw->rfd_burst = 8;
707 hw->dma_order = atl1c_dma_ord_out;
708 hw->dmar_block = atl1c_dma_req_1024;
709 hw->dmaw_block = atl1c_dma_req_1024;
710 hw->dmar_dly_cnt = 15;
711 hw->dmaw_dly_cnt = 4;
712
713 if (atl1c_alloc_queues(adapter)) {
714 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
715 return -ENOMEM;
716 }
717 /* TODO */
718 atl1c_set_rxbufsize(adapter, adapter->netdev);
719 atomic_set(&adapter->irq_sem, 1);
720 spin_lock_init(&adapter->mdio_lock);
721 spin_lock_init(&adapter->tx_lock);
722 set_bit(__AT_DOWN, &adapter->flags);
723
724 return 0;
725 }
726
727 static inline void atl1c_clean_buffer(struct pci_dev *pdev,
728 struct atl1c_buffer *buffer_info, int in_irq)
729 {
730 u16 pci_driection;
731 if (buffer_info->flags & ATL1C_BUFFER_FREE)
732 return;
733 if (buffer_info->dma) {
734 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
735 pci_driection = PCI_DMA_FROMDEVICE;
736 else
737 pci_driection = PCI_DMA_TODEVICE;
738
739 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
740 pci_unmap_single(pdev, buffer_info->dma,
741 buffer_info->length, pci_driection);
742 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
743 pci_unmap_page(pdev, buffer_info->dma,
744 buffer_info->length, pci_driection);
745 }
746 if (buffer_info->skb) {
747 if (in_irq)
748 dev_kfree_skb_irq(buffer_info->skb);
749 else
750 dev_kfree_skb(buffer_info->skb);
751 }
752 buffer_info->dma = 0;
753 buffer_info->skb = NULL;
754 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
755 }
756 /*
757 * atl1c_clean_tx_ring - Free Tx-skb
758 * @adapter: board private structure
759 */
760 static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
761 enum atl1c_trans_queue type)
762 {
763 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
764 struct atl1c_buffer *buffer_info;
765 struct pci_dev *pdev = adapter->pdev;
766 u16 index, ring_count;
767
768 ring_count = tpd_ring->count;
769 for (index = 0; index < ring_count; index++) {
770 buffer_info = &tpd_ring->buffer_info[index];
771 atl1c_clean_buffer(pdev, buffer_info, 0);
772 }
773
774 /* Zero out Tx-buffers */
775 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
776 ring_count);
777 atomic_set(&tpd_ring->next_to_clean, 0);
778 tpd_ring->next_to_use = 0;
779 }
780
781 /*
782 * atl1c_clean_rx_ring - Free rx-reservation skbs
783 * @adapter: board private structure
784 */
785 static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
786 {
787 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
788 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
789 struct atl1c_buffer *buffer_info;
790 struct pci_dev *pdev = adapter->pdev;
791 int i, j;
792
793 for (i = 0; i < adapter->num_rx_queues; i++) {
794 for (j = 0; j < rfd_ring[i].count; j++) {
795 buffer_info = &rfd_ring[i].buffer_info[j];
796 atl1c_clean_buffer(pdev, buffer_info, 0);
797 }
798 /* zero out the descriptor ring */
799 memset(rfd_ring[i].desc, 0, rfd_ring[i].size);
800 rfd_ring[i].next_to_clean = 0;
801 rfd_ring[i].next_to_use = 0;
802 rrd_ring[i].next_to_use = 0;
803 rrd_ring[i].next_to_clean = 0;
804 }
805 }
806
807 /*
808 * Read / Write Ptr Initialize:
809 */
810 static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
811 {
812 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
813 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
814 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
815 struct atl1c_buffer *buffer_info;
816 int i, j;
817
818 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
819 tpd_ring[i].next_to_use = 0;
820 atomic_set(&tpd_ring[i].next_to_clean, 0);
821 buffer_info = tpd_ring[i].buffer_info;
822 for (j = 0; j < tpd_ring->count; j++)
823 ATL1C_SET_BUFFER_STATE(&buffer_info[i],
824 ATL1C_BUFFER_FREE);
825 }
826 for (i = 0; i < adapter->num_rx_queues; i++) {
827 rfd_ring[i].next_to_use = 0;
828 rfd_ring[i].next_to_clean = 0;
829 rrd_ring[i].next_to_use = 0;
830 rrd_ring[i].next_to_clean = 0;
831 for (j = 0; j < rfd_ring[i].count; j++) {
832 buffer_info = &rfd_ring[i].buffer_info[j];
833 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
834 }
835 }
836 }
837
838 /*
839 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
840 * @adapter: board private structure
841 *
842 * Free all transmit software resources
843 */
844 static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
845 {
846 struct pci_dev *pdev = adapter->pdev;
847
848 pci_free_consistent(pdev, adapter->ring_header.size,
849 adapter->ring_header.desc,
850 adapter->ring_header.dma);
851 adapter->ring_header.desc = NULL;
852
853 /* Note: just free tdp_ring.buffer_info,
854 * it contain rfd_ring.buffer_info, do not double free */
855 if (adapter->tpd_ring[0].buffer_info) {
856 kfree(adapter->tpd_ring[0].buffer_info);
857 adapter->tpd_ring[0].buffer_info = NULL;
858 }
859 }
860
861 /*
862 * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
863 * @adapter: board private structure
864 *
865 * Return 0 on success, negative on failure
866 */
867 static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
868 {
869 struct pci_dev *pdev = adapter->pdev;
870 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
871 struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
872 struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
873 struct atl1c_ring_header *ring_header = &adapter->ring_header;
874 int num_rx_queues = adapter->num_rx_queues;
875 int size;
876 int i;
877 int count = 0;
878 int rx_desc_count = 0;
879 u32 offset = 0;
880
881 rrd_ring[0].count = rfd_ring[0].count;
882 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
883 tpd_ring[i].count = tpd_ring[0].count;
884
885 for (i = 1; i < adapter->num_rx_queues; i++)
886 rfd_ring[i].count = rrd_ring[i].count = rfd_ring[0].count;
887
888 /* 2 tpd queue, one high priority queue,
889 * another normal priority queue */
890 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
891 rfd_ring->count * num_rx_queues);
892 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
893 if (unlikely(!tpd_ring->buffer_info)) {
894 dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
895 size);
896 goto err_nomem;
897 }
898 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
899 tpd_ring[i].buffer_info =
900 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
901 count += tpd_ring[i].count;
902 }
903
904 for (i = 0; i < num_rx_queues; i++) {
905 rfd_ring[i].buffer_info =
906 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
907 count += rfd_ring[i].count;
908 rx_desc_count += rfd_ring[i].count;
909 }
910 /*
911 * real ring DMA buffer
912 * each ring/block may need up to 8 bytes for alignment, hence the
913 * additional bytes tacked onto the end.
914 */
915 ring_header->size = size =
916 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
917 sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
918 sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
919 sizeof(struct atl1c_hw_stats) +
920 8 * 4 + 8 * 2 * num_rx_queues;
921
922 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
923 &ring_header->dma);
924 if (unlikely(!ring_header->desc)) {
925 dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
926 goto err_nomem;
927 }
928 memset(ring_header->desc, 0, ring_header->size);
929 /* init TPD ring */
930
931 tpd_ring[0].dma = roundup(ring_header->dma, 8);
932 offset = tpd_ring[0].dma - ring_header->dma;
933 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
934 tpd_ring[i].dma = ring_header->dma + offset;
935 tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
936 tpd_ring[i].size =
937 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
938 offset += roundup(tpd_ring[i].size, 8);
939 }
940 /* init RFD ring */
941 for (i = 0; i < num_rx_queues; i++) {
942 rfd_ring[i].dma = ring_header->dma + offset;
943 rfd_ring[i].desc = (u8 *) ring_header->desc + offset;
944 rfd_ring[i].size = sizeof(struct atl1c_rx_free_desc) *
945 rfd_ring[i].count;
946 offset += roundup(rfd_ring[i].size, 8);
947 }
948
949 /* init RRD ring */
950 for (i = 0; i < num_rx_queues; i++) {
951 rrd_ring[i].dma = ring_header->dma + offset;
952 rrd_ring[i].desc = (u8 *) ring_header->desc + offset;
953 rrd_ring[i].size = sizeof(struct atl1c_recv_ret_status) *
954 rrd_ring[i].count;
955 offset += roundup(rrd_ring[i].size, 8);
956 }
957
958 adapter->smb.dma = ring_header->dma + offset;
959 adapter->smb.smb = (u8 *)ring_header->desc + offset;
960 return 0;
961
962 err_nomem:
963 kfree(tpd_ring->buffer_info);
964 return -ENOMEM;
965 }
966
967 static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
968 {
969 struct atl1c_hw *hw = &adapter->hw;
970 struct atl1c_rfd_ring *rfd_ring = (struct atl1c_rfd_ring *)
971 adapter->rfd_ring;
972 struct atl1c_rrd_ring *rrd_ring = (struct atl1c_rrd_ring *)
973 adapter->rrd_ring;
974 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
975 adapter->tpd_ring;
976 struct atl1c_cmb *cmb = (struct atl1c_cmb *) &adapter->cmb;
977 struct atl1c_smb *smb = (struct atl1c_smb *) &adapter->smb;
978 int i;
979
980 /* TPD */
981 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
982 (u32)((tpd_ring[atl1c_trans_normal].dma &
983 AT_DMA_HI_ADDR_MASK) >> 32));
984 /* just enable normal priority TX queue */
985 AT_WRITE_REG(hw, REG_NTPD_HEAD_ADDR_LO,
986 (u32)(tpd_ring[atl1c_trans_normal].dma &
987 AT_DMA_LO_ADDR_MASK));
988 AT_WRITE_REG(hw, REG_HTPD_HEAD_ADDR_LO,
989 (u32)(tpd_ring[atl1c_trans_high].dma &
990 AT_DMA_LO_ADDR_MASK));
991 AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
992 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
993
994
995 /* RFD */
996 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
997 (u32)((rfd_ring[0].dma & AT_DMA_HI_ADDR_MASK) >> 32));
998 for (i = 0; i < adapter->num_rx_queues; i++)
999 AT_WRITE_REG(hw, atl1c_rfd_addr_lo_regs[i],
1000 (u32)(rfd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
1001
1002 AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
1003 rfd_ring[0].count & RFD_RING_SIZE_MASK);
1004 AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
1005 adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
1006
1007 /* RRD */
1008 for (i = 0; i < adapter->num_rx_queues; i++)
1009 AT_WRITE_REG(hw, atl1c_rrd_addr_lo_regs[i],
1010 (u32)(rrd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
1011 AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
1012 (rrd_ring[0].count & RRD_RING_SIZE_MASK));
1013
1014 /* CMB */
1015 AT_WRITE_REG(hw, REG_CMB_BASE_ADDR_LO, cmb->dma & AT_DMA_LO_ADDR_MASK);
1016
1017 /* SMB */
1018 AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_HI,
1019 (u32)((smb->dma & AT_DMA_HI_ADDR_MASK) >> 32));
1020 AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_LO,
1021 (u32)(smb->dma & AT_DMA_LO_ADDR_MASK));
1022 /* Load all of base address above */
1023 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
1024 }
1025
1026 static void atl1c_configure_tx(struct atl1c_adapter *adapter)
1027 {
1028 struct atl1c_hw *hw = &adapter->hw;
1029 u32 dev_ctrl_data;
1030 u32 max_pay_load;
1031 u16 tx_offload_thresh;
1032 u32 txq_ctrl_data;
1033 u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */
1034
1035 extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
1036 tx_offload_thresh = MAX_TX_OFFLOAD_THRESH;
1037 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
1038 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
1039 AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data);
1040 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT) &
1041 DEVICE_CTRL_MAX_PAYLOAD_MASK;
1042 hw->dmaw_block = min(max_pay_load, hw->dmaw_block);
1043 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) &
1044 DEVICE_CTRL_MAX_RREQ_SZ_MASK;
1045 hw->dmar_block = min(max_pay_load, hw->dmar_block);
1046
1047 txq_ctrl_data = (hw->tpd_burst & TXQ_NUM_TPD_BURST_MASK) <<
1048 TXQ_NUM_TPD_BURST_SHIFT;
1049 if (hw->ctrl_flags & ATL1C_TXQ_MODE_ENHANCE)
1050 txq_ctrl_data |= TXQ_CTRL_ENH_MODE;
1051 txq_ctrl_data |= (atl1c_pay_load_size[hw->dmar_block] &
1052 TXQ_TXF_BURST_NUM_MASK) << TXQ_TXF_BURST_NUM_SHIFT;
1053
1054 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
1055 }
1056
1057 static void atl1c_configure_rx(struct atl1c_adapter *adapter)
1058 {
1059 struct atl1c_hw *hw = &adapter->hw;
1060 u32 rxq_ctrl_data;
1061
1062 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
1063 RXQ_RFD_BURST_NUM_SHIFT;
1064
1065 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
1066 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
1067 if (hw->rss_type == atl1c_rss_ipv4)
1068 rxq_ctrl_data |= RSS_HASH_IPV4;
1069 if (hw->rss_type == atl1c_rss_ipv4_tcp)
1070 rxq_ctrl_data |= RSS_HASH_IPV4_TCP;
1071 if (hw->rss_type == atl1c_rss_ipv6)
1072 rxq_ctrl_data |= RSS_HASH_IPV6;
1073 if (hw->rss_type == atl1c_rss_ipv6_tcp)
1074 rxq_ctrl_data |= RSS_HASH_IPV6_TCP;
1075 if (hw->rss_type != atl1c_rss_disable)
1076 rxq_ctrl_data |= RRS_HASH_CTRL_EN;
1077
1078 rxq_ctrl_data |= (hw->rss_mode & RSS_MODE_MASK) <<
1079 RSS_MODE_SHIFT;
1080 rxq_ctrl_data |= (hw->rss_hash_bits & RSS_HASH_BITS_MASK) <<
1081 RSS_HASH_BITS_SHIFT;
1082 if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON)
1083 rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_100M &
1084 ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT;
1085
1086 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1087 }
1088
1089 static void atl1c_configure_rss(struct atl1c_adapter *adapter)
1090 {
1091 struct atl1c_hw *hw = &adapter->hw;
1092
1093 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
1094 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
1095 }
1096
1097 static void atl1c_configure_dma(struct atl1c_adapter *adapter)
1098 {
1099 struct atl1c_hw *hw = &adapter->hw;
1100 u32 dma_ctrl_data;
1101
1102 dma_ctrl_data = DMA_CTRL_DMAR_REQ_PRI;
1103 if (hw->ctrl_flags & ATL1C_CMB_ENABLE)
1104 dma_ctrl_data |= DMA_CTRL_CMB_EN;
1105 if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
1106 dma_ctrl_data |= DMA_CTRL_SMB_EN;
1107 else
1108 dma_ctrl_data |= MAC_CTRL_SMB_DIS;
1109
1110 switch (hw->dma_order) {
1111 case atl1c_dma_ord_in:
1112 dma_ctrl_data |= DMA_CTRL_DMAR_IN_ORDER;
1113 break;
1114 case atl1c_dma_ord_enh:
1115 dma_ctrl_data |= DMA_CTRL_DMAR_ENH_ORDER;
1116 break;
1117 case atl1c_dma_ord_out:
1118 dma_ctrl_data |= DMA_CTRL_DMAR_OUT_ORDER;
1119 break;
1120 default:
1121 break;
1122 }
1123
1124 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1125 << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1126 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1127 << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1128 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1129 << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1130 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1131 << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1132
1133 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1134 }
1135
1136 /*
1137 * Stop the mac, transmit and receive units
1138 * hw - Struct containing variables accessed by shared code
1139 * return : 0 or idle status (if error)
1140 */
1141 static int atl1c_stop_mac(struct atl1c_hw *hw)
1142 {
1143 u32 data;
1144
1145 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1146 data &= ~(RXQ1_CTRL_EN | RXQ2_CTRL_EN |
1147 RXQ3_CTRL_EN | RXQ_CTRL_EN);
1148 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1149
1150 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1151 data &= ~TXQ_CTRL_EN;
1152 AT_WRITE_REG(hw, REG_TWSI_CTRL, data);
1153
1154 atl1c_wait_until_idle(hw);
1155
1156 AT_READ_REG(hw, REG_MAC_CTRL, &data);
1157 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
1158 AT_WRITE_REG(hw, REG_MAC_CTRL, data);
1159
1160 return (int)atl1c_wait_until_idle(hw);
1161 }
1162
1163 static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw)
1164 {
1165 u32 data;
1166
1167 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1168 switch (hw->adapter->num_rx_queues) {
1169 case 4:
1170 data |= (RXQ3_CTRL_EN | RXQ2_CTRL_EN | RXQ1_CTRL_EN);
1171 break;
1172 case 3:
1173 data |= (RXQ2_CTRL_EN | RXQ1_CTRL_EN);
1174 break;
1175 case 2:
1176 data |= RXQ1_CTRL_EN;
1177 break;
1178 default:
1179 break;
1180 }
1181 data |= RXQ_CTRL_EN;
1182 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1183 }
1184
1185 static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw)
1186 {
1187 u32 data;
1188
1189 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1190 data |= TXQ_CTRL_EN;
1191 AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
1192 }
1193
1194 /*
1195 * Reset the transmit and receive units; mask and clear all interrupts.
1196 * hw - Struct containing variables accessed by shared code
1197 * return : 0 or idle status (if error)
1198 */
1199 static int atl1c_reset_mac(struct atl1c_hw *hw)
1200 {
1201 struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter;
1202 struct pci_dev *pdev = adapter->pdev;
1203 int ret;
1204
1205 AT_WRITE_REG(hw, REG_IMR, 0);
1206 AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT);
1207
1208 ret = atl1c_stop_mac(hw);
1209 if (ret)
1210 return ret;
1211 /*
1212 * Issue Soft Reset to the MAC. This will reset the chip's
1213 * transmit, receive, DMA. It will not effect
1214 * the current PCI configuration. The global reset bit is self-
1215 * clearing, and should clear within a microsecond.
1216 */
1217 AT_WRITE_REGW(hw, REG_MASTER_CTRL, MASTER_CTRL_SOFT_RST);
1218 AT_WRITE_FLUSH(hw);
1219 msleep(10);
1220 /* Wait at least 10ms for All module to be Idle */
1221
1222 if (atl1c_wait_until_idle(hw)) {
1223 dev_err(&pdev->dev,
1224 "MAC state machine can't be idle since"
1225 " disabled for 10ms second\n");
1226 return -1;
1227 }
1228 return 0;
1229 }
1230
1231 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
1232 {
1233 u32 pm_ctrl_data;
1234
1235 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1236 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1237 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1238 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1239 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1240 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1241 pm_ctrl_data &= ~PM_CTRL_MAC_ASPM_CHK;
1242 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
1243
1244 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1245 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1246 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1247 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1248 }
1249
1250 /*
1251 * Set ASPM state.
1252 * Enable/disable L0s/L1 depend on link state.
1253 */
1254 static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup)
1255 {
1256 u32 pm_ctrl_data;
1257 u32 link_ctrl_data;
1258
1259 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1260 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
1261 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
1262
1263 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1264 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1265 pm_ctrl_data &= ~(PM_CTRL_LCKDET_TIMER_MASK <<
1266 PM_CTRL_LCKDET_TIMER_SHIFT);
1267
1268 pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK;
1269 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1270 pm_ctrl_data |= PM_CTRL_RBER_EN;
1271 pm_ctrl_data |= PM_CTRL_SDES_EN;
1272
1273 if (hw->nic_type == athr_l2c_b ||
1274 hw->nic_type == athr_l1d ||
1275 hw->nic_type == athr_l2c_b2) {
1276 link_ctrl_data &= ~LINK_CTRL_EXT_SYNC;
1277 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE)) {
1278 if (hw->nic_type == athr_l2c_b &&
1279 hw->revision_id == L2CB_V10)
1280 link_ctrl_data |= LINK_CTRL_EXT_SYNC;
1281 }
1282
1283 AT_WRITE_REG(hw, REG_LINK_CTRL, link_ctrl_data);
1284
1285 pm_ctrl_data |= PM_CTRL_PCIE_RECV;
1286 pm_ctrl_data |= AT_ASPM_L1_TIMER << PM_CTRL_PM_REQ_TIMER_SHIFT;
1287 pm_ctrl_data &= ~PM_CTRL_EN_BUFS_RX_L0S;
1288 pm_ctrl_data &= ~PM_CTRL_SA_DLY_EN;
1289 pm_ctrl_data &= ~PM_CTRL_HOTRST;
1290 pm_ctrl_data |= 1 << PM_CTRL_L1_ENTRY_TIMER_SHIFT;
1291 pm_ctrl_data |= PM_CTRL_SERDES_PD_EX_L1;
1292 }
1293
1294 if (linkup) {
1295 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1296 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1297 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1298 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1299 if (hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT)
1300 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN;
1301
1302 if (hw->nic_type == athr_l2c_b ||
1303 hw->nic_type == athr_l1d ||
1304 hw->nic_type == athr_l2c_b2) {
1305 if (hw->nic_type == athr_l2c_b)
1306 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE))
1307 pm_ctrl_data &= PM_CTRL_ASPM_L0S_EN;
1308 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
1309 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
1310 pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;
1311 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1312 if (hw->adapter->link_speed == SPEED_100 ||
1313 hw->adapter->link_speed == SPEED_1000) {
1314 pm_ctrl_data &=
1315 ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1316 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1317 if (hw->nic_type == athr_l1d)
1318 pm_ctrl_data |= 0xF <<
1319 PM_CTRL_L1_ENTRY_TIMER_SHIFT;
1320 else
1321 pm_ctrl_data |= 7 <<
1322 PM_CTRL_L1_ENTRY_TIMER_SHIFT;
1323 }
1324 } else {
1325 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1326 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1327 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1328 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1329 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1330 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1331 }
1332 atl1c_write_phy_reg(hw, MII_DBG_ADDR, 0x29);
1333 if (hw->adapter->link_speed == SPEED_10)
1334 if (hw->nic_type == athr_l1d)
1335 atl1c_write_phy_reg(hw, MII_DBG_ADDR, 0xB69D);
1336 else
1337 atl1c_write_phy_reg(hw, MII_DBG_DATA, 0xB6DD);
1338 else if (hw->adapter->link_speed == SPEED_100)
1339 atl1c_write_phy_reg(hw, MII_DBG_DATA, 0xB2DD);
1340 else
1341 atl1c_write_phy_reg(hw, MII_DBG_DATA, 0x96DD);
1342
1343 } else {
1344 pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;
1345 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
1346 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1347 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
1348
1349 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1350
1351 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1352 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1353 else
1354 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1355 }
1356
1357 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1358 }
1359
1360 static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter)
1361 {
1362 struct atl1c_hw *hw = &adapter->hw;
1363 struct net_device *netdev = adapter->netdev;
1364 u32 mac_ctrl_data;
1365
1366 mac_ctrl_data = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
1367 mac_ctrl_data |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1368
1369 if (adapter->link_duplex == FULL_DUPLEX) {
1370 hw->mac_duplex = true;
1371 mac_ctrl_data |= MAC_CTRL_DUPLX;
1372 }
1373
1374 if (adapter->link_speed == SPEED_1000)
1375 hw->mac_speed = atl1c_mac_speed_1000;
1376 else
1377 hw->mac_speed = atl1c_mac_speed_10_100;
1378
1379 mac_ctrl_data |= (hw->mac_speed & MAC_CTRL_SPEED_MASK) <<
1380 MAC_CTRL_SPEED_SHIFT;
1381
1382 mac_ctrl_data |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1383 mac_ctrl_data |= ((hw->preamble_len & MAC_CTRL_PRMLEN_MASK) <<
1384 MAC_CTRL_PRMLEN_SHIFT);
1385
1386 if (adapter->vlgrp)
1387 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
1388
1389 mac_ctrl_data |= MAC_CTRL_BC_EN;
1390 if (netdev->flags & IFF_PROMISC)
1391 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
1392 if (netdev->flags & IFF_ALLMULTI)
1393 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
1394
1395 mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN;
1396 if (hw->nic_type == athr_l1d || hw->nic_type == athr_l2c_b2) {
1397 mac_ctrl_data |= MAC_CTRL_SPEED_MODE_SW;
1398 mac_ctrl_data |= MAC_CTRL_HASH_ALG_CRC32;
1399 }
1400 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
1401 }
1402
1403 /*
1404 * atl1c_configure - Configure Transmit&Receive Unit after Reset
1405 * @adapter: board private structure
1406 *
1407 * Configure the Tx /Rx unit of the MAC after a reset.
1408 */
1409 static int atl1c_configure(struct atl1c_adapter *adapter)
1410 {
1411 struct atl1c_hw *hw = &adapter->hw;
1412 u32 master_ctrl_data = 0;
1413 u32 intr_modrt_data;
1414
1415 /* clear interrupt status */
1416 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
1417 /* Clear any WOL status */
1418 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1419 /* set Interrupt Clear Timer
1420 * HW will enable self to assert interrupt event to system after
1421 * waiting x-time for software to notify it accept interrupt.
1422 */
1423 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
1424 hw->ict & INT_RETRIG_TIMER_MASK);
1425
1426 atl1c_configure_des_ring(adapter);
1427
1428 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
1429 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
1430 IRQ_MODRT_TX_TIMER_SHIFT;
1431 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
1432 IRQ_MODRT_RX_TIMER_SHIFT;
1433 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
1434 master_ctrl_data |=
1435 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
1436 }
1437
1438 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
1439 master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
1440
1441 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
1442
1443 if (hw->ctrl_flags & ATL1C_CMB_ENABLE) {
1444 AT_WRITE_REG(hw, REG_CMB_TPD_THRESH,
1445 hw->cmb_tpd & CMB_TPD_THRESH_MASK);
1446 AT_WRITE_REG(hw, REG_CMB_TX_TIMER,
1447 hw->cmb_tx_timer & CMB_TX_TIMER_MASK);
1448 }
1449
1450 if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
1451 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
1452 hw->smb_timer & SMB_STAT_TIMER_MASK);
1453 /* set MTU */
1454 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1455 VLAN_HLEN + ETH_FCS_LEN);
1456 /* HDS, disable */
1457 AT_WRITE_REG(hw, REG_HDS_CTRL, 0);
1458
1459 atl1c_configure_tx(adapter);
1460 atl1c_configure_rx(adapter);
1461 atl1c_configure_rss(adapter);
1462 atl1c_configure_dma(adapter);
1463
1464 return 0;
1465 }
1466
1467 static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
1468 {
1469 u16 hw_reg_addr = 0;
1470 unsigned long *stats_item = NULL;
1471 u32 data;
1472
1473 /* update rx status */
1474 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1475 stats_item = &adapter->hw_stats.rx_ok;
1476 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1477 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1478 *stats_item += data;
1479 stats_item++;
1480 hw_reg_addr += 4;
1481 }
1482 /* update tx status */
1483 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1484 stats_item = &adapter->hw_stats.tx_ok;
1485 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1486 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1487 *stats_item += data;
1488 stats_item++;
1489 hw_reg_addr += 4;
1490 }
1491 }
1492
1493 /*
1494 * atl1c_get_stats - Get System Network Statistics
1495 * @netdev: network interface device structure
1496 *
1497 * Returns the address of the device statistics structure.
1498 * The statistics are actually updated from the timer callback.
1499 */
1500 static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
1501 {
1502 struct atl1c_adapter *adapter = netdev_priv(netdev);
1503 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
1504 struct net_device_stats *net_stats = &adapter->net_stats;
1505
1506 atl1c_update_hw_stats(adapter);
1507 net_stats->rx_packets = hw_stats->rx_ok;
1508 net_stats->tx_packets = hw_stats->tx_ok;
1509 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1510 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1511 net_stats->multicast = hw_stats->rx_mcast;
1512 net_stats->collisions = hw_stats->tx_1_col +
1513 hw_stats->tx_2_col * 2 +
1514 hw_stats->tx_late_col + hw_stats->tx_abort_col;
1515 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
1516 hw_stats->rx_len_err + hw_stats->rx_sz_ov +
1517 hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
1518 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1519 net_stats->rx_length_errors = hw_stats->rx_len_err;
1520 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1521 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1522 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1523
1524 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1525
1526 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
1527 hw_stats->tx_underrun + hw_stats->tx_trunc;
1528 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1529 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1530 net_stats->tx_window_errors = hw_stats->tx_late_col;
1531
1532 return &adapter->net_stats;
1533 }
1534
1535 static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
1536 {
1537 u16 phy_data;
1538
1539 spin_lock(&adapter->mdio_lock);
1540 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
1541 spin_unlock(&adapter->mdio_lock);
1542 }
1543
1544 static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
1545 enum atl1c_trans_queue type)
1546 {
1547 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
1548 &adapter->tpd_ring[type];
1549 struct atl1c_buffer *buffer_info;
1550 struct pci_dev *pdev = adapter->pdev;
1551 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1552 u16 hw_next_to_clean;
1553 u16 shift;
1554 u32 data;
1555
1556 if (type == atl1c_trans_high)
1557 shift = MB_HTPD_CONS_IDX_SHIFT;
1558 else
1559 shift = MB_NTPD_CONS_IDX_SHIFT;
1560
1561 AT_READ_REG(&adapter->hw, REG_MB_PRIO_CONS_IDX, &data);
1562 hw_next_to_clean = (data >> shift) & MB_PRIO_PROD_IDX_MASK;
1563
1564 while (next_to_clean != hw_next_to_clean) {
1565 buffer_info = &tpd_ring->buffer_info[next_to_clean];
1566 atl1c_clean_buffer(pdev, buffer_info, 1);
1567 if (++next_to_clean == tpd_ring->count)
1568 next_to_clean = 0;
1569 atomic_set(&tpd_ring->next_to_clean, next_to_clean);
1570 }
1571
1572 if (netif_queue_stopped(adapter->netdev) &&
1573 netif_carrier_ok(adapter->netdev)) {
1574 netif_wake_queue(adapter->netdev);
1575 }
1576
1577 return true;
1578 }
1579
1580 /*
1581 * atl1c_intr - Interrupt Handler
1582 * @irq: interrupt number
1583 * @data: pointer to a network interface device structure
1584 * @pt_regs: CPU registers structure
1585 */
1586 static irqreturn_t atl1c_intr(int irq, void *data)
1587 {
1588 struct net_device *netdev = data;
1589 struct atl1c_adapter *adapter = netdev_priv(netdev);
1590 struct pci_dev *pdev = adapter->pdev;
1591 struct atl1c_hw *hw = &adapter->hw;
1592 int max_ints = AT_MAX_INT_WORK;
1593 int handled = IRQ_NONE;
1594 u32 status;
1595 u32 reg_data;
1596
1597 do {
1598 AT_READ_REG(hw, REG_ISR, &reg_data);
1599 status = reg_data & hw->intr_mask;
1600
1601 if (status == 0 || (status & ISR_DIS_INT) != 0) {
1602 if (max_ints != AT_MAX_INT_WORK)
1603 handled = IRQ_HANDLED;
1604 break;
1605 }
1606 /* link event */
1607 if (status & ISR_GPHY)
1608 atl1c_clear_phy_int(adapter);
1609 /* Ack ISR */
1610 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1611 if (status & ISR_RX_PKT) {
1612 if (likely(napi_schedule_prep(&adapter->napi))) {
1613 hw->intr_mask &= ~ISR_RX_PKT;
1614 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
1615 __napi_schedule(&adapter->napi);
1616 }
1617 }
1618 if (status & ISR_TX_PKT)
1619 atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
1620
1621 handled = IRQ_HANDLED;
1622 /* check if PCIE PHY Link down */
1623 if (status & ISR_ERROR) {
1624 if (netif_msg_hw(adapter))
1625 dev_err(&pdev->dev,
1626 "atl1c hardware error (status = 0x%x)\n",
1627 status & ISR_ERROR);
1628 /* reset MAC */
1629 hw->intr_mask &= ~ISR_ERROR;
1630 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
1631 adapter->work_event |= ATL1C_WORK_EVENT_RESET;
1632 schedule_work(&adapter->common_task);
1633 break;
1634 }
1635
1636 if (status & ISR_OVER)
1637 if (netif_msg_intr(adapter))
1638 dev_warn(&pdev->dev,
1639 "TX/RX overflow (status = 0x%x)\n",
1640 status & ISR_OVER);
1641
1642 /* link event */
1643 if (status & (ISR_GPHY | ISR_MANUAL)) {
1644 adapter->net_stats.tx_carrier_errors++;
1645 atl1c_link_chg_event(adapter);
1646 break;
1647 }
1648
1649 } while (--max_ints > 0);
1650 /* re-enable Interrupt*/
1651 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1652 return handled;
1653 }
1654
1655 static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
1656 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
1657 {
1658 /*
1659 * The pid field in RRS in not correct sometimes, so we
1660 * cannot figure out if the packet is fragmented or not,
1661 * so we tell the KERNEL CHECKSUM_NONE
1662 */
1663 skb->ip_summed = CHECKSUM_NONE;
1664 }
1665
1666 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, const int ringid)
1667 {
1668 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[ringid];
1669 struct pci_dev *pdev = adapter->pdev;
1670 struct atl1c_buffer *buffer_info, *next_info;
1671 struct sk_buff *skb;
1672 void *vir_addr = NULL;
1673 u16 num_alloc = 0;
1674 u16 rfd_next_to_use, next_next;
1675 struct atl1c_rx_free_desc *rfd_desc;
1676
1677 next_next = rfd_next_to_use = rfd_ring->next_to_use;
1678 if (++next_next == rfd_ring->count)
1679 next_next = 0;
1680 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1681 next_info = &rfd_ring->buffer_info[next_next];
1682
1683 while (next_info->flags & ATL1C_BUFFER_FREE) {
1684 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
1685
1686 skb = dev_alloc_skb(adapter->rx_buffer_len);
1687 if (unlikely(!skb)) {
1688 if (netif_msg_rx_err(adapter))
1689 dev_warn(&pdev->dev, "alloc rx buffer failed\n");
1690 break;
1691 }
1692
1693 /*
1694 * Make buffer alignment 2 beyond a 16 byte boundary
1695 * this will result in a 16 byte aligned IP header after
1696 * the 14 byte MAC header is removed
1697 */
1698 vir_addr = skb->data;
1699 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
1700 buffer_info->skb = skb;
1701 buffer_info->length = adapter->rx_buffer_len;
1702 buffer_info->dma = pci_map_single(pdev, vir_addr,
1703 buffer_info->length,
1704 PCI_DMA_FROMDEVICE);
1705 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
1706 ATL1C_PCIMAP_FROMDEVICE);
1707 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1708 rfd_next_to_use = next_next;
1709 if (++next_next == rfd_ring->count)
1710 next_next = 0;
1711 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1712 next_info = &rfd_ring->buffer_info[next_next];
1713 num_alloc++;
1714 }
1715
1716 if (num_alloc) {
1717 /* TODO: update mailbox here */
1718 wmb();
1719 rfd_ring->next_to_use = rfd_next_to_use;
1720 AT_WRITE_REG(&adapter->hw, atl1c_rfd_prod_idx_regs[ringid],
1721 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
1722 }
1723
1724 return num_alloc;
1725 }
1726
1727 static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
1728 struct atl1c_recv_ret_status *rrs, u16 num)
1729 {
1730 u16 i;
1731 /* the relationship between rrd and rfd is one map one */
1732 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
1733 rrd_ring->next_to_clean)) {
1734 rrs->word3 &= ~RRS_RXD_UPDATED;
1735 if (++rrd_ring->next_to_clean == rrd_ring->count)
1736 rrd_ring->next_to_clean = 0;
1737 }
1738 }
1739
1740 static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
1741 struct atl1c_recv_ret_status *rrs, u16 num)
1742 {
1743 u16 i;
1744 u16 rfd_index;
1745 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
1746
1747 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1748 RRS_RX_RFD_INDEX_MASK;
1749 for (i = 0; i < num; i++) {
1750 buffer_info[rfd_index].skb = NULL;
1751 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
1752 ATL1C_BUFFER_FREE);
1753 if (++rfd_index == rfd_ring->count)
1754 rfd_index = 0;
1755 }
1756 rfd_ring->next_to_clean = rfd_index;
1757 }
1758
1759 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
1760 int *work_done, int work_to_do)
1761 {
1762 u16 rfd_num, rfd_index;
1763 u16 count = 0;
1764 u16 length;
1765 struct pci_dev *pdev = adapter->pdev;
1766 struct net_device *netdev = adapter->netdev;
1767 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[que];
1768 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[que];
1769 struct sk_buff *skb;
1770 struct atl1c_recv_ret_status *rrs;
1771 struct atl1c_buffer *buffer_info;
1772
1773 while (1) {
1774 if (*work_done >= work_to_do)
1775 break;
1776 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
1777 if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
1778 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
1779 RRS_RX_RFD_CNT_MASK;
1780 if (unlikely(rfd_num != 1))
1781 /* TODO support mul rfd*/
1782 if (netif_msg_rx_err(adapter))
1783 dev_warn(&pdev->dev,
1784 "Multi rfd not support yet!\n");
1785 goto rrs_checked;
1786 } else {
1787 break;
1788 }
1789 rrs_checked:
1790 atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
1791 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
1792 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1793 if (netif_msg_rx_err(adapter))
1794 dev_warn(&pdev->dev,
1795 "wrong packet! rrs word3 is %x\n",
1796 rrs->word3);
1797 continue;
1798 }
1799
1800 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
1801 RRS_PKT_SIZE_MASK);
1802 /* Good Receive */
1803 if (likely(rfd_num == 1)) {
1804 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1805 RRS_RX_RFD_INDEX_MASK;
1806 buffer_info = &rfd_ring->buffer_info[rfd_index];
1807 pci_unmap_single(pdev, buffer_info->dma,
1808 buffer_info->length, PCI_DMA_FROMDEVICE);
1809 skb = buffer_info->skb;
1810 } else {
1811 /* TODO */
1812 if (netif_msg_rx_err(adapter))
1813 dev_warn(&pdev->dev,
1814 "Multi rfd not support yet!\n");
1815 break;
1816 }
1817 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1818 skb_put(skb, length - ETH_FCS_LEN);
1819 skb->protocol = eth_type_trans(skb, netdev);
1820 skb->dev = netdev;
1821 atl1c_rx_checksum(adapter, skb, rrs);
1822 if (unlikely(adapter->vlgrp) && rrs->word3 & RRS_VLAN_INS) {
1823 u16 vlan;
1824
1825 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
1826 vlan = le16_to_cpu(vlan);
1827 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, vlan);
1828 } else
1829 netif_receive_skb(skb);
1830
1831 (*work_done)++;
1832 count++;
1833 }
1834 if (count)
1835 atl1c_alloc_rx_buffer(adapter, que);
1836 }
1837
1838 /*
1839 * atl1c_clean - NAPI Rx polling callback
1840 * @adapter: board private structure
1841 */
1842 static int atl1c_clean(struct napi_struct *napi, int budget)
1843 {
1844 struct atl1c_adapter *adapter =
1845 container_of(napi, struct atl1c_adapter, napi);
1846 int work_done = 0;
1847
1848 /* Keep link state information with original netdev */
1849 if (!netif_carrier_ok(adapter->netdev))
1850 goto quit_polling;
1851 /* just enable one RXQ */
1852 atl1c_clean_rx_irq(adapter, 0, &work_done, budget);
1853
1854 if (work_done < budget) {
1855 quit_polling:
1856 napi_complete(napi);
1857 adapter->hw.intr_mask |= ISR_RX_PKT;
1858 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
1859 }
1860 return work_done;
1861 }
1862
1863 #ifdef CONFIG_NET_POLL_CONTROLLER
1864
1865 /*
1866 * Polling 'interrupt' - used by things like netconsole to send skbs
1867 * without having to re-enable interrupts. It's not called while
1868 * the interrupt routine is executing.
1869 */
1870 static void atl1c_netpoll(struct net_device *netdev)
1871 {
1872 struct atl1c_adapter *adapter = netdev_priv(netdev);
1873
1874 disable_irq(adapter->pdev->irq);
1875 atl1c_intr(adapter->pdev->irq, netdev);
1876 enable_irq(adapter->pdev->irq);
1877 }
1878 #endif
1879
1880 static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
1881 {
1882 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1883 u16 next_to_use = 0;
1884 u16 next_to_clean = 0;
1885
1886 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1887 next_to_use = tpd_ring->next_to_use;
1888
1889 return (u16)(next_to_clean > next_to_use) ?
1890 (next_to_clean - next_to_use - 1) :
1891 (tpd_ring->count + next_to_clean - next_to_use - 1);
1892 }
1893
1894 /*
1895 * get next usable tpd
1896 * Note: should call atl1c_tdp_avail to make sure
1897 * there is enough tpd to use
1898 */
1899 static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
1900 enum atl1c_trans_queue type)
1901 {
1902 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1903 struct atl1c_tpd_desc *tpd_desc;
1904 u16 next_to_use = 0;
1905
1906 next_to_use = tpd_ring->next_to_use;
1907 if (++tpd_ring->next_to_use == tpd_ring->count)
1908 tpd_ring->next_to_use = 0;
1909 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
1910 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
1911 return tpd_desc;
1912 }
1913
1914 static struct atl1c_buffer *
1915 atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
1916 {
1917 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
1918
1919 return &tpd_ring->buffer_info[tpd -
1920 (struct atl1c_tpd_desc *)tpd_ring->desc];
1921 }
1922
1923 /* Calculate the transmit packet descript needed*/
1924 static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
1925 {
1926 u16 tpd_req;
1927 u16 proto_hdr_len = 0;
1928
1929 tpd_req = skb_shinfo(skb)->nr_frags + 1;
1930
1931 if (skb_is_gso(skb)) {
1932 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1933 if (proto_hdr_len < skb_headlen(skb))
1934 tpd_req++;
1935 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
1936 tpd_req++;
1937 }
1938 return tpd_req;
1939 }
1940
1941 static int atl1c_tso_csum(struct atl1c_adapter *adapter,
1942 struct sk_buff *skb,
1943 struct atl1c_tpd_desc **tpd,
1944 enum atl1c_trans_queue type)
1945 {
1946 struct pci_dev *pdev = adapter->pdev;
1947 u8 hdr_len;
1948 u32 real_len;
1949 unsigned short offload_type;
1950 int err;
1951
1952 if (skb_is_gso(skb)) {
1953 if (skb_header_cloned(skb)) {
1954 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1955 if (unlikely(err))
1956 return -1;
1957 }
1958 offload_type = skb_shinfo(skb)->gso_type;
1959
1960 if (offload_type & SKB_GSO_TCPV4) {
1961 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
1962 + ntohs(ip_hdr(skb)->tot_len));
1963
1964 if (real_len < skb->len)
1965 pskb_trim(skb, real_len);
1966
1967 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1968 if (unlikely(skb->len == hdr_len)) {
1969 /* only xsum need */
1970 if (netif_msg_tx_queued(adapter))
1971 dev_warn(&pdev->dev,
1972 "IPV4 tso with zero data??\n");
1973 goto check_sum;
1974 } else {
1975 ip_hdr(skb)->check = 0;
1976 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
1977 ip_hdr(skb)->saddr,
1978 ip_hdr(skb)->daddr,
1979 0, IPPROTO_TCP, 0);
1980 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
1981 }
1982 }
1983
1984 if (offload_type & SKB_GSO_TCPV6) {
1985 struct atl1c_tpd_ext_desc *etpd =
1986 *(struct atl1c_tpd_ext_desc **)(tpd);
1987
1988 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
1989 *tpd = atl1c_get_tpd(adapter, type);
1990 ipv6_hdr(skb)->payload_len = 0;
1991 /* check payload == 0 byte ? */
1992 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1993 if (unlikely(skb->len == hdr_len)) {
1994 /* only xsum need */
1995 if (netif_msg_tx_queued(adapter))
1996 dev_warn(&pdev->dev,
1997 "IPV6 tso with zero data??\n");
1998 goto check_sum;
1999 } else
2000 tcp_hdr(skb)->check = ~csum_ipv6_magic(
2001 &ipv6_hdr(skb)->saddr,
2002 &ipv6_hdr(skb)->daddr,
2003 0, IPPROTO_TCP, 0);
2004 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
2005 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
2006 etpd->pkt_len = cpu_to_le32(skb->len);
2007 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
2008 }
2009
2010 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
2011 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
2012 TPD_TCPHDR_OFFSET_SHIFT;
2013 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
2014 TPD_MSS_SHIFT;
2015 return 0;
2016 }
2017
2018 check_sum:
2019 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2020 u8 css, cso;
2021 cso = skb_transport_offset(skb);
2022
2023 if (unlikely(cso & 0x1)) {
2024 if (netif_msg_tx_err(adapter))
2025 dev_err(&adapter->pdev->dev,
2026 "payload offset should not an event number\n");
2027 return -1;
2028 } else {
2029 css = cso + skb->csum_offset;
2030
2031 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
2032 TPD_PLOADOFFSET_SHIFT;
2033 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
2034 TPD_CCSUM_OFFSET_SHIFT;
2035 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
2036 }
2037 }
2038 return 0;
2039 }
2040
2041 static void atl1c_tx_map(struct atl1c_adapter *adapter,
2042 struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
2043 enum atl1c_trans_queue type)
2044 {
2045 struct atl1c_tpd_desc *use_tpd = NULL;
2046 struct atl1c_buffer *buffer_info = NULL;
2047 u16 buf_len = skb_headlen(skb);
2048 u16 map_len = 0;
2049 u16 mapped_len = 0;
2050 u16 hdr_len = 0;
2051 u16 nr_frags;
2052 u16 f;
2053 int tso;
2054
2055 nr_frags = skb_shinfo(skb)->nr_frags;
2056 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
2057 if (tso) {
2058 /* TSO */
2059 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2060 use_tpd = tpd;
2061
2062 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2063 buffer_info->length = map_len;
2064 buffer_info->dma = pci_map_single(adapter->pdev,
2065 skb->data, hdr_len, PCI_DMA_TODEVICE);
2066 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2067 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2068 ATL1C_PCIMAP_TODEVICE);
2069 mapped_len += map_len;
2070 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2071 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2072 }
2073
2074 if (mapped_len < buf_len) {
2075 /* mapped_len == 0, means we should use the first tpd,
2076 which is given by caller */
2077 if (mapped_len == 0)
2078 use_tpd = tpd;
2079 else {
2080 use_tpd = atl1c_get_tpd(adapter, type);
2081 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2082 }
2083 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2084 buffer_info->length = buf_len - mapped_len;
2085 buffer_info->dma =
2086 pci_map_single(adapter->pdev, skb->data + mapped_len,
2087 buffer_info->length, PCI_DMA_TODEVICE);
2088 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2089 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2090 ATL1C_PCIMAP_TODEVICE);
2091 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2092 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2093 }
2094
2095 for (f = 0; f < nr_frags; f++) {
2096 struct skb_frag_struct *frag;
2097
2098 frag = &skb_shinfo(skb)->frags[f];
2099
2100 use_tpd = atl1c_get_tpd(adapter, type);
2101 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2102
2103 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2104 buffer_info->length = frag->size;
2105 buffer_info->dma =
2106 pci_map_page(adapter->pdev, frag->page,
2107 frag->page_offset,
2108 buffer_info->length,
2109 PCI_DMA_TODEVICE);
2110 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2111 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
2112 ATL1C_PCIMAP_TODEVICE);
2113 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2114 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2115 }
2116
2117 /* The last tpd */
2118 use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
2119 /* The last buffer info contain the skb address,
2120 so it will be free after unmap */
2121 buffer_info->skb = skb;
2122 }
2123
2124 static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
2125 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
2126 {
2127 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
2128 u32 prod_data;
2129
2130 AT_READ_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, &prod_data);
2131 switch (type) {
2132 case atl1c_trans_high:
2133 prod_data &= 0xFFFF0000;
2134 prod_data |= tpd_ring->next_to_use & 0xFFFF;
2135 break;
2136 case atl1c_trans_normal:
2137 prod_data &= 0x0000FFFF;
2138 prod_data |= (tpd_ring->next_to_use & 0xFFFF) << 16;
2139 break;
2140 default:
2141 break;
2142 }
2143 wmb();
2144 AT_WRITE_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, prod_data);
2145 }
2146
2147 static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
2148 struct net_device *netdev)
2149 {
2150 struct atl1c_adapter *adapter = netdev_priv(netdev);
2151 unsigned long flags;
2152 u16 tpd_req = 1;
2153 struct atl1c_tpd_desc *tpd;
2154 enum atl1c_trans_queue type = atl1c_trans_normal;
2155
2156 if (test_bit(__AT_DOWN, &adapter->flags)) {
2157 dev_kfree_skb_any(skb);
2158 return NETDEV_TX_OK;
2159 }
2160
2161 tpd_req = atl1c_cal_tpd_req(skb);
2162 if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
2163 if (netif_msg_pktdata(adapter))
2164 dev_info(&adapter->pdev->dev, "tx locked\n");
2165 return NETDEV_TX_LOCKED;
2166 }
2167 if (skb->mark == 0x01)
2168 type = atl1c_trans_high;
2169 else
2170 type = atl1c_trans_normal;
2171
2172 if (atl1c_tpd_avail(adapter, type) < tpd_req) {
2173 /* no enough descriptor, just stop queue */
2174 netif_stop_queue(netdev);
2175 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2176 return NETDEV_TX_BUSY;
2177 }
2178
2179 tpd = atl1c_get_tpd(adapter, type);
2180
2181 /* do TSO and check sum */
2182 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
2183 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2184 dev_kfree_skb_any(skb);
2185 return NETDEV_TX_OK;
2186 }
2187
2188 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
2189 u16 vlan = vlan_tx_tag_get(skb);
2190 __le16 tag;
2191
2192 vlan = cpu_to_le16(vlan);
2193 AT_VLAN_TO_TAG(vlan, tag);
2194 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
2195 tpd->vlan_tag = tag;
2196 }
2197
2198 if (skb_network_offset(skb) != ETH_HLEN)
2199 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
2200
2201 atl1c_tx_map(adapter, skb, tpd, type);
2202 atl1c_tx_queue(adapter, skb, tpd, type);
2203
2204 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2205 return NETDEV_TX_OK;
2206 }
2207
2208 static void atl1c_free_irq(struct atl1c_adapter *adapter)
2209 {
2210 struct net_device *netdev = adapter->netdev;
2211
2212 free_irq(adapter->pdev->irq, netdev);
2213
2214 if (adapter->have_msi)
2215 pci_disable_msi(adapter->pdev);
2216 }
2217
2218 static int atl1c_request_irq(struct atl1c_adapter *adapter)
2219 {
2220 struct pci_dev *pdev = adapter->pdev;
2221 struct net_device *netdev = adapter->netdev;
2222 int flags = 0;
2223 int err = 0;
2224
2225 adapter->have_msi = true;
2226 err = pci_enable_msi(adapter->pdev);
2227 if (err) {
2228 if (netif_msg_ifup(adapter))
2229 dev_err(&pdev->dev,
2230 "Unable to allocate MSI interrupt Error: %d\n",
2231 err);
2232 adapter->have_msi = false;
2233 } else
2234 netdev->irq = pdev->irq;
2235
2236 if (!adapter->have_msi)
2237 flags |= IRQF_SHARED;
2238 err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
2239 netdev->name, netdev);
2240 if (err) {
2241 if (netif_msg_ifup(adapter))
2242 dev_err(&pdev->dev,
2243 "Unable to allocate interrupt Error: %d\n",
2244 err);
2245 if (adapter->have_msi)
2246 pci_disable_msi(adapter->pdev);
2247 return err;
2248 }
2249 if (netif_msg_ifup(adapter))
2250 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
2251 return err;
2252 }
2253
2254 int atl1c_up(struct atl1c_adapter *adapter)
2255 {
2256 struct net_device *netdev = adapter->netdev;
2257 int num;
2258 int err;
2259 int i;
2260
2261 netif_carrier_off(netdev);
2262 atl1c_init_ring_ptrs(adapter);
2263 atl1c_set_multi(netdev);
2264 atl1c_restore_vlan(adapter);
2265
2266 for (i = 0; i < adapter->num_rx_queues; i++) {
2267 num = atl1c_alloc_rx_buffer(adapter, i);
2268 if (unlikely(num == 0)) {
2269 err = -ENOMEM;
2270 goto err_alloc_rx;
2271 }
2272 }
2273
2274 if (atl1c_configure(adapter)) {
2275 err = -EIO;
2276 goto err_up;
2277 }
2278
2279 err = atl1c_request_irq(adapter);
2280 if (unlikely(err))
2281 goto err_up;
2282
2283 clear_bit(__AT_DOWN, &adapter->flags);
2284 napi_enable(&adapter->napi);
2285 atl1c_irq_enable(adapter);
2286 atl1c_check_link_status(adapter);
2287 netif_start_queue(netdev);
2288 return err;
2289
2290 err_up:
2291 err_alloc_rx:
2292 atl1c_clean_rx_ring(adapter);
2293 return err;
2294 }
2295
2296 void atl1c_down(struct atl1c_adapter *adapter)
2297 {
2298 struct net_device *netdev = adapter->netdev;
2299
2300 atl1c_del_timer(adapter);
2301 adapter->work_event = 0; /* clear all event */
2302 /* signal that we're down so the interrupt handler does not
2303 * reschedule our watchdog timer */
2304 set_bit(__AT_DOWN, &adapter->flags);
2305 netif_carrier_off(netdev);
2306 napi_disable(&adapter->napi);
2307 atl1c_irq_disable(adapter);
2308 atl1c_free_irq(adapter);
2309 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
2310 /* reset MAC to disable all RX/TX */
2311 atl1c_reset_mac(&adapter->hw);
2312 msleep(1);
2313
2314 adapter->link_speed = SPEED_0;
2315 adapter->link_duplex = -1;
2316 atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
2317 atl1c_clean_tx_ring(adapter, atl1c_trans_high);
2318 atl1c_clean_rx_ring(adapter);
2319 }
2320
2321 /*
2322 * atl1c_open - Called when a network interface is made active
2323 * @netdev: network interface device structure
2324 *
2325 * Returns 0 on success, negative value on failure
2326 *
2327 * The open entry point is called when a network interface is made
2328 * active by the system (IFF_UP). At this point all resources needed
2329 * for transmit and receive operations are allocated, the interrupt
2330 * handler is registered with the OS, the watchdog timer is started,
2331 * and the stack is notified that the interface is ready.
2332 */
2333 static int atl1c_open(struct net_device *netdev)
2334 {
2335 struct atl1c_adapter *adapter = netdev_priv(netdev);
2336 int err;
2337
2338 /* disallow open during test */
2339 if (test_bit(__AT_TESTING, &adapter->flags))
2340 return -EBUSY;
2341
2342 /* allocate rx/tx dma buffer & descriptors */
2343 err = atl1c_setup_ring_resources(adapter);
2344 if (unlikely(err))
2345 return err;
2346
2347 err = atl1c_up(adapter);
2348 if (unlikely(err))
2349 goto err_up;
2350
2351 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
2352 u32 phy_data;
2353
2354 AT_READ_REG(&adapter->hw, REG_MDIO_CTRL, &phy_data);
2355 phy_data |= MDIO_AP_EN;
2356 AT_WRITE_REG(&adapter->hw, REG_MDIO_CTRL, phy_data);
2357 }
2358 return 0;
2359
2360 err_up:
2361 atl1c_free_irq(adapter);
2362 atl1c_free_ring_resources(adapter);
2363 atl1c_reset_mac(&adapter->hw);
2364 return err;
2365 }
2366
2367 /*
2368 * atl1c_close - Disables a network interface
2369 * @netdev: network interface device structure
2370 *
2371 * Returns 0, this is not allowed to fail
2372 *
2373 * The close entry point is called when an interface is de-activated
2374 * by the OS. The hardware is still under the drivers control, but
2375 * needs to be disabled. A global MAC reset is issued to stop the
2376 * hardware, and all transmit and receive resources are freed.
2377 */
2378 static int atl1c_close(struct net_device *netdev)
2379 {
2380 struct atl1c_adapter *adapter = netdev_priv(netdev);
2381
2382 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2383 atl1c_down(adapter);
2384 atl1c_free_ring_resources(adapter);
2385 return 0;
2386 }
2387
2388 static int atl1c_suspend(struct pci_dev *pdev, pm_message_t state)
2389 {
2390 struct net_device *netdev = pci_get_drvdata(pdev);
2391 struct atl1c_adapter *adapter = netdev_priv(netdev);
2392 struct atl1c_hw *hw = &adapter->hw;
2393 u32 ctrl;
2394 u32 mac_ctrl_data;
2395 u32 master_ctrl_data;
2396 u32 wol_ctrl_data = 0;
2397 u16 mii_bmsr_data;
2398 u16 save_autoneg_advertised;
2399 u16 mii_intr_status_data;
2400 u32 wufc = adapter->wol;
2401 u32 i;
2402 int retval = 0;
2403
2404 if (netif_running(netdev)) {
2405 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2406 atl1c_down(adapter);
2407 }
2408 netif_device_detach(netdev);
2409 atl1c_disable_l0s_l1(hw);
2410 retval = pci_save_state(pdev);
2411 if (retval)
2412 return retval;
2413 if (wufc) {
2414 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
2415 master_ctrl_data &= ~MASTER_CTRL_CLK_SEL_DIS;
2416
2417 /* get link status */
2418 atl1c_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
2419 atl1c_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
2420 save_autoneg_advertised = hw->autoneg_advertised;
2421 hw->autoneg_advertised = ADVERTISED_10baseT_Half;
2422 if (atl1c_restart_autoneg(hw) != 0)
2423 if (netif_msg_link(adapter))
2424 dev_warn(&pdev->dev, "phy autoneg failed\n");
2425 hw->phy_configured = false; /* re-init PHY when resume */
2426 hw->autoneg_advertised = save_autoneg_advertised;
2427 /* turn on magic packet wol */
2428 if (wufc & AT_WUFC_MAG)
2429 wol_ctrl_data = WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2430
2431 if (wufc & AT_WUFC_LNKC) {
2432 for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) {
2433 msleep(100);
2434 atl1c_read_phy_reg(hw, MII_BMSR,
2435 (u16 *)&mii_bmsr_data);
2436 if (mii_bmsr_data & BMSR_LSTATUS)
2437 break;
2438 }
2439 if ((mii_bmsr_data & BMSR_LSTATUS) == 0)
2440 if (netif_msg_link(adapter))
2441 dev_warn(&pdev->dev,
2442 "%s: Link may change"
2443 "when suspend\n",
2444 atl1c_driver_name);
2445 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2446 /* only link up can wake up */
2447 if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) {
2448 if (netif_msg_link(adapter))
2449 dev_err(&pdev->dev,
2450 "%s: read write phy "
2451 "register failed.\n",
2452 atl1c_driver_name);
2453 goto wol_dis;
2454 }
2455 }
2456 /* clear phy interrupt */
2457 atl1c_read_phy_reg(hw, MII_ISR, &mii_intr_status_data);
2458 /* Config MAC Ctrl register */
2459 mac_ctrl_data = MAC_CTRL_RX_EN;
2460 /* set to 10/100M halt duplex */
2461 mac_ctrl_data |= atl1c_mac_speed_10_100 << MAC_CTRL_SPEED_SHIFT;
2462 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2463 MAC_CTRL_PRMLEN_MASK) <<
2464 MAC_CTRL_PRMLEN_SHIFT);
2465
2466 if (adapter->vlgrp)
2467 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
2468
2469 /* magic packet maybe Broadcast&multicast&Unicast frame */
2470 if (wufc & AT_WUFC_MAG)
2471 mac_ctrl_data |= MAC_CTRL_BC_EN;
2472
2473 if (netif_msg_hw(adapter))
2474 dev_dbg(&pdev->dev,
2475 "%s: suspend MAC=0x%x\n",
2476 atl1c_driver_name, mac_ctrl_data);
2477 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
2478 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2479 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2480
2481 /* pcie patch */
2482 AT_READ_REG(hw, REG_PCIE_PHYMISC, &ctrl);
2483 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2484 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2485
2486 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2487 goto suspend_exit;
2488 }
2489 wol_dis:
2490
2491 /* WOL disabled */
2492 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2493
2494 /* pcie patch */
2495 AT_READ_REG(hw, REG_PCIE_PHYMISC, &ctrl);
2496 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2497 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2498
2499 atl1c_phy_disable(hw);
2500 hw->phy_configured = false; /* re-init PHY when resume */
2501
2502 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
2503 suspend_exit:
2504
2505 pci_disable_device(pdev);
2506 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2507
2508 return 0;
2509 }
2510
2511 static int atl1c_resume(struct pci_dev *pdev)
2512 {
2513 struct net_device *netdev = pci_get_drvdata(pdev);
2514 struct atl1c_adapter *adapter = netdev_priv(netdev);
2515
2516 pci_set_power_state(pdev, PCI_D0);
2517 pci_restore_state(pdev);
2518 pci_enable_wake(pdev, PCI_D3hot, 0);
2519 pci_enable_wake(pdev, PCI_D3cold, 0);
2520
2521 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2522
2523 atl1c_phy_reset(&adapter->hw);
2524 atl1c_reset_mac(&adapter->hw);
2525 netif_device_attach(netdev);
2526 if (netif_running(netdev))
2527 atl1c_up(adapter);
2528
2529 return 0;
2530 }
2531
2532 static void atl1c_shutdown(struct pci_dev *pdev)
2533 {
2534 atl1c_suspend(pdev, PMSG_SUSPEND);
2535 }
2536
2537 static const struct net_device_ops atl1c_netdev_ops = {
2538 .ndo_open = atl1c_open,
2539 .ndo_stop = atl1c_close,
2540 .ndo_validate_addr = eth_validate_addr,
2541 .ndo_start_xmit = atl1c_xmit_frame,
2542 .ndo_set_mac_address = atl1c_set_mac_addr,
2543 .ndo_set_multicast_list = atl1c_set_multi,
2544 .ndo_change_mtu = atl1c_change_mtu,
2545 .ndo_do_ioctl = atl1c_ioctl,
2546 .ndo_tx_timeout = atl1c_tx_timeout,
2547 .ndo_get_stats = atl1c_get_stats,
2548 .ndo_vlan_rx_register = atl1c_vlan_rx_register,
2549 #ifdef CONFIG_NET_POLL_CONTROLLER
2550 .ndo_poll_controller = atl1c_netpoll,
2551 #endif
2552 };
2553
2554 static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2555 {
2556 SET_NETDEV_DEV(netdev, &pdev->dev);
2557 pci_set_drvdata(pdev, netdev);
2558
2559 netdev->irq = pdev->irq;
2560 netdev->netdev_ops = &atl1c_netdev_ops;
2561 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2562 atl1c_set_ethtool_ops(netdev);
2563
2564 /* TODO: add when ready */
2565 netdev->features = NETIF_F_SG |
2566 NETIF_F_HW_CSUM |
2567 NETIF_F_HW_VLAN_TX |
2568 NETIF_F_HW_VLAN_RX |
2569 NETIF_F_TSO |
2570 NETIF_F_TSO6;
2571 return 0;
2572 }
2573
2574 /*
2575 * atl1c_probe - Device Initialization Routine
2576 * @pdev: PCI device information struct
2577 * @ent: entry in atl1c_pci_tbl
2578 *
2579 * Returns 0 on success, negative on failure
2580 *
2581 * atl1c_probe initializes an adapter identified by a pci_dev structure.
2582 * The OS initialization, configuring of the adapter private structure,
2583 * and a hardware reset occur.
2584 */
2585 static int __devinit atl1c_probe(struct pci_dev *pdev,
2586 const struct pci_device_id *ent)
2587 {
2588 struct net_device *netdev;
2589 struct atl1c_adapter *adapter;
2590 static int cards_found;
2591
2592 int err = 0;
2593
2594 /* enable device (incl. PCI PM wakeup and hotplug setup) */
2595 err = pci_enable_device_mem(pdev);
2596 if (err) {
2597 dev_err(&pdev->dev, "cannot enable PCI device\n");
2598 return err;
2599 }
2600
2601 /*
2602 * The atl1c chip can DMA to 64-bit addresses, but it uses a single
2603 * shared register for the high 32 bits, so only a single, aligned,
2604 * 4 GB physical address range can be used at a time.
2605 *
2606 * Supporting 64-bit DMA on this hardware is more trouble than it's
2607 * worth. It is far easier to limit to 32-bit DMA than update
2608 * various kernel subsystems to support the mechanics required by a
2609 * fixed-high-32-bit system.
2610 */
2611 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2612 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
2613 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2614 goto err_dma;
2615 }
2616
2617 err = pci_request_regions(pdev, atl1c_driver_name);
2618 if (err) {
2619 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2620 goto err_pci_reg;
2621 }
2622
2623 pci_set_master(pdev);
2624
2625 netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
2626 if (netdev == NULL) {
2627 err = -ENOMEM;
2628 dev_err(&pdev->dev, "etherdev alloc failed\n");
2629 goto err_alloc_etherdev;
2630 }
2631
2632 err = atl1c_init_netdev(netdev, pdev);
2633 if (err) {
2634 dev_err(&pdev->dev, "init netdevice failed\n");
2635 goto err_init_netdev;
2636 }
2637 adapter = netdev_priv(netdev);
2638 adapter->bd_number = cards_found;
2639 adapter->netdev = netdev;
2640 adapter->pdev = pdev;
2641 adapter->hw.adapter = adapter;
2642 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
2643 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
2644 if (!adapter->hw.hw_addr) {
2645 err = -EIO;
2646 dev_err(&pdev->dev, "cannot map device registers\n");
2647 goto err_ioremap;
2648 }
2649 netdev->base_addr = (unsigned long)adapter->hw.hw_addr;
2650
2651 /* init mii data */
2652 adapter->mii.dev = netdev;
2653 adapter->mii.mdio_read = atl1c_mdio_read;
2654 adapter->mii.mdio_write = atl1c_mdio_write;
2655 adapter->mii.phy_id_mask = 0x1f;
2656 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2657 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
2658 setup_timer(&adapter->phy_config_timer, atl1c_phy_config,
2659 (unsigned long)adapter);
2660 /* setup the private structure */
2661 err = atl1c_sw_init(adapter);
2662 if (err) {
2663 dev_err(&pdev->dev, "net device private data init failed\n");
2664 goto err_sw_init;
2665 }
2666 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
2667 ATL1C_PCIE_PHY_RESET);
2668
2669 /* Init GPHY as early as possible due to power saving issue */
2670 atl1c_phy_reset(&adapter->hw);
2671
2672 err = atl1c_reset_mac(&adapter->hw);
2673 if (err) {
2674 err = -EIO;
2675 goto err_reset;
2676 }
2677
2678 device_init_wakeup(&pdev->dev, 1);
2679 /* reset the controller to
2680 * put the device in a known good starting state */
2681 err = atl1c_phy_init(&adapter->hw);
2682 if (err) {
2683 err = -EIO;
2684 goto err_reset;
2685 }
2686 if (atl1c_read_mac_addr(&adapter->hw) != 0) {
2687 err = -EIO;
2688 dev_err(&pdev->dev, "get mac address failed\n");
2689 goto err_eeprom;
2690 }
2691 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2692 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
2693 if (netif_msg_probe(adapter))
2694 dev_dbg(&pdev->dev, "mac address : %pM\n",
2695 adapter->hw.mac_addr);
2696
2697 atl1c_hw_set_mac_addr(&adapter->hw);
2698 INIT_WORK(&adapter->common_task, atl1c_common_task);
2699 adapter->work_event = 0;
2700 err = register_netdev(netdev);
2701 if (err) {
2702 dev_err(&pdev->dev, "register netdevice failed\n");
2703 goto err_register;
2704 }
2705
2706 if (netif_msg_probe(adapter))
2707 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
2708 cards_found++;
2709 return 0;
2710
2711 err_reset:
2712 err_register:
2713 err_sw_init:
2714 err_eeprom:
2715 iounmap(adapter->hw.hw_addr);
2716 err_init_netdev:
2717 err_ioremap:
2718 free_netdev(netdev);
2719 err_alloc_etherdev:
2720 pci_release_regions(pdev);
2721 err_pci_reg:
2722 err_dma:
2723 pci_disable_device(pdev);
2724 return err;
2725 }
2726
2727 /*
2728 * atl1c_remove - Device Removal Routine
2729 * @pdev: PCI device information struct
2730 *
2731 * atl1c_remove is called by the PCI subsystem to alert the driver
2732 * that it should release a PCI device. The could be caused by a
2733 * Hot-Plug event, or because the driver is going to be removed from
2734 * memory.
2735 */
2736 static void __devexit atl1c_remove(struct pci_dev *pdev)
2737 {
2738 struct net_device *netdev = pci_get_drvdata(pdev);
2739 struct atl1c_adapter *adapter = netdev_priv(netdev);
2740
2741 unregister_netdev(netdev);
2742 atl1c_phy_disable(&adapter->hw);
2743
2744 iounmap(adapter->hw.hw_addr);
2745
2746 pci_release_regions(pdev);
2747 pci_disable_device(pdev);
2748 free_netdev(netdev);
2749 }
2750
2751 /*
2752 * atl1c_io_error_detected - called when PCI error is detected
2753 * @pdev: Pointer to PCI device
2754 * @state: The current pci connection state
2755 *
2756 * This function is called after a PCI bus error affecting
2757 * this device has been detected.
2758 */
2759 static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
2760 pci_channel_state_t state)
2761 {
2762 struct net_device *netdev = pci_get_drvdata(pdev);
2763 struct atl1c_adapter *adapter = netdev_priv(netdev);
2764
2765 netif_device_detach(netdev);
2766
2767 if (state == pci_channel_io_perm_failure)
2768 return PCI_ERS_RESULT_DISCONNECT;
2769
2770 if (netif_running(netdev))
2771 atl1c_down(adapter);
2772
2773 pci_disable_device(pdev);
2774
2775 /* Request a slot slot reset. */
2776 return PCI_ERS_RESULT_NEED_RESET;
2777 }
2778
2779 /*
2780 * atl1c_io_slot_reset - called after the pci bus has been reset.
2781 * @pdev: Pointer to PCI device
2782 *
2783 * Restart the card from scratch, as if from a cold-boot. Implementation
2784 * resembles the first-half of the e1000_resume routine.
2785 */
2786 static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
2787 {
2788 struct net_device *netdev = pci_get_drvdata(pdev);
2789 struct atl1c_adapter *adapter = netdev_priv(netdev);
2790
2791 if (pci_enable_device(pdev)) {
2792 if (netif_msg_hw(adapter))
2793 dev_err(&pdev->dev,
2794 "Cannot re-enable PCI device after reset\n");
2795 return PCI_ERS_RESULT_DISCONNECT;
2796 }
2797 pci_set_master(pdev);
2798
2799 pci_enable_wake(pdev, PCI_D3hot, 0);
2800 pci_enable_wake(pdev, PCI_D3cold, 0);
2801
2802 atl1c_reset_mac(&adapter->hw);
2803
2804 return PCI_ERS_RESULT_RECOVERED;
2805 }
2806
2807 /*
2808 * atl1c_io_resume - called when traffic can start flowing again.
2809 * @pdev: Pointer to PCI device
2810 *
2811 * This callback is called when the error recovery driver tells us that
2812 * its OK to resume normal operation. Implementation resembles the
2813 * second-half of the atl1c_resume routine.
2814 */
2815 static void atl1c_io_resume(struct pci_dev *pdev)
2816 {
2817 struct net_device *netdev = pci_get_drvdata(pdev);
2818 struct atl1c_adapter *adapter = netdev_priv(netdev);
2819
2820 if (netif_running(netdev)) {
2821 if (atl1c_up(adapter)) {
2822 if (netif_msg_hw(adapter))
2823 dev_err(&pdev->dev,
2824 "Cannot bring device back up after reset\n");
2825 return;
2826 }
2827 }
2828
2829 netif_device_attach(netdev);
2830 }
2831
2832 static struct pci_error_handlers atl1c_err_handler = {
2833 .error_detected = atl1c_io_error_detected,
2834 .slot_reset = atl1c_io_slot_reset,
2835 .resume = atl1c_io_resume,
2836 };
2837
2838 static struct pci_driver atl1c_driver = {
2839 .name = atl1c_driver_name,
2840 .id_table = atl1c_pci_tbl,
2841 .probe = atl1c_probe,
2842 .remove = __devexit_p(atl1c_remove),
2843 /* Power Managment Hooks */
2844 .suspend = atl1c_suspend,
2845 .resume = atl1c_resume,
2846 .shutdown = atl1c_shutdown,
2847 .err_handler = &atl1c_err_handler
2848 };
2849
2850 /*
2851 * atl1c_init_module - Driver Registration Routine
2852 *
2853 * atl1c_init_module is the first routine called when the driver is
2854 * loaded. All it does is register with the PCI subsystem.
2855 */
2856 static int __init atl1c_init_module(void)
2857 {
2858 return pci_register_driver(&atl1c_driver);
2859 }
2860
2861 /*
2862 * atl1c_exit_module - Driver Exit Cleanup Routine
2863 *
2864 * atl1c_exit_module is called just before the driver is removed
2865 * from memory.
2866 */
2867 static void __exit atl1c_exit_module(void)
2868 {
2869 pci_unregister_driver(&atl1c_driver);
2870 }
2871
2872 module_init(atl1c_init_module);
2873 module_exit(atl1c_exit_module);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree