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hwmon: (w83795) Pack similar register reads
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / hwmon / w83795.c
blobe25a2e31df3f6c7fc1a5143db7f67bc10347e780
1 /*
2 * w83795.c - Linux kernel driver for hardware monitoring
3 * Copyright (C) 2008 Nuvoton Technology Corp.
4 * Wei Song
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation - version 2.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18 * 02110-1301 USA.
19 *
20 * Supports following chips:
21 *
22 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA
23 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no
24 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no
25 */
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/slab.h>
31 #include <linux/i2c.h>
32 #include <linux/hwmon.h>
33 #include <linux/hwmon-sysfs.h>
34 #include <linux/err.h>
35 #include <linux/mutex.h>
36 #include <linux/delay.h>
37
38 /* Addresses to scan */
39 static const unsigned short normal_i2c[] = {
40 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END
41 };
42
43
44 static int reset;
45 module_param(reset, bool, 0);
46 MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
47
48
49 #define W83795_REG_BANKSEL 0x00
50 #define W83795_REG_VENDORID 0xfd
51 #define W83795_REG_CHIPID 0xfe
52 #define W83795_REG_DEVICEID 0xfb
53 #define W83795_REG_DEVICEID_A 0xff
54
55 #define W83795_REG_I2C_ADDR 0xfc
56 #define W83795_REG_CONFIG 0x01
57 #define W83795_REG_CONFIG_CONFIG48 0x04
58 #define W83795_REG_CONFIG_START 0x01
59
60 /* Multi-Function Pin Ctrl Registers */
61 #define W83795_REG_VOLT_CTRL1 0x02
62 #define W83795_REG_VOLT_CTRL2 0x03
63 #define W83795_REG_TEMP_CTRL1 0x04
64 #define W83795_REG_TEMP_CTRL2 0x05
65 #define W83795_REG_FANIN_CTRL1 0x06
66 #define W83795_REG_FANIN_CTRL2 0x07
67 #define W83795_REG_VMIGB_CTRL 0x08
68
69 #define TEMP_READ 0
70 #define TEMP_CRIT 1
71 #define TEMP_CRIT_HYST 2
72 #define TEMP_WARN 3
73 #define TEMP_WARN_HYST 4
74 /* only crit and crit_hyst affect real-time alarm status
75 * current crit crit_hyst warn warn_hyst */
76 static const u16 W83795_REG_TEMP[][5] = {
77 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */
78 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */
79 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */
80 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */
81 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */
82 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */
83 };
84
85 #define IN_READ 0
86 #define IN_MAX 1
87 #define IN_LOW 2
88 static const u16 W83795_REG_IN[][3] = {
89 /* Current, HL, LL */
90 {0x10, 0x70, 0x71}, /* VSEN1 */
91 {0x11, 0x72, 0x73}, /* VSEN2 */
92 {0x12, 0x74, 0x75}, /* VSEN3 */
93 {0x13, 0x76, 0x77}, /* VSEN4 */
94 {0x14, 0x78, 0x79}, /* VSEN5 */
95 {0x15, 0x7a, 0x7b}, /* VSEN6 */
96 {0x16, 0x7c, 0x7d}, /* VSEN7 */
97 {0x17, 0x7e, 0x7f}, /* VSEN8 */
98 {0x18, 0x80, 0x81}, /* VSEN9 */
99 {0x19, 0x82, 0x83}, /* VSEN10 */
100 {0x1A, 0x84, 0x85}, /* VSEN11 */
101 {0x1B, 0x86, 0x87}, /* VTT */
102 {0x1C, 0x88, 0x89}, /* 3VDD */
103 {0x1D, 0x8a, 0x8b}, /* 3VSB */
104 {0x1E, 0x8c, 0x8d}, /* VBAT */
105 {0x1F, 0xa6, 0xa7}, /* VSEN12 */
106 {0x20, 0xaa, 0xab}, /* VSEN13 */
107 {0x21, 0x96, 0x97}, /* VSEN14 */
108 {0x22, 0x9a, 0x9b}, /* VSEN15 */
109 {0x23, 0x9e, 0x9f}, /* VSEN16 */
110 {0x24, 0xa2, 0xa3}, /* VSEN17 */
111 };
112 #define W83795_REG_VRLSB 0x3C
113
114 static const u8 W83795_REG_IN_HL_LSB[] = {
115 0x8e, /* VSEN1-4 */
116 0x90, /* VSEN5-8 */
117 0x92, /* VSEN9-11 */
118 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */
119 0xa8, /* VSEN12 */
120 0xac, /* VSEN13 */
121 0x98, /* VSEN14 */
122 0x9c, /* VSEN15 */
123 0xa0, /* VSEN16 */
124 0xa4, /* VSEN17 */
125 };
126
127 #define IN_LSB_REG(index, type) \
128 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
129 : (W83795_REG_IN_HL_LSB[(index)] + 1))
130
131 #define IN_LSB_SHIFT 0
132 #define IN_LSB_IDX 1
133 static const u8 IN_LSB_SHIFT_IDX[][2] = {
134 /* High/Low LSB shift, LSB No. */
135 {0x00, 0x00}, /* VSEN1 */
136 {0x02, 0x00}, /* VSEN2 */
137 {0x04, 0x00}, /* VSEN3 */
138 {0x06, 0x00}, /* VSEN4 */
139 {0x00, 0x01}, /* VSEN5 */
140 {0x02, 0x01}, /* VSEN6 */
141 {0x04, 0x01}, /* VSEN7 */
142 {0x06, 0x01}, /* VSEN8 */
143 {0x00, 0x02}, /* VSEN9 */
144 {0x02, 0x02}, /* VSEN10 */
145 {0x04, 0x02}, /* VSEN11 */
146 {0x00, 0x03}, /* VTT */
147 {0x02, 0x03}, /* 3VDD */
148 {0x04, 0x03}, /* 3VSB */
149 {0x06, 0x03}, /* VBAT */
150 {0x06, 0x04}, /* VSEN12 */
151 {0x06, 0x05}, /* VSEN13 */
152 {0x06, 0x06}, /* VSEN14 */
153 {0x06, 0x07}, /* VSEN15 */
154 {0x06, 0x08}, /* VSEN16 */
155 {0x06, 0x09}, /* VSEN17 */
156 };
157
158
159 #define W83795_REG_FAN(index) (0x2E + (index))
160 #define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index))
161 #define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2)
162 #define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
163 (((index) & 1) ? 4 : 0)
164
165 #define W83795_REG_VID_CTRL 0x6A
166
167 #define W83795_REG_ALARM(index) (0x41 + (index))
168 #define W83795_REG_BEEP(index) (0x50 + (index))
169
170 #define W83795_REG_CLR_CHASSIS 0x4D
171
172
173 #define W83795_REG_FCMS1 0x201
174 #define W83795_REG_FCMS2 0x208
175 #define W83795_REG_TFMR(index) (0x202 + (index))
176 #define W83795_REG_FOMC 0x20F
177
178 #define W83795_REG_TSS(index) (0x209 + (index))
179
180 #define PWM_OUTPUT 0
181 #define PWM_FREQ 1
182 #define PWM_START 2
183 #define PWM_NONSTOP 3
184 #define PWM_STOP_TIME 4
185 #define W83795_REG_PWM(index, nr) (0x210 + (nr) * 8 + (index))
186
187 #define W83795_REG_FTSH(index) (0x240 + (index) * 2)
188 #define W83795_REG_FTSL(index) (0x241 + (index) * 2)
189 #define W83795_REG_TFTS 0x250
190
191 #define TEMP_PWM_TTTI 0
192 #define TEMP_PWM_CTFS 1
193 #define TEMP_PWM_HCT 2
194 #define TEMP_PWM_HOT 3
195 #define W83795_REG_TTTI(index) (0x260 + (index))
196 #define W83795_REG_CTFS(index) (0x268 + (index))
197 #define W83795_REG_HT(index) (0x270 + (index))
198
199 #define SF4_TEMP 0
200 #define SF4_PWM 1
201 #define W83795_REG_SF4_TEMP(temp_num, index) \
202 (0x280 + 0x10 * (temp_num) + (index))
203 #define W83795_REG_SF4_PWM(temp_num, index) \
204 (0x288 + 0x10 * (temp_num) + (index))
205
206 #define W83795_REG_DTSC 0x301
207 #define W83795_REG_DTSE 0x302
208 #define W83795_REG_DTS(index) (0x26 + (index))
209 #define W83795_REG_PECI_TBASE(index) (0x320 + (index))
210
211 #define DTS_CRIT 0
212 #define DTS_CRIT_HYST 1
213 #define DTS_WARN 2
214 #define DTS_WARN_HYST 3
215 #define W83795_REG_DTS_EXT(index) (0xB2 + (index))
216
217 #define SETUP_PWM_DEFAULT 0
218 #define SETUP_PWM_UPTIME 1
219 #define SETUP_PWM_DOWNTIME 2
220 #define W83795_REG_SETUP_PWM(index) (0x20C + (index))
221
222 static inline u16 in_from_reg(u8 index, u16 val)
223 {
224 /* 3VDD, 3VSB and VBAT: 6 mV/bit; other inputs: 2 mV/bit */
225 if (index >= 12 && index <= 14)
226 return val * 6;
227 else
228 return val * 2;
229 }
230
231 static inline u16 in_to_reg(u8 index, u16 val)
232 {
233 if (index >= 12 && index <= 14)
234 return val / 6;
235 else
236 return val / 2;
237 }
238
239 static inline unsigned long fan_from_reg(u16 val)
240 {
241 if ((val == 0xfff) || (val == 0))
242 return 0;
243 return 1350000UL / val;
244 }
245
246 static inline u16 fan_to_reg(long rpm)
247 {
248 if (rpm <= 0)
249 return 0x0fff;
250 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
251 }
252
253 static inline unsigned long time_from_reg(u8 reg)
254 {
255 return reg * 100;
256 }
257
258 static inline u8 time_to_reg(unsigned long val)
259 {
260 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
261 }
262
263 static inline long temp_from_reg(s8 reg)
264 {
265 return reg * 1000;
266 }
267
268 static inline s8 temp_to_reg(long val, s8 min, s8 max)
269 {
270 return SENSORS_LIMIT(val / 1000, min, max);
271 }
272
273 static const u16 pwm_freq_cksel0[16] = {
274 1024, 512, 341, 256, 205, 171, 146, 128,
275 85, 64, 32, 16, 8, 4, 2, 1
276 };
277
278 static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin)
279 {
280 unsigned long base_clock;
281
282 if (reg & 0x80) {
283 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
284 return base_clock / ((reg & 0x7f) + 1);
285 } else
286 return pwm_freq_cksel0[reg & 0x0f];
287 }
288
289 static u8 pwm_freq_to_reg(unsigned long val, u16 clkin)
290 {
291 unsigned long base_clock;
292 u8 reg0, reg1;
293 unsigned long best0, best1;
294
295 /* Best fit for cksel = 0 */
296 for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) {
297 if (val > (pwm_freq_cksel0[reg0] +
298 pwm_freq_cksel0[reg0 + 1]) / 2)
299 break;
300 }
301 if (val < 375) /* cksel = 1 can't beat this */
302 return reg0;
303 best0 = pwm_freq_cksel0[reg0];
304
305 /* Best fit for cksel = 1 */
306 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
307 reg1 = SENSORS_LIMIT(DIV_ROUND_CLOSEST(base_clock, val), 1, 128);
308 best1 = base_clock / reg1;
309 reg1 = 0x80 | (reg1 - 1);
310
311 /* Choose the closest one */
312 if (abs(val - best0) > abs(val - best1))
313 return reg1;
314 else
315 return reg0;
316 }
317
318 enum chip_types {w83795g, w83795adg};
319
320 struct w83795_data {
321 struct device *hwmon_dev;
322 struct mutex update_lock;
323 unsigned long last_updated; /* In jiffies */
324 enum chip_types chip_type;
325
326 u8 bank;
327
328 u32 has_in; /* Enable monitor VIN or not */
329 u8 has_dyn_in; /* Only in2-0 can have this */
330 u16 in[21][3]; /* Register value, read/high/low */
331 u8 in_lsb[10][3]; /* LSB Register value, high/low */
332 u8 has_gain; /* has gain: in17-20 * 8 */
333
334 u16 has_fan; /* Enable fan14-1 or not */
335 u16 fan[14]; /* Register value combine */
336 u16 fan_min[14]; /* Register value combine */
337
338 u8 has_temp; /* Enable monitor temp6-1 or not */
339 s8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */
340 u8 temp_read_vrlsb[6];
341 u8 temp_mode; /* Bit vector, 0 = TR, 1 = TD */
342 u8 temp_src[3]; /* Register value */
343
344 u8 enable_dts; /* Enable PECI and SB-TSI,
345 * bit 0: =1 enable, =0 disable,
346 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */
347 u8 has_dts; /* Enable monitor DTS temp */
348 s8 dts[8]; /* Register value */
349 u8 dts_read_vrlsb[8]; /* Register value */
350 s8 dts_ext[4]; /* Register value */
351
352 u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2,
353 * no config register, only affected by chip
354 * type */
355 u8 pwm[8][5]; /* Register value, output, freq, start,
356 * non stop, stop time */
357 u16 clkin; /* CLKIN frequency in kHz */
358 u8 pwm_fcms[2]; /* Register value */
359 u8 pwm_tfmr[6]; /* Register value */
360 u8 pwm_fomc; /* Register value */
361
362 u16 target_speed[8]; /* Register value, target speed for speed
363 * cruise */
364 u8 tol_speed; /* tolerance of target speed */
365 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */
366 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */
367
368 u8 setup_pwm[3]; /* Register value */
369
370 u8 alarms[6]; /* Register value */
371 u8 beeps[6]; /* Register value */
372
373 char valid;
374 };
375
376 /*
377 * Hardware access
378 * We assume that nobdody can change the bank outside the driver.
379 */
380
381 /* Must be called with data->update_lock held, except during initialization */
382 static int w83795_set_bank(struct i2c_client *client, u8 bank)
383 {
384 struct w83795_data *data = i2c_get_clientdata(client);
385 int err;
386
387 /* If the same bank is already set, nothing to do */
388 if ((data->bank & 0x07) == bank)
389 return 0;
390
391 /* Change to new bank, preserve all other bits */
392 bank |= data->bank & ~0x07;
393 err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank);
394 if (err < 0) {
395 dev_err(&client->dev,
396 "Failed to set bank to %d, err %d\n",
397 (int)bank, err);
398 return err;
399 }
400 data->bank = bank;
401
402 return 0;
403 }
404
405 /* Must be called with data->update_lock held, except during initialization */
406 static u8 w83795_read(struct i2c_client *client, u16 reg)
407 {
408 int err;
409
410 err = w83795_set_bank(client, reg >> 8);
411 if (err < 0)
412 return 0x00; /* Arbitrary */
413
414 err = i2c_smbus_read_byte_data(client, reg & 0xff);
415 if (err < 0) {
416 dev_err(&client->dev,
417 "Failed to read from register 0x%03x, err %d\n",
418 (int)reg, err);
419 return 0x00; /* Arbitrary */
420 }
421 return err;
422 }
423
424 /* Must be called with data->update_lock held, except during initialization */
425 static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
426 {
427 int err;
428
429 err = w83795_set_bank(client, reg >> 8);
430 if (err < 0)
431 return err;
432
433 err = i2c_smbus_write_byte_data(client, reg & 0xff, value);
434 if (err < 0)
435 dev_err(&client->dev,
436 "Failed to write to register 0x%03x, err %d\n",
437 (int)reg, err);
438 return err;
439 }
440
441 static struct w83795_data *w83795_update_device(struct device *dev)
442 {
443 struct i2c_client *client = to_i2c_client(dev);
444 struct w83795_data *data = i2c_get_clientdata(client);
445 u16 tmp;
446 int i;
447
448 mutex_lock(&data->update_lock);
449
450 if (!(time_after(jiffies, data->last_updated + HZ * 2)
451 || !data->valid))
452 goto END;
453
454 /* Update the voltages value */
455 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
456 if (!(data->has_in & (1 << i)))
457 continue;
458 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
459 tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6;
460 data->in[i][IN_READ] = tmp;
461 }
462
463 /* in0-2 can have dynamic limits (W83795G only) */
464 if (data->has_dyn_in) {
465 u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX));
466 u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW));
467
468 for (i = 0; i < 3; i++) {
469 if (!(data->has_dyn_in & (1 << i)))
470 continue;
471 data->in[i][IN_MAX] =
472 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
473 data->in[i][IN_LOW] =
474 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
475 data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03;
476 data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03;
477 }
478 }
479
480 /* Update fan */
481 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
482 if (!(data->has_fan & (1 << i)))
483 continue;
484 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
485 data->fan[i] |=
486 (w83795_read(client, W83795_REG_VRLSB) >> 4) & 0x0F;
487 }
488
489 /* Update temperature */
490 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
491 data->temp[i][TEMP_READ] =
492 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
493 data->temp_read_vrlsb[i] =
494 w83795_read(client, W83795_REG_VRLSB);
495 }
496
497 /* Update dts temperature */
498 if (data->enable_dts != 0) {
499 for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
500 if (!(data->has_dts & (1 << i)))
501 continue;
502 data->dts[i] =
503 w83795_read(client, W83795_REG_DTS(i));
504 data->dts_read_vrlsb[i] =
505 w83795_read(client, W83795_REG_VRLSB);
506 }
507 }
508
509 /* Update pwm output */
510 for (i = 0; i < data->has_pwm; i++) {
511 data->pwm[i][PWM_OUTPUT] =
512 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
513 }
514
515 /* update alarm */
516 for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
517 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
518
519 data->last_updated = jiffies;
520 data->valid = 1;
521
522 END:
523 mutex_unlock(&data->update_lock);
524 return data;
525 }
526
527 /*
528 * Sysfs attributes
529 */
530
531 #define ALARM_STATUS 0
532 #define BEEP_ENABLE 1
533 static ssize_t
534 show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
535 {
536 struct w83795_data *data = w83795_update_device(dev);
537 struct sensor_device_attribute_2 *sensor_attr =
538 to_sensor_dev_attr_2(attr);
539 int nr = sensor_attr->nr;
540 int index = sensor_attr->index >> 3;
541 int bit = sensor_attr->index & 0x07;
542 u8 val;
543
544 if (ALARM_STATUS == nr) {
545 val = (data->alarms[index] >> (bit)) & 1;
546 } else { /* BEEP_ENABLE */
547 val = (data->beeps[index] >> (bit)) & 1;
548 }
549
550 return sprintf(buf, "%u\n", val);
551 }
552
553 static ssize_t
554 store_beep(struct device *dev, struct device_attribute *attr,
555 const char *buf, size_t count)
556 {
557 struct i2c_client *client = to_i2c_client(dev);
558 struct w83795_data *data = i2c_get_clientdata(client);
559 struct sensor_device_attribute_2 *sensor_attr =
560 to_sensor_dev_attr_2(attr);
561 int index = sensor_attr->index >> 3;
562 int shift = sensor_attr->index & 0x07;
563 u8 beep_bit = 1 << shift;
564 unsigned long val;
565
566 if (strict_strtoul(buf, 10, &val) < 0)
567 return -EINVAL;
568 if (val != 0 && val != 1)
569 return -EINVAL;
570
571 mutex_lock(&data->update_lock);
572 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
573 data->beeps[index] &= ~beep_bit;
574 data->beeps[index] |= val << shift;
575 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
576 mutex_unlock(&data->update_lock);
577
578 return count;
579 }
580
581 /* Write any value to clear chassis alarm */
582 static ssize_t
583 store_chassis_clear(struct device *dev,
584 struct device_attribute *attr, const char *buf,
585 size_t count)
586 {
587 struct i2c_client *client = to_i2c_client(dev);
588 struct w83795_data *data = i2c_get_clientdata(client);
589 u8 val;
590
591 mutex_lock(&data->update_lock);
592 val = w83795_read(client, W83795_REG_CLR_CHASSIS);
593 val |= 0x80;
594 w83795_write(client, W83795_REG_CLR_CHASSIS, val);
595 mutex_unlock(&data->update_lock);
596 return count;
597 }
598
599 #define FAN_INPUT 0
600 #define FAN_MIN 1
601 static ssize_t
602 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
603 {
604 struct sensor_device_attribute_2 *sensor_attr =
605 to_sensor_dev_attr_2(attr);
606 int nr = sensor_attr->nr;
607 int index = sensor_attr->index;
608 struct w83795_data *data = w83795_update_device(dev);
609 u16 val;
610
611 if (FAN_INPUT == nr)
612 val = data->fan[index] & 0x0fff;
613 else
614 val = data->fan_min[index] & 0x0fff;
615
616 return sprintf(buf, "%lu\n", fan_from_reg(val));
617 }
618
619 static ssize_t
620 store_fan_min(struct device *dev, struct device_attribute *attr,
621 const char *buf, size_t count)
622 {
623 struct sensor_device_attribute_2 *sensor_attr =
624 to_sensor_dev_attr_2(attr);
625 int index = sensor_attr->index;
626 struct i2c_client *client = to_i2c_client(dev);
627 struct w83795_data *data = i2c_get_clientdata(client);
628 unsigned long val;
629
630 if (strict_strtoul(buf, 10, &val))
631 return -EINVAL;
632 val = fan_to_reg(val);
633
634 mutex_lock(&data->update_lock);
635 data->fan_min[index] = val;
636 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
637 val &= 0x0f;
638 if (index & 1) {
639 val <<= 4;
640 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
641 & 0x0f;
642 } else {
643 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
644 & 0xf0;
645 }
646 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
647 mutex_unlock(&data->update_lock);
648
649 return count;
650 }
651
652 static ssize_t
653 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
654 {
655 struct w83795_data *data = w83795_update_device(dev);
656 struct sensor_device_attribute_2 *sensor_attr =
657 to_sensor_dev_attr_2(attr);
658 int nr = sensor_attr->nr;
659 int index = sensor_attr->index;
660 unsigned int val;
661
662 switch (nr) {
663 case PWM_STOP_TIME:
664 val = time_from_reg(data->pwm[index][nr]);
665 break;
666 case PWM_FREQ:
667 val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin);
668 break;
669 default:
670 val = data->pwm[index][nr];
671 break;
672 }
673
674 return sprintf(buf, "%u\n", val);
675 }
676
677 static ssize_t
678 store_pwm(struct device *dev, struct device_attribute *attr,
679 const char *buf, size_t count)
680 {
681 struct i2c_client *client = to_i2c_client(dev);
682 struct w83795_data *data = i2c_get_clientdata(client);
683 struct sensor_device_attribute_2 *sensor_attr =
684 to_sensor_dev_attr_2(attr);
685 int nr = sensor_attr->nr;
686 int index = sensor_attr->index;
687 unsigned long val;
688
689 if (strict_strtoul(buf, 10, &val) < 0)
690 return -EINVAL;
691
692 mutex_lock(&data->update_lock);
693 switch (nr) {
694 case PWM_STOP_TIME:
695 val = time_to_reg(val);
696 break;
697 case PWM_FREQ:
698 val = pwm_freq_to_reg(val, data->clkin);
699 break;
700 default:
701 val = SENSORS_LIMIT(val, 0, 0xff);
702 break;
703 }
704 w83795_write(client, W83795_REG_PWM(index, nr), val);
705 data->pwm[index][nr] = val;
706 mutex_unlock(&data->update_lock);
707 return count;
708 }
709
710 static ssize_t
711 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
712 {
713 struct sensor_device_attribute_2 *sensor_attr =
714 to_sensor_dev_attr_2(attr);
715 struct i2c_client *client = to_i2c_client(dev);
716 struct w83795_data *data = i2c_get_clientdata(client);
717 int index = sensor_attr->index;
718 u8 tmp;
719
720 if (1 == (data->pwm_fcms[0] & (1 << index))) {
721 tmp = 2;
722 goto out;
723 }
724 for (tmp = 0; tmp < 6; tmp++) {
725 if (data->pwm_tfmr[tmp] & (1 << index)) {
726 tmp = 3;
727 goto out;
728 }
729 }
730 if (data->pwm_fomc & (1 << index))
731 tmp = 0;
732 else
733 tmp = 1;
734
735 out:
736 return sprintf(buf, "%u\n", tmp);
737 }
738
739 static ssize_t
740 store_pwm_enable(struct device *dev, struct device_attribute *attr,
741 const char *buf, size_t count)
742 {
743 struct i2c_client *client = to_i2c_client(dev);
744 struct w83795_data *data = i2c_get_clientdata(client);
745 struct sensor_device_attribute_2 *sensor_attr =
746 to_sensor_dev_attr_2(attr);
747 int index = sensor_attr->index;
748 unsigned long val;
749 int i;
750
751 if (strict_strtoul(buf, 10, &val) < 0)
752 return -EINVAL;
753 if (val > 2)
754 return -EINVAL;
755
756 mutex_lock(&data->update_lock);
757 switch (val) {
758 case 0:
759 case 1:
760 data->pwm_fcms[0] &= ~(1 << index);
761 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
762 for (i = 0; i < 6; i++) {
763 data->pwm_tfmr[i] &= ~(1 << index);
764 w83795_write(client, W83795_REG_TFMR(i),
765 data->pwm_tfmr[i]);
766 }
767 data->pwm_fomc |= 1 << index;
768 data->pwm_fomc ^= val << index;
769 w83795_write(client, W83795_REG_FOMC, data->pwm_fomc);
770 break;
771 case 2:
772 data->pwm_fcms[0] |= (1 << index);
773 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
774 break;
775 }
776 mutex_unlock(&data->update_lock);
777 return count;
778 }
779
780 static ssize_t
781 show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
782 {
783 struct sensor_device_attribute_2 *sensor_attr =
784 to_sensor_dev_attr_2(attr);
785 struct i2c_client *client = to_i2c_client(dev);
786 struct w83795_data *data = i2c_get_clientdata(client);
787 int index = sensor_attr->index;
788 u8 val = index / 2;
789 u8 tmp = data->temp_src[val];
790
791 if (index & 1)
792 val = 4;
793 else
794 val = 0;
795 tmp >>= val;
796 tmp &= 0x0f;
797
798 return sprintf(buf, "%u\n", tmp);
799 }
800
801 static ssize_t
802 store_temp_src(struct device *dev, struct device_attribute *attr,
803 const char *buf, size_t count)
804 {
805 struct i2c_client *client = to_i2c_client(dev);
806 struct w83795_data *data = i2c_get_clientdata(client);
807 struct sensor_device_attribute_2 *sensor_attr =
808 to_sensor_dev_attr_2(attr);
809 int index = sensor_attr->index;
810 unsigned long tmp;
811 u8 val = index / 2;
812
813 if (strict_strtoul(buf, 10, &tmp) < 0)
814 return -EINVAL;
815 tmp = SENSORS_LIMIT(tmp, 0, 15);
816
817 mutex_lock(&data->update_lock);
818 if (index & 1) {
819 tmp <<= 4;
820 data->temp_src[val] &= 0x0f;
821 } else {
822 data->temp_src[val] &= 0xf0;
823 }
824 data->temp_src[val] |= tmp;
825 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
826 mutex_unlock(&data->update_lock);
827
828 return count;
829 }
830
831 #define TEMP_PWM_ENABLE 0
832 #define TEMP_PWM_FAN_MAP 1
833 static ssize_t
834 show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
835 char *buf)
836 {
837 struct i2c_client *client = to_i2c_client(dev);
838 struct w83795_data *data = i2c_get_clientdata(client);
839 struct sensor_device_attribute_2 *sensor_attr =
840 to_sensor_dev_attr_2(attr);
841 int nr = sensor_attr->nr;
842 int index = sensor_attr->index;
843 u8 tmp = 0xff;
844
845 switch (nr) {
846 case TEMP_PWM_ENABLE:
847 tmp = (data->pwm_fcms[1] >> index) & 1;
848 if (tmp)
849 tmp = 4;
850 else
851 tmp = 3;
852 break;
853 case TEMP_PWM_FAN_MAP:
854 tmp = data->pwm_tfmr[index];
855 break;
856 }
857
858 return sprintf(buf, "%u\n", tmp);
859 }
860
861 static ssize_t
862 store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
863 const char *buf, size_t count)
864 {
865 struct i2c_client *client = to_i2c_client(dev);
866 struct w83795_data *data = i2c_get_clientdata(client);
867 struct sensor_device_attribute_2 *sensor_attr =
868 to_sensor_dev_attr_2(attr);
869 int nr = sensor_attr->nr;
870 int index = sensor_attr->index;
871 unsigned long tmp;
872
873 if (strict_strtoul(buf, 10, &tmp) < 0)
874 return -EINVAL;
875
876 switch (nr) {
877 case TEMP_PWM_ENABLE:
878 if ((tmp != 3) && (tmp != 4))
879 return -EINVAL;
880 tmp -= 3;
881 mutex_lock(&data->update_lock);
882 data->pwm_fcms[1] &= ~(1 << index);
883 data->pwm_fcms[1] |= tmp << index;
884 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
885 mutex_unlock(&data->update_lock);
886 break;
887 case TEMP_PWM_FAN_MAP:
888 mutex_lock(&data->update_lock);
889 tmp = SENSORS_LIMIT(tmp, 0, 0xff);
890 w83795_write(client, W83795_REG_TFMR(index), tmp);
891 data->pwm_tfmr[index] = tmp;
892 mutex_unlock(&data->update_lock);
893 break;
894 }
895 return count;
896 }
897
898 #define FANIN_TARGET 0
899 #define FANIN_TOL 1
900 static ssize_t
901 show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
902 {
903 struct i2c_client *client = to_i2c_client(dev);
904 struct w83795_data *data = i2c_get_clientdata(client);
905 struct sensor_device_attribute_2 *sensor_attr =
906 to_sensor_dev_attr_2(attr);
907 int nr = sensor_attr->nr;
908 int index = sensor_attr->index;
909 u16 tmp = 0;
910
911 switch (nr) {
912 case FANIN_TARGET:
913 tmp = fan_from_reg(data->target_speed[index]);
914 break;
915 case FANIN_TOL:
916 tmp = data->tol_speed;
917 break;
918 }
919
920 return sprintf(buf, "%u\n", tmp);
921 }
922
923 static ssize_t
924 store_fanin(struct device *dev, struct device_attribute *attr,
925 const char *buf, size_t count)
926 {
927 struct i2c_client *client = to_i2c_client(dev);
928 struct w83795_data *data = i2c_get_clientdata(client);
929 struct sensor_device_attribute_2 *sensor_attr =
930 to_sensor_dev_attr_2(attr);
931 int nr = sensor_attr->nr;
932 int index = sensor_attr->index;
933 unsigned long val;
934
935 if (strict_strtoul(buf, 10, &val) < 0)
936 return -EINVAL;
937
938 mutex_lock(&data->update_lock);
939 switch (nr) {
940 case FANIN_TARGET:
941 val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff));
942 w83795_write(client, W83795_REG_FTSH(index), (val >> 4) & 0xff);
943 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
944 data->target_speed[index] = val;
945 break;
946 case FANIN_TOL:
947 val = SENSORS_LIMIT(val, 0, 0x3f);
948 w83795_write(client, W83795_REG_TFTS, val);
949 data->tol_speed = val;
950 break;
951 }
952 mutex_unlock(&data->update_lock);
953
954 return count;
955 }
956
957
958 static ssize_t
959 show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
960 {
961 struct i2c_client *client = to_i2c_client(dev);
962 struct w83795_data *data = i2c_get_clientdata(client);
963 struct sensor_device_attribute_2 *sensor_attr =
964 to_sensor_dev_attr_2(attr);
965 int nr = sensor_attr->nr;
966 int index = sensor_attr->index;
967 long tmp = temp_from_reg(data->pwm_temp[index][nr]);
968
969 return sprintf(buf, "%ld\n", tmp);
970 }
971
972 static ssize_t
973 store_temp_pwm(struct device *dev, struct device_attribute *attr,
974 const char *buf, size_t count)
975 {
976 struct i2c_client *client = to_i2c_client(dev);
977 struct w83795_data *data = i2c_get_clientdata(client);
978 struct sensor_device_attribute_2 *sensor_attr =
979 to_sensor_dev_attr_2(attr);
980 int nr = sensor_attr->nr;
981 int index = sensor_attr->index;
982 unsigned long val;
983 u8 tmp;
984
985 if (strict_strtoul(buf, 10, &val) < 0)
986 return -EINVAL;
987 val /= 1000;
988
989 mutex_lock(&data->update_lock);
990 switch (nr) {
991 case TEMP_PWM_TTTI:
992 val = SENSORS_LIMIT(val, 0, 0x7f);
993 w83795_write(client, W83795_REG_TTTI(index), val);
994 break;
995 case TEMP_PWM_CTFS:
996 val = SENSORS_LIMIT(val, 0, 0x7f);
997 w83795_write(client, W83795_REG_CTFS(index), val);
998 break;
999 case TEMP_PWM_HCT:
1000 val = SENSORS_LIMIT(val, 0, 0x0f);
1001 tmp = w83795_read(client, W83795_REG_HT(index));
1002 tmp &= 0x0f;
1003 tmp |= (val << 4) & 0xf0;
1004 w83795_write(client, W83795_REG_HT(index), tmp);
1005 break;
1006 case TEMP_PWM_HOT:
1007 val = SENSORS_LIMIT(val, 0, 0x0f);
1008 tmp = w83795_read(client, W83795_REG_HT(index));
1009 tmp &= 0xf0;
1010 tmp |= val & 0x0f;
1011 w83795_write(client, W83795_REG_HT(index), tmp);
1012 break;
1013 }
1014 data->pwm_temp[index][nr] = val;
1015 mutex_unlock(&data->update_lock);
1016
1017 return count;
1018 }
1019
1020 static ssize_t
1021 show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1022 {
1023 struct i2c_client *client = to_i2c_client(dev);
1024 struct w83795_data *data = i2c_get_clientdata(client);
1025 struct sensor_device_attribute_2 *sensor_attr =
1026 to_sensor_dev_attr_2(attr);
1027 int nr = sensor_attr->nr;
1028 int index = sensor_attr->index;
1029
1030 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
1031 }
1032
1033 static ssize_t
1034 store_sf4_pwm(struct device *dev, struct device_attribute *attr,
1035 const char *buf, size_t count)
1036 {
1037 struct i2c_client *client = to_i2c_client(dev);
1038 struct w83795_data *data = i2c_get_clientdata(client);
1039 struct sensor_device_attribute_2 *sensor_attr =
1040 to_sensor_dev_attr_2(attr);
1041 int nr = sensor_attr->nr;
1042 int index = sensor_attr->index;
1043 unsigned long val;
1044
1045 if (strict_strtoul(buf, 10, &val) < 0)
1046 return -EINVAL;
1047
1048 mutex_lock(&data->update_lock);
1049 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
1050 data->sf4_reg[index][SF4_PWM][nr] = val;
1051 mutex_unlock(&data->update_lock);
1052
1053 return count;
1054 }
1055
1056 static ssize_t
1057 show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
1058 {
1059 struct i2c_client *client = to_i2c_client(dev);
1060 struct w83795_data *data = i2c_get_clientdata(client);
1061 struct sensor_device_attribute_2 *sensor_attr =
1062 to_sensor_dev_attr_2(attr);
1063 int nr = sensor_attr->nr;
1064 int index = sensor_attr->index;
1065
1066 return sprintf(buf, "%u\n",
1067 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
1068 }
1069
1070 static ssize_t
1071 store_sf4_temp(struct device *dev, struct device_attribute *attr,
1072 const char *buf, size_t count)
1073 {
1074 struct i2c_client *client = to_i2c_client(dev);
1075 struct w83795_data *data = i2c_get_clientdata(client);
1076 struct sensor_device_attribute_2 *sensor_attr =
1077 to_sensor_dev_attr_2(attr);
1078 int nr = sensor_attr->nr;
1079 int index = sensor_attr->index;
1080 unsigned long val;
1081
1082 if (strict_strtoul(buf, 10, &val) < 0)
1083 return -EINVAL;
1084 val /= 1000;
1085
1086 mutex_lock(&data->update_lock);
1087 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
1088 data->sf4_reg[index][SF4_TEMP][nr] = val;
1089 mutex_unlock(&data->update_lock);
1090
1091 return count;
1092 }
1093
1094
1095 static ssize_t
1096 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1097 {
1098 struct sensor_device_attribute_2 *sensor_attr =
1099 to_sensor_dev_attr_2(attr);
1100 int nr = sensor_attr->nr;
1101 int index = sensor_attr->index;
1102 struct w83795_data *data = w83795_update_device(dev);
1103 long temp = temp_from_reg(data->temp[index][nr]);
1104
1105 if (TEMP_READ == nr)
1106 temp += (data->temp_read_vrlsb[index] >> 6) * 250;
1107 return sprintf(buf, "%ld\n", temp);
1108 }
1109
1110 static ssize_t
1111 store_temp(struct device *dev, struct device_attribute *attr,
1112 const char *buf, size_t count)
1113 {
1114 struct sensor_device_attribute_2 *sensor_attr =
1115 to_sensor_dev_attr_2(attr);
1116 int nr = sensor_attr->nr;
1117 int index = sensor_attr->index;
1118 struct i2c_client *client = to_i2c_client(dev);
1119 struct w83795_data *data = i2c_get_clientdata(client);
1120 long tmp;
1121
1122 if (strict_strtol(buf, 10, &tmp) < 0)
1123 return -EINVAL;
1124
1125 mutex_lock(&data->update_lock);
1126 data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
1127 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
1128 mutex_unlock(&data->update_lock);
1129 return count;
1130 }
1131
1132
1133 static ssize_t
1134 show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
1135 {
1136 struct i2c_client *client = to_i2c_client(dev);
1137 struct w83795_data *data = i2c_get_clientdata(client);
1138 int tmp;
1139
1140 if (data->enable_dts & 2)
1141 tmp = 5;
1142 else
1143 tmp = 6;
1144
1145 return sprintf(buf, "%d\n", tmp);
1146 }
1147
1148 static ssize_t
1149 show_dts(struct device *dev, struct device_attribute *attr, char *buf)
1150 {
1151 struct sensor_device_attribute_2 *sensor_attr =
1152 to_sensor_dev_attr_2(attr);
1153 int index = sensor_attr->index;
1154 struct w83795_data *data = w83795_update_device(dev);
1155 long temp = temp_from_reg(data->dts[index]);
1156
1157 temp += (data->dts_read_vrlsb[index] >> 6) * 250;
1158 return sprintf(buf, "%ld\n", temp);
1159 }
1160
1161 static ssize_t
1162 show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
1163 {
1164 struct sensor_device_attribute_2 *sensor_attr =
1165 to_sensor_dev_attr_2(attr);
1166 int nr = sensor_attr->nr;
1167 struct i2c_client *client = to_i2c_client(dev);
1168 struct w83795_data *data = i2c_get_clientdata(client);
1169 long temp = temp_from_reg(data->dts_ext[nr]);
1170
1171 return sprintf(buf, "%ld\n", temp);
1172 }
1173
1174 static ssize_t
1175 store_dts_ext(struct device *dev, struct device_attribute *attr,
1176 const char *buf, size_t count)
1177 {
1178 struct sensor_device_attribute_2 *sensor_attr =
1179 to_sensor_dev_attr_2(attr);
1180 int nr = sensor_attr->nr;
1181 struct i2c_client *client = to_i2c_client(dev);
1182 struct w83795_data *data = i2c_get_clientdata(client);
1183 long tmp;
1184
1185 if (strict_strtol(buf, 10, &tmp) < 0)
1186 return -EINVAL;
1187
1188 mutex_lock(&data->update_lock);
1189 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
1190 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
1191 mutex_unlock(&data->update_lock);
1192 return count;
1193 }
1194
1195
1196 static ssize_t
1197 show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
1198 {
1199 struct i2c_client *client = to_i2c_client(dev);
1200 struct w83795_data *data = i2c_get_clientdata(client);
1201 struct sensor_device_attribute_2 *sensor_attr =
1202 to_sensor_dev_attr_2(attr);
1203 int index = sensor_attr->index;
1204 int tmp;
1205
1206 if (data->temp_mode & (1 << index))
1207 tmp = 3; /* Thermal diode */
1208 else
1209 tmp = 4; /* Thermistor */
1210
1211 return sprintf(buf, "%d\n", tmp);
1212 }
1213
1214 /* Only for temp1-4 (temp5-6 can only be thermistor) */
1215 static ssize_t
1216 store_temp_mode(struct device *dev, struct device_attribute *attr,
1217 const char *buf, size_t count)
1218 {
1219 struct i2c_client *client = to_i2c_client(dev);
1220 struct w83795_data *data = i2c_get_clientdata(client);
1221 struct sensor_device_attribute_2 *sensor_attr =
1222 to_sensor_dev_attr_2(attr);
1223 int index = sensor_attr->index;
1224 int reg_shift;
1225 unsigned long val;
1226 u8 tmp;
1227
1228 if (strict_strtoul(buf, 10, &val) < 0)
1229 return -EINVAL;
1230 if ((val != 4) && (val != 3))
1231 return -EINVAL;
1232
1233 mutex_lock(&data->update_lock);
1234 if (val == 3) {
1235 /* Thermal diode */
1236 val = 0x01;
1237 data->temp_mode |= 1 << index;
1238 } else if (val == 4) {
1239 /* Thermistor */
1240 val = 0x03;
1241 data->temp_mode &= ~(1 << index);
1242 }
1243
1244 reg_shift = 2 * index;
1245 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1246 tmp &= ~(0x03 << reg_shift);
1247 tmp |= val << reg_shift;
1248 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
1249
1250 mutex_unlock(&data->update_lock);
1251 return count;
1252 }
1253
1254
1255 /* show/store VIN */
1256 static ssize_t
1257 show_in(struct device *dev, struct device_attribute *attr, char *buf)
1258 {
1259 struct sensor_device_attribute_2 *sensor_attr =
1260 to_sensor_dev_attr_2(attr);
1261 int nr = sensor_attr->nr;
1262 int index = sensor_attr->index;
1263 struct w83795_data *data = w83795_update_device(dev);
1264 u16 val = data->in[index][nr];
1265 u8 lsb_idx;
1266
1267 switch (nr) {
1268 case IN_READ:
1269 /* calculate this value again by sensors as sensors3.conf */
1270 if ((index >= 17) &&
1271 !((data->has_gain >> (index - 17)) & 1))
1272 val *= 8;
1273 break;
1274 case IN_MAX:
1275 case IN_LOW:
1276 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1277 val <<= 2;
1278 val |= (data->in_lsb[lsb_idx][nr] >>
1279 IN_LSB_SHIFT_IDX[lsb_idx][IN_LSB_SHIFT]) & 0x03;
1280 if ((index >= 17) &&
1281 !((data->has_gain >> (index - 17)) & 1))
1282 val *= 8;
1283 break;
1284 }
1285 val = in_from_reg(index, val);
1286
1287 return sprintf(buf, "%d\n", val);
1288 }
1289
1290 static ssize_t
1291 store_in(struct device *dev, struct device_attribute *attr,
1292 const char *buf, size_t count)
1293 {
1294 struct sensor_device_attribute_2 *sensor_attr =
1295 to_sensor_dev_attr_2(attr);
1296 int nr = sensor_attr->nr;
1297 int index = sensor_attr->index;
1298 struct i2c_client *client = to_i2c_client(dev);
1299 struct w83795_data *data = i2c_get_clientdata(client);
1300 unsigned long val;
1301 u8 tmp;
1302 u8 lsb_idx;
1303
1304 if (strict_strtoul(buf, 10, &val) < 0)
1305 return -EINVAL;
1306 val = in_to_reg(index, val);
1307
1308 if ((index >= 17) &&
1309 !((data->has_gain >> (index - 17)) & 1))
1310 val /= 8;
1311 val = SENSORS_LIMIT(val, 0, 0x3FF);
1312 mutex_lock(&data->update_lock);
1313
1314 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1315 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
1316 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
1317 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
1318 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
1319 data->in_lsb[lsb_idx][nr] = tmp;
1320
1321 tmp = (val >> 2) & 0xff;
1322 w83795_write(client, W83795_REG_IN[index][nr], tmp);
1323 data->in[index][nr] = tmp;
1324
1325 mutex_unlock(&data->update_lock);
1326 return count;
1327 }
1328
1329
1330 static ssize_t
1331 show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
1332 {
1333 struct sensor_device_attribute_2 *sensor_attr =
1334 to_sensor_dev_attr_2(attr);
1335 int nr = sensor_attr->nr;
1336 struct i2c_client *client = to_i2c_client(dev);
1337 struct w83795_data *data = i2c_get_clientdata(client);
1338 u16 val = data->setup_pwm[nr];
1339
1340 switch (nr) {
1341 case SETUP_PWM_UPTIME:
1342 case SETUP_PWM_DOWNTIME:
1343 val = time_from_reg(val);
1344 break;
1345 }
1346
1347 return sprintf(buf, "%d\n", val);
1348 }
1349
1350 static ssize_t
1351 store_sf_setup(struct device *dev, struct device_attribute *attr,
1352 const char *buf, size_t count)
1353 {
1354 struct sensor_device_attribute_2 *sensor_attr =
1355 to_sensor_dev_attr_2(attr);
1356 int nr = sensor_attr->nr;
1357 struct i2c_client *client = to_i2c_client(dev);
1358 struct w83795_data *data = i2c_get_clientdata(client);
1359 unsigned long val;
1360
1361 if (strict_strtoul(buf, 10, &val) < 0)
1362 return -EINVAL;
1363
1364 switch (nr) {
1365 case SETUP_PWM_DEFAULT:
1366 val = SENSORS_LIMIT(val, 0, 0xff);
1367 break;
1368 case SETUP_PWM_UPTIME:
1369 case SETUP_PWM_DOWNTIME:
1370 val = time_to_reg(val);
1371 if (val == 0)
1372 return -EINVAL;
1373 break;
1374 }
1375
1376 mutex_lock(&data->update_lock);
1377 data->setup_pwm[nr] = val;
1378 w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
1379 mutex_unlock(&data->update_lock);
1380 return count;
1381 }
1382
1383
1384 #define NOT_USED -1
1385
1386 /* Don't change the attribute order, _max and _min are accessed by index
1387 * somewhere else in the code */
1388 #define SENSOR_ATTR_IN(index) { \
1389 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
1390 IN_READ, index), \
1391 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
1392 store_in, IN_MAX, index), \
1393 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
1394 store_in, IN_LOW, index), \
1395 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
1396 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
1397 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
1398 show_alarm_beep, store_beep, BEEP_ENABLE, \
1399 index + ((index > 14) ? 1 : 0)) }
1400
1401 #define SENSOR_ATTR_FAN(index) { \
1402 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
1403 NULL, FAN_INPUT, index - 1), \
1404 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
1405 show_fan, store_fan_min, FAN_MIN, index - 1), \
1406 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
1407 NULL, ALARM_STATUS, index + 31), \
1408 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
1409 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) }
1410
1411 #define SENSOR_ATTR_PWM(index) { \
1412 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
1413 store_pwm, PWM_OUTPUT, index - 1), \
1414 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
1415 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
1416 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
1417 show_pwm, store_pwm, PWM_START, index - 1), \
1418 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
1419 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \
1420 SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \
1421 show_pwm, store_pwm, PWM_FREQ, index - 1), \
1422 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \
1423 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \
1424 SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \
1425 show_fanin, store_fanin, FANIN_TARGET, index - 1) }
1426
1427 #define SENSOR_ATTR_DTS(index) { \
1428 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \
1429 show_dts_mode, NULL, NOT_USED, index - 7), \
1430 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \
1431 NULL, NOT_USED, index - 7), \
1432 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \
1433 store_dts_ext, DTS_CRIT, NOT_USED), \
1434 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
1435 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \
1436 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
1437 store_dts_ext, DTS_WARN, NOT_USED), \
1438 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
1439 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \
1440 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1441 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \
1442 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1443 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) }
1444
1445 #define SENSOR_ATTR_TEMP(index) { \
1446 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | (index < 4 ? S_IWUSR : 0), \
1447 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
1448 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
1449 NULL, TEMP_READ, index - 1), \
1450 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \
1451 store_temp, TEMP_CRIT, index - 1), \
1452 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
1453 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
1454 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
1455 store_temp, TEMP_WARN, index - 1), \
1456 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
1457 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1458 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1459 show_alarm_beep, NULL, ALARM_STATUS, \
1460 index + (index > 4 ? 11 : 17)), \
1461 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1462 show_alarm_beep, store_beep, BEEP_ENABLE, \
1463 index + (index > 4 ? 11 : 17)), \
1464 SENSOR_ATTR_2(temp##index##_source_sel, S_IWUSR | S_IRUGO, \
1465 show_temp_src, store_temp_src, NOT_USED, index - 1), \
1466 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1467 show_temp_pwm_enable, store_temp_pwm_enable, \
1468 TEMP_PWM_ENABLE, index - 1), \
1469 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
1470 show_temp_pwm_enable, store_temp_pwm_enable, \
1471 TEMP_PWM_FAN_MAP, index - 1), \
1472 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \
1473 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
1474 SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \
1475 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
1476 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \
1477 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
1478 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \
1479 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
1480 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1481 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \
1482 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1483 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \
1484 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1485 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \
1486 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1487 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \
1488 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1489 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \
1490 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1491 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \
1492 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1493 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \
1494 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1495 show_sf4_temp, store_sf4_temp, 0, index - 1), \
1496 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1497 show_sf4_temp, store_sf4_temp, 1, index - 1), \
1498 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1499 show_sf4_temp, store_sf4_temp, 2, index - 1), \
1500 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1501 show_sf4_temp, store_sf4_temp, 3, index - 1), \
1502 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1503 show_sf4_temp, store_sf4_temp, 4, index - 1), \
1504 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1505 show_sf4_temp, store_sf4_temp, 5, index - 1), \
1506 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
1507 show_sf4_temp, store_sf4_temp, 6, index - 1) }
1508
1509
1510 static struct sensor_device_attribute_2 w83795_in[][5] = {
1511 SENSOR_ATTR_IN(0),
1512 SENSOR_ATTR_IN(1),
1513 SENSOR_ATTR_IN(2),
1514 SENSOR_ATTR_IN(3),
1515 SENSOR_ATTR_IN(4),
1516 SENSOR_ATTR_IN(5),
1517 SENSOR_ATTR_IN(6),
1518 SENSOR_ATTR_IN(7),
1519 SENSOR_ATTR_IN(8),
1520 SENSOR_ATTR_IN(9),
1521 SENSOR_ATTR_IN(10),
1522 SENSOR_ATTR_IN(11),
1523 SENSOR_ATTR_IN(12),
1524 SENSOR_ATTR_IN(13),
1525 SENSOR_ATTR_IN(14),
1526 SENSOR_ATTR_IN(15),
1527 SENSOR_ATTR_IN(16),
1528 SENSOR_ATTR_IN(17),
1529 SENSOR_ATTR_IN(18),
1530 SENSOR_ATTR_IN(19),
1531 SENSOR_ATTR_IN(20),
1532 };
1533
1534 static const struct sensor_device_attribute_2 w83795_fan[][4] = {
1535 SENSOR_ATTR_FAN(1),
1536 SENSOR_ATTR_FAN(2),
1537 SENSOR_ATTR_FAN(3),
1538 SENSOR_ATTR_FAN(4),
1539 SENSOR_ATTR_FAN(5),
1540 SENSOR_ATTR_FAN(6),
1541 SENSOR_ATTR_FAN(7),
1542 SENSOR_ATTR_FAN(8),
1543 SENSOR_ATTR_FAN(9),
1544 SENSOR_ATTR_FAN(10),
1545 SENSOR_ATTR_FAN(11),
1546 SENSOR_ATTR_FAN(12),
1547 SENSOR_ATTR_FAN(13),
1548 SENSOR_ATTR_FAN(14),
1549 };
1550
1551 static const struct sensor_device_attribute_2 w83795_temp[][29] = {
1552 SENSOR_ATTR_TEMP(1),
1553 SENSOR_ATTR_TEMP(2),
1554 SENSOR_ATTR_TEMP(3),
1555 SENSOR_ATTR_TEMP(4),
1556 SENSOR_ATTR_TEMP(5),
1557 SENSOR_ATTR_TEMP(6),
1558 };
1559
1560 static const struct sensor_device_attribute_2 w83795_dts[][8] = {
1561 SENSOR_ATTR_DTS(7),
1562 SENSOR_ATTR_DTS(8),
1563 SENSOR_ATTR_DTS(9),
1564 SENSOR_ATTR_DTS(10),
1565 SENSOR_ATTR_DTS(11),
1566 SENSOR_ATTR_DTS(12),
1567 SENSOR_ATTR_DTS(13),
1568 SENSOR_ATTR_DTS(14),
1569 };
1570
1571 static const struct sensor_device_attribute_2 w83795_pwm[][7] = {
1572 SENSOR_ATTR_PWM(1),
1573 SENSOR_ATTR_PWM(2),
1574 SENSOR_ATTR_PWM(3),
1575 SENSOR_ATTR_PWM(4),
1576 SENSOR_ATTR_PWM(5),
1577 SENSOR_ATTR_PWM(6),
1578 SENSOR_ATTR_PWM(7),
1579 SENSOR_ATTR_PWM(8),
1580 };
1581
1582 static const struct sensor_device_attribute_2 sda_single_files[] = {
1583 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep,
1584 store_chassis_clear, ALARM_STATUS, 46),
1585 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep,
1586 store_beep, BEEP_ENABLE, 47),
1587 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
1588 store_fanin, FANIN_TOL, NOT_USED),
1589 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1590 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1591 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1592 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1593 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1594 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
1595 };
1596
1597 /*
1598 * Driver interface
1599 */
1600
1601 static void w83795_init_client(struct i2c_client *client)
1602 {
1603 struct w83795_data *data = i2c_get_clientdata(client);
1604 static const u16 clkin[4] = { /* in kHz */
1605 14318, 24000, 33333, 48000
1606 };
1607 u8 config;
1608
1609 if (reset)
1610 w83795_write(client, W83795_REG_CONFIG, 0x80);
1611
1612 /* Start monitoring if needed */
1613 config = w83795_read(client, W83795_REG_CONFIG);
1614 if (!(config & W83795_REG_CONFIG_START)) {
1615 dev_info(&client->dev, "Enabling monitoring operations\n");
1616 w83795_write(client, W83795_REG_CONFIG,
1617 config | W83795_REG_CONFIG_START);
1618 }
1619
1620 data->clkin = clkin[(config >> 3) & 0x3];
1621 dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin);
1622 }
1623
1624 static int w83795_get_device_id(struct i2c_client *client)
1625 {
1626 int device_id;
1627
1628 device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID);
1629
1630 /* Special case for rev. A chips; can't be checked first because later
1631 revisions emulate this for compatibility */
1632 if (device_id < 0 || (device_id & 0xf0) != 0x50) {
1633 int alt_id;
1634
1635 alt_id = i2c_smbus_read_byte_data(client,
1636 W83795_REG_DEVICEID_A);
1637 if (alt_id == 0x50)
1638 device_id = alt_id;
1639 }
1640
1641 return device_id;
1642 }
1643
1644 /* Return 0 if detection is successful, -ENODEV otherwise */
1645 static int w83795_detect(struct i2c_client *client,
1646 struct i2c_board_info *info)
1647 {
1648 int bank, vendor_id, device_id, expected, i2c_addr, config;
1649 struct i2c_adapter *adapter = client->adapter;
1650 unsigned short address = client->addr;
1651 const char *chip_name;
1652
1653 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1654 return -ENODEV;
1655 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
1656 if (bank < 0 || (bank & 0x7c)) {
1657 dev_dbg(&adapter->dev,
1658 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1659 address, "bank");
1660 return -ENODEV;
1661 }
1662
1663 /* Check Nuvoton vendor ID */
1664 vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID);
1665 expected = bank & 0x80 ? 0x5c : 0xa3;
1666 if (vendor_id != expected) {
1667 dev_dbg(&adapter->dev,
1668 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1669 address, "vendor id");
1670 return -ENODEV;
1671 }
1672
1673 /* Check device ID */
1674 device_id = w83795_get_device_id(client) |
1675 (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8);
1676 if ((device_id >> 4) != 0x795) {
1677 dev_dbg(&adapter->dev,
1678 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1679 address, "device id\n");
1680 return -ENODEV;
1681 }
1682
1683 /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
1684 should match */
1685 if ((bank & 0x07) == 0) {
1686 i2c_addr = i2c_smbus_read_byte_data(client,
1687 W83795_REG_I2C_ADDR);
1688 if ((i2c_addr & 0x7f) != address) {
1689 dev_dbg(&adapter->dev,
1690 "w83795: Detection failed at addr 0x%02hx, "
1691 "check %s\n", address, "i2c addr");
1692 return -ENODEV;
1693 }
1694 }
1695
1696 /* Check 795 chip type: 795G or 795ADG
1697 Usually we don't write to chips during detection, but here we don't
1698 quite have the choice; hopefully it's OK, we are about to return
1699 success anyway */
1700 if ((bank & 0x07) != 0)
1701 i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
1702 bank & ~0x07);
1703 config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG);
1704 if (config & W83795_REG_CONFIG_CONFIG48)
1705 chip_name = "w83795adg";
1706 else
1707 chip_name = "w83795g";
1708
1709 strlcpy(info->type, chip_name, I2C_NAME_SIZE);
1710 dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name,
1711 'A' + (device_id & 0xf), address);
1712
1713 return 0;
1714 }
1715
1716 static int w83795_handle_files(struct device *dev, int (*fn)(struct device *,
1717 const struct device_attribute *))
1718 {
1719 struct w83795_data *data = dev_get_drvdata(dev);
1720 int err, i, j;
1721
1722 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
1723 if (!(data->has_in & (1 << i)))
1724 continue;
1725 for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) {
1726 err = fn(dev, &w83795_in[i][j].dev_attr);
1727 if (err)
1728 return err;
1729 }
1730 }
1731
1732 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
1733 if (!(data->has_fan & (1 << i)))
1734 continue;
1735 for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) {
1736 err = fn(dev, &w83795_fan[i][j].dev_attr);
1737 if (err)
1738 return err;
1739 }
1740 }
1741
1742 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
1743 err = fn(dev, &sda_single_files[i].dev_attr);
1744 if (err)
1745 return err;
1746 }
1747
1748 for (i = 0; i < data->has_pwm; i++) {
1749 for (j = 0; j < ARRAY_SIZE(w83795_pwm[0]); j++) {
1750 err = fn(dev, &w83795_pwm[i][j].dev_attr);
1751 if (err)
1752 return err;
1753 }
1754 }
1755
1756 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
1757 if (!(data->has_temp & (1 << i)))
1758 continue;
1759 for (j = 0; j < ARRAY_SIZE(w83795_temp[0]); j++) {
1760 err = fn(dev, &w83795_temp[i][j].dev_attr);
1761 if (err)
1762 return err;
1763 }
1764 }
1765
1766 if (data->enable_dts != 0) {
1767 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
1768 if (!(data->has_dts & (1 << i)))
1769 continue;
1770 for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) {
1771 err = fn(dev, &w83795_dts[i][j].dev_attr);
1772 if (err)
1773 return err;
1774 }
1775 }
1776 }
1777
1778 return 0;
1779 }
1780
1781 /* We need a wrapper that fits in w83795_handle_files */
1782 static int device_remove_file_wrapper(struct device *dev,
1783 const struct device_attribute *attr)
1784 {
1785 device_remove_file(dev, attr);
1786 return 0;
1787 }
1788
1789 static void w83795_check_dynamic_in_limits(struct i2c_client *client)
1790 {
1791 struct w83795_data *data = i2c_get_clientdata(client);
1792 u8 vid_ctl;
1793 int i, err_max, err_min;
1794
1795 vid_ctl = w83795_read(client, W83795_REG_VID_CTRL);
1796
1797 /* Return immediately if VRM isn't configured */
1798 if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07)
1799 return;
1800
1801 data->has_dyn_in = (vid_ctl >> 3) & 0x07;
1802 for (i = 0; i < 2; i++) {
1803 if (!(data->has_dyn_in & (1 << i)))
1804 continue;
1805
1806 /* Voltage limits in dynamic mode, switch to read-only */
1807 err_max = sysfs_chmod_file(&client->dev.kobj,
1808 &w83795_in[i][2].dev_attr.attr,
1809 S_IRUGO);
1810 err_min = sysfs_chmod_file(&client->dev.kobj,
1811 &w83795_in[i][3].dev_attr.attr,
1812 S_IRUGO);
1813 if (err_max || err_min)
1814 dev_warn(&client->dev, "Failed to set in%d limits "
1815 "read-only (%d, %d)\n", i, err_max, err_min);
1816 else
1817 dev_info(&client->dev, "in%d limits set dynamically "
1818 "from VID\n", i);
1819 }
1820 }
1821
1822 /* Check pins that can be used for either temperature or voltage monitoring */
1823 static void w83795_apply_temp_config(struct w83795_data *data, u8 config,
1824 int temp_chan, int in_chan)
1825 {
1826 /* config is a 2-bit value */
1827 switch (config) {
1828 case 0x2: /* Voltage monitoring */
1829 data->has_in |= 1 << in_chan;
1830 break;
1831 case 0x1: /* Thermal diode */
1832 if (temp_chan >= 4)
1833 break;
1834 data->temp_mode |= 1 << temp_chan;
1835 /* fall through */
1836 case 0x3: /* Thermistor */
1837 data->has_temp |= 1 << temp_chan;
1838 break;
1839 }
1840 }
1841
1842 static int w83795_probe(struct i2c_client *client,
1843 const struct i2c_device_id *id)
1844 {
1845 int i;
1846 u8 tmp;
1847 struct device *dev = &client->dev;
1848 struct w83795_data *data;
1849 int err;
1850
1851 data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL);
1852 if (!data) {
1853 err = -ENOMEM;
1854 goto exit;
1855 }
1856
1857 i2c_set_clientdata(client, data);
1858 data->chip_type = id->driver_data;
1859 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
1860 mutex_init(&data->update_lock);
1861
1862 /* Initialize the chip */
1863 w83795_init_client(client);
1864
1865 /* Check which voltages and fans are present */
1866 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1)
1867 | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8);
1868 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1)
1869 | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8);
1870
1871 /* Check which analog temperatures and extra voltages are present */
1872 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
1873 if (tmp & 0x20)
1874 data->enable_dts = 1;
1875 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16);
1876 w83795_apply_temp_config(data, tmp & 0x3, 4, 15);
1877 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1878 w83795_apply_temp_config(data, tmp >> 6, 3, 20);
1879 w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19);
1880 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18);
1881 w83795_apply_temp_config(data, tmp & 0x3, 0, 17);
1882
1883 /* Check DTS enable status */
1884 if (data->enable_dts) {
1885 if (1 & w83795_read(client, W83795_REG_DTSC))
1886 data->enable_dts |= 2;
1887 data->has_dts = w83795_read(client, W83795_REG_DTSE);
1888 }
1889
1890 /* Report PECI Tbase values */
1891 if (data->enable_dts == 1) {
1892 for (i = 0; i < 8; i++) {
1893 if (!(data->has_dts & (1 << i)))
1894 continue;
1895 tmp = w83795_read(client, W83795_REG_PECI_TBASE(i));
1896 dev_info(&client->dev,
1897 "PECI agent %d Tbase temperature: %u\n",
1898 i + 1, (unsigned int)tmp & 0x7f);
1899 }
1900 }
1901
1902 /* Read the voltage limits */
1903 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
1904 if (!(data->has_in & (1 << i)))
1905 continue;
1906 data->in[i][IN_MAX] =
1907 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
1908 data->in[i][IN_LOW] =
1909 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
1910 }
1911 for (i = 0; i < ARRAY_SIZE(data->in_lsb); i++) {
1912 if ((i == 2 && data->chip_type == w83795adg) ||
1913 (i >= 4 && !(data->has_in & (1 << (i + 11)))))
1914 continue;
1915 data->in_lsb[i][IN_MAX] =
1916 w83795_read(client, IN_LSB_REG(i, IN_MAX));
1917 data->in_lsb[i][IN_LOW] =
1918 w83795_read(client, IN_LSB_REG(i, IN_LOW));
1919 }
1920 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
1921
1922 /* Read the fan limits */
1923 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
1924 /* Each register contains LSB for 2 fans, but we want to
1925 * read it only once to save time */
1926 if ((i & 1) == 0 && (data->has_fan & (3 << i)))
1927 tmp = w83795_read(client, W83795_REG_FAN_MIN_LSB(i));
1928
1929 if (!(data->has_fan & (1 << i)))
1930 continue;
1931 data->fan_min[i] =
1932 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
1933 data->fan_min[i] |=
1934 (tmp >> W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F;
1935 }
1936
1937 /* Read the temperature limits */
1938 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
1939 if (!(data->has_temp & (1 << i)))
1940 continue;
1941 for (tmp = TEMP_CRIT; tmp <= TEMP_WARN_HYST; tmp++)
1942 data->temp[i][tmp] =
1943 w83795_read(client, W83795_REG_TEMP[i][tmp]);
1944 }
1945
1946 /* Read the DTS limits */
1947 if (data->enable_dts != 0) {
1948 for (i = DTS_CRIT; i <= DTS_WARN_HYST; i++)
1949 data->dts_ext[i] =
1950 w83795_read(client, W83795_REG_DTS_EXT(i));
1951 }
1952
1953 /* First update temp source selction */
1954 for (i = 0; i < 3; i++)
1955 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
1956
1957 /* pwm and smart fan */
1958 if (data->chip_type == w83795g)
1959 data->has_pwm = 8;
1960 else
1961 data->has_pwm = 2;
1962 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
1963 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
1964 for (i = 0; i < ARRAY_SIZE(data->pwm_tfmr); i++)
1965 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
1966 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
1967 for (i = 0; i < data->has_pwm; i++) {
1968 for (tmp = PWM_FREQ; tmp <= PWM_STOP_TIME; tmp++)
1969 data->pwm[i][tmp] =
1970 w83795_read(client, W83795_REG_PWM(i, tmp));
1971 }
1972 for (i = 0; i < 8; i++) {
1973 data->target_speed[i] =
1974 w83795_read(client, W83795_REG_FTSH(i)) << 4;
1975 data->target_speed[i] |=
1976 w83795_read(client, W83795_REG_FTSL(i)) >> 4;
1977 }
1978 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
1979
1980 for (i = 0; i < ARRAY_SIZE(data->pwm_temp); i++) {
1981 data->pwm_temp[i][TEMP_PWM_TTTI] =
1982 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
1983 data->pwm_temp[i][TEMP_PWM_CTFS] =
1984 w83795_read(client, W83795_REG_CTFS(i));
1985 tmp = w83795_read(client, W83795_REG_HT(i));
1986 data->pwm_temp[i][TEMP_PWM_HCT] = (tmp >> 4) & 0x0f;
1987 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
1988 }
1989 for (i = 0; i < ARRAY_SIZE(data->sf4_reg); i++) {
1990 for (tmp = 0; tmp < 7; tmp++) {
1991 data->sf4_reg[i][SF4_TEMP][tmp] =
1992 w83795_read(client,
1993 W83795_REG_SF4_TEMP(i, tmp));
1994 data->sf4_reg[i][SF4_PWM][tmp] =
1995 w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
1996 }
1997 }
1998
1999 /* Setup PWM Register */
2000 for (i = 0; i < 3; i++) {
2001 data->setup_pwm[i] =
2002 w83795_read(client, W83795_REG_SETUP_PWM(i));
2003 }
2004
2005 /* Read beep settings */
2006 for (i = 0; i < ARRAY_SIZE(data->beeps); i++)
2007 data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i));
2008
2009 err = w83795_handle_files(dev, device_create_file);
2010 if (err)
2011 goto exit_remove;
2012
2013 if (data->chip_type == w83795g)
2014 w83795_check_dynamic_in_limits(client);
2015
2016 data->hwmon_dev = hwmon_device_register(dev);
2017 if (IS_ERR(data->hwmon_dev)) {
2018 err = PTR_ERR(data->hwmon_dev);
2019 goto exit_remove;
2020 }
2021
2022 return 0;
2023
2024 exit_remove:
2025 w83795_handle_files(dev, device_remove_file_wrapper);
2026 kfree(data);
2027 exit:
2028 return err;
2029 }
2030
2031 static int w83795_remove(struct i2c_client *client)
2032 {
2033 struct w83795_data *data = i2c_get_clientdata(client);
2034
2035 hwmon_device_unregister(data->hwmon_dev);
2036 w83795_handle_files(&client->dev, device_remove_file_wrapper);
2037 kfree(data);
2038
2039 return 0;
2040 }
2041
2042
2043 static const struct i2c_device_id w83795_id[] = {
2044 { "w83795g", w83795g },
2045 { "w83795adg", w83795adg },
2046 { }
2047 };
2048 MODULE_DEVICE_TABLE(i2c, w83795_id);
2049
2050 static struct i2c_driver w83795_driver = {
2051 .driver = {
2052 .name = "w83795",
2053 },
2054 .probe = w83795_probe,
2055 .remove = w83795_remove,
2056 .id_table = w83795_id,
2057
2058 .class = I2C_CLASS_HWMON,
2059 .detect = w83795_detect,
2060 .address_list = normal_i2c,
2061 };
2062
2063 static int __init sensors_w83795_init(void)
2064 {
2065 return i2c_add_driver(&w83795_driver);
2066 }
2067
2068 static void __exit sensors_w83795_exit(void)
2069 {
2070 i2c_del_driver(&w83795_driver);
2071 }
2072
2073 MODULE_AUTHOR("Wei Song");
2074 MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver");
2075 MODULE_LICENSE("GPL");
2076
2077 module_init(sensors_w83795_init);
2078 module_exit(sensors_w83795_exit);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree