arch/powerpc/platforms/cell/setup.c

   1 /*
   2  *  linux/arch/powerpc/platforms/cell/cell_setup.c
   3  *
   4  *  Copyright (C) 1995  Linus Torvalds
   5  *  Adapted from 'alpha' version by Gary Thomas
   6  *  Modified by Cort Dougan (cort@cs.nmt.edu)
   7  *  Modified by PPC64 Team, IBM Corp
   8  *  Modified by Cell Team, IBM Deutschland Entwicklung GmbH
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License
  12  * as published by the Free Software Foundation; either version
  13  * 2 of the License, or (at your option) any later version.
  14  */
  15 #undef DEBUG
  16
  17 #include <linux/sched.h>
  18 #include <linux/kernel.h>
  19 #include <linux/mm.h>
  20 #include <linux/stddef.h>
  21 #include <linux/unistd.h>
  22 #include <linux/slab.h>
  23 #include <linux/user.h>
  24 #include <linux/reboot.h>
  25 #include <linux/init.h>
  26 #include <linux/delay.h>
  27 #include <linux/irq.h>
  28 #include <linux/seq_file.h>
  29 #include <linux/root_dev.h>
  30 #include <linux/console.h>
  31 #include <linux/mutex.h>
  32 #include <linux/memory_hotplug.h>
  33 #include <linux/of_platform.h>
  34
  35 #include <asm/mmu.h>
  36 #include <asm/processor.h>
  37 #include <asm/io.h>
  38 #include <asm/kexec.h>
  39 #include <asm/pgtable.h>
  40 #include <asm/prom.h>
  41 #include <asm/rtas.h>
  42 #include <asm/pci-bridge.h>
  43 #include <asm/iommu.h>
  44 #include <asm/dma.h>
  45 #include <asm/machdep.h>
  46 #include <asm/time.h>
  47 #include <asm/nvram.h>
  48 #include <asm/cputable.h>
  49 #include <asm/ppc-pci.h>
  50 #include <asm/irq.h>
  51 #include <asm/spu.h>
  52 #include <asm/spu_priv1.h>
  53 #include <asm/udbg.h>
  54 #include <asm/mpic.h>
  55 #include <asm/cell-regs.h>
  56
  57 #include "interrupt.h"
  58 #include "pervasive.h"
  59 #include "ras.h"
  60
  61 #ifdef DEBUG
  62 #define DBG(fmt...) udbg_printf(fmt)
  63 #else
  64 #define DBG(fmt...)
  65 #endif
  66
  67 static void cell_show_cpuinfo(struct seq_file *m)
  68 {
  69         struct device_node *root;
  70         const char *model = "";
  71
  72         root = of_find_node_by_path("/");
  73         if (root)
  74                 model = of_get_property(root, "model", NULL);
  75         seq_printf(m, "machine\t\t: CHRP %s\n", model);
  76         of_node_put(root);
  77 }
  78
  79 static void cell_progress(char *s, unsigned short hex)
  80 {
  81         printk("*** %04x : %s\n", hex, s ? s : "");
  82 }
  83
  84 static int __init cell_publish_devices(void)
  85 {
  86         int node;
  87
  88         if (!machine_is(cell))
  89                 return 0;
  90
  91         /* Publish OF platform devices for southbridge IOs */
  92         of_platform_bus_probe(NULL, NULL, NULL);
  93
  94         /* There is no device for the MIC memory controller, thus we create
  95          * a platform device for it to attach the EDAC driver to.
  96          */
  97         for_each_online_node(node) {
  98                 if (cbe_get_cpu_mic_tm_regs(cbe_node_to_cpu(node)) == NULL)
  99                         continue;
 100                 platform_device_register_simple("cbe-mic", node, NULL, 0);
 101         }
 102         return 0;
 103 }
 104 device_initcall(cell_publish_devices);
 105
 106 static void cell_mpic_cascade(unsigned int irq, struct irq_desc *desc)
 107 {
 108         struct mpic *mpic = desc->handler_data;
 109         unsigned int virq;
 110
 111         virq = mpic_get_one_irq(mpic);
 112         if (virq != NO_IRQ)
 113                 generic_handle_irq(virq);
 114         desc->chip->eoi(irq);
 115 }
 116
 117 static void __init mpic_init_IRQ(void)
 118 {
 119         struct device_node *dn;
 120         struct mpic *mpic;
 121         unsigned int virq;
 122
 123         for (dn = NULL;
 124              (dn = of_find_node_by_name(dn, "interrupt-controller"));) {
 125                 if (!of_device_is_compatible(dn, "CBEA,platform-open-pic"))
 126                         continue;
 127
 128                 /* The MPIC driver will get everything it needs from the
 129                  * device-tree, just pass 0 to all arguments
 130                  */
 131                 mpic = mpic_alloc(dn, 0, 0, 0, 0, " MPIC     ");
 132                 if (mpic == NULL)
 133                         continue;
 134                 mpic_init(mpic);
 135
 136                 virq = irq_of_parse_and_map(dn, 0);
 137                 if (virq == NO_IRQ)
 138                         continue;
 139
 140                 printk(KERN_INFO "%s : hooking up to IRQ %d\n",
 141                        dn->full_name, virq);
 142                 set_irq_data(virq, mpic);
 143                 set_irq_chained_handler(virq, cell_mpic_cascade);
 144         }
 145 }
 146
 147
 148 static void __init cell_init_irq(void)
 149 {
 150         iic_init_IRQ();
 151         spider_init_IRQ();
 152         mpic_init_IRQ();
 153 }
 154
 155 static void __init cell_setup_arch(void)
 156 {
 157 #ifdef CONFIG_SPU_BASE
 158         spu_priv1_ops = &spu_priv1_mmio_ops;
 159         spu_management_ops = &spu_management_of_ops;
 160 #endif
 161
 162         cbe_regs_init();
 163
 164 #ifdef CONFIG_CBE_RAS
 165         cbe_ras_init();
 166 #endif
 167
 168 #ifdef CONFIG_SMP
 169         smp_init_cell();
 170 #endif
 171         /* init to some ~sane value until calibrate_delay() runs */
 172         loops_per_jiffy = 50000000;
 173
 174         /* Find and initialize PCI host bridges */
 175         init_pci_config_tokens();
 176         find_and_init_phbs();
 177         cbe_pervasive_init();
 178 #ifdef CONFIG_DUMMY_CONSOLE
 179         conswitchp = &dummy_con;
 180 #endif
 181
 182         mmio_nvram_init();
 183 }
 184
 185 static int __init cell_probe(void)
 186 {
 187         unsigned long root = of_get_flat_dt_root();
 188
 189         if (!of_flat_dt_is_compatible(root, "IBM,CBEA") &&
 190             !of_flat_dt_is_compatible(root, "IBM,CPBW-1.0"))
 191                 return 0;
 192
 193         hpte_init_native();
 194
 195         return 1;
 196 }
 197
 198 define_machine(cell) {
 199         .name                   = "Cell",
 200         .probe                  = cell_probe,
 201         .setup_arch             = cell_setup_arch,
 202         .show_cpuinfo           = cell_show_cpuinfo,
 203         .restart                = rtas_restart,
 204         .power_off              = rtas_power_off,
 205         .halt                   = rtas_halt,
 206         .get_boot_time          = rtas_get_boot_time,
 207         .get_rtc_time           = rtas_get_rtc_time,
 208         .set_rtc_time           = rtas_set_rtc_time,
 209         .calibrate_decr         = generic_calibrate_decr,
 210         .progress               = cell_progress,
 211         .init_IRQ               = cell_init_irq,
 212         .pci_setup_phb          = rtas_setup_phb,
 213 #ifdef CONFIG_KEXEC
 214         .machine_kexec          = default_machine_kexec,
 215         .machine_kexec_prepare  = default_machine_kexec_prepare,
 216         .machine_crash_shutdown = default_machine_crash_shutdown,
 217 #endif
 218 };