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ALSA: hda - fix ELD memory leak
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / sound / pci / hda / patch_hdmi.c
blobe287015cbbb3bc036fdb106c3a3aa3b9af144e13
1 /*
2 *
3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
4 *
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
9 *
10 * Authors:
11 * Wu Fengguang <wfg@linux.intel.com>
12 *
13 * Maintained by:
14 * Wu Fengguang <wfg@linux.intel.com>
15 *
16 * This program is free software; you can redistribute it and/or modify it
17 * under the terms of the GNU General Public License as published by the Free
18 * Software Foundation; either version 2 of the License, or (at your option)
19 * any later version.
20 *
21 * This program is distributed in the hope that it will be useful, but
22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
24 * for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software Foundation,
28 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
29 */
30
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
34 #include <linux/moduleparam.h>
35 #include <sound/core.h>
36 #include <sound/jack.h>
37 #include "hda_codec.h"
38 #include "hda_local.h"
39
40 static bool static_hdmi_pcm;
41 module_param(static_hdmi_pcm, bool, 0644);
42 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
43
44 /*
45 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
46 * could support N independent pipes, each of them can be connected to one or
47 * more ports (DVI, HDMI or DisplayPort).
48 *
49 * The HDA correspondence of pipes/ports are converter/pin nodes.
50 */
51 #define MAX_HDMI_CVTS 4
52 #define MAX_HDMI_PINS 4
53
54 struct hdmi_spec_per_cvt {
55 hda_nid_t cvt_nid;
56 int assigned;
57 unsigned int channels_min;
58 unsigned int channels_max;
59 u32 rates;
60 u64 formats;
61 unsigned int maxbps;
62 };
63
64 struct hdmi_spec_per_pin {
65 hda_nid_t pin_nid;
66 int num_mux_nids;
67 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
68 struct hdmi_eld sink_eld;
69 };
70
71 struct hdmi_spec {
72 int num_cvts;
73 struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS];
74
75 int num_pins;
76 struct hdmi_spec_per_pin pins[MAX_HDMI_PINS];
77 struct hda_pcm pcm_rec[MAX_HDMI_PINS];
78
79 /*
80 * Non-generic ATI/NVIDIA specific
81 */
82 struct hda_multi_out multiout;
83 const struct hda_pcm_stream *pcm_playback;
84 };
85
86
87 struct hdmi_audio_infoframe {
88 u8 type; /* 0x84 */
89 u8 ver; /* 0x01 */
90 u8 len; /* 0x0a */
91
92 u8 checksum;
93
94 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
95 u8 SS01_SF24;
96 u8 CXT04;
97 u8 CA;
98 u8 LFEPBL01_LSV36_DM_INH7;
99 };
100
101 struct dp_audio_infoframe {
102 u8 type; /* 0x84 */
103 u8 len; /* 0x1b */
104 u8 ver; /* 0x11 << 2 */
105
106 u8 CC02_CT47; /* match with HDMI infoframe from this on */
107 u8 SS01_SF24;
108 u8 CXT04;
109 u8 CA;
110 u8 LFEPBL01_LSV36_DM_INH7;
111 };
112
113 union audio_infoframe {
114 struct hdmi_audio_infoframe hdmi;
115 struct dp_audio_infoframe dp;
116 u8 bytes[0];
117 };
118
119 /*
120 * CEA speaker placement:
121 *
122 * FLH FCH FRH
123 * FLW FL FLC FC FRC FR FRW
124 *
125 * LFE
126 * TC
127 *
128 * RL RLC RC RRC RR
129 *
130 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
131 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
132 */
133 enum cea_speaker_placement {
134 FL = (1 << 0), /* Front Left */
135 FC = (1 << 1), /* Front Center */
136 FR = (1 << 2), /* Front Right */
137 FLC = (1 << 3), /* Front Left Center */
138 FRC = (1 << 4), /* Front Right Center */
139 RL = (1 << 5), /* Rear Left */
140 RC = (1 << 6), /* Rear Center */
141 RR = (1 << 7), /* Rear Right */
142 RLC = (1 << 8), /* Rear Left Center */
143 RRC = (1 << 9), /* Rear Right Center */
144 LFE = (1 << 10), /* Low Frequency Effect */
145 FLW = (1 << 11), /* Front Left Wide */
146 FRW = (1 << 12), /* Front Right Wide */
147 FLH = (1 << 13), /* Front Left High */
148 FCH = (1 << 14), /* Front Center High */
149 FRH = (1 << 15), /* Front Right High */
150 TC = (1 << 16), /* Top Center */
151 };
152
153 /*
154 * ELD SA bits in the CEA Speaker Allocation data block
155 */
156 static int eld_speaker_allocation_bits[] = {
157 [0] = FL | FR,
158 [1] = LFE,
159 [2] = FC,
160 [3] = RL | RR,
161 [4] = RC,
162 [5] = FLC | FRC,
163 [6] = RLC | RRC,
164 /* the following are not defined in ELD yet */
165 [7] = FLW | FRW,
166 [8] = FLH | FRH,
167 [9] = TC,
168 [10] = FCH,
169 };
170
171 struct cea_channel_speaker_allocation {
172 int ca_index;
173 int speakers[8];
174
175 /* derived values, just for convenience */
176 int channels;
177 int spk_mask;
178 };
179
180 /*
181 * ALSA sequence is:
182 *
183 * surround40 surround41 surround50 surround51 surround71
184 * ch0 front left = = = =
185 * ch1 front right = = = =
186 * ch2 rear left = = = =
187 * ch3 rear right = = = =
188 * ch4 LFE center center center
189 * ch5 LFE LFE
190 * ch6 side left
191 * ch7 side right
192 *
193 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
194 */
195 static int hdmi_channel_mapping[0x32][8] = {
196 /* stereo */
197 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
198 /* 2.1 */
199 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
200 /* Dolby Surround */
201 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
202 /* surround40 */
203 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
204 /* 4ch */
205 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
206 /* surround41 */
207 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
208 /* surround50 */
209 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
210 /* surround51 */
211 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
212 /* 7.1 */
213 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
214 };
215
216 /*
217 * This is an ordered list!
218 *
219 * The preceding ones have better chances to be selected by
220 * hdmi_channel_allocation().
221 */
222 static struct cea_channel_speaker_allocation channel_allocations[] = {
223 /* channel: 7 6 5 4 3 2 1 0 */
224 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
225 /* 2.1 */
226 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
227 /* Dolby Surround */
228 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
229 /* surround40 */
230 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
231 /* surround41 */
232 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
233 /* surround50 */
234 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
235 /* surround51 */
236 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
237 /* 6.1 */
238 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
239 /* surround71 */
240 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
241
242 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
243 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
244 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
245 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
246 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
247 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
248 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
249 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
250 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
251 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
252 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
253 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
254 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
255 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
256 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
257 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
258 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
259 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
260 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
261 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
262 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
263 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
264 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
265 { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
266 { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
267 { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
268 { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
269 { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
270 { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
271 { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
272 { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
273 { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
274 { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
275 { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
276 { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
277 { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
278 { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
279 { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
280 { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
281 { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
282 { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
283 };
284
285
286 /*
287 * HDMI routines
288 */
289
290 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
291 {
292 int pin_idx;
293
294 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
295 if (spec->pins[pin_idx].pin_nid == pin_nid)
296 return pin_idx;
297
298 snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
299 return -EINVAL;
300 }
301
302 static int hinfo_to_pin_index(struct hdmi_spec *spec,
303 struct hda_pcm_stream *hinfo)
304 {
305 int pin_idx;
306
307 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
308 if (&spec->pcm_rec[pin_idx].stream[0] == hinfo)
309 return pin_idx;
310
311 snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
312 return -EINVAL;
313 }
314
315 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
316 {
317 int cvt_idx;
318
319 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
320 if (spec->cvts[cvt_idx].cvt_nid == cvt_nid)
321 return cvt_idx;
322
323 snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
324 return -EINVAL;
325 }
326
327 #ifdef BE_PARANOID
328 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
329 int *packet_index, int *byte_index)
330 {
331 int val;
332
333 val = snd_hda_codec_read(codec, pin_nid, 0,
334 AC_VERB_GET_HDMI_DIP_INDEX, 0);
335
336 *packet_index = val >> 5;
337 *byte_index = val & 0x1f;
338 }
339 #endif
340
341 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
342 int packet_index, int byte_index)
343 {
344 int val;
345
346 val = (packet_index << 5) | (byte_index & 0x1f);
347
348 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
349 }
350
351 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
352 unsigned char val)
353 {
354 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
355 }
356
357 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
358 {
359 /* Unmute */
360 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
361 snd_hda_codec_write(codec, pin_nid, 0,
362 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
363 /* Disable pin out until stream is active*/
364 snd_hda_codec_write(codec, pin_nid, 0,
365 AC_VERB_SET_PIN_WIDGET_CONTROL, 0);
366 }
367
368 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
369 {
370 return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
371 AC_VERB_GET_CVT_CHAN_COUNT, 0);
372 }
373
374 static void hdmi_set_channel_count(struct hda_codec *codec,
375 hda_nid_t cvt_nid, int chs)
376 {
377 if (chs != hdmi_get_channel_count(codec, cvt_nid))
378 snd_hda_codec_write(codec, cvt_nid, 0,
379 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
380 }
381
382
383 /*
384 * Channel mapping routines
385 */
386
387 /*
388 * Compute derived values in channel_allocations[].
389 */
390 static void init_channel_allocations(void)
391 {
392 int i, j;
393 struct cea_channel_speaker_allocation *p;
394
395 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
396 p = channel_allocations + i;
397 p->channels = 0;
398 p->spk_mask = 0;
399 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
400 if (p->speakers[j]) {
401 p->channels++;
402 p->spk_mask |= p->speakers[j];
403 }
404 }
405 }
406
407 /*
408 * The transformation takes two steps:
409 *
410 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
411 * spk_mask => (channel_allocations[]) => ai->CA
412 *
413 * TODO: it could select the wrong CA from multiple candidates.
414 */
415 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
416 {
417 int i;
418 int ca = 0;
419 int spk_mask = 0;
420 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
421
422 /*
423 * CA defaults to 0 for basic stereo audio
424 */
425 if (channels <= 2)
426 return 0;
427
428 /*
429 * expand ELD's speaker allocation mask
430 *
431 * ELD tells the speaker mask in a compact(paired) form,
432 * expand ELD's notions to match the ones used by Audio InfoFrame.
433 */
434 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
435 if (eld->spk_alloc & (1 << i))
436 spk_mask |= eld_speaker_allocation_bits[i];
437 }
438
439 /* search for the first working match in the CA table */
440 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
441 if (channels == channel_allocations[i].channels &&
442 (spk_mask & channel_allocations[i].spk_mask) ==
443 channel_allocations[i].spk_mask) {
444 ca = channel_allocations[i].ca_index;
445 break;
446 }
447 }
448
449 snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
450 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
451 ca, channels, buf);
452
453 return ca;
454 }
455
456 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
457 hda_nid_t pin_nid)
458 {
459 #ifdef CONFIG_SND_DEBUG_VERBOSE
460 int i;
461 int slot;
462
463 for (i = 0; i < 8; i++) {
464 slot = snd_hda_codec_read(codec, pin_nid, 0,
465 AC_VERB_GET_HDMI_CHAN_SLOT, i);
466 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
467 slot >> 4, slot & 0xf);
468 }
469 #endif
470 }
471
472
473 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
474 hda_nid_t pin_nid,
475 int ca)
476 {
477 int i;
478 int err;
479
480 if (hdmi_channel_mapping[ca][1] == 0) {
481 for (i = 0; i < channel_allocations[ca].channels; i++)
482 hdmi_channel_mapping[ca][i] = i | (i << 4);
483 for (; i < 8; i++)
484 hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
485 }
486
487 for (i = 0; i < 8; i++) {
488 err = snd_hda_codec_write(codec, pin_nid, 0,
489 AC_VERB_SET_HDMI_CHAN_SLOT,
490 hdmi_channel_mapping[ca][i]);
491 if (err) {
492 snd_printdd(KERN_NOTICE
493 "HDMI: channel mapping failed\n");
494 break;
495 }
496 }
497
498 hdmi_debug_channel_mapping(codec, pin_nid);
499 }
500
501
502 /*
503 * Audio InfoFrame routines
504 */
505
506 /*
507 * Enable Audio InfoFrame Transmission
508 */
509 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
510 hda_nid_t pin_nid)
511 {
512 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
513 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
514 AC_DIPXMIT_BEST);
515 }
516
517 /*
518 * Disable Audio InfoFrame Transmission
519 */
520 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
521 hda_nid_t pin_nid)
522 {
523 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
524 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
525 AC_DIPXMIT_DISABLE);
526 }
527
528 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
529 {
530 #ifdef CONFIG_SND_DEBUG_VERBOSE
531 int i;
532 int size;
533
534 size = snd_hdmi_get_eld_size(codec, pin_nid);
535 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
536
537 for (i = 0; i < 8; i++) {
538 size = snd_hda_codec_read(codec, pin_nid, 0,
539 AC_VERB_GET_HDMI_DIP_SIZE, i);
540 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
541 }
542 #endif
543 }
544
545 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
546 {
547 #ifdef BE_PARANOID
548 int i, j;
549 int size;
550 int pi, bi;
551 for (i = 0; i < 8; i++) {
552 size = snd_hda_codec_read(codec, pin_nid, 0,
553 AC_VERB_GET_HDMI_DIP_SIZE, i);
554 if (size == 0)
555 continue;
556
557 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
558 for (j = 1; j < 1000; j++) {
559 hdmi_write_dip_byte(codec, pin_nid, 0x0);
560 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
561 if (pi != i)
562 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
563 bi, pi, i);
564 if (bi == 0) /* byte index wrapped around */
565 break;
566 }
567 snd_printd(KERN_INFO
568 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
569 i, size, j);
570 }
571 #endif
572 }
573
574 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
575 {
576 u8 *bytes = (u8 *)hdmi_ai;
577 u8 sum = 0;
578 int i;
579
580 hdmi_ai->checksum = 0;
581
582 for (i = 0; i < sizeof(*hdmi_ai); i++)
583 sum += bytes[i];
584
585 hdmi_ai->checksum = -sum;
586 }
587
588 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
589 hda_nid_t pin_nid,
590 u8 *dip, int size)
591 {
592 int i;
593
594 hdmi_debug_dip_size(codec, pin_nid);
595 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
596
597 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
598 for (i = 0; i < size; i++)
599 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
600 }
601
602 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
603 u8 *dip, int size)
604 {
605 u8 val;
606 int i;
607
608 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
609 != AC_DIPXMIT_BEST)
610 return false;
611
612 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
613 for (i = 0; i < size; i++) {
614 val = snd_hda_codec_read(codec, pin_nid, 0,
615 AC_VERB_GET_HDMI_DIP_DATA, 0);
616 if (val != dip[i])
617 return false;
618 }
619
620 return true;
621 }
622
623 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
624 struct snd_pcm_substream *substream)
625 {
626 struct hdmi_spec *spec = codec->spec;
627 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
628 hda_nid_t pin_nid = per_pin->pin_nid;
629 int channels = substream->runtime->channels;
630 struct hdmi_eld *eld;
631 int ca;
632 union audio_infoframe ai;
633
634 eld = &spec->pins[pin_idx].sink_eld;
635 if (!eld->monitor_present)
636 return;
637
638 ca = hdmi_channel_allocation(eld, channels);
639
640 memset(&ai, 0, sizeof(ai));
641 if (eld->conn_type == 0) { /* HDMI */
642 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
643
644 hdmi_ai->type = 0x84;
645 hdmi_ai->ver = 0x01;
646 hdmi_ai->len = 0x0a;
647 hdmi_ai->CC02_CT47 = channels - 1;
648 hdmi_ai->CA = ca;
649 hdmi_checksum_audio_infoframe(hdmi_ai);
650 } else if (eld->conn_type == 1) { /* DisplayPort */
651 struct dp_audio_infoframe *dp_ai = &ai.dp;
652
653 dp_ai->type = 0x84;
654 dp_ai->len = 0x1b;
655 dp_ai->ver = 0x11 << 2;
656 dp_ai->CC02_CT47 = channels - 1;
657 dp_ai->CA = ca;
658 } else {
659 snd_printd("HDMI: unknown connection type at pin %d\n",
660 pin_nid);
661 return;
662 }
663
664 /*
665 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
666 * sizeof(*dp_ai) to avoid partial match/update problems when
667 * the user switches between HDMI/DP monitors.
668 */
669 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
670 sizeof(ai))) {
671 snd_printdd("hdmi_setup_audio_infoframe: "
672 "pin=%d channels=%d\n",
673 pin_nid,
674 channels);
675 hdmi_setup_channel_mapping(codec, pin_nid, ca);
676 hdmi_stop_infoframe_trans(codec, pin_nid);
677 hdmi_fill_audio_infoframe(codec, pin_nid,
678 ai.bytes, sizeof(ai));
679 hdmi_start_infoframe_trans(codec, pin_nid);
680 }
681 }
682
683
684 /*
685 * Unsolicited events
686 */
687
688 static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid,
689 struct hdmi_eld *eld);
690
691 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
692 {
693 struct hdmi_spec *spec = codec->spec;
694 int pin_nid = res >> AC_UNSOL_RES_TAG_SHIFT;
695 int pd = !!(res & AC_UNSOL_RES_PD);
696 int eldv = !!(res & AC_UNSOL_RES_ELDV);
697 int pin_idx;
698 struct hdmi_eld *eld;
699
700 printk(KERN_INFO
701 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
702 codec->addr, pin_nid, pd, eldv);
703
704 pin_idx = pin_nid_to_pin_index(spec, pin_nid);
705 if (pin_idx < 0)
706 return;
707 eld = &spec->pins[pin_idx].sink_eld;
708
709 hdmi_present_sense(codec, pin_nid, eld);
710
711 /*
712 * HDMI sink's ELD info cannot always be retrieved for now, e.g.
713 * in console or for audio devices. Assume the highest speakers
714 * configuration, to _not_ prohibit multi-channel audio playback.
715 */
716 if (!eld->spk_alloc)
717 eld->spk_alloc = 0xffff;
718 }
719
720 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
721 {
722 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
723 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
724 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
725 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
726
727 printk(KERN_INFO
728 "HDMI CP event: CODEC=%d PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
729 codec->addr,
730 tag,
731 subtag,
732 cp_state,
733 cp_ready);
734
735 /* TODO */
736 if (cp_state)
737 ;
738 if (cp_ready)
739 ;
740 }
741
742
743 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
744 {
745 struct hdmi_spec *spec = codec->spec;
746 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
747 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
748
749 if (pin_nid_to_pin_index(spec, tag) < 0) {
750 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
751 return;
752 }
753
754 if (subtag == 0)
755 hdmi_intrinsic_event(codec, res);
756 else
757 hdmi_non_intrinsic_event(codec, res);
758 }
759
760 /*
761 * Callbacks
762 */
763
764 /* HBR should be Non-PCM, 8 channels */
765 #define is_hbr_format(format) \
766 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
767
768 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
769 hda_nid_t pin_nid, u32 stream_tag, int format)
770 {
771 int pinctl;
772 int new_pinctl = 0;
773
774 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
775 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
776 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
777
778 new_pinctl = pinctl & ~AC_PINCTL_EPT;
779 if (is_hbr_format(format))
780 new_pinctl |= AC_PINCTL_EPT_HBR;
781 else
782 new_pinctl |= AC_PINCTL_EPT_NATIVE;
783
784 snd_printdd("hdmi_setup_stream: "
785 "NID=0x%x, %spinctl=0x%x\n",
786 pin_nid,
787 pinctl == new_pinctl ? "" : "new-",
788 new_pinctl);
789
790 if (pinctl != new_pinctl)
791 snd_hda_codec_write(codec, pin_nid, 0,
792 AC_VERB_SET_PIN_WIDGET_CONTROL,
793 new_pinctl);
794
795 }
796 if (is_hbr_format(format) && !new_pinctl) {
797 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
798 return -EINVAL;
799 }
800
801 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
802 return 0;
803 }
804
805 /*
806 * HDA PCM callbacks
807 */
808 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
809 struct hda_codec *codec,
810 struct snd_pcm_substream *substream)
811 {
812 struct hdmi_spec *spec = codec->spec;
813 struct snd_pcm_runtime *runtime = substream->runtime;
814 int pin_idx, cvt_idx, mux_idx = 0;
815 struct hdmi_spec_per_pin *per_pin;
816 struct hdmi_eld *eld;
817 struct hdmi_spec_per_cvt *per_cvt = NULL;
818 int pinctl;
819
820 /* Validate hinfo */
821 pin_idx = hinfo_to_pin_index(spec, hinfo);
822 if (snd_BUG_ON(pin_idx < 0))
823 return -EINVAL;
824 per_pin = &spec->pins[pin_idx];
825 eld = &per_pin->sink_eld;
826
827 /* Dynamically assign converter to stream */
828 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
829 per_cvt = &spec->cvts[cvt_idx];
830
831 /* Must not already be assigned */
832 if (per_cvt->assigned)
833 continue;
834 /* Must be in pin's mux's list of converters */
835 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
836 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
837 break;
838 /* Not in mux list */
839 if (mux_idx == per_pin->num_mux_nids)
840 continue;
841 break;
842 }
843 /* No free converters */
844 if (cvt_idx == spec->num_cvts)
845 return -ENODEV;
846
847 /* Claim converter */
848 per_cvt->assigned = 1;
849 hinfo->nid = per_cvt->cvt_nid;
850
851 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
852 AC_VERB_SET_CONNECT_SEL,
853 mux_idx);
854 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
855 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
856 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
857 AC_VERB_SET_PIN_WIDGET_CONTROL,
858 pinctl | PIN_OUT);
859 snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
860
861 /* Initially set the converter's capabilities */
862 hinfo->channels_min = per_cvt->channels_min;
863 hinfo->channels_max = per_cvt->channels_max;
864 hinfo->rates = per_cvt->rates;
865 hinfo->formats = per_cvt->formats;
866 hinfo->maxbps = per_cvt->maxbps;
867
868 /* Restrict capabilities by ELD if this isn't disabled */
869 if (!static_hdmi_pcm && eld->eld_valid) {
870 snd_hdmi_eld_update_pcm_info(eld, hinfo);
871 if (hinfo->channels_min > hinfo->channels_max ||
872 !hinfo->rates || !hinfo->formats)
873 return -ENODEV;
874 }
875
876 /* Store the updated parameters */
877 runtime->hw.channels_min = hinfo->channels_min;
878 runtime->hw.channels_max = hinfo->channels_max;
879 runtime->hw.formats = hinfo->formats;
880 runtime->hw.rates = hinfo->rates;
881
882 snd_pcm_hw_constraint_step(substream->runtime, 0,
883 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
884 return 0;
885 }
886
887 /*
888 * HDA/HDMI auto parsing
889 */
890 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
891 {
892 struct hdmi_spec *spec = codec->spec;
893 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
894 hda_nid_t pin_nid = per_pin->pin_nid;
895
896 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
897 snd_printk(KERN_WARNING
898 "HDMI: pin %d wcaps %#x "
899 "does not support connection list\n",
900 pin_nid, get_wcaps(codec, pin_nid));
901 return -EINVAL;
902 }
903
904 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
905 per_pin->mux_nids,
906 HDA_MAX_CONNECTIONS);
907
908 return 0;
909 }
910
911 static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid,
912 struct hdmi_eld *eld)
913 {
914 /*
915 * Always execute a GetPinSense verb here, even when called from
916 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
917 * response's PD bit is not the real PD value, but indicates that
918 * the real PD value changed. An older version of the HD-audio
919 * specification worked this way. Hence, we just ignore the data in
920 * the unsolicited response to avoid custom WARs.
921 */
922 int present = snd_hda_pin_sense(codec, pin_nid);
923 bool eld_valid = false;
924
925 #ifdef CONFIG_PROC_FS
926 memset(eld, 0, offsetof(struct hdmi_eld, proc_entry));
927 #else
928 memset(eld, 0, sizeof(struct hdmi_eld));
929 #endif
930
931 eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
932 if (eld->monitor_present)
933 eld_valid = !!(present & AC_PINSENSE_ELDV);
934
935 printk(KERN_INFO
936 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
937 codec->addr, pin_nid, eld->monitor_present, eld_valid);
938
939 if (eld_valid)
940 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
941 snd_hdmi_show_eld(eld);
942
943 snd_hda_input_jack_report(codec, pin_nid);
944 }
945
946 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
947 {
948 struct hdmi_spec *spec = codec->spec;
949 unsigned int caps, config;
950 int pin_idx;
951 struct hdmi_spec_per_pin *per_pin;
952 struct hdmi_eld *eld;
953 int err;
954
955 caps = snd_hda_param_read(codec, pin_nid, AC_PAR_PIN_CAP);
956 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
957 return 0;
958
959 config = snd_hda_codec_read(codec, pin_nid, 0,
960 AC_VERB_GET_CONFIG_DEFAULT, 0);
961 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
962 return 0;
963
964 if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS))
965 return -E2BIG;
966
967 pin_idx = spec->num_pins;
968 per_pin = &spec->pins[pin_idx];
969 eld = &per_pin->sink_eld;
970
971 per_pin->pin_nid = pin_nid;
972
973 err = snd_hda_input_jack_add(codec, pin_nid,
974 SND_JACK_VIDEOOUT, NULL);
975 if (err < 0)
976 return err;
977
978 err = hdmi_read_pin_conn(codec, pin_idx);
979 if (err < 0)
980 return err;
981
982 spec->num_pins++;
983
984 hdmi_present_sense(codec, pin_nid, eld);
985
986 return 0;
987 }
988
989 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
990 {
991 struct hdmi_spec *spec = codec->spec;
992 int cvt_idx;
993 struct hdmi_spec_per_cvt *per_cvt;
994 unsigned int chans;
995 int err;
996
997 if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
998 return -E2BIG;
999
1000 chans = get_wcaps(codec, cvt_nid);
1001 chans = get_wcaps_channels(chans);
1002
1003 cvt_idx = spec->num_cvts;
1004 per_cvt = &spec->cvts[cvt_idx];
1005
1006 per_cvt->cvt_nid = cvt_nid;
1007 per_cvt->channels_min = 2;
1008 if (chans <= 16)
1009 per_cvt->channels_max = chans;
1010
1011 err = snd_hda_query_supported_pcm(codec, cvt_nid,
1012 &per_cvt->rates,
1013 &per_cvt->formats,
1014 &per_cvt->maxbps);
1015 if (err < 0)
1016 return err;
1017
1018 spec->num_cvts++;
1019
1020 return 0;
1021 }
1022
1023 static int hdmi_parse_codec(struct hda_codec *codec)
1024 {
1025 hda_nid_t nid;
1026 int i, nodes;
1027
1028 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1029 if (!nid || nodes < 0) {
1030 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1031 return -EINVAL;
1032 }
1033
1034 for (i = 0; i < nodes; i++, nid++) {
1035 unsigned int caps;
1036 unsigned int type;
1037
1038 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
1039 type = get_wcaps_type(caps);
1040
1041 if (!(caps & AC_WCAP_DIGITAL))
1042 continue;
1043
1044 switch (type) {
1045 case AC_WID_AUD_OUT:
1046 hdmi_add_cvt(codec, nid);
1047 break;
1048 case AC_WID_PIN:
1049 hdmi_add_pin(codec, nid);
1050 break;
1051 }
1052 }
1053
1054 /*
1055 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1056 * can be lost and presence sense verb will become inaccurate if the
1057 * HDA link is powered off at hot plug or hw initialization time.
1058 */
1059 #ifdef CONFIG_SND_HDA_POWER_SAVE
1060 if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1061 AC_PWRST_EPSS))
1062 codec->bus->power_keep_link_on = 1;
1063 #endif
1064
1065 return 0;
1066 }
1067
1068 /*
1069 */
1070 static char *generic_hdmi_pcm_names[MAX_HDMI_PINS] = {
1071 "HDMI 0",
1072 "HDMI 1",
1073 "HDMI 2",
1074 "HDMI 3",
1075 };
1076
1077 /*
1078 * HDMI callbacks
1079 */
1080
1081 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1082 struct hda_codec *codec,
1083 unsigned int stream_tag,
1084 unsigned int format,
1085 struct snd_pcm_substream *substream)
1086 {
1087 hda_nid_t cvt_nid = hinfo->nid;
1088 struct hdmi_spec *spec = codec->spec;
1089 int pin_idx = hinfo_to_pin_index(spec, hinfo);
1090 hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid;
1091
1092 hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1093
1094 hdmi_setup_audio_infoframe(codec, pin_idx, substream);
1095
1096 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1097 }
1098
1099 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1100 struct hda_codec *codec,
1101 struct snd_pcm_substream *substream)
1102 {
1103 struct hdmi_spec *spec = codec->spec;
1104 int cvt_idx, pin_idx;
1105 struct hdmi_spec_per_cvt *per_cvt;
1106 struct hdmi_spec_per_pin *per_pin;
1107 int pinctl;
1108
1109 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1110
1111 if (hinfo->nid) {
1112 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1113 if (snd_BUG_ON(cvt_idx < 0))
1114 return -EINVAL;
1115 per_cvt = &spec->cvts[cvt_idx];
1116
1117 snd_BUG_ON(!per_cvt->assigned);
1118 per_cvt->assigned = 0;
1119 hinfo->nid = 0;
1120
1121 pin_idx = hinfo_to_pin_index(spec, hinfo);
1122 if (snd_BUG_ON(pin_idx < 0))
1123 return -EINVAL;
1124 per_pin = &spec->pins[pin_idx];
1125
1126 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1127 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1128 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1129 AC_VERB_SET_PIN_WIDGET_CONTROL,
1130 pinctl & ~PIN_OUT);
1131 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1132 }
1133
1134 return 0;
1135 }
1136
1137 static const struct hda_pcm_ops generic_ops = {
1138 .open = hdmi_pcm_open,
1139 .prepare = generic_hdmi_playback_pcm_prepare,
1140 .cleanup = generic_hdmi_playback_pcm_cleanup,
1141 };
1142
1143 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1144 {
1145 struct hdmi_spec *spec = codec->spec;
1146 int pin_idx;
1147
1148 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1149 struct hda_pcm *info;
1150 struct hda_pcm_stream *pstr;
1151
1152 info = &spec->pcm_rec[pin_idx];
1153 info->name = generic_hdmi_pcm_names[pin_idx];
1154 info->pcm_type = HDA_PCM_TYPE_HDMI;
1155
1156 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1157 pstr->substreams = 1;
1158 pstr->ops = generic_ops;
1159 /* other pstr fields are set in open */
1160 }
1161
1162 codec->num_pcms = spec->num_pins;
1163 codec->pcm_info = spec->pcm_rec;
1164
1165 return 0;
1166 }
1167
1168 static int generic_hdmi_build_controls(struct hda_codec *codec)
1169 {
1170 struct hdmi_spec *spec = codec->spec;
1171 int err;
1172 int pin_idx;
1173
1174 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1175 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1176 err = snd_hda_create_spdif_out_ctls(codec,
1177 per_pin->pin_nid,
1178 per_pin->mux_nids[0]);
1179 if (err < 0)
1180 return err;
1181 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1182 }
1183
1184 return 0;
1185 }
1186
1187 static int generic_hdmi_init(struct hda_codec *codec)
1188 {
1189 struct hdmi_spec *spec = codec->spec;
1190 int pin_idx;
1191
1192 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1193 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1194 hda_nid_t pin_nid = per_pin->pin_nid;
1195 struct hdmi_eld *eld = &per_pin->sink_eld;
1196
1197 hdmi_init_pin(codec, pin_nid);
1198 snd_hda_codec_write(codec, pin_nid, 0,
1199 AC_VERB_SET_UNSOLICITED_ENABLE,
1200 AC_USRSP_EN | pin_nid);
1201
1202 snd_hda_eld_proc_new(codec, eld, pin_idx);
1203 }
1204 return 0;
1205 }
1206
1207 static void generic_hdmi_free(struct hda_codec *codec)
1208 {
1209 struct hdmi_spec *spec = codec->spec;
1210 int pin_idx;
1211
1212 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1213 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1214 struct hdmi_eld *eld = &per_pin->sink_eld;
1215
1216 snd_hda_eld_proc_free(codec, eld);
1217 }
1218 snd_hda_input_jack_free(codec);
1219
1220 kfree(spec);
1221 }
1222
1223 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1224 .init = generic_hdmi_init,
1225 .free = generic_hdmi_free,
1226 .build_pcms = generic_hdmi_build_pcms,
1227 .build_controls = generic_hdmi_build_controls,
1228 .unsol_event = hdmi_unsol_event,
1229 };
1230
1231 static int patch_generic_hdmi(struct hda_codec *codec)
1232 {
1233 struct hdmi_spec *spec;
1234
1235 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1236 if (spec == NULL)
1237 return -ENOMEM;
1238
1239 codec->spec = spec;
1240 if (hdmi_parse_codec(codec) < 0) {
1241 codec->spec = NULL;
1242 kfree(spec);
1243 return -EINVAL;
1244 }
1245 codec->patch_ops = generic_hdmi_patch_ops;
1246
1247 init_channel_allocations();
1248
1249 return 0;
1250 }
1251
1252 /*
1253 * Shared non-generic implementations
1254 */
1255
1256 static int simple_playback_build_pcms(struct hda_codec *codec)
1257 {
1258 struct hdmi_spec *spec = codec->spec;
1259 struct hda_pcm *info = spec->pcm_rec;
1260 int i;
1261
1262 codec->num_pcms = spec->num_cvts;
1263 codec->pcm_info = info;
1264
1265 for (i = 0; i < codec->num_pcms; i++, info++) {
1266 unsigned int chans;
1267 struct hda_pcm_stream *pstr;
1268
1269 chans = get_wcaps(codec, spec->cvts[i].cvt_nid);
1270 chans = get_wcaps_channels(chans);
1271
1272 info->name = generic_hdmi_pcm_names[i];
1273 info->pcm_type = HDA_PCM_TYPE_HDMI;
1274 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1275 snd_BUG_ON(!spec->pcm_playback);
1276 *pstr = *spec->pcm_playback;
1277 pstr->nid = spec->cvts[i].cvt_nid;
1278 if (pstr->channels_max <= 2 && chans && chans <= 16)
1279 pstr->channels_max = chans;
1280 }
1281
1282 return 0;
1283 }
1284
1285 static int simple_playback_build_controls(struct hda_codec *codec)
1286 {
1287 struct hdmi_spec *spec = codec->spec;
1288 int err;
1289 int i;
1290
1291 for (i = 0; i < codec->num_pcms; i++) {
1292 err = snd_hda_create_spdif_out_ctls(codec,
1293 spec->cvts[i].cvt_nid,
1294 spec->cvts[i].cvt_nid);
1295 if (err < 0)
1296 return err;
1297 }
1298
1299 return 0;
1300 }
1301
1302 static void simple_playback_free(struct hda_codec *codec)
1303 {
1304 struct hdmi_spec *spec = codec->spec;
1305
1306 kfree(spec);
1307 }
1308
1309 /*
1310 * Nvidia specific implementations
1311 */
1312
1313 #define Nv_VERB_SET_Channel_Allocation 0xF79
1314 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
1315 #define Nv_VERB_SET_Audio_Protection_On 0xF98
1316 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
1317
1318 #define nvhdmi_master_con_nid_7x 0x04
1319 #define nvhdmi_master_pin_nid_7x 0x05
1320
1321 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
1322 /*front, rear, clfe, rear_surr */
1323 0x6, 0x8, 0xa, 0xc,
1324 };
1325
1326 static const struct hda_verb nvhdmi_basic_init_7x[] = {
1327 /* set audio protect on */
1328 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1329 /* enable digital output on pin widget */
1330 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1331 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1332 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1333 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1334 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1335 {} /* terminator */
1336 };
1337
1338 #ifdef LIMITED_RATE_FMT_SUPPORT
1339 /* support only the safe format and rate */
1340 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
1341 #define SUPPORTED_MAXBPS 16
1342 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
1343 #else
1344 /* support all rates and formats */
1345 #define SUPPORTED_RATES \
1346 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1347 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
1348 SNDRV_PCM_RATE_192000)
1349 #define SUPPORTED_MAXBPS 24
1350 #define SUPPORTED_FORMATS \
1351 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1352 #endif
1353
1354 static int nvhdmi_7x_init(struct hda_codec *codec)
1355 {
1356 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x);
1357 return 0;
1358 }
1359
1360 static unsigned int channels_2_6_8[] = {
1361 2, 6, 8
1362 };
1363
1364 static unsigned int channels_2_8[] = {
1365 2, 8
1366 };
1367
1368 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
1369 .count = ARRAY_SIZE(channels_2_6_8),
1370 .list = channels_2_6_8,
1371 .mask = 0,
1372 };
1373
1374 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
1375 .count = ARRAY_SIZE(channels_2_8),
1376 .list = channels_2_8,
1377 .mask = 0,
1378 };
1379
1380 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
1381 struct hda_codec *codec,
1382 struct snd_pcm_substream *substream)
1383 {
1384 struct hdmi_spec *spec = codec->spec;
1385 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
1386
1387 switch (codec->preset->id) {
1388 case 0x10de0002:
1389 case 0x10de0003:
1390 case 0x10de0005:
1391 case 0x10de0006:
1392 hw_constraints_channels = &hw_constraints_2_8_channels;
1393 break;
1394 case 0x10de0007:
1395 hw_constraints_channels = &hw_constraints_2_6_8_channels;
1396 break;
1397 default:
1398 break;
1399 }
1400
1401 if (hw_constraints_channels != NULL) {
1402 snd_pcm_hw_constraint_list(substream->runtime, 0,
1403 SNDRV_PCM_HW_PARAM_CHANNELS,
1404 hw_constraints_channels);
1405 } else {
1406 snd_pcm_hw_constraint_step(substream->runtime, 0,
1407 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1408 }
1409
1410 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1411 }
1412
1413 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
1414 struct hda_codec *codec,
1415 struct snd_pcm_substream *substream)
1416 {
1417 struct hdmi_spec *spec = codec->spec;
1418 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1419 }
1420
1421 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1422 struct hda_codec *codec,
1423 unsigned int stream_tag,
1424 unsigned int format,
1425 struct snd_pcm_substream *substream)
1426 {
1427 struct hdmi_spec *spec = codec->spec;
1428 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1429 stream_tag, format, substream);
1430 }
1431
1432 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
1433 int channels)
1434 {
1435 unsigned int chanmask;
1436 int chan = channels ? (channels - 1) : 1;
1437
1438 switch (channels) {
1439 default:
1440 case 0:
1441 case 2:
1442 chanmask = 0x00;
1443 break;
1444 case 4:
1445 chanmask = 0x08;
1446 break;
1447 case 6:
1448 chanmask = 0x0b;
1449 break;
1450 case 8:
1451 chanmask = 0x13;
1452 break;
1453 }
1454
1455 /* Set the audio infoframe channel allocation and checksum fields. The
1456 * channel count is computed implicitly by the hardware. */
1457 snd_hda_codec_write(codec, 0x1, 0,
1458 Nv_VERB_SET_Channel_Allocation, chanmask);
1459
1460 snd_hda_codec_write(codec, 0x1, 0,
1461 Nv_VERB_SET_Info_Frame_Checksum,
1462 (0x71 - chan - chanmask));
1463 }
1464
1465 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
1466 struct hda_codec *codec,
1467 struct snd_pcm_substream *substream)
1468 {
1469 struct hdmi_spec *spec = codec->spec;
1470 int i;
1471
1472 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
1473 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
1474 for (i = 0; i < 4; i++) {
1475 /* set the stream id */
1476 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1477 AC_VERB_SET_CHANNEL_STREAMID, 0);
1478 /* set the stream format */
1479 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
1480 AC_VERB_SET_STREAM_FORMAT, 0);
1481 }
1482
1483 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
1484 * streams are disabled. */
1485 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1486
1487 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1488 }
1489
1490 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
1491 struct hda_codec *codec,
1492 unsigned int stream_tag,
1493 unsigned int format,
1494 struct snd_pcm_substream *substream)
1495 {
1496 int chs;
1497 unsigned int dataDCC1, dataDCC2, channel_id;
1498 int i;
1499 struct hdmi_spec *spec = codec->spec;
1500 struct hda_spdif_out *spdif =
1501 snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid);
1502
1503 mutex_lock(&codec->spdif_mutex);
1504
1505 chs = substream->runtime->channels;
1506
1507 dataDCC1 = AC_DIG1_ENABLE | AC_DIG1_COPYRIGHT;
1508 dataDCC2 = 0x2;
1509
1510 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
1511 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
1512 snd_hda_codec_write(codec,
1513 nvhdmi_master_con_nid_7x,
1514 0,
1515 AC_VERB_SET_DIGI_CONVERT_1,
1516 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1517
1518 /* set the stream id */
1519 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1520 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
1521
1522 /* set the stream format */
1523 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
1524 AC_VERB_SET_STREAM_FORMAT, format);
1525
1526 /* turn on again (if needed) */
1527 /* enable and set the channel status audio/data flag */
1528 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
1529 snd_hda_codec_write(codec,
1530 nvhdmi_master_con_nid_7x,
1531 0,
1532 AC_VERB_SET_DIGI_CONVERT_1,
1533 spdif->ctls & 0xff);
1534 snd_hda_codec_write(codec,
1535 nvhdmi_master_con_nid_7x,
1536 0,
1537 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1538 }
1539
1540 for (i = 0; i < 4; i++) {
1541 if (chs == 2)
1542 channel_id = 0;
1543 else
1544 channel_id = i * 2;
1545
1546 /* turn off SPDIF once;
1547 *otherwise the IEC958 bits won't be updated
1548 */
1549 if (codec->spdif_status_reset &&
1550 (spdif->ctls & AC_DIG1_ENABLE))
1551 snd_hda_codec_write(codec,
1552 nvhdmi_con_nids_7x[i],
1553 0,
1554 AC_VERB_SET_DIGI_CONVERT_1,
1555 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
1556 /* set the stream id */
1557 snd_hda_codec_write(codec,
1558 nvhdmi_con_nids_7x[i],
1559 0,
1560 AC_VERB_SET_CHANNEL_STREAMID,
1561 (stream_tag << 4) | channel_id);
1562 /* set the stream format */
1563 snd_hda_codec_write(codec,
1564 nvhdmi_con_nids_7x[i],
1565 0,
1566 AC_VERB_SET_STREAM_FORMAT,
1567 format);
1568 /* turn on again (if needed) */
1569 /* enable and set the channel status audio/data flag */
1570 if (codec->spdif_status_reset &&
1571 (spdif->ctls & AC_DIG1_ENABLE)) {
1572 snd_hda_codec_write(codec,
1573 nvhdmi_con_nids_7x[i],
1574 0,
1575 AC_VERB_SET_DIGI_CONVERT_1,
1576 spdif->ctls & 0xff);
1577 snd_hda_codec_write(codec,
1578 nvhdmi_con_nids_7x[i],
1579 0,
1580 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
1581 }
1582 }
1583
1584 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
1585
1586 mutex_unlock(&codec->spdif_mutex);
1587 return 0;
1588 }
1589
1590 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
1591 .substreams = 1,
1592 .channels_min = 2,
1593 .channels_max = 8,
1594 .nid = nvhdmi_master_con_nid_7x,
1595 .rates = SUPPORTED_RATES,
1596 .maxbps = SUPPORTED_MAXBPS,
1597 .formats = SUPPORTED_FORMATS,
1598 .ops = {
1599 .open = simple_playback_pcm_open,
1600 .close = nvhdmi_8ch_7x_pcm_close,
1601 .prepare = nvhdmi_8ch_7x_pcm_prepare
1602 },
1603 };
1604
1605 static const struct hda_pcm_stream nvhdmi_pcm_playback_2ch = {
1606 .substreams = 1,
1607 .channels_min = 2,
1608 .channels_max = 2,
1609 .nid = nvhdmi_master_con_nid_7x,
1610 .rates = SUPPORTED_RATES,
1611 .maxbps = SUPPORTED_MAXBPS,
1612 .formats = SUPPORTED_FORMATS,
1613 .ops = {
1614 .open = simple_playback_pcm_open,
1615 .close = simple_playback_pcm_close,
1616 .prepare = simple_playback_pcm_prepare
1617 },
1618 };
1619
1620 static const struct hda_codec_ops nvhdmi_patch_ops_8ch_7x = {
1621 .build_controls = simple_playback_build_controls,
1622 .build_pcms = simple_playback_build_pcms,
1623 .init = nvhdmi_7x_init,
1624 .free = simple_playback_free,
1625 };
1626
1627 static const struct hda_codec_ops nvhdmi_patch_ops_2ch = {
1628 .build_controls = simple_playback_build_controls,
1629 .build_pcms = simple_playback_build_pcms,
1630 .init = nvhdmi_7x_init,
1631 .free = simple_playback_free,
1632 };
1633
1634 static int patch_nvhdmi_2ch(struct hda_codec *codec)
1635 {
1636 struct hdmi_spec *spec;
1637
1638 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1639 if (spec == NULL)
1640 return -ENOMEM;
1641
1642 codec->spec = spec;
1643
1644 spec->multiout.num_dacs = 0; /* no analog */
1645 spec->multiout.max_channels = 2;
1646 spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x;
1647 spec->num_cvts = 1;
1648 spec->cvts[0].cvt_nid = nvhdmi_master_con_nid_7x;
1649 spec->pcm_playback = &nvhdmi_pcm_playback_2ch;
1650
1651 codec->patch_ops = nvhdmi_patch_ops_2ch;
1652
1653 return 0;
1654 }
1655
1656 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
1657 {
1658 struct hdmi_spec *spec;
1659 int err = patch_nvhdmi_2ch(codec);
1660
1661 if (err < 0)
1662 return err;
1663 spec = codec->spec;
1664 spec->multiout.max_channels = 8;
1665 spec->pcm_playback = &nvhdmi_pcm_playback_8ch_7x;
1666 codec->patch_ops = nvhdmi_patch_ops_8ch_7x;
1667
1668 /* Initialize the audio infoframe channel mask and checksum to something
1669 * valid */
1670 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
1671
1672 return 0;
1673 }
1674
1675 /*
1676 * ATI-specific implementations
1677 *
1678 * FIXME: we may omit the whole this and use the generic code once after
1679 * it's confirmed to work.
1680 */
1681
1682 #define ATIHDMI_CVT_NID 0x02 /* audio converter */
1683 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
1684
1685 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1686 struct hda_codec *codec,
1687 unsigned int stream_tag,
1688 unsigned int format,
1689 struct snd_pcm_substream *substream)
1690 {
1691 struct hdmi_spec *spec = codec->spec;
1692 int chans = substream->runtime->channels;
1693 int i, err;
1694
1695 err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
1696 substream);
1697 if (err < 0)
1698 return err;
1699 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1700 AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
1701 /* FIXME: XXX */
1702 for (i = 0; i < chans; i++) {
1703 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
1704 AC_VERB_SET_HDMI_CHAN_SLOT,
1705 (i << 4) | i);
1706 }
1707 return 0;
1708 }
1709
1710 static const struct hda_pcm_stream atihdmi_pcm_digital_playback = {
1711 .substreams = 1,
1712 .channels_min = 2,
1713 .channels_max = 2,
1714 .nid = ATIHDMI_CVT_NID,
1715 .ops = {
1716 .open = simple_playback_pcm_open,
1717 .close = simple_playback_pcm_close,
1718 .prepare = atihdmi_playback_pcm_prepare
1719 },
1720 };
1721
1722 static const struct hda_verb atihdmi_basic_init[] = {
1723 /* enable digital output on pin widget */
1724 { 0x03, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },
1725 {} /* terminator */
1726 };
1727
1728 static int atihdmi_init(struct hda_codec *codec)
1729 {
1730 struct hdmi_spec *spec = codec->spec;
1731
1732 snd_hda_sequence_write(codec, atihdmi_basic_init);
1733 /* SI codec requires to unmute the pin */
1734 if (get_wcaps(codec, spec->pins[0].pin_nid) & AC_WCAP_OUT_AMP)
1735 snd_hda_codec_write(codec, spec->pins[0].pin_nid, 0,
1736 AC_VERB_SET_AMP_GAIN_MUTE,
1737 AMP_OUT_UNMUTE);
1738 return 0;
1739 }
1740
1741 static const struct hda_codec_ops atihdmi_patch_ops = {
1742 .build_controls = simple_playback_build_controls,
1743 .build_pcms = simple_playback_build_pcms,
1744 .init = atihdmi_init,
1745 .free = simple_playback_free,
1746 };
1747
1748
1749 static int patch_atihdmi(struct hda_codec *codec)
1750 {
1751 struct hdmi_spec *spec;
1752
1753 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1754 if (spec == NULL)
1755 return -ENOMEM;
1756
1757 codec->spec = spec;
1758
1759 spec->multiout.num_dacs = 0; /* no analog */
1760 spec->multiout.max_channels = 2;
1761 spec->multiout.dig_out_nid = ATIHDMI_CVT_NID;
1762 spec->num_cvts = 1;
1763 spec->cvts[0].cvt_nid = ATIHDMI_CVT_NID;
1764 spec->pins[0].pin_nid = ATIHDMI_PIN_NID;
1765 spec->pcm_playback = &atihdmi_pcm_digital_playback;
1766
1767 codec->patch_ops = atihdmi_patch_ops;
1768
1769 return 0;
1770 }
1771
1772
1773 /*
1774 * patch entries
1775 */
1776 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
1777 { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
1778 { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
1779 { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
1780 { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
1781 { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
1782 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
1783 { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
1784 { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
1785 { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
1786 { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
1787 { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
1788 { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
1789 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
1790 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
1791 { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
1792 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
1793 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
1794 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
1795 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
1796 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
1797 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
1798 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
1799 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
1800 /* 17 is known to be absent */
1801 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
1802 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
1803 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
1804 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
1805 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
1806 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
1807 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
1808 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
1809 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
1810 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
1811 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
1812 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
1813 { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
1814 { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
1815 { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
1816 { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
1817 { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
1818 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
1819 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
1820 { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
1821 {} /* terminator */
1822 };
1823
1824 MODULE_ALIAS("snd-hda-codec-id:1002793c");
1825 MODULE_ALIAS("snd-hda-codec-id:10027919");
1826 MODULE_ALIAS("snd-hda-codec-id:1002791a");
1827 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
1828 MODULE_ALIAS("snd-hda-codec-id:10951390");
1829 MODULE_ALIAS("snd-hda-codec-id:10951392");
1830 MODULE_ALIAS("snd-hda-codec-id:10de0002");
1831 MODULE_ALIAS("snd-hda-codec-id:10de0003");
1832 MODULE_ALIAS("snd-hda-codec-id:10de0005");
1833 MODULE_ALIAS("snd-hda-codec-id:10de0006");
1834 MODULE_ALIAS("snd-hda-codec-id:10de0007");
1835 MODULE_ALIAS("snd-hda-codec-id:10de000a");
1836 MODULE_ALIAS("snd-hda-codec-id:10de000b");
1837 MODULE_ALIAS("snd-hda-codec-id:10de000c");
1838 MODULE_ALIAS("snd-hda-codec-id:10de000d");
1839 MODULE_ALIAS("snd-hda-codec-id:10de0010");
1840 MODULE_ALIAS("snd-hda-codec-id:10de0011");
1841 MODULE_ALIAS("snd-hda-codec-id:10de0012");
1842 MODULE_ALIAS("snd-hda-codec-id:10de0013");
1843 MODULE_ALIAS("snd-hda-codec-id:10de0014");
1844 MODULE_ALIAS("snd-hda-codec-id:10de0015");
1845 MODULE_ALIAS("snd-hda-codec-id:10de0016");
1846 MODULE_ALIAS("snd-hda-codec-id:10de0018");
1847 MODULE_ALIAS("snd-hda-codec-id:10de0019");
1848 MODULE_ALIAS("snd-hda-codec-id:10de001a");
1849 MODULE_ALIAS("snd-hda-codec-id:10de001b");
1850 MODULE_ALIAS("snd-hda-codec-id:10de001c");
1851 MODULE_ALIAS("snd-hda-codec-id:10de0040");
1852 MODULE_ALIAS("snd-hda-codec-id:10de0041");
1853 MODULE_ALIAS("snd-hda-codec-id:10de0042");
1854 MODULE_ALIAS("snd-hda-codec-id:10de0043");
1855 MODULE_ALIAS("snd-hda-codec-id:10de0044");
1856 MODULE_ALIAS("snd-hda-codec-id:10de0067");
1857 MODULE_ALIAS("snd-hda-codec-id:10de8001");
1858 MODULE_ALIAS("snd-hda-codec-id:17e80047");
1859 MODULE_ALIAS("snd-hda-codec-id:80860054");
1860 MODULE_ALIAS("snd-hda-codec-id:80862801");
1861 MODULE_ALIAS("snd-hda-codec-id:80862802");
1862 MODULE_ALIAS("snd-hda-codec-id:80862803");
1863 MODULE_ALIAS("snd-hda-codec-id:80862804");
1864 MODULE_ALIAS("snd-hda-codec-id:80862805");
1865 MODULE_ALIAS("snd-hda-codec-id:80862806");
1866 MODULE_ALIAS("snd-hda-codec-id:808629fb");
1867
1868 MODULE_LICENSE("GPL");
1869 MODULE_DESCRIPTION("HDMI HD-audio codec");
1870 MODULE_ALIAS("snd-hda-codec-intelhdmi");
1871 MODULE_ALIAS("snd-hda-codec-nvhdmi");
1872 MODULE_ALIAS("snd-hda-codec-atihdmi");
1873
1874 static struct hda_codec_preset_list intel_list = {
1875 .preset = snd_hda_preset_hdmi,
1876 .owner = THIS_MODULE,
1877 };
1878
1879 static int __init patch_hdmi_init(void)
1880 {
1881 return snd_hda_add_codec_preset(&intel_list);
1882 }
1883
1884 static void __exit patch_hdmi_exit(void)
1885 {
1886 snd_hda_delete_codec_preset(&intel_list);
1887 }
1888
1889 module_init(patch_hdmi_init)
1890 module_exit(patch_hdmi_exit)
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree