2 * arch/arm/mach-pnx4008/core.c
4 * PNX4008 core startup code
6 * Authors: Vitaly Wool, Dmitry Chigirev,
7 * Grigory Tolstolytkin, Dmitry Pervushin <source@mvista.com>
9 * Based on reference code received from Philips:
10 * Copyright (C) 2003 Philips Semiconductors
12 * 2005 (c) MontaVista Software, Inc. This file is licensed under
13 * the terms of the GNU General Public License version 2. This program
14 * is licensed "as is" without any warranty of any kind, whether express
18 #include <linux/kernel.h>
19 #include <linux/types.h>
21 #include <linux/interrupt.h>
22 #include <linux/list.h>
23 #include <linux/init.h>
24 #include <linux/ioport.h>
25 #include <linux/serial_8250.h>
26 #include <linux/device.h>
27 #include <linux/spi/spi.h>
30 #include <mach/hardware.h>
31 #include <asm/setup.h>
32 #include <asm/mach-types.h>
33 #include <asm/pgtable.h>
35 #include <asm/system.h>
37 #include <asm/mach/arch.h>
38 #include <asm/mach/map.h>
39 #include <asm/mach/time.h>
42 #include <mach/clock.h>
45 struct resource spipnx_0_resources
[] = {
47 .start
= PNX4008_SPI1_BASE
,
48 .end
= PNX4008_SPI1_BASE
+ SZ_4K
,
49 .flags
= IORESOURCE_MEM
,
51 .start
= PER_SPI1_REC_XMIT
,
52 .flags
= IORESOURCE_DMA
,
55 .flags
= IORESOURCE_IRQ
,
61 struct resource spipnx_1_resources
[] = {
63 .start
= PNX4008_SPI2_BASE
,
64 .end
= PNX4008_SPI2_BASE
+ SZ_4K
,
65 .flags
= IORESOURCE_MEM
,
67 .start
= PER_SPI2_REC_XMIT
,
68 .flags
= IORESOURCE_DMA
,
71 .flags
= IORESOURCE_IRQ
,
77 static struct spi_board_info spi_board_info
[] __initdata
= {
80 .max_speed_hz
= 1000000,
86 static struct platform_device spipnx_1
= {
89 .num_resources
= ARRAY_SIZE(spipnx_0_resources
),
90 .resource
= spipnx_0_resources
,
92 .coherent_dma_mask
= 0xFFFFFFFF,
96 static struct platform_device spipnx_2
= {
99 .num_resources
= ARRAY_SIZE(spipnx_1_resources
),
100 .resource
= spipnx_1_resources
,
102 .coherent_dma_mask
= 0xFFFFFFFF,
106 static struct plat_serial8250_port platform_serial_ports
[] = {
108 .membase
= (void *)__iomem(IO_ADDRESS(PNX4008_UART5_BASE
)),
109 .mapbase
= (unsigned long)PNX4008_UART5_BASE
,
111 .uartclk
= PNX4008_UART_CLK
,
114 .flags
= UPF_BOOT_AUTOCONF
| UPF_BUGGY_UART
| UPF_SKIP_TEST
,
117 .membase
= (void *)__iomem(IO_ADDRESS(PNX4008_UART3_BASE
)),
118 .mapbase
= (unsigned long)PNX4008_UART3_BASE
,
120 .uartclk
= PNX4008_UART_CLK
,
123 .flags
= UPF_BOOT_AUTOCONF
| UPF_BUGGY_UART
| UPF_SKIP_TEST
,
128 static struct platform_device serial_device
= {
129 .name
= "serial8250",
130 .id
= PLAT8250_DEV_PLATFORM
,
132 .platform_data
= &platform_serial_ports
,
136 static struct platform_device nand_flash_device
= {
137 .name
= "pnx4008-flash",
140 .coherent_dma_mask
= 0xFFFFFFFF,
144 /* The dmamask must be set for OHCI to work */
145 static u64 ohci_dmamask
= ~(u32
) 0;
147 static struct resource ohci_resources
[] = {
149 .start
= IO_ADDRESS(PNX4008_USB_CONFIG_BASE
),
150 .end
= IO_ADDRESS(PNX4008_USB_CONFIG_BASE
+ 0x100),
151 .flags
= IORESOURCE_MEM
,
153 .start
= USB_HOST_INT
,
154 .flags
= IORESOURCE_IRQ
,
158 static struct platform_device ohci_device
= {
159 .name
= "pnx4008-usb-ohci",
162 .dma_mask
= &ohci_dmamask
,
163 .coherent_dma_mask
= 0xffffffff,
165 .num_resources
= ARRAY_SIZE(ohci_resources
),
166 .resource
= ohci_resources
,
169 static struct platform_device sdum_device
= {
170 .name
= "pnx4008-sdum",
173 .coherent_dma_mask
= 0xffffffff,
177 static struct platform_device rgbfb_device
= {
178 .name
= "pnx4008-rgbfb",
181 .coherent_dma_mask
= 0xffffffff,
185 struct resource watchdog_resources
[] = {
187 .start
= PNX4008_WDOG_BASE
,
188 .end
= PNX4008_WDOG_BASE
+ SZ_4K
- 1,
189 .flags
= IORESOURCE_MEM
,
193 static struct platform_device watchdog_device
= {
194 .name
= "pnx4008-watchdog",
196 .num_resources
= ARRAY_SIZE(watchdog_resources
),
197 .resource
= watchdog_resources
,
200 static struct platform_device
*devices
[] __initdata
= {
212 extern void pnx4008_uart_init(void);
214 static void __init
pnx4008_init(void)
216 /*disable all START interrupt sources,
217 and clear all START interrupt flags */
218 __raw_writel(0, START_INT_ER_REG(SE_PIN_BASE_INT
));
219 __raw_writel(0, START_INT_ER_REG(SE_INT_BASE_INT
));
220 __raw_writel(0xffffffff, START_INT_RSR_REG(SE_PIN_BASE_INT
));
221 __raw_writel(0xffffffff, START_INT_RSR_REG(SE_INT_BASE_INT
));
223 platform_add_devices(devices
, ARRAY_SIZE(devices
));
224 spi_register_board_info(spi_board_info
, ARRAY_SIZE(spi_board_info
));
225 /* Switch on the UART clocks */
229 static struct map_desc pnx4008_io_desc
[] __initdata
= {
231 .virtual = IO_ADDRESS(PNX4008_IRAM_BASE
),
232 .pfn
= __phys_to_pfn(PNX4008_IRAM_BASE
),
236 .virtual = IO_ADDRESS(PNX4008_NDF_FLASH_BASE
),
237 .pfn
= __phys_to_pfn(PNX4008_NDF_FLASH_BASE
),
238 .length
= SZ_1M
- SZ_128K
,
241 .virtual = IO_ADDRESS(PNX4008_JPEG_CONFIG_BASE
),
242 .pfn
= __phys_to_pfn(PNX4008_JPEG_CONFIG_BASE
),
243 .length
= SZ_128K
* 3,
246 .virtual = IO_ADDRESS(PNX4008_DMA_CONFIG_BASE
),
247 .pfn
= __phys_to_pfn(PNX4008_DMA_CONFIG_BASE
),
251 .virtual = IO_ADDRESS(PNX4008_AHB2FAB_BASE
),
252 .pfn
= __phys_to_pfn(PNX4008_AHB2FAB_BASE
),
258 void __init
pnx4008_map_io(void)
260 iotable_init(pnx4008_io_desc
, ARRAY_SIZE(pnx4008_io_desc
));
263 extern struct sys_timer pnx4008_timer
;
265 MACHINE_START(PNX4008
, "Philips PNX4008")
266 /* Maintainer: MontaVista Software Inc. */
267 .phys_io
= 0x40090000,
268 .io_pg_offst
= (0xf4090000 >> 18) & 0xfffc,
269 .boot_params
= 0x80000100,
270 .map_io
= pnx4008_map_io
,
271 .init_irq
= pnx4008_init_irq
,
272 .init_machine
= pnx4008_init
,
273 .timer
= &pnx4008_timer
,