2 * Common interrupt code for 32 and 64 bit
5 #include <linux/interrupt.h>
6 #include <linux/kernel_stat.h>
7 #include <linux/seq_file.h>
9 #include <linux/ftrace.h>
12 #include <asm/io_apic.h>
16 #include <asm/hw_irq.h>
18 atomic_t irq_err_count
;
20 /* Function pointer for generic interrupt vector handling */
21 void (*x86_platform_ipi_callback
)(void) = NULL
;
24 * 'what should we do if we get a hw irq event on an illegal vector'.
25 * each architecture has to answer this themselves.
27 void ack_bad_irq(unsigned int irq
)
29 if (printk_ratelimit())
30 pr_err("unexpected IRQ trap at vector %02x\n", irq
);
33 * Currently unexpected vectors happen only on SMP and APIC.
34 * We _must_ ack these because every local APIC has only N
35 * irq slots per priority level, and a 'hanging, unacked' IRQ
36 * holds up an irq slot - in excessive cases (when multiple
37 * unexpected vectors occur) that might lock up the APIC
39 * But only ack when the APIC is enabled -AK
44 #define irq_stats(x) (&per_cpu(irq_stat, x))
46 * /proc/interrupts printing:
48 static int show_other_interrupts(struct seq_file
*p
, int prec
)
52 seq_printf(p
, "%*s: ", prec
, "NMI");
53 for_each_online_cpu(j
)
54 seq_printf(p
, "%10u ", irq_stats(j
)->__nmi_count
);
55 seq_printf(p
, " Non-maskable interrupts\n");
56 #ifdef CONFIG_X86_LOCAL_APIC
57 seq_printf(p
, "%*s: ", prec
, "LOC");
58 for_each_online_cpu(j
)
59 seq_printf(p
, "%10u ", irq_stats(j
)->apic_timer_irqs
);
60 seq_printf(p
, " Local timer interrupts\n");
62 seq_printf(p
, "%*s: ", prec
, "SPU");
63 for_each_online_cpu(j
)
64 seq_printf(p
, "%10u ", irq_stats(j
)->irq_spurious_count
);
65 seq_printf(p
, " Spurious interrupts\n");
66 seq_printf(p
, "%*s: ", prec
, "PMI");
67 for_each_online_cpu(j
)
68 seq_printf(p
, "%10u ", irq_stats(j
)->apic_perf_irqs
);
69 seq_printf(p
, " Performance monitoring interrupts\n");
70 seq_printf(p
, "%*s: ", prec
, "PND");
71 for_each_online_cpu(j
)
72 seq_printf(p
, "%10u ", irq_stats(j
)->apic_pending_irqs
);
73 seq_printf(p
, " Performance pending work\n");
75 if (x86_platform_ipi_callback
) {
76 seq_printf(p
, "%*s: ", prec
, "PLT");
77 for_each_online_cpu(j
)
78 seq_printf(p
, "%10u ", irq_stats(j
)->x86_platform_ipis
);
79 seq_printf(p
, " Platform interrupts\n");
82 seq_printf(p
, "%*s: ", prec
, "RES");
83 for_each_online_cpu(j
)
84 seq_printf(p
, "%10u ", irq_stats(j
)->irq_resched_count
);
85 seq_printf(p
, " Rescheduling interrupts\n");
86 seq_printf(p
, "%*s: ", prec
, "CAL");
87 for_each_online_cpu(j
)
88 seq_printf(p
, "%10u ", irq_stats(j
)->irq_call_count
);
89 seq_printf(p
, " Function call interrupts\n");
90 seq_printf(p
, "%*s: ", prec
, "TLB");
91 for_each_online_cpu(j
)
92 seq_printf(p
, "%10u ", irq_stats(j
)->irq_tlb_count
);
93 seq_printf(p
, " TLB shootdowns\n");
95 #ifdef CONFIG_X86_THERMAL_VECTOR
96 seq_printf(p
, "%*s: ", prec
, "TRM");
97 for_each_online_cpu(j
)
98 seq_printf(p
, "%10u ", irq_stats(j
)->irq_thermal_count
);
99 seq_printf(p
, " Thermal event interrupts\n");
101 #ifdef CONFIG_X86_MCE_THRESHOLD
102 seq_printf(p
, "%*s: ", prec
, "THR");
103 for_each_online_cpu(j
)
104 seq_printf(p
, "%10u ", irq_stats(j
)->irq_threshold_count
);
105 seq_printf(p
, " Threshold APIC interrupts\n");
107 #ifdef CONFIG_X86_MCE
108 seq_printf(p
, "%*s: ", prec
, "MCE");
109 for_each_online_cpu(j
)
110 seq_printf(p
, "%10u ", per_cpu(mce_exception_count
, j
));
111 seq_printf(p
, " Machine check exceptions\n");
112 seq_printf(p
, "%*s: ", prec
, "MCP");
113 for_each_online_cpu(j
)
114 seq_printf(p
, "%10u ", per_cpu(mce_poll_count
, j
));
115 seq_printf(p
, " Machine check polls\n");
117 seq_printf(p
, "%*s: %10u\n", prec
, "ERR", atomic_read(&irq_err_count
));
118 #if defined(CONFIG_X86_IO_APIC)
119 seq_printf(p
, "%*s: %10u\n", prec
, "MIS", atomic_read(&irq_mis_count
));
124 int show_interrupts(struct seq_file
*p
, void *v
)
126 unsigned long flags
, any_count
= 0;
127 int i
= *(loff_t
*) v
, j
, prec
;
128 struct irqaction
*action
;
129 struct irq_desc
*desc
;
134 for (prec
= 3, j
= 1000; prec
< 10 && j
<= nr_irqs
; ++prec
)
138 return show_other_interrupts(p
, prec
);
142 seq_printf(p
, "%*s", prec
+ 8, "");
143 for_each_online_cpu(j
)
144 seq_printf(p
, "CPU%-8d", j
);
148 desc
= irq_to_desc(i
);
152 spin_lock_irqsave(&desc
->lock
, flags
);
153 for_each_online_cpu(j
)
154 any_count
|= kstat_irqs_cpu(i
, j
);
155 action
= desc
->action
;
156 if (!action
&& !any_count
)
159 seq_printf(p
, "%*d: ", prec
, i
);
160 for_each_online_cpu(j
)
161 seq_printf(p
, "%10u ", kstat_irqs_cpu(i
, j
));
162 seq_printf(p
, " %8s", desc
->chip
->name
);
163 seq_printf(p
, "-%-8s", desc
->name
);
166 seq_printf(p
, " %s", action
->name
);
167 while ((action
= action
->next
) != NULL
)
168 seq_printf(p
, ", %s", action
->name
);
173 spin_unlock_irqrestore(&desc
->lock
, flags
);
180 u64
arch_irq_stat_cpu(unsigned int cpu
)
182 u64 sum
= irq_stats(cpu
)->__nmi_count
;
184 #ifdef CONFIG_X86_LOCAL_APIC
185 sum
+= irq_stats(cpu
)->apic_timer_irqs
;
186 sum
+= irq_stats(cpu
)->irq_spurious_count
;
187 sum
+= irq_stats(cpu
)->apic_perf_irqs
;
188 sum
+= irq_stats(cpu
)->apic_pending_irqs
;
190 if (x86_platform_ipi_callback
)
191 sum
+= irq_stats(cpu
)->x86_platform_ipis
;
193 sum
+= irq_stats(cpu
)->irq_resched_count
;
194 sum
+= irq_stats(cpu
)->irq_call_count
;
195 sum
+= irq_stats(cpu
)->irq_tlb_count
;
197 #ifdef CONFIG_X86_THERMAL_VECTOR
198 sum
+= irq_stats(cpu
)->irq_thermal_count
;
200 #ifdef CONFIG_X86_MCE_THRESHOLD
201 sum
+= irq_stats(cpu
)->irq_threshold_count
;
203 #ifdef CONFIG_X86_MCE
204 sum
+= per_cpu(mce_exception_count
, cpu
);
205 sum
+= per_cpu(mce_poll_count
, cpu
);
210 u64
arch_irq_stat(void)
212 u64 sum
= atomic_read(&irq_err_count
);
214 #ifdef CONFIG_X86_IO_APIC
215 sum
+= atomic_read(&irq_mis_count
);
222 * do_IRQ handles all normal device IRQ's (the special
223 * SMP cross-CPU interrupts have their own specific
226 unsigned int __irq_entry
do_IRQ(struct pt_regs
*regs
)
228 struct pt_regs
*old_regs
= set_irq_regs(regs
);
230 /* high bit used in ret_from_ code */
231 unsigned vector
= ~regs
->orig_ax
;
237 irq
= __get_cpu_var(vector_irq
)[vector
];
239 if (!handle_irq(irq
, regs
)) {
242 if (printk_ratelimit())
243 pr_emerg("%s: %d.%d No irq handler for vector (irq %d)\n",
244 __func__
, smp_processor_id(), vector
, irq
);
249 set_irq_regs(old_regs
);
254 * Handler for X86_PLATFORM_IPI_VECTOR.
256 void smp_x86_platform_ipi(struct pt_regs
*regs
)
258 struct pt_regs
*old_regs
= set_irq_regs(regs
);
266 inc_irq_stat(x86_platform_ipis
);
268 if (x86_platform_ipi_callback
)
269 x86_platform_ipi_callback();
273 set_irq_regs(old_regs
);
276 EXPORT_SYMBOL_GPL(vector_used_by_percpu_irq
);
278 #ifdef CONFIG_HOTPLUG_CPU
279 /* A cpu has been removed from cpu_online_mask. Reset irq affinities. */
280 void fixup_irqs(void)
282 unsigned int irq
, vector
;
284 struct irq_desc
*desc
;
286 for_each_irq_desc(irq
, desc
) {
287 int break_affinity
= 0;
288 int set_affinity
= 1;
289 const struct cpumask
*affinity
;
296 /* interrupt's are disabled at this point */
297 spin_lock(&desc
->lock
);
299 affinity
= desc
->affinity
;
300 if (!irq_has_action(irq
) ||
301 cpumask_equal(affinity
, cpu_online_mask
)) {
302 spin_unlock(&desc
->lock
);
307 * Complete the irq move. This cpu is going down and for
308 * non intr-remapping case, we can't wait till this interrupt
309 * arrives at this cpu before completing the irq move.
311 irq_force_complete_move(irq
);
313 if (cpumask_any_and(affinity
, cpu_online_mask
) >= nr_cpu_ids
) {
315 affinity
= cpu_all_mask
;
318 if (!(desc
->status
& IRQ_MOVE_PCNTXT
) && desc
->chip
->mask
)
319 desc
->chip
->mask(irq
);
321 if (desc
->chip
->set_affinity
)
322 desc
->chip
->set_affinity(irq
, affinity
);
323 else if (!(warned
++))
326 if (!(desc
->status
& IRQ_MOVE_PCNTXT
) && desc
->chip
->unmask
)
327 desc
->chip
->unmask(irq
);
329 spin_unlock(&desc
->lock
);
331 if (break_affinity
&& set_affinity
)
332 printk("Broke affinity for irq %i\n", irq
);
333 else if (!set_affinity
)
334 printk("Cannot set affinity for irq %i\n", irq
);
338 * We can remove mdelay() and then send spuriuous interrupts to
339 * new cpu targets for all the irqs that were handled previously by
340 * this cpu. While it works, I have seen spurious interrupt messages
341 * (nothing wrong but still...).
343 * So for now, retain mdelay(1) and check the IRR and then send those
344 * interrupts to new targets as this cpu is already offlined...
348 for (vector
= FIRST_EXTERNAL_VECTOR
; vector
< NR_VECTORS
; vector
++) {
351 if (__get_cpu_var(vector_irq
)[vector
] < 0)
354 irr
= apic_read(APIC_IRR
+ (vector
/ 32 * 0x10));
355 if (irr
& (1 << (vector
% 32))) {
356 irq
= __get_cpu_var(vector_irq
)[vector
];
358 desc
= irq_to_desc(irq
);
359 spin_lock(&desc
->lock
);
360 if (desc
->chip
->retrigger
)
361 desc
->chip
->retrigger(irq
);
362 spin_unlock(&desc
->lock
);