arch/arm/plat-mxc/include/mach/uncompress.h

   1 /*
   2  *  arch/arm/plat-mxc/include/mach/uncompress.h
   3  *
   4  *  Copyright (C) 1999 ARM Limited
   5  *  Copyright (C) Shane Nay (shane@minirl.com)
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21 #ifndef __ASM_ARCH_MXC_UNCOMPRESS_H__
  22 #define __ASM_ARCH_MXC_UNCOMPRESS_H__
  23
  24 #define __MXC_BOOT_UNCOMPRESS
  25
  26 #include <asm/mach-types.h>
  27
  28 static unsigned long uart_base;
  29
  30 #define UART(x) (*(volatile unsigned long *)(uart_base + (x)))
  31
  32 #define USR2 0x98
  33 #define USR2_TXFE (1<<14)
  34 #define TXR  0x40
  35 #define UCR1 0x80
  36 #define UCR1_UARTEN 1
  37
  38 /*
  39  * The following code assumes the serial port has already been
  40  * initialized by the bootloader.  We search for the first enabled
  41  * port in the most probable order.  If you didn't setup a port in
  42  * your bootloader then nothing will appear (which might be desired).
  43  *
  44  * This does not append a newline
  45  */
  46
  47 static void putc(int ch)
  48 {
  49         if (!uart_base)
  50                 return;
  51         if (!(UART(UCR1) & UCR1_UARTEN))
  52                 return;
  53
  54         while (!(UART(USR2) & USR2_TXFE))
  55                 barrier();
  56
  57         UART(TXR) = ch;
  58 }
  59
  60 #define flush() do { } while (0)
  61
  62 #define MX1_UART1_BASE_ADDR     0x00206000
  63 #define MX25_UART1_BASE_ADDR    0x43f90000
  64 #define MX2X_UART1_BASE_ADDR    0x1000a000
  65 #define MX3X_UART1_BASE_ADDR    0x43F90000
  66 #define MX3X_UART2_BASE_ADDR    0x43F94000
  67
  68 static __inline__ void __arch_decomp_setup(unsigned long arch_id)
  69 {
  70         switch (arch_id) {
  71         case MACH_TYPE_MX1ADS:
  72         case MACH_TYPE_SCB9328:
  73                 uart_base = MX1_UART1_BASE_ADDR;
  74                 break;
  75         case MACH_TYPE_MX25_3DS:
  76                 uart_base = MX25_UART1_BASE_ADDR;
  77                 break;
  78         case MACH_TYPE_IMX27LITE:
  79         case MACH_TYPE_MX27_3DS:
  80         case MACH_TYPE_MX27ADS:
  81         case MACH_TYPE_PCM038:
  82         case MACH_TYPE_MX21ADS:
  83         case MACH_TYPE_PCA100:
  84         case MACH_TYPE_MXT_TD60:
  85                 uart_base = MX2X_UART1_BASE_ADDR;
  86                 break;
  87         case MACH_TYPE_MX31LITE:
  88         case MACH_TYPE_ARMADILLO5X0:
  89         case MACH_TYPE_MX31MOBOARD:
  90         case MACH_TYPE_QONG:
  91         case MACH_TYPE_MX31_3DS:
  92         case MACH_TYPE_PCM037:
  93         case MACH_TYPE_MX31ADS:
  94         case MACH_TYPE_MX35_3DS:
  95         case MACH_TYPE_PCM043:
  96         case MACH_TYPE_LILLY1131:
  97                 uart_base = MX3X_UART1_BASE_ADDR;
  98                 break;
  99         case MACH_TYPE_MAGX_ZN5:
 100                 uart_base = MX3X_UART2_BASE_ADDR;
 101                 break;
 102         default:
 103                 break;
 104         }
 105 }
 106
 107 #define arch_decomp_setup()     __arch_decomp_setup(arch_id)
 108 #define arch_decomp_wdog()
 109
 110 #endif                          /* __ASM_ARCH_MXC_UNCOMPRESS_H__ */