[PATCH] orinoco: don't put PCI resource data to the network device
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / orinoco_plx.c
blob84f696c77551e1ce420a6e7341e0a3f0717e73c7
1 /* orinoco_plx.c
3 * Driver for Prism II devices which would usually be driven by orinoco_cs,
4 * but are connected to the PCI bus by a PLX9052.
6 * Current maintainers are:
7 * Pavel Roskin <proski AT gnu.org>
8 * and David Gibson <hermes AT gibson.dropbear.id.au>
10 * (C) Copyright David Gibson, IBM Corp. 2001-2003.
11 * Copyright (C) 2001 Daniel Barlow
13 * The contents of this file are subject to the Mozilla Public License
14 * Version 1.1 (the "License"); you may not use this file except in
15 * compliance with the License. You may obtain a copy of the License
16 * at http://www.mozilla.org/MPL/
18 * Software distributed under the License is distributed on an "AS IS"
19 * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See
20 * the License for the specific language governing rights and
21 * limitations under the License.
23 * Alternatively, the contents of this file may be used under the
24 * terms of the GNU General Public License version 2 (the "GPL"), in
25 * which case the provisions of the GPL are applicable instead of the
26 * above. If you wish to allow the use of your version of this file
27 * only under the terms of the GPL and not to allow others to use your
28 * version of this file under the MPL, indicate your decision by
29 * deleting the provisions above and replace them with the notice and
30 * other provisions required by the GPL. If you do not delete the
31 * provisions above, a recipient may use your version of this file
32 * under either the MPL or the GPL.
34 * Here's the general details on how the PLX9052 adapter works:
36 * - Two PCI I/O address spaces, one 0x80 long which contains the
37 * PLX9052 registers, and one that's 0x40 long mapped to the PCMCIA
38 * slot I/O address space.
40 * - One PCI memory address space, mapped to the PCMCIA attribute space
41 * (containing the CIS).
43 * Using the later, you can read through the CIS data to make sure the
44 * card is compatible with the driver. Keep in mind that the PCMCIA
45 * spec specifies the CIS as the lower 8 bits of each word read from
46 * the CIS, so to read the bytes of the CIS, read every other byte
47 * (0,2,4,...). Passing that test, you need to enable the I/O address
48 * space on the PCMCIA card via the PCMCIA COR register. This is the
49 * first byte following the CIS. In my case (which may not have any
50 * relation to what's on the PRISM2 cards), COR was at offset 0x800
51 * within the PCI memory space. Write 0x41 to the COR register to
52 * enable I/O mode and to select level triggered interrupts. To
53 * confirm you actually succeeded, read the COR register back and make
54 * sure it actually got set to 0x41, in case you have an unexpected
55 * card inserted.
57 * Following that, you can treat the second PCI I/O address space (the
58 * one that's not 0x80 in length) as the PCMCIA I/O space.
60 * Note that in the Eumitcom's source for their drivers, they register
61 * the interrupt as edge triggered when registering it with the
62 * Windows kernel. I don't recall how to register edge triggered on
63 * Linux (if it can be done at all). But in some experimentation, I
64 * don't see much operational difference between using either
65 * interrupt mode. Don't mess with the interrupt mode in the COR
66 * register though, as the PLX9052 wants level triggers with the way
67 * the serial EEPROM configures it on the WL11000.
69 * There's some other little quirks related to timing that I bumped
70 * into, but I don't recall right now. Also, there's two variants of
71 * the WL11000 I've seen, revision A1 and T2. These seem to differ
72 * slightly in the timings configured in the wait-state generator in
73 * the PLX9052. There have also been some comments from Eumitcom that
74 * cards shouldn't be hot swapped, apparently due to risk of cooking
75 * the PLX9052. I'm unsure why they believe this, as I can't see
76 * anything in the design that would really cause a problem, except
77 * for crashing drivers not written to expect it. And having developed
78 * drivers for the WL11000, I'd say it's quite tricky to write code
79 * that will successfully deal with a hot unplug. Very odd things
80 * happen on the I/O side of things. But anyway, be warned. Despite
81 * that, I've hot-swapped a number of times during debugging and
82 * driver development for various reasons (stuck WAIT# line after the
83 * radio card's firmware locks up).
86 #define DRIVER_NAME "orinoco_plx"
87 #define PFX DRIVER_NAME ": "
89 #include <linux/config.h>
90 #include <linux/module.h>
91 #include <linux/kernel.h>
92 #include <linux/init.h>
93 #include <linux/delay.h>
94 #include <linux/pci.h>
95 #include <pcmcia/cisreg.h>
97 #include "orinoco.h"
98 #include "orinoco_pci.h"
100 #define COR_OFFSET (0x3e0) /* COR attribute offset of Prism2 PC card */
101 #define COR_VALUE (COR_LEVEL_REQ | COR_FUNC_ENA) /* Enable PC card with interrupt in level trigger */
102 #define COR_RESET (0x80) /* reset bit in the COR register */
103 #define PLX_RESET_TIME (500) /* milliseconds */
105 #define PLX_INTCSR 0x4c /* Interrupt Control & Status Register */
106 #define PLX_INTCSR_INTEN (1<<6) /* Interrupt Enable bit */
109 * Do a soft reset of the card using the Configuration Option Register
111 static int orinoco_plx_cor_reset(struct orinoco_private *priv)
113 hermes_t *hw = &priv->hw;
114 struct orinoco_pci_card *card = priv->card;
115 unsigned long timeout;
116 u16 reg;
118 iowrite8(COR_VALUE | COR_RESET, card->attr_io + COR_OFFSET);
119 mdelay(1);
121 iowrite8(COR_VALUE, card->attr_io + COR_OFFSET);
122 mdelay(1);
124 /* Just in case, wait more until the card is no longer busy */
125 timeout = jiffies + (PLX_RESET_TIME * HZ / 1000);
126 reg = hermes_read_regn(hw, CMD);
127 while (time_before(jiffies, timeout) && (reg & HERMES_CMD_BUSY)) {
128 mdelay(1);
129 reg = hermes_read_regn(hw, CMD);
132 /* Still busy? */
133 if (reg & HERMES_CMD_BUSY) {
134 printk(KERN_ERR PFX "Busy timeout\n");
135 return -ETIMEDOUT;
138 return 0;
141 static int orinoco_plx_hw_init(struct orinoco_pci_card *card)
143 int i;
144 u32 csr_reg;
145 static const u8 cis_magic[] = {
146 0x01, 0x03, 0x00, 0x00, 0xff, 0x17, 0x04, 0x67
149 printk(KERN_DEBUG PFX "CIS: ");
150 for (i = 0; i < 16; i++) {
151 printk("%02X:", ioread8(card->attr_io + (i << 1)));
153 printk("\n");
155 /* Verify whether a supported PC card is present */
156 /* FIXME: we probably need to be smarted about this */
157 for (i = 0; i < sizeof(cis_magic); i++) {
158 if (cis_magic[i] != ioread8(card->attr_io + (i << 1))) {
159 printk(KERN_ERR PFX "The CIS value of Prism2 PC "
160 "card is unexpected\n");
161 return -ENODEV;
165 /* bjoern: We need to tell the card to enable interrupts, in
166 case the serial eprom didn't do this already. See the
167 PLX9052 data book, p8-1 and 8-24 for reference. */
168 csr_reg = ioread32(card->bridge_io + PLX_INTCSR);
169 if (!(csr_reg & PLX_INTCSR_INTEN)) {
170 csr_reg |= PLX_INTCSR_INTEN;
171 iowrite32(csr_reg, card->bridge_io + PLX_INTCSR);
172 csr_reg = ioread32(card->bridge_io + PLX_INTCSR);
173 if (!(csr_reg & PLX_INTCSR_INTEN)) {
174 printk(KERN_ERR PFX "Cannot enable interrupts\n");
175 return -EIO;
179 return 0;
182 static int orinoco_plx_init_one(struct pci_dev *pdev,
183 const struct pci_device_id *ent)
185 int err;
186 struct orinoco_private *priv;
187 struct orinoco_pci_card *card;
188 struct net_device *dev;
189 void __iomem *hermes_io, *attr_io, *bridge_io;
191 err = pci_enable_device(pdev);
192 if (err) {
193 printk(KERN_ERR PFX "Cannot enable PCI device\n");
194 return err;
197 err = pci_request_regions(pdev, DRIVER_NAME);
198 if (err) {
199 printk(KERN_ERR PFX "Cannot obtain PCI resources\n");
200 goto fail_resources;
203 bridge_io = pci_iomap(pdev, 1, 0);
204 if (!bridge_io) {
205 printk(KERN_ERR PFX "Cannot map bridge registers\n");
206 err = -EIO;
207 goto fail_map_bridge;
210 attr_io = pci_iomap(pdev, 2, 0);
211 if (!attr_io) {
212 printk(KERN_ERR PFX "Cannot map PCMCIA attributes\n");
213 err = -EIO;
214 goto fail_map_attr;
217 hermes_io = pci_iomap(pdev, 3, 0);
218 if (!hermes_io) {
219 printk(KERN_ERR PFX "Cannot map chipset registers\n");
220 err = -EIO;
221 goto fail_map_hermes;
224 /* Allocate network device */
225 dev = alloc_orinocodev(sizeof(*card), orinoco_plx_cor_reset);
226 if (!dev) {
227 printk(KERN_ERR PFX "Cannot allocate network device\n");
228 err = -ENOMEM;
229 goto fail_alloc;
232 priv = netdev_priv(dev);
233 card = priv->card;
234 card->bridge_io = bridge_io;
235 card->attr_io = attr_io;
236 SET_MODULE_OWNER(dev);
237 SET_NETDEV_DEV(dev, &pdev->dev);
239 hermes_struct_init(&priv->hw, hermes_io, HERMES_16BIT_REGSPACING);
241 err = request_irq(pdev->irq, orinoco_interrupt, SA_SHIRQ,
242 dev->name, dev);
243 if (err) {
244 printk(KERN_ERR PFX "Cannot allocate IRQ %d\n", pdev->irq);
245 err = -EBUSY;
246 goto fail_irq;
249 err = orinoco_plx_hw_init(card);
250 if (err) {
251 printk(KERN_ERR PFX "Hardware initialization failed\n");
252 goto fail;
255 err = orinoco_plx_cor_reset(priv);
256 if (err) {
257 printk(KERN_ERR PFX "Initial reset failed\n");
258 goto fail;
261 err = register_netdev(dev);
262 if (err) {
263 printk(KERN_ERR PFX "Cannot register network device\n");
264 goto fail;
267 pci_set_drvdata(pdev, dev);
268 printk(KERN_DEBUG "%s: " DRIVER_NAME " at %s\n", dev->name,
269 pci_name(pdev));
271 return 0;
273 fail:
274 free_irq(pdev->irq, dev);
276 fail_irq:
277 pci_set_drvdata(pdev, NULL);
278 free_orinocodev(dev);
280 fail_alloc:
281 pci_iounmap(pdev, hermes_io);
283 fail_map_hermes:
284 pci_iounmap(pdev, attr_io);
286 fail_map_attr:
287 pci_iounmap(pdev, bridge_io);
289 fail_map_bridge:
290 pci_release_regions(pdev);
292 fail_resources:
293 pci_disable_device(pdev);
295 return err;
298 static void __devexit orinoco_plx_remove_one(struct pci_dev *pdev)
300 struct net_device *dev = pci_get_drvdata(pdev);
301 struct orinoco_private *priv = netdev_priv(dev);
302 struct orinoco_pci_card *card = priv->card;
304 unregister_netdev(dev);
305 free_irq(pdev->irq, dev);
306 pci_set_drvdata(pdev, NULL);
307 free_orinocodev(dev);
308 pci_iounmap(pdev, priv->hw.iobase);
309 pci_iounmap(pdev, card->attr_io);
310 pci_iounmap(pdev, card->bridge_io);
311 pci_release_regions(pdev);
312 pci_disable_device(pdev);
315 static struct pci_device_id orinoco_plx_id_table[] = {
316 {0x111a, 0x1023, PCI_ANY_ID, PCI_ANY_ID,}, /* Siemens SpeedStream SS1023 */
317 {0x1385, 0x4100, PCI_ANY_ID, PCI_ANY_ID,}, /* Netgear MA301 */
318 {0x15e8, 0x0130, PCI_ANY_ID, PCI_ANY_ID,}, /* Correga - does this work? */
319 {0x1638, 0x1100, PCI_ANY_ID, PCI_ANY_ID,}, /* SMC EZConnect SMC2602W,
320 Eumitcom PCI WL11000,
321 Addtron AWA-100 */
322 {0x16ab, 0x1100, PCI_ANY_ID, PCI_ANY_ID,}, /* Global Sun Tech GL24110P */
323 {0x16ab, 0x1101, PCI_ANY_ID, PCI_ANY_ID,}, /* Reported working, but unknown */
324 {0x16ab, 0x1102, PCI_ANY_ID, PCI_ANY_ID,}, /* Linksys WDT11 */
325 {0x16ec, 0x3685, PCI_ANY_ID, PCI_ANY_ID,}, /* USR 2415 */
326 {0xec80, 0xec00, PCI_ANY_ID, PCI_ANY_ID,}, /* Belkin F5D6000 tested by
327 Brendan W. McAdams <rit AT jacked-in.org> */
328 {0x10b7, 0x7770, PCI_ANY_ID, PCI_ANY_ID,}, /* 3Com AirConnect PCI tested by
329 Damien Persohn <damien AT persohn.net> */
330 {0,},
333 MODULE_DEVICE_TABLE(pci, orinoco_plx_id_table);
335 static struct pci_driver orinoco_plx_driver = {
336 .name = DRIVER_NAME,
337 .id_table = orinoco_plx_id_table,
338 .probe = orinoco_plx_init_one,
339 .remove = __devexit_p(orinoco_plx_remove_one),
340 .suspend = orinoco_pci_suspend,
341 .resume = orinoco_pci_resume,
344 static char version[] __initdata = DRIVER_NAME " " DRIVER_VERSION
345 " (Pavel Roskin <proski@gnu.org>,"
346 " David Gibson <hermes@gibson.dropbear.id.au>,"
347 " Daniel Barlow <dan@telent.net>)";
348 MODULE_AUTHOR("Daniel Barlow <dan@telent.net>");
349 MODULE_DESCRIPTION("Driver for wireless LAN cards using the PLX9052 PCI bridge");
350 MODULE_LICENSE("Dual MPL/GPL");
352 static int __init orinoco_plx_init(void)
354 printk(KERN_DEBUG "%s\n", version);
355 return pci_module_init(&orinoco_plx_driver);
358 static void __exit orinoco_plx_exit(void)
360 pci_unregister_driver(&orinoco_plx_driver);
363 module_init(orinoco_plx_init);
364 module_exit(orinoco_plx_exit);
367 * Local variables:
368 * c-indent-level: 8
369 * c-basic-offset: 8
370 * tab-width: 8
371 * End: