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ath9k_hw: Configure appropriate Tx power when PAPRD fails
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / wireless / ath / ath9k / main.c
blobcb53fbb951f1226811ad26a905fed740628a31be
1 /*
2 * Copyright (c) 2008-2009 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include <linux/nl80211.h>
18 #include "ath9k.h"
19 #include "btcoex.h"
20
21 static void ath_update_txpow(struct ath_softc *sc)
22 {
23 struct ath_hw *ah = sc->sc_ah;
24
25 if (sc->curtxpow != sc->config.txpowlimit) {
26 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
27 /* read back in case value is clamped */
28 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
29 }
30 }
31
32 static u8 parse_mpdudensity(u8 mpdudensity)
33 {
34 /*
35 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
36 * 0 for no restriction
37 * 1 for 1/4 us
38 * 2 for 1/2 us
39 * 3 for 1 us
40 * 4 for 2 us
41 * 5 for 4 us
42 * 6 for 8 us
43 * 7 for 16 us
44 */
45 switch (mpdudensity) {
46 case 0:
47 return 0;
48 case 1:
49 case 2:
50 case 3:
51 /* Our lower layer calculations limit our precision to
52 1 microsecond */
53 return 1;
54 case 4:
55 return 2;
56 case 5:
57 return 4;
58 case 6:
59 return 8;
60 case 7:
61 return 16;
62 default:
63 return 0;
64 }
65 }
66
67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
68 struct ieee80211_hw *hw)
69 {
70 struct ieee80211_channel *curchan = hw->conf.channel;
71 struct ath9k_channel *channel;
72 u8 chan_idx;
73
74 chan_idx = curchan->hw_value;
75 channel = &sc->sc_ah->channels[chan_idx];
76 ath9k_update_ichannel(sc, hw, channel);
77 return channel;
78 }
79
80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
81 {
82 unsigned long flags;
83 bool ret;
84
85 spin_lock_irqsave(&sc->sc_pm_lock, flags);
86 ret = ath9k_hw_setpower(sc->sc_ah, mode);
87 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
88
89 return ret;
90 }
91
92 void ath9k_ps_wakeup(struct ath_softc *sc)
93 {
94 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
95 unsigned long flags;
96 enum ath9k_power_mode power_mode;
97
98 spin_lock_irqsave(&sc->sc_pm_lock, flags);
99 if (++sc->ps_usecount != 1)
100 goto unlock;
101
102 power_mode = sc->sc_ah->power_mode;
103 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
104
105 /*
106 * While the hardware is asleep, the cycle counters contain no
107 * useful data. Better clear them now so that they don't mess up
108 * survey data results.
109 */
110 if (power_mode != ATH9K_PM_AWAKE) {
111 spin_lock(&common->cc_lock);
112 ath_hw_cycle_counters_update(common);
113 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
114 spin_unlock(&common->cc_lock);
115 }
116
117 unlock:
118 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
119 }
120
121 void ath9k_ps_restore(struct ath_softc *sc)
122 {
123 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
124 unsigned long flags;
125
126 spin_lock_irqsave(&sc->sc_pm_lock, flags);
127 if (--sc->ps_usecount != 0)
128 goto unlock;
129
130 spin_lock(&common->cc_lock);
131 ath_hw_cycle_counters_update(common);
132 spin_unlock(&common->cc_lock);
133
134 if (sc->ps_idle)
135 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
136 else if (sc->ps_enabled &&
137 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
138 PS_WAIT_FOR_CAB |
139 PS_WAIT_FOR_PSPOLL_DATA |
140 PS_WAIT_FOR_TX_ACK)))
141 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
142
143 unlock:
144 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
145 }
146
147 static void ath_start_ani(struct ath_common *common)
148 {
149 struct ath_hw *ah = common->ah;
150 unsigned long timestamp = jiffies_to_msecs(jiffies);
151 struct ath_softc *sc = (struct ath_softc *) common->priv;
152
153 if (!(sc->sc_flags & SC_OP_ANI_RUN))
154 return;
155
156 if (sc->sc_flags & SC_OP_OFFCHANNEL)
157 return;
158
159 common->ani.longcal_timer = timestamp;
160 common->ani.shortcal_timer = timestamp;
161 common->ani.checkani_timer = timestamp;
162
163 mod_timer(&common->ani.timer,
164 jiffies +
165 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
166 }
167
168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
169 {
170 struct ath_hw *ah = sc->sc_ah;
171 struct ath9k_channel *chan = &ah->channels[channel];
172 struct survey_info *survey = &sc->survey[channel];
173
174 if (chan->noisefloor) {
175 survey->filled |= SURVEY_INFO_NOISE_DBM;
176 survey->noise = chan->noisefloor;
177 }
178 }
179
180 static void ath_update_survey_stats(struct ath_softc *sc)
181 {
182 struct ath_hw *ah = sc->sc_ah;
183 struct ath_common *common = ath9k_hw_common(ah);
184 int pos = ah->curchan - &ah->channels[0];
185 struct survey_info *survey = &sc->survey[pos];
186 struct ath_cycle_counters *cc = &common->cc_survey;
187 unsigned int div = common->clockrate * 1000;
188
189 if (!ah->curchan)
190 return;
191
192 if (ah->power_mode == ATH9K_PM_AWAKE)
193 ath_hw_cycle_counters_update(common);
194
195 if (cc->cycles > 0) {
196 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
197 SURVEY_INFO_CHANNEL_TIME_BUSY |
198 SURVEY_INFO_CHANNEL_TIME_RX |
199 SURVEY_INFO_CHANNEL_TIME_TX;
200 survey->channel_time += cc->cycles / div;
201 survey->channel_time_busy += cc->rx_busy / div;
202 survey->channel_time_rx += cc->rx_frame / div;
203 survey->channel_time_tx += cc->tx_frame / div;
204 }
205 memset(cc, 0, sizeof(*cc));
206
207 ath_update_survey_nf(sc, pos);
208 }
209
210 /*
211 * Set/change channels. If the channel is really being changed, it's done
212 * by reseting the chip. To accomplish this we must first cleanup any pending
213 * DMA, then restart stuff.
214 */
215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
216 struct ath9k_channel *hchan)
217 {
218 struct ath_wiphy *aphy = hw->priv;
219 struct ath_hw *ah = sc->sc_ah;
220 struct ath_common *common = ath9k_hw_common(ah);
221 struct ieee80211_conf *conf = &common->hw->conf;
222 bool fastcc = true, stopped;
223 struct ieee80211_channel *channel = hw->conf.channel;
224 struct ath9k_hw_cal_data *caldata = NULL;
225 int r;
226
227 if (sc->sc_flags & SC_OP_INVALID)
228 return -EIO;
229
230 del_timer_sync(&common->ani.timer);
231 cancel_work_sync(&sc->paprd_work);
232 cancel_work_sync(&sc->hw_check_work);
233 cancel_delayed_work_sync(&sc->tx_complete_work);
234
235 ath9k_ps_wakeup(sc);
236
237 spin_lock_bh(&sc->sc_pcu_lock);
238
239 /*
240 * This is only performed if the channel settings have
241 * actually changed.
242 *
243 * To switch channels clear any pending DMA operations;
244 * wait long enough for the RX fifo to drain, reset the
245 * hardware at the new frequency, and then re-enable
246 * the relevant bits of the h/w.
247 */
248 ath9k_hw_disable_interrupts(ah);
249 stopped = ath_drain_all_txq(sc, false);
250
251 if (!ath_stoprecv(sc))
252 stopped = false;
253
254 /* XXX: do not flush receive queue here. We don't want
255 * to flush data frames already in queue because of
256 * changing channel. */
257
258 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
259 fastcc = false;
260
261 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
262 caldata = &aphy->caldata;
263
264 ath_dbg(common, ATH_DBG_CONFIG,
265 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
266 sc->sc_ah->curchan->channel,
267 channel->center_freq, conf_is_ht40(conf),
268 fastcc);
269
270 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
271 if (r) {
272 ath_err(common,
273 "Unable to reset channel (%u MHz), reset status %d\n",
274 channel->center_freq, r);
275 goto ps_restore;
276 }
277
278 if (ath_startrecv(sc) != 0) {
279 ath_err(common, "Unable to restart recv logic\n");
280 r = -EIO;
281 goto ps_restore;
282 }
283
284 ath_update_txpow(sc);
285 ath9k_hw_set_interrupts(ah, ah->imask);
286
287 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
288 ath_beacon_config(sc, NULL);
289 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
290 ath_start_ani(common);
291 }
292
293 ps_restore:
294 spin_unlock_bh(&sc->sc_pcu_lock);
295
296 ath9k_ps_restore(sc);
297 return r;
298 }
299
300 static void ath_paprd_activate(struct ath_softc *sc)
301 {
302 struct ath_hw *ah = sc->sc_ah;
303 struct ath9k_hw_cal_data *caldata = ah->caldata;
304 struct ath_common *common = ath9k_hw_common(ah);
305 int chain;
306
307 if (!caldata || !caldata->paprd_done)
308 return;
309
310 ath9k_ps_wakeup(sc);
311 ar9003_paprd_enable(ah, false);
312 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
313 if (!(common->tx_chainmask & BIT(chain)))
314 continue;
315
316 ar9003_paprd_populate_single_table(ah, caldata, chain);
317 }
318
319 ar9003_paprd_enable(ah, true);
320 ath9k_ps_restore(sc);
321 }
322
323 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
324 {
325 struct ieee80211_hw *hw = sc->hw;
326 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
327 struct ath_tx_control txctl;
328 int time_left;
329
330 memset(&txctl, 0, sizeof(txctl));
331 txctl.txq = sc->tx.txq_map[WME_AC_BE];
332
333 memset(tx_info, 0, sizeof(*tx_info));
334 tx_info->band = hw->conf.channel->band;
335 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
336 tx_info->control.rates[0].idx = 0;
337 tx_info->control.rates[0].count = 1;
338 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
339 tx_info->control.rates[1].idx = -1;
340
341 init_completion(&sc->paprd_complete);
342 sc->paprd_pending = true;
343 txctl.paprd = BIT(chain);
344 if (ath_tx_start(hw, skb, &txctl) != 0)
345 return false;
346
347 time_left = wait_for_completion_timeout(&sc->paprd_complete,
348 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
349 sc->paprd_pending = false;
350
351 if (!time_left)
352 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
353 "Timeout waiting for paprd training on TX chain %d\n",
354 chain);
355
356 return !!time_left;
357 }
358
359 void ath_paprd_calibrate(struct work_struct *work)
360 {
361 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
362 struct ieee80211_hw *hw = sc->hw;
363 struct ath_hw *ah = sc->sc_ah;
364 struct ieee80211_hdr *hdr;
365 struct sk_buff *skb = NULL;
366 struct ath9k_hw_cal_data *caldata = ah->caldata;
367 struct ath_common *common = ath9k_hw_common(ah);
368 int ftype;
369 int chain_ok = 0;
370 int chain;
371 int len = 1800;
372
373 if (!caldata)
374 return;
375
376 if (ar9003_paprd_init_table(ah) < 0)
377 return;
378
379 skb = alloc_skb(len, GFP_KERNEL);
380 if (!skb)
381 return;
382
383 skb_put(skb, len);
384 memset(skb->data, 0, len);
385 hdr = (struct ieee80211_hdr *)skb->data;
386 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
387 hdr->frame_control = cpu_to_le16(ftype);
388 hdr->duration_id = cpu_to_le16(10);
389 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
390 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
391 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
392
393 ath9k_ps_wakeup(sc);
394 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
395 if (!(common->tx_chainmask & BIT(chain)))
396 continue;
397
398 chain_ok = 0;
399
400 ath_dbg(common, ATH_DBG_CALIBRATE,
401 "Sending PAPRD frame for thermal measurement "
402 "on chain %d\n", chain);
403 if (!ath_paprd_send_frame(sc, skb, chain))
404 goto fail_paprd;
405
406 ar9003_paprd_setup_gain_table(ah, chain);
407
408 ath_dbg(common, ATH_DBG_CALIBRATE,
409 "Sending PAPRD training frame on chain %d\n", chain);
410 if (!ath_paprd_send_frame(sc, skb, chain))
411 goto fail_paprd;
412
413 if (!ar9003_paprd_is_done(ah))
414 break;
415
416 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
417 break;
418
419 chain_ok = 1;
420 }
421 kfree_skb(skb);
422
423 if (chain_ok) {
424 caldata->paprd_done = true;
425 ath_paprd_activate(sc);
426 }
427
428 fail_paprd:
429 ath9k_ps_restore(sc);
430 }
431
432 /*
433 * This routine performs the periodic noise floor calibration function
434 * that is used to adjust and optimize the chip performance. This
435 * takes environmental changes (location, temperature) into account.
436 * When the task is complete, it reschedules itself depending on the
437 * appropriate interval that was calculated.
438 */
439 void ath_ani_calibrate(unsigned long data)
440 {
441 struct ath_softc *sc = (struct ath_softc *)data;
442 struct ath_hw *ah = sc->sc_ah;
443 struct ath_common *common = ath9k_hw_common(ah);
444 bool longcal = false;
445 bool shortcal = false;
446 bool aniflag = false;
447 unsigned int timestamp = jiffies_to_msecs(jiffies);
448 u32 cal_interval, short_cal_interval, long_cal_interval;
449 unsigned long flags;
450
451 if (ah->caldata && ah->caldata->nfcal_interference)
452 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
453 else
454 long_cal_interval = ATH_LONG_CALINTERVAL;
455
456 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
457 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
458
459 /* Only calibrate if awake */
460 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
461 goto set_timer;
462
463 ath9k_ps_wakeup(sc);
464
465 /* Long calibration runs independently of short calibration. */
466 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
467 longcal = true;
468 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
469 common->ani.longcal_timer = timestamp;
470 }
471
472 /* Short calibration applies only while caldone is false */
473 if (!common->ani.caldone) {
474 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
475 shortcal = true;
476 ath_dbg(common, ATH_DBG_ANI,
477 "shortcal @%lu\n", jiffies);
478 common->ani.shortcal_timer = timestamp;
479 common->ani.resetcal_timer = timestamp;
480 }
481 } else {
482 if ((timestamp - common->ani.resetcal_timer) >=
483 ATH_RESTART_CALINTERVAL) {
484 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
485 if (common->ani.caldone)
486 common->ani.resetcal_timer = timestamp;
487 }
488 }
489
490 /* Verify whether we must check ANI */
491 if ((timestamp - common->ani.checkani_timer) >=
492 ah->config.ani_poll_interval) {
493 aniflag = true;
494 common->ani.checkani_timer = timestamp;
495 }
496
497 /* Skip all processing if there's nothing to do. */
498 if (longcal || shortcal || aniflag) {
499 /* Call ANI routine if necessary */
500 if (aniflag) {
501 spin_lock_irqsave(&common->cc_lock, flags);
502 ath9k_hw_ani_monitor(ah, ah->curchan);
503 ath_update_survey_stats(sc);
504 spin_unlock_irqrestore(&common->cc_lock, flags);
505 }
506
507 /* Perform calibration if necessary */
508 if (longcal || shortcal) {
509 common->ani.caldone =
510 ath9k_hw_calibrate(ah,
511 ah->curchan,
512 common->rx_chainmask,
513 longcal);
514 }
515 }
516
517 ath9k_ps_restore(sc);
518
519 set_timer:
520 /*
521 * Set timer interval based on previous results.
522 * The interval must be the shortest necessary to satisfy ANI,
523 * short calibration and long calibration.
524 */
525 cal_interval = ATH_LONG_CALINTERVAL;
526 if (sc->sc_ah->config.enable_ani)
527 cal_interval = min(cal_interval,
528 (u32)ah->config.ani_poll_interval);
529 if (!common->ani.caldone)
530 cal_interval = min(cal_interval, (u32)short_cal_interval);
531
532 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
533 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
534 if (!ah->caldata->paprd_done)
535 ieee80211_queue_work(sc->hw, &sc->paprd_work);
536 else if (!ah->paprd_table_write_done)
537 ath_paprd_activate(sc);
538 }
539 }
540
541 /*
542 * Update tx/rx chainmask. For legacy association,
543 * hard code chainmask to 1x1, for 11n association, use
544 * the chainmask configuration, for bt coexistence, use
545 * the chainmask configuration even in legacy mode.
546 */
547 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
548 {
549 struct ath_hw *ah = sc->sc_ah;
550 struct ath_common *common = ath9k_hw_common(ah);
551
552 if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
553 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
554 common->tx_chainmask = ah->caps.tx_chainmask;
555 common->rx_chainmask = ah->caps.rx_chainmask;
556 } else {
557 common->tx_chainmask = 1;
558 common->rx_chainmask = 1;
559 }
560
561 ath_dbg(common, ATH_DBG_CONFIG,
562 "tx chmask: %d, rx chmask: %d\n",
563 common->tx_chainmask,
564 common->rx_chainmask);
565 }
566
567 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
568 {
569 struct ath_node *an;
570 struct ath_hw *ah = sc->sc_ah;
571 an = (struct ath_node *)sta->drv_priv;
572
573 if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
574 sc->sc_flags |= SC_OP_ENABLE_APM;
575
576 if (sc->sc_flags & SC_OP_TXAGGR) {
577 ath_tx_node_init(sc, an);
578 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
579 sta->ht_cap.ampdu_factor);
580 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
581 }
582 }
583
584 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
585 {
586 struct ath_node *an = (struct ath_node *)sta->drv_priv;
587
588 if (sc->sc_flags & SC_OP_TXAGGR)
589 ath_tx_node_cleanup(sc, an);
590 }
591
592 void ath_hw_check(struct work_struct *work)
593 {
594 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
595 int i;
596
597 ath9k_ps_wakeup(sc);
598
599 for (i = 0; i < 3; i++) {
600 if (ath9k_hw_check_alive(sc->sc_ah))
601 goto out;
602
603 msleep(1);
604 }
605 ath_reset(sc, true);
606
607 out:
608 ath9k_ps_restore(sc);
609 }
610
611 void ath9k_tasklet(unsigned long data)
612 {
613 struct ath_softc *sc = (struct ath_softc *)data;
614 struct ath_hw *ah = sc->sc_ah;
615 struct ath_common *common = ath9k_hw_common(ah);
616
617 u32 status = sc->intrstatus;
618 u32 rxmask;
619
620 ath9k_ps_wakeup(sc);
621
622 if (status & ATH9K_INT_FATAL) {
623 ath_reset(sc, true);
624 ath9k_ps_restore(sc);
625 return;
626 }
627
628 spin_lock_bh(&sc->sc_pcu_lock);
629
630 if (!ath9k_hw_check_alive(ah))
631 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
632
633 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
634 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
635 ATH9K_INT_RXORN);
636 else
637 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
638
639 if (status & rxmask) {
640 /* Check for high priority Rx first */
641 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
642 (status & ATH9K_INT_RXHP))
643 ath_rx_tasklet(sc, 0, true);
644
645 ath_rx_tasklet(sc, 0, false);
646 }
647
648 if (status & ATH9K_INT_TX) {
649 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
650 ath_tx_edma_tasklet(sc);
651 else
652 ath_tx_tasklet(sc);
653 }
654
655 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
656 /*
657 * TSF sync does not look correct; remain awake to sync with
658 * the next Beacon.
659 */
660 ath_dbg(common, ATH_DBG_PS,
661 "TSFOOR - Sync with next Beacon\n");
662 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
663 }
664
665 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
666 if (status & ATH9K_INT_GENTIMER)
667 ath_gen_timer_isr(sc->sc_ah);
668
669 /* re-enable hardware interrupt */
670 ath9k_hw_enable_interrupts(ah);
671
672 spin_unlock_bh(&sc->sc_pcu_lock);
673 ath9k_ps_restore(sc);
674 }
675
676 irqreturn_t ath_isr(int irq, void *dev)
677 {
678 #define SCHED_INTR ( \
679 ATH9K_INT_FATAL | \
680 ATH9K_INT_RXORN | \
681 ATH9K_INT_RXEOL | \
682 ATH9K_INT_RX | \
683 ATH9K_INT_RXLP | \
684 ATH9K_INT_RXHP | \
685 ATH9K_INT_TX | \
686 ATH9K_INT_BMISS | \
687 ATH9K_INT_CST | \
688 ATH9K_INT_TSFOOR | \
689 ATH9K_INT_GENTIMER)
690
691 struct ath_softc *sc = dev;
692 struct ath_hw *ah = sc->sc_ah;
693 struct ath_common *common = ath9k_hw_common(ah);
694 enum ath9k_int status;
695 bool sched = false;
696
697 /*
698 * The hardware is not ready/present, don't
699 * touch anything. Note this can happen early
700 * on if the IRQ is shared.
701 */
702 if (sc->sc_flags & SC_OP_INVALID)
703 return IRQ_NONE;
704
705
706 /* shared irq, not for us */
707
708 if (!ath9k_hw_intrpend(ah))
709 return IRQ_NONE;
710
711 /*
712 * Figure out the reason(s) for the interrupt. Note
713 * that the hal returns a pseudo-ISR that may include
714 * bits we haven't explicitly enabled so we mask the
715 * value to insure we only process bits we requested.
716 */
717 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
718 status &= ah->imask; /* discard unasked-for bits */
719
720 /*
721 * If there are no status bits set, then this interrupt was not
722 * for me (should have been caught above).
723 */
724 if (!status)
725 return IRQ_NONE;
726
727 /* Cache the status */
728 sc->intrstatus = status;
729
730 if (status & SCHED_INTR)
731 sched = true;
732
733 /*
734 * If a FATAL or RXORN interrupt is received, we have to reset the
735 * chip immediately.
736 */
737 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
738 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
739 goto chip_reset;
740
741 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
742 (status & ATH9K_INT_BB_WATCHDOG)) {
743
744 spin_lock(&common->cc_lock);
745 ath_hw_cycle_counters_update(common);
746 ar9003_hw_bb_watchdog_dbg_info(ah);
747 spin_unlock(&common->cc_lock);
748
749 goto chip_reset;
750 }
751
752 if (status & ATH9K_INT_SWBA)
753 tasklet_schedule(&sc->bcon_tasklet);
754
755 if (status & ATH9K_INT_TXURN)
756 ath9k_hw_updatetxtriglevel(ah, true);
757
758 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
759 if (status & ATH9K_INT_RXEOL) {
760 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
761 ath9k_hw_set_interrupts(ah, ah->imask);
762 }
763 }
764
765 if (status & ATH9K_INT_MIB) {
766 /*
767 * Disable interrupts until we service the MIB
768 * interrupt; otherwise it will continue to
769 * fire.
770 */
771 ath9k_hw_disable_interrupts(ah);
772 /*
773 * Let the hal handle the event. We assume
774 * it will clear whatever condition caused
775 * the interrupt.
776 */
777 spin_lock(&common->cc_lock);
778 ath9k_hw_proc_mib_event(ah);
779 spin_unlock(&common->cc_lock);
780 ath9k_hw_enable_interrupts(ah);
781 }
782
783 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
784 if (status & ATH9K_INT_TIM_TIMER) {
785 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
786 goto chip_reset;
787 /* Clear RxAbort bit so that we can
788 * receive frames */
789 ath9k_setpower(sc, ATH9K_PM_AWAKE);
790 ath9k_hw_setrxabort(sc->sc_ah, 0);
791 sc->ps_flags |= PS_WAIT_FOR_BEACON;
792 }
793
794 chip_reset:
795
796 ath_debug_stat_interrupt(sc, status);
797
798 if (sched) {
799 /* turn off every interrupt */
800 ath9k_hw_disable_interrupts(ah);
801 tasklet_schedule(&sc->intr_tq);
802 }
803
804 return IRQ_HANDLED;
805
806 #undef SCHED_INTR
807 }
808
809 static u32 ath_get_extchanmode(struct ath_softc *sc,
810 struct ieee80211_channel *chan,
811 enum nl80211_channel_type channel_type)
812 {
813 u32 chanmode = 0;
814
815 switch (chan->band) {
816 case IEEE80211_BAND_2GHZ:
817 switch(channel_type) {
818 case NL80211_CHAN_NO_HT:
819 case NL80211_CHAN_HT20:
820 chanmode = CHANNEL_G_HT20;
821 break;
822 case NL80211_CHAN_HT40PLUS:
823 chanmode = CHANNEL_G_HT40PLUS;
824 break;
825 case NL80211_CHAN_HT40MINUS:
826 chanmode = CHANNEL_G_HT40MINUS;
827 break;
828 }
829 break;
830 case IEEE80211_BAND_5GHZ:
831 switch(channel_type) {
832 case NL80211_CHAN_NO_HT:
833 case NL80211_CHAN_HT20:
834 chanmode = CHANNEL_A_HT20;
835 break;
836 case NL80211_CHAN_HT40PLUS:
837 chanmode = CHANNEL_A_HT40PLUS;
838 break;
839 case NL80211_CHAN_HT40MINUS:
840 chanmode = CHANNEL_A_HT40MINUS;
841 break;
842 }
843 break;
844 default:
845 break;
846 }
847
848 return chanmode;
849 }
850
851 static void ath9k_bss_assoc_info(struct ath_softc *sc,
852 struct ieee80211_hw *hw,
853 struct ieee80211_vif *vif,
854 struct ieee80211_bss_conf *bss_conf)
855 {
856 struct ath_wiphy *aphy = hw->priv;
857 struct ath_hw *ah = sc->sc_ah;
858 struct ath_common *common = ath9k_hw_common(ah);
859
860 if (bss_conf->assoc) {
861 ath_dbg(common, ATH_DBG_CONFIG,
862 "Bss Info ASSOC %d, bssid: %pM\n",
863 bss_conf->aid, common->curbssid);
864
865 /* New association, store aid */
866 common->curaid = bss_conf->aid;
867 ath9k_hw_write_associd(ah);
868
869 /*
870 * Request a re-configuration of Beacon related timers
871 * on the receipt of the first Beacon frame (i.e.,
872 * after time sync with the AP).
873 */
874 sc->ps_flags |= PS_BEACON_SYNC;
875
876 /* Configure the beacon */
877 ath_beacon_config(sc, vif);
878
879 /* Reset rssi stats */
880 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
881 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
882
883 sc->sc_flags |= SC_OP_ANI_RUN;
884 ath_start_ani(common);
885 } else {
886 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
887 common->curaid = 0;
888 /* Stop ANI */
889 sc->sc_flags &= ~SC_OP_ANI_RUN;
890 del_timer_sync(&common->ani.timer);
891 }
892 }
893
894 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
895 {
896 struct ath_hw *ah = sc->sc_ah;
897 struct ath_common *common = ath9k_hw_common(ah);
898 struct ieee80211_channel *channel = hw->conf.channel;
899 int r;
900
901 ath9k_ps_wakeup(sc);
902 spin_lock_bh(&sc->sc_pcu_lock);
903
904 ath9k_hw_configpcipowersave(ah, 0, 0);
905
906 if (!ah->curchan)
907 ah->curchan = ath_get_curchannel(sc, sc->hw);
908
909 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
910 if (r) {
911 ath_err(common,
912 "Unable to reset channel (%u MHz), reset status %d\n",
913 channel->center_freq, r);
914 }
915
916 ath_update_txpow(sc);
917 if (ath_startrecv(sc) != 0) {
918 ath_err(common, "Unable to restart recv logic\n");
919 goto out;
920 }
921 if (sc->sc_flags & SC_OP_BEACONS)
922 ath_beacon_config(sc, NULL); /* restart beacons */
923
924 /* Re-Enable interrupts */
925 ath9k_hw_set_interrupts(ah, ah->imask);
926
927 /* Enable LED */
928 ath9k_hw_cfg_output(ah, ah->led_pin,
929 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
930 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
931
932 ieee80211_wake_queues(hw);
933 out:
934 spin_unlock_bh(&sc->sc_pcu_lock);
935
936 ath9k_ps_restore(sc);
937 }
938
939 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
940 {
941 struct ath_hw *ah = sc->sc_ah;
942 struct ieee80211_channel *channel = hw->conf.channel;
943 int r;
944
945 ath9k_ps_wakeup(sc);
946 spin_lock_bh(&sc->sc_pcu_lock);
947
948 ieee80211_stop_queues(hw);
949
950 /*
951 * Keep the LED on when the radio is disabled
952 * during idle unassociated state.
953 */
954 if (!sc->ps_idle) {
955 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
956 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
957 }
958
959 /* Disable interrupts */
960 ath9k_hw_disable_interrupts(ah);
961
962 ath_drain_all_txq(sc, false); /* clear pending tx frames */
963
964 ath_stoprecv(sc); /* turn off frame recv */
965 ath_flushrecv(sc); /* flush recv queue */
966
967 if (!ah->curchan)
968 ah->curchan = ath_get_curchannel(sc, hw);
969
970 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
971 if (r) {
972 ath_err(ath9k_hw_common(sc->sc_ah),
973 "Unable to reset channel (%u MHz), reset status %d\n",
974 channel->center_freq, r);
975 }
976
977 ath9k_hw_phy_disable(ah);
978
979 ath9k_hw_configpcipowersave(ah, 1, 1);
980
981 spin_unlock_bh(&sc->sc_pcu_lock);
982 ath9k_ps_restore(sc);
983
984 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
985 }
986
987 int ath_reset(struct ath_softc *sc, bool retry_tx)
988 {
989 struct ath_hw *ah = sc->sc_ah;
990 struct ath_common *common = ath9k_hw_common(ah);
991 struct ieee80211_hw *hw = sc->hw;
992 int r;
993
994 /* Stop ANI */
995 del_timer_sync(&common->ani.timer);
996
997 spin_lock_bh(&sc->sc_pcu_lock);
998
999 ieee80211_stop_queues(hw);
1000
1001 ath9k_hw_disable_interrupts(ah);
1002 ath_drain_all_txq(sc, retry_tx);
1003
1004 ath_stoprecv(sc);
1005 ath_flushrecv(sc);
1006
1007 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
1008 if (r)
1009 ath_err(common,
1010 "Unable to reset hardware; reset status %d\n", r);
1011
1012 if (ath_startrecv(sc) != 0)
1013 ath_err(common, "Unable to start recv logic\n");
1014
1015 /*
1016 * We may be doing a reset in response to a request
1017 * that changes the channel so update any state that
1018 * might change as a result.
1019 */
1020 ath_update_txpow(sc);
1021
1022 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1023 ath_beacon_config(sc, NULL); /* restart beacons */
1024
1025 ath9k_hw_set_interrupts(ah, ah->imask);
1026
1027 if (retry_tx) {
1028 int i;
1029 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1030 if (ATH_TXQ_SETUP(sc, i)) {
1031 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1032 ath_txq_schedule(sc, &sc->tx.txq[i]);
1033 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1034 }
1035 }
1036 }
1037
1038 ieee80211_wake_queues(hw);
1039 spin_unlock_bh(&sc->sc_pcu_lock);
1040
1041 /* Start ANI */
1042 ath_start_ani(common);
1043
1044 return r;
1045 }
1046
1047 /* XXX: Remove me once we don't depend on ath9k_channel for all
1048 * this redundant data */
1049 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1050 struct ath9k_channel *ichan)
1051 {
1052 struct ieee80211_channel *chan = hw->conf.channel;
1053 struct ieee80211_conf *conf = &hw->conf;
1054
1055 ichan->channel = chan->center_freq;
1056 ichan->chan = chan;
1057
1058 if (chan->band == IEEE80211_BAND_2GHZ) {
1059 ichan->chanmode = CHANNEL_G;
1060 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1061 } else {
1062 ichan->chanmode = CHANNEL_A;
1063 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1064 }
1065
1066 if (conf_is_ht(conf))
1067 ichan->chanmode = ath_get_extchanmode(sc, chan,
1068 conf->channel_type);
1069 }
1070
1071 /**********************/
1072 /* mac80211 callbacks */
1073 /**********************/
1074
1075 static int ath9k_start(struct ieee80211_hw *hw)
1076 {
1077 struct ath_wiphy *aphy = hw->priv;
1078 struct ath_softc *sc = aphy->sc;
1079 struct ath_hw *ah = sc->sc_ah;
1080 struct ath_common *common = ath9k_hw_common(ah);
1081 struct ieee80211_channel *curchan = hw->conf.channel;
1082 struct ath9k_channel *init_channel;
1083 int r;
1084
1085 ath_dbg(common, ATH_DBG_CONFIG,
1086 "Starting driver with initial channel: %d MHz\n",
1087 curchan->center_freq);
1088
1089 mutex_lock(&sc->mutex);
1090
1091 if (ath9k_wiphy_started(sc)) {
1092 if (sc->chan_idx == curchan->hw_value) {
1093 /*
1094 * Already on the operational channel, the new wiphy
1095 * can be marked active.
1096 */
1097 aphy->state = ATH_WIPHY_ACTIVE;
1098 ieee80211_wake_queues(hw);
1099 } else {
1100 /*
1101 * Another wiphy is on another channel, start the new
1102 * wiphy in paused state.
1103 */
1104 aphy->state = ATH_WIPHY_PAUSED;
1105 ieee80211_stop_queues(hw);
1106 }
1107 mutex_unlock(&sc->mutex);
1108 return 0;
1109 }
1110 aphy->state = ATH_WIPHY_ACTIVE;
1111
1112 /* setup initial channel */
1113
1114 sc->chan_idx = curchan->hw_value;
1115
1116 init_channel = ath_get_curchannel(sc, hw);
1117
1118 /* Reset SERDES registers */
1119 ath9k_hw_configpcipowersave(ah, 0, 0);
1120
1121 /*
1122 * The basic interface to setting the hardware in a good
1123 * state is ``reset''. On return the hardware is known to
1124 * be powered up and with interrupts disabled. This must
1125 * be followed by initialization of the appropriate bits
1126 * and then setup of the interrupt mask.
1127 */
1128 spin_lock_bh(&sc->sc_pcu_lock);
1129 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1130 if (r) {
1131 ath_err(common,
1132 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1133 r, curchan->center_freq);
1134 spin_unlock_bh(&sc->sc_pcu_lock);
1135 goto mutex_unlock;
1136 }
1137
1138 /*
1139 * This is needed only to setup initial state
1140 * but it's best done after a reset.
1141 */
1142 ath_update_txpow(sc);
1143
1144 /*
1145 * Setup the hardware after reset:
1146 * The receive engine is set going.
1147 * Frame transmit is handled entirely
1148 * in the frame output path; there's nothing to do
1149 * here except setup the interrupt mask.
1150 */
1151 if (ath_startrecv(sc) != 0) {
1152 ath_err(common, "Unable to start recv logic\n");
1153 r = -EIO;
1154 spin_unlock_bh(&sc->sc_pcu_lock);
1155 goto mutex_unlock;
1156 }
1157 spin_unlock_bh(&sc->sc_pcu_lock);
1158
1159 /* Setup our intr mask. */
1160 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1161 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1162 ATH9K_INT_GLOBAL;
1163
1164 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1165 ah->imask |= ATH9K_INT_RXHP |
1166 ATH9K_INT_RXLP |
1167 ATH9K_INT_BB_WATCHDOG;
1168 else
1169 ah->imask |= ATH9K_INT_RX;
1170
1171 ah->imask |= ATH9K_INT_GTT;
1172
1173 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1174 ah->imask |= ATH9K_INT_CST;
1175
1176 sc->sc_flags &= ~SC_OP_INVALID;
1177 sc->sc_ah->is_monitoring = false;
1178
1179 /* Disable BMISS interrupt when we're not associated */
1180 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1181 ath9k_hw_set_interrupts(ah, ah->imask);
1182
1183 ieee80211_wake_queues(hw);
1184
1185 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1186
1187 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1188 !ah->btcoex_hw.enabled) {
1189 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1190 AR_STOMP_LOW_WLAN_WGHT);
1191 ath9k_hw_btcoex_enable(ah);
1192
1193 if (common->bus_ops->bt_coex_prep)
1194 common->bus_ops->bt_coex_prep(common);
1195 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1196 ath9k_btcoex_timer_resume(sc);
1197 }
1198
1199 /* User has the option to provide pm-qos value as a module
1200 * parameter rather than using the default value of
1201 * 'ATH9K_PM_QOS_DEFAULT_VALUE'.
1202 */
1203 pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
1204
1205 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1206 common->bus_ops->extn_synch_en(common);
1207
1208 mutex_unlock:
1209 mutex_unlock(&sc->mutex);
1210
1211 return r;
1212 }
1213
1214 static int ath9k_tx(struct ieee80211_hw *hw,
1215 struct sk_buff *skb)
1216 {
1217 struct ath_wiphy *aphy = hw->priv;
1218 struct ath_softc *sc = aphy->sc;
1219 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1220 struct ath_tx_control txctl;
1221 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1222
1223 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1224 ath_dbg(common, ATH_DBG_XMIT,
1225 "ath9k: %s: TX in unexpected wiphy state %d\n",
1226 wiphy_name(hw->wiphy), aphy->state);
1227 goto exit;
1228 }
1229
1230 if (sc->ps_enabled) {
1231 /*
1232 * mac80211 does not set PM field for normal data frames, so we
1233 * need to update that based on the current PS mode.
1234 */
1235 if (ieee80211_is_data(hdr->frame_control) &&
1236 !ieee80211_is_nullfunc(hdr->frame_control) &&
1237 !ieee80211_has_pm(hdr->frame_control)) {
1238 ath_dbg(common, ATH_DBG_PS,
1239 "Add PM=1 for a TX frame while in PS mode\n");
1240 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1241 }
1242 }
1243
1244 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1245 /*
1246 * We are using PS-Poll and mac80211 can request TX while in
1247 * power save mode. Need to wake up hardware for the TX to be
1248 * completed and if needed, also for RX of buffered frames.
1249 */
1250 ath9k_ps_wakeup(sc);
1251 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1252 ath9k_hw_setrxabort(sc->sc_ah, 0);
1253 if (ieee80211_is_pspoll(hdr->frame_control)) {
1254 ath_dbg(common, ATH_DBG_PS,
1255 "Sending PS-Poll to pick a buffered frame\n");
1256 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1257 } else {
1258 ath_dbg(common, ATH_DBG_PS,
1259 "Wake up to complete TX\n");
1260 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1261 }
1262 /*
1263 * The actual restore operation will happen only after
1264 * the sc_flags bit is cleared. We are just dropping
1265 * the ps_usecount here.
1266 */
1267 ath9k_ps_restore(sc);
1268 }
1269
1270 memset(&txctl, 0, sizeof(struct ath_tx_control));
1271 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1272
1273 ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1274
1275 if (ath_tx_start(hw, skb, &txctl) != 0) {
1276 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1277 goto exit;
1278 }
1279
1280 return 0;
1281 exit:
1282 dev_kfree_skb_any(skb);
1283 return 0;
1284 }
1285
1286 static void ath9k_stop(struct ieee80211_hw *hw)
1287 {
1288 struct ath_wiphy *aphy = hw->priv;
1289 struct ath_softc *sc = aphy->sc;
1290 struct ath_hw *ah = sc->sc_ah;
1291 struct ath_common *common = ath9k_hw_common(ah);
1292 int i;
1293
1294 mutex_lock(&sc->mutex);
1295
1296 aphy->state = ATH_WIPHY_INACTIVE;
1297
1298 if (led_blink)
1299 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1300
1301 cancel_delayed_work_sync(&sc->tx_complete_work);
1302 cancel_work_sync(&sc->paprd_work);
1303 cancel_work_sync(&sc->hw_check_work);
1304
1305 for (i = 0; i < sc->num_sec_wiphy; i++) {
1306 if (sc->sec_wiphy[i])
1307 break;
1308 }
1309
1310 if (i == sc->num_sec_wiphy) {
1311 cancel_delayed_work_sync(&sc->wiphy_work);
1312 cancel_work_sync(&sc->chan_work);
1313 }
1314
1315 if (sc->sc_flags & SC_OP_INVALID) {
1316 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1317 mutex_unlock(&sc->mutex);
1318 return;
1319 }
1320
1321 if (ath9k_wiphy_started(sc)) {
1322 mutex_unlock(&sc->mutex);
1323 return; /* another wiphy still in use */
1324 }
1325
1326 /* Ensure HW is awake when we try to shut it down. */
1327 ath9k_ps_wakeup(sc);
1328
1329 if (ah->btcoex_hw.enabled) {
1330 ath9k_hw_btcoex_disable(ah);
1331 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1332 ath9k_btcoex_timer_pause(sc);
1333 }
1334
1335 spin_lock_bh(&sc->sc_pcu_lock);
1336
1337 /* make sure h/w will not generate any interrupt
1338 * before setting the invalid flag. */
1339 ath9k_hw_disable_interrupts(ah);
1340
1341 if (!(sc->sc_flags & SC_OP_INVALID)) {
1342 ath_drain_all_txq(sc, false);
1343 ath_stoprecv(sc);
1344 ath9k_hw_phy_disable(ah);
1345 } else
1346 sc->rx.rxlink = NULL;
1347
1348 /* disable HAL and put h/w to sleep */
1349 ath9k_hw_disable(ah);
1350 ath9k_hw_configpcipowersave(ah, 1, 1);
1351
1352 spin_unlock_bh(&sc->sc_pcu_lock);
1353
1354 ath9k_ps_restore(sc);
1355
1356 sc->ps_idle = true;
1357 ath_radio_disable(sc, hw);
1358
1359 sc->sc_flags |= SC_OP_INVALID;
1360
1361 pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1362
1363 mutex_unlock(&sc->mutex);
1364
1365 ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1366 }
1367
1368 static int ath9k_add_interface(struct ieee80211_hw *hw,
1369 struct ieee80211_vif *vif)
1370 {
1371 struct ath_wiphy *aphy = hw->priv;
1372 struct ath_softc *sc = aphy->sc;
1373 struct ath_hw *ah = sc->sc_ah;
1374 struct ath_common *common = ath9k_hw_common(ah);
1375 struct ath_vif *avp = (void *)vif->drv_priv;
1376 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1377 int ret = 0;
1378
1379 mutex_lock(&sc->mutex);
1380
1381 switch (vif->type) {
1382 case NL80211_IFTYPE_STATION:
1383 ic_opmode = NL80211_IFTYPE_STATION;
1384 break;
1385 case NL80211_IFTYPE_WDS:
1386 ic_opmode = NL80211_IFTYPE_WDS;
1387 break;
1388 case NL80211_IFTYPE_ADHOC:
1389 case NL80211_IFTYPE_AP:
1390 case NL80211_IFTYPE_MESH_POINT:
1391 if (sc->nbcnvifs >= ATH_BCBUF) {
1392 ret = -ENOBUFS;
1393 goto out;
1394 }
1395 ic_opmode = vif->type;
1396 break;
1397 default:
1398 ath_err(common, "Interface type %d not yet supported\n",
1399 vif->type);
1400 ret = -EOPNOTSUPP;
1401 goto out;
1402 }
1403
1404 ath_dbg(common, ATH_DBG_CONFIG,
1405 "Attach a VIF of type: %d\n", ic_opmode);
1406
1407 /* Set the VIF opmode */
1408 avp->av_opmode = ic_opmode;
1409 avp->av_bslot = -1;
1410
1411 sc->nvifs++;
1412
1413 ath9k_set_bssid_mask(hw, vif);
1414
1415 if (sc->nvifs > 1)
1416 goto out; /* skip global settings for secondary vif */
1417
1418 if (ic_opmode == NL80211_IFTYPE_AP) {
1419 ath9k_hw_set_tsfadjust(ah, 1);
1420 sc->sc_flags |= SC_OP_TSF_RESET;
1421 }
1422
1423 /* Set the device opmode */
1424 ah->opmode = ic_opmode;
1425
1426 /*
1427 * Enable MIB interrupts when there are hardware phy counters.
1428 * Note we only do this (at the moment) for station mode.
1429 */
1430 if ((vif->type == NL80211_IFTYPE_STATION) ||
1431 (vif->type == NL80211_IFTYPE_ADHOC) ||
1432 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1433 if (ah->config.enable_ani)
1434 ah->imask |= ATH9K_INT_MIB;
1435 ah->imask |= ATH9K_INT_TSFOOR;
1436 }
1437
1438 ath9k_hw_set_interrupts(ah, ah->imask);
1439
1440 if (vif->type == NL80211_IFTYPE_AP ||
1441 vif->type == NL80211_IFTYPE_ADHOC) {
1442 sc->sc_flags |= SC_OP_ANI_RUN;
1443 ath_start_ani(common);
1444 }
1445
1446 out:
1447 mutex_unlock(&sc->mutex);
1448 return ret;
1449 }
1450
1451 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1452 struct ieee80211_vif *vif)
1453 {
1454 struct ath_vif *avp = (void *)vif->drv_priv;
1455
1456 /* Disable SWBA interrupt */
1457 sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1458 ath9k_ps_wakeup(sc);
1459 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1460 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1461 tasklet_kill(&sc->bcon_tasklet);
1462 ath9k_ps_restore(sc);
1463
1464 ath_beacon_return(sc, avp);
1465 sc->sc_flags &= ~SC_OP_BEACONS;
1466
1467 if (sc->nbcnvifs > 0) {
1468 /* Re-enable beaconing */
1469 sc->sc_ah->imask |= ATH9K_INT_SWBA;
1470 ath9k_ps_wakeup(sc);
1471 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1472 ath9k_ps_restore(sc);
1473 }
1474 }
1475
1476 static int ath9k_change_interface(struct ieee80211_hw *hw,
1477 struct ieee80211_vif *vif,
1478 enum nl80211_iftype new_type,
1479 bool p2p)
1480 {
1481 struct ath_wiphy *aphy = hw->priv;
1482 struct ath_softc *sc = aphy->sc;
1483 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1484
1485 ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1486 mutex_lock(&sc->mutex);
1487
1488 switch (new_type) {
1489 case NL80211_IFTYPE_AP:
1490 case NL80211_IFTYPE_ADHOC:
1491 if (sc->nbcnvifs >= ATH_BCBUF) {
1492 ath_err(common, "No beacon slot available\n");
1493 return -ENOBUFS;
1494 }
1495 break;
1496 case NL80211_IFTYPE_STATION:
1497 /* Stop ANI */
1498 sc->sc_flags &= ~SC_OP_ANI_RUN;
1499 del_timer_sync(&common->ani.timer);
1500 if ((vif->type == NL80211_IFTYPE_AP) ||
1501 (vif->type == NL80211_IFTYPE_ADHOC))
1502 ath9k_reclaim_beacon(sc, vif);
1503 break;
1504 default:
1505 ath_err(common, "Interface type %d not yet supported\n",
1506 vif->type);
1507 mutex_unlock(&sc->mutex);
1508 return -ENOTSUPP;
1509 }
1510 vif->type = new_type;
1511 vif->p2p = p2p;
1512
1513 mutex_unlock(&sc->mutex);
1514 return 0;
1515 }
1516
1517 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1518 struct ieee80211_vif *vif)
1519 {
1520 struct ath_wiphy *aphy = hw->priv;
1521 struct ath_softc *sc = aphy->sc;
1522 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1523
1524 ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1525
1526 mutex_lock(&sc->mutex);
1527
1528 /* Stop ANI */
1529 sc->sc_flags &= ~SC_OP_ANI_RUN;
1530 del_timer_sync(&common->ani.timer);
1531
1532 /* Reclaim beacon resources */
1533 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1534 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1535 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT))
1536 ath9k_reclaim_beacon(sc, vif);
1537
1538 sc->nvifs--;
1539
1540 mutex_unlock(&sc->mutex);
1541 }
1542
1543 static void ath9k_enable_ps(struct ath_softc *sc)
1544 {
1545 struct ath_hw *ah = sc->sc_ah;
1546
1547 sc->ps_enabled = true;
1548 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1549 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1550 ah->imask |= ATH9K_INT_TIM_TIMER;
1551 ath9k_hw_set_interrupts(ah, ah->imask);
1552 }
1553 ath9k_hw_setrxabort(ah, 1);
1554 }
1555 }
1556
1557 static void ath9k_disable_ps(struct ath_softc *sc)
1558 {
1559 struct ath_hw *ah = sc->sc_ah;
1560
1561 sc->ps_enabled = false;
1562 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1563 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1564 ath9k_hw_setrxabort(ah, 0);
1565 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1566 PS_WAIT_FOR_CAB |
1567 PS_WAIT_FOR_PSPOLL_DATA |
1568 PS_WAIT_FOR_TX_ACK);
1569 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1570 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1571 ath9k_hw_set_interrupts(ah, ah->imask);
1572 }
1573 }
1574
1575 }
1576
1577 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1578 {
1579 struct ath_wiphy *aphy = hw->priv;
1580 struct ath_softc *sc = aphy->sc;
1581 struct ath_hw *ah = sc->sc_ah;
1582 struct ath_common *common = ath9k_hw_common(ah);
1583 struct ieee80211_conf *conf = &hw->conf;
1584 bool disable_radio;
1585
1586 mutex_lock(&sc->mutex);
1587
1588 /*
1589 * Leave this as the first check because we need to turn on the
1590 * radio if it was disabled before prior to processing the rest
1591 * of the changes. Likewise we must only disable the radio towards
1592 * the end.
1593 */
1594 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1595 bool enable_radio;
1596 bool all_wiphys_idle;
1597 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1598
1599 spin_lock_bh(&sc->wiphy_lock);
1600 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1601 ath9k_set_wiphy_idle(aphy, idle);
1602
1603 enable_radio = (!idle && all_wiphys_idle);
1604
1605 /*
1606 * After we unlock here its possible another wiphy
1607 * can be re-renabled so to account for that we will
1608 * only disable the radio toward the end of this routine
1609 * if by then all wiphys are still idle.
1610 */
1611 spin_unlock_bh(&sc->wiphy_lock);
1612
1613 if (enable_radio) {
1614 sc->ps_idle = false;
1615 ath_radio_enable(sc, hw);
1616 ath_dbg(common, ATH_DBG_CONFIG,
1617 "not-idle: enabling radio\n");
1618 }
1619 }
1620
1621 /*
1622 * We just prepare to enable PS. We have to wait until our AP has
1623 * ACK'd our null data frame to disable RX otherwise we'll ignore
1624 * those ACKs and end up retransmitting the same null data frames.
1625 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1626 */
1627 if (changed & IEEE80211_CONF_CHANGE_PS) {
1628 unsigned long flags;
1629 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1630 if (conf->flags & IEEE80211_CONF_PS)
1631 ath9k_enable_ps(sc);
1632 else
1633 ath9k_disable_ps(sc);
1634 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1635 }
1636
1637 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1638 if (conf->flags & IEEE80211_CONF_MONITOR) {
1639 ath_dbg(common, ATH_DBG_CONFIG,
1640 "Monitor mode is enabled\n");
1641 sc->sc_ah->is_monitoring = true;
1642 } else {
1643 ath_dbg(common, ATH_DBG_CONFIG,
1644 "Monitor mode is disabled\n");
1645 sc->sc_ah->is_monitoring = false;
1646 }
1647 }
1648
1649 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1650 struct ieee80211_channel *curchan = hw->conf.channel;
1651 int pos = curchan->hw_value;
1652 int old_pos = -1;
1653 unsigned long flags;
1654
1655 if (ah->curchan)
1656 old_pos = ah->curchan - &ah->channels[0];
1657
1658 aphy->chan_idx = pos;
1659 aphy->chan_is_ht = conf_is_ht(conf);
1660 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1661 sc->sc_flags |= SC_OP_OFFCHANNEL;
1662 else
1663 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1664
1665 if (aphy->state == ATH_WIPHY_SCAN ||
1666 aphy->state == ATH_WIPHY_ACTIVE)
1667 ath9k_wiphy_pause_all_forced(sc, aphy);
1668 else {
1669 /*
1670 * Do not change operational channel based on a paused
1671 * wiphy changes.
1672 */
1673 goto skip_chan_change;
1674 }
1675
1676 ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1677 curchan->center_freq);
1678
1679 /* XXX: remove me eventualy */
1680 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1681
1682 ath_update_chainmask(sc, conf_is_ht(conf));
1683
1684 /* update survey stats for the old channel before switching */
1685 spin_lock_irqsave(&common->cc_lock, flags);
1686 ath_update_survey_stats(sc);
1687 spin_unlock_irqrestore(&common->cc_lock, flags);
1688
1689 /*
1690 * If the operating channel changes, change the survey in-use flags
1691 * along with it.
1692 * Reset the survey data for the new channel, unless we're switching
1693 * back to the operating channel from an off-channel operation.
1694 */
1695 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1696 sc->cur_survey != &sc->survey[pos]) {
1697
1698 if (sc->cur_survey)
1699 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1700
1701 sc->cur_survey = &sc->survey[pos];
1702
1703 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1704 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1705 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1706 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1707 }
1708
1709 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1710 ath_err(common, "Unable to set channel\n");
1711 mutex_unlock(&sc->mutex);
1712 return -EINVAL;
1713 }
1714
1715 /*
1716 * The most recent snapshot of channel->noisefloor for the old
1717 * channel is only available after the hardware reset. Copy it to
1718 * the survey stats now.
1719 */
1720 if (old_pos >= 0)
1721 ath_update_survey_nf(sc, old_pos);
1722 }
1723
1724 skip_chan_change:
1725 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1726 sc->config.txpowlimit = 2 * conf->power_level;
1727 ath_update_txpow(sc);
1728 }
1729
1730 spin_lock_bh(&sc->wiphy_lock);
1731 disable_radio = ath9k_all_wiphys_idle(sc);
1732 spin_unlock_bh(&sc->wiphy_lock);
1733
1734 if (disable_radio) {
1735 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1736 sc->ps_idle = true;
1737 ath_radio_disable(sc, hw);
1738 }
1739
1740 mutex_unlock(&sc->mutex);
1741
1742 return 0;
1743 }
1744
1745 #define SUPPORTED_FILTERS \
1746 (FIF_PROMISC_IN_BSS | \
1747 FIF_ALLMULTI | \
1748 FIF_CONTROL | \
1749 FIF_PSPOLL | \
1750 FIF_OTHER_BSS | \
1751 FIF_BCN_PRBRESP_PROMISC | \
1752 FIF_PROBE_REQ | \
1753 FIF_FCSFAIL)
1754
1755 /* FIXME: sc->sc_full_reset ? */
1756 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1757 unsigned int changed_flags,
1758 unsigned int *total_flags,
1759 u64 multicast)
1760 {
1761 struct ath_wiphy *aphy = hw->priv;
1762 struct ath_softc *sc = aphy->sc;
1763 u32 rfilt;
1764
1765 changed_flags &= SUPPORTED_FILTERS;
1766 *total_flags &= SUPPORTED_FILTERS;
1767
1768 sc->rx.rxfilter = *total_flags;
1769 ath9k_ps_wakeup(sc);
1770 rfilt = ath_calcrxfilter(sc);
1771 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1772 ath9k_ps_restore(sc);
1773
1774 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1775 "Set HW RX filter: 0x%x\n", rfilt);
1776 }
1777
1778 static int ath9k_sta_add(struct ieee80211_hw *hw,
1779 struct ieee80211_vif *vif,
1780 struct ieee80211_sta *sta)
1781 {
1782 struct ath_wiphy *aphy = hw->priv;
1783 struct ath_softc *sc = aphy->sc;
1784
1785 ath_node_attach(sc, sta);
1786
1787 return 0;
1788 }
1789
1790 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1791 struct ieee80211_vif *vif,
1792 struct ieee80211_sta *sta)
1793 {
1794 struct ath_wiphy *aphy = hw->priv;
1795 struct ath_softc *sc = aphy->sc;
1796
1797 ath_node_detach(sc, sta);
1798
1799 return 0;
1800 }
1801
1802 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1803 const struct ieee80211_tx_queue_params *params)
1804 {
1805 struct ath_wiphy *aphy = hw->priv;
1806 struct ath_softc *sc = aphy->sc;
1807 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1808 struct ath_txq *txq;
1809 struct ath9k_tx_queue_info qi;
1810 int ret = 0;
1811
1812 if (queue >= WME_NUM_AC)
1813 return 0;
1814
1815 txq = sc->tx.txq_map[queue];
1816
1817 mutex_lock(&sc->mutex);
1818
1819 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1820
1821 qi.tqi_aifs = params->aifs;
1822 qi.tqi_cwmin = params->cw_min;
1823 qi.tqi_cwmax = params->cw_max;
1824 qi.tqi_burstTime = params->txop;
1825
1826 ath_dbg(common, ATH_DBG_CONFIG,
1827 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1828 queue, txq->axq_qnum, params->aifs, params->cw_min,
1829 params->cw_max, params->txop);
1830
1831 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1832 if (ret)
1833 ath_err(common, "TXQ Update failed\n");
1834
1835 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1836 if (queue == WME_AC_BE && !ret)
1837 ath_beaconq_config(sc);
1838
1839 mutex_unlock(&sc->mutex);
1840
1841 return ret;
1842 }
1843
1844 static int ath9k_set_key(struct ieee80211_hw *hw,
1845 enum set_key_cmd cmd,
1846 struct ieee80211_vif *vif,
1847 struct ieee80211_sta *sta,
1848 struct ieee80211_key_conf *key)
1849 {
1850 struct ath_wiphy *aphy = hw->priv;
1851 struct ath_softc *sc = aphy->sc;
1852 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1853 int ret = 0;
1854
1855 if (modparam_nohwcrypt)
1856 return -ENOSPC;
1857
1858 mutex_lock(&sc->mutex);
1859 ath9k_ps_wakeup(sc);
1860 ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1861
1862 switch (cmd) {
1863 case SET_KEY:
1864 ret = ath_key_config(common, vif, sta, key);
1865 if (ret >= 0) {
1866 key->hw_key_idx = ret;
1867 /* push IV and Michael MIC generation to stack */
1868 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1869 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1870 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1871 if (sc->sc_ah->sw_mgmt_crypto &&
1872 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1873 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1874 ret = 0;
1875 }
1876 break;
1877 case DISABLE_KEY:
1878 ath_key_delete(common, key);
1879 break;
1880 default:
1881 ret = -EINVAL;
1882 }
1883
1884 ath9k_ps_restore(sc);
1885 mutex_unlock(&sc->mutex);
1886
1887 return ret;
1888 }
1889
1890 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1891 struct ieee80211_vif *vif,
1892 struct ieee80211_bss_conf *bss_conf,
1893 u32 changed)
1894 {
1895 struct ath_wiphy *aphy = hw->priv;
1896 struct ath_softc *sc = aphy->sc;
1897 struct ath_hw *ah = sc->sc_ah;
1898 struct ath_common *common = ath9k_hw_common(ah);
1899 struct ath_vif *avp = (void *)vif->drv_priv;
1900 int slottime;
1901 int error;
1902
1903 mutex_lock(&sc->mutex);
1904
1905 if (changed & BSS_CHANGED_BSSID) {
1906 /* Set BSSID */
1907 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1908 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1909 common->curaid = 0;
1910 ath9k_hw_write_associd(ah);
1911
1912 /* Set aggregation protection mode parameters */
1913 sc->config.ath_aggr_prot = 0;
1914
1915 /* Only legacy IBSS for now */
1916 if (vif->type == NL80211_IFTYPE_ADHOC)
1917 ath_update_chainmask(sc, 0);
1918
1919 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1920 common->curbssid, common->curaid);
1921
1922 /* need to reconfigure the beacon */
1923 sc->sc_flags &= ~SC_OP_BEACONS ;
1924 }
1925
1926 /* Enable transmission of beacons (AP, IBSS, MESH) */
1927 if ((changed & BSS_CHANGED_BEACON) ||
1928 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1929 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1930 error = ath_beacon_alloc(aphy, vif);
1931 if (!error)
1932 ath_beacon_config(sc, vif);
1933 }
1934
1935 if (changed & BSS_CHANGED_ERP_SLOT) {
1936 if (bss_conf->use_short_slot)
1937 slottime = 9;
1938 else
1939 slottime = 20;
1940 if (vif->type == NL80211_IFTYPE_AP) {
1941 /*
1942 * Defer update, so that connected stations can adjust
1943 * their settings at the same time.
1944 * See beacon.c for more details
1945 */
1946 sc->beacon.slottime = slottime;
1947 sc->beacon.updateslot = UPDATE;
1948 } else {
1949 ah->slottime = slottime;
1950 ath9k_hw_init_global_settings(ah);
1951 }
1952 }
1953
1954 /* Disable transmission of beacons */
1955 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1956 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1957
1958 if (changed & BSS_CHANGED_BEACON_INT) {
1959 sc->beacon_interval = bss_conf->beacon_int;
1960 /*
1961 * In case of AP mode, the HW TSF has to be reset
1962 * when the beacon interval changes.
1963 */
1964 if (vif->type == NL80211_IFTYPE_AP) {
1965 sc->sc_flags |= SC_OP_TSF_RESET;
1966 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1967 error = ath_beacon_alloc(aphy, vif);
1968 if (!error)
1969 ath_beacon_config(sc, vif);
1970 } else {
1971 ath_beacon_config(sc, vif);
1972 }
1973 }
1974
1975 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1976 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1977 bss_conf->use_short_preamble);
1978 if (bss_conf->use_short_preamble)
1979 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1980 else
1981 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1982 }
1983
1984 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1985 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1986 bss_conf->use_cts_prot);
1987 if (bss_conf->use_cts_prot &&
1988 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1989 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1990 else
1991 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1992 }
1993
1994 if (changed & BSS_CHANGED_ASSOC) {
1995 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1996 bss_conf->assoc);
1997 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1998 }
1999
2000 mutex_unlock(&sc->mutex);
2001 }
2002
2003 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2004 {
2005 u64 tsf;
2006 struct ath_wiphy *aphy = hw->priv;
2007 struct ath_softc *sc = aphy->sc;
2008
2009 mutex_lock(&sc->mutex);
2010 ath9k_ps_wakeup(sc);
2011 tsf = ath9k_hw_gettsf64(sc->sc_ah);
2012 ath9k_ps_restore(sc);
2013 mutex_unlock(&sc->mutex);
2014
2015 return tsf;
2016 }
2017
2018 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2019 {
2020 struct ath_wiphy *aphy = hw->priv;
2021 struct ath_softc *sc = aphy->sc;
2022
2023 mutex_lock(&sc->mutex);
2024 ath9k_ps_wakeup(sc);
2025 ath9k_hw_settsf64(sc->sc_ah, tsf);
2026 ath9k_ps_restore(sc);
2027 mutex_unlock(&sc->mutex);
2028 }
2029
2030 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2031 {
2032 struct ath_wiphy *aphy = hw->priv;
2033 struct ath_softc *sc = aphy->sc;
2034
2035 mutex_lock(&sc->mutex);
2036
2037 ath9k_ps_wakeup(sc);
2038 ath9k_hw_reset_tsf(sc->sc_ah);
2039 ath9k_ps_restore(sc);
2040
2041 mutex_unlock(&sc->mutex);
2042 }
2043
2044 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2045 struct ieee80211_vif *vif,
2046 enum ieee80211_ampdu_mlme_action action,
2047 struct ieee80211_sta *sta,
2048 u16 tid, u16 *ssn)
2049 {
2050 struct ath_wiphy *aphy = hw->priv;
2051 struct ath_softc *sc = aphy->sc;
2052 int ret = 0;
2053
2054 local_bh_disable();
2055
2056 switch (action) {
2057 case IEEE80211_AMPDU_RX_START:
2058 if (!(sc->sc_flags & SC_OP_RXAGGR))
2059 ret = -ENOTSUPP;
2060 break;
2061 case IEEE80211_AMPDU_RX_STOP:
2062 break;
2063 case IEEE80211_AMPDU_TX_START:
2064 if (!(sc->sc_flags & SC_OP_TXAGGR))
2065 return -EOPNOTSUPP;
2066
2067 ath9k_ps_wakeup(sc);
2068 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2069 if (!ret)
2070 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2071 ath9k_ps_restore(sc);
2072 break;
2073 case IEEE80211_AMPDU_TX_STOP:
2074 ath9k_ps_wakeup(sc);
2075 ath_tx_aggr_stop(sc, sta, tid);
2076 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2077 ath9k_ps_restore(sc);
2078 break;
2079 case IEEE80211_AMPDU_TX_OPERATIONAL:
2080 ath9k_ps_wakeup(sc);
2081 ath_tx_aggr_resume(sc, sta, tid);
2082 ath9k_ps_restore(sc);
2083 break;
2084 default:
2085 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2086 }
2087
2088 local_bh_enable();
2089
2090 return ret;
2091 }
2092
2093 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2094 struct survey_info *survey)
2095 {
2096 struct ath_wiphy *aphy = hw->priv;
2097 struct ath_softc *sc = aphy->sc;
2098 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2099 struct ieee80211_supported_band *sband;
2100 struct ieee80211_channel *chan;
2101 unsigned long flags;
2102 int pos;
2103
2104 spin_lock_irqsave(&common->cc_lock, flags);
2105 if (idx == 0)
2106 ath_update_survey_stats(sc);
2107
2108 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2109 if (sband && idx >= sband->n_channels) {
2110 idx -= sband->n_channels;
2111 sband = NULL;
2112 }
2113
2114 if (!sband)
2115 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2116
2117 if (!sband || idx >= sband->n_channels) {
2118 spin_unlock_irqrestore(&common->cc_lock, flags);
2119 return -ENOENT;
2120 }
2121
2122 chan = &sband->channels[idx];
2123 pos = chan->hw_value;
2124 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2125 survey->channel = chan;
2126 spin_unlock_irqrestore(&common->cc_lock, flags);
2127
2128 return 0;
2129 }
2130
2131 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2132 {
2133 struct ath_wiphy *aphy = hw->priv;
2134 struct ath_softc *sc = aphy->sc;
2135
2136 mutex_lock(&sc->mutex);
2137 if (ath9k_wiphy_scanning(sc)) {
2138 /*
2139 * There is a race here in mac80211 but fixing it requires
2140 * we revisit how we handle the scan complete callback.
2141 * After mac80211 fixes we will not have configured hardware
2142 * to the home channel nor would we have configured the RX
2143 * filter yet.
2144 */
2145 mutex_unlock(&sc->mutex);
2146 return;
2147 }
2148
2149 aphy->state = ATH_WIPHY_SCAN;
2150 ath9k_wiphy_pause_all_forced(sc, aphy);
2151 mutex_unlock(&sc->mutex);
2152 }
2153
2154 /*
2155 * XXX: this requires a revisit after the driver
2156 * scan_complete gets moved to another place/removed in mac80211.
2157 */
2158 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2159 {
2160 struct ath_wiphy *aphy = hw->priv;
2161 struct ath_softc *sc = aphy->sc;
2162
2163 mutex_lock(&sc->mutex);
2164 aphy->state = ATH_WIPHY_ACTIVE;
2165 mutex_unlock(&sc->mutex);
2166 }
2167
2168 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2169 {
2170 struct ath_wiphy *aphy = hw->priv;
2171 struct ath_softc *sc = aphy->sc;
2172 struct ath_hw *ah = sc->sc_ah;
2173
2174 mutex_lock(&sc->mutex);
2175 ah->coverage_class = coverage_class;
2176 ath9k_hw_init_global_settings(ah);
2177 mutex_unlock(&sc->mutex);
2178 }
2179
2180 struct ieee80211_ops ath9k_ops = {
2181 .tx = ath9k_tx,
2182 .start = ath9k_start,
2183 .stop = ath9k_stop,
2184 .add_interface = ath9k_add_interface,
2185 .change_interface = ath9k_change_interface,
2186 .remove_interface = ath9k_remove_interface,
2187 .config = ath9k_config,
2188 .configure_filter = ath9k_configure_filter,
2189 .sta_add = ath9k_sta_add,
2190 .sta_remove = ath9k_sta_remove,
2191 .conf_tx = ath9k_conf_tx,
2192 .bss_info_changed = ath9k_bss_info_changed,
2193 .set_key = ath9k_set_key,
2194 .get_tsf = ath9k_get_tsf,
2195 .set_tsf = ath9k_set_tsf,
2196 .reset_tsf = ath9k_reset_tsf,
2197 .ampdu_action = ath9k_ampdu_action,
2198 .get_survey = ath9k_get_survey,
2199 .sw_scan_start = ath9k_sw_scan_start,
2200 .sw_scan_complete = ath9k_sw_scan_complete,
2201 .rfkill_poll = ath9k_rfkill_poll_state,
2202 .set_coverage_class = ath9k_set_coverage_class,
2203 };
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree