arch/blackfin/kernel/process.c

   1 /*
   2  * Blackfin architecture-dependent process handling
   3  *
   4  * Copyright 2004-2009 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2 or later
   7  */
   8
   9 #include <linux/module.h>
  10 #include <linux/unistd.h>
  11 #include <linux/user.h>
  12 #include <linux/uaccess.h>
  13 #include <linux/slab.h>
  14 #include <linux/sched.h>
  15 #include <linux/tick.h>
  16 #include <linux/fs.h>
  17 #include <linux/err.h>
  18
  19 #include <asm/blackfin.h>
  20 #include <asm/fixed_code.h>
  21 #include <asm/mem_map.h>
  22
  23 asmlinkage void ret_from_fork(void);
  24
  25 /* Points to the SDRAM backup memory for the stack that is currently in
  26  * L1 scratchpad memory.
  27  */
  28 void *current_l1_stack_save;
  29
  30 /* The number of tasks currently using a L1 stack area.  The SRAM is
  31  * allocated/deallocated whenever this changes from/to zero.
  32  */
  33 int nr_l1stack_tasks;
  34
  35 /* Start and length of the area in L1 scratchpad memory which we've allocated
  36  * for process stacks.
  37  */
  38 void *l1_stack_base;
  39 unsigned long l1_stack_len;
  40
  41 /*
  42  * Powermanagement idle function, if any..
  43  */
  44 void (*pm_idle)(void) = NULL;
  45 EXPORT_SYMBOL(pm_idle);
  46
  47 void (*pm_power_off)(void) = NULL;
  48 EXPORT_SYMBOL(pm_power_off);
  49
  50 /*
  51  * The idle loop on BFIN
  52  */
  53 #ifdef CONFIG_IDLE_L1
  54 static void default_idle(void)__attribute__((l1_text));
  55 void cpu_idle(void)__attribute__((l1_text));
  56 #endif
  57
  58 /*
  59  * This is our default idle handler.  We need to disable
  60  * interrupts here to ensure we don't miss a wakeup call.
  61  */
  62 static void default_idle(void)
  63 {
  64 #ifdef CONFIG_IPIPE
  65         ipipe_suspend_domain();
  66 #endif
  67         hard_local_irq_disable();
  68         if (!need_resched())
  69                 idle_with_irq_disabled();
  70
  71         hard_local_irq_enable();
  72 }
  73
  74 /*
  75  * The idle thread.  We try to conserve power, while trying to keep
  76  * overall latency low.  The architecture specific idle is passed
  77  * a value to indicate the level of "idleness" of the system.
  78  */
  79 void cpu_idle(void)
  80 {
  81         /* endless idle loop with no priority at all */
  82         while (1) {
  83                 void (*idle)(void) = pm_idle;
  84
  85 #ifdef CONFIG_HOTPLUG_CPU
  86                 if (cpu_is_offline(smp_processor_id()))
  87                         cpu_die();
  88 #endif
  89                 if (!idle)
  90                         idle = default_idle;
  91                 tick_nohz_stop_sched_tick(1);
  92                 while (!need_resched())
  93                         idle();
  94                 tick_nohz_restart_sched_tick();
  95                 preempt_enable_no_resched();
  96                 schedule();
  97                 preempt_disable();
  98         }
  99 }
 100
 101 /*
 102  * This gets run with P1 containing the
 103  * function to call, and R1 containing
 104  * the "args".  Note P0 is clobbered on the way here.
 105  */
 106 void kernel_thread_helper(void);
 107 __asm__(".section .text\n"
 108         ".align 4\n"
 109         "_kernel_thread_helper:\n\t"
 110         "\tsp += -12;\n\t"
 111         "\tr0 = r1;\n\t" "\tcall (p1);\n\t" "\tcall _do_exit;\n" ".previous");
 112
 113 /*
 114  * Create a kernel thread.
 115  */
 116 pid_t kernel_thread(int (*fn) (void *), void *arg, unsigned long flags)
 117 {
 118         struct pt_regs regs;
 119
 120         memset(&regs, 0, sizeof(regs));
 121
 122         regs.r1 = (unsigned long)arg;
 123         regs.p1 = (unsigned long)fn;
 124         regs.pc = (unsigned long)kernel_thread_helper;
 125         regs.orig_p0 = -1;
 126         /* Set bit 2 to tell ret_from_fork we should be returning to kernel
 127            mode.  */
 128         regs.ipend = 0x8002;
 129         __asm__ __volatile__("%0 = syscfg;":"=da"(regs.syscfg):);
 130         return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs, 0, NULL,
 131                        NULL);
 132 }
 133 EXPORT_SYMBOL(kernel_thread);
 134
 135 /*
 136  * Do necessary setup to start up a newly executed thread.
 137  *
 138  * pass the data segment into user programs if it exists,
 139  * it can't hurt anything as far as I can tell
 140  */
 141 void start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
 142 {
 143         set_fs(USER_DS);
 144         regs->pc = new_ip;
 145         if (current->mm)
 146                 regs->p5 = current->mm->start_data;
 147 #ifndef CONFIG_SMP
 148         task_thread_info(current)->l1_task_info.stack_start =
 149                 (void *)current->mm->context.stack_start;
 150         task_thread_info(current)->l1_task_info.lowest_sp = (void *)new_sp;
 151         memcpy(L1_SCRATCH_TASK_INFO, &task_thread_info(current)->l1_task_info,
 152                sizeof(*L1_SCRATCH_TASK_INFO));
 153 #endif
 154         wrusp(new_sp);
 155 }
 156 EXPORT_SYMBOL_GPL(start_thread);
 157
 158 void flush_thread(void)
 159 {
 160 }
 161
 162 asmlinkage int bfin_vfork(struct pt_regs *regs)
 163 {
 164         return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, rdusp(), regs, 0, NULL,
 165                        NULL);
 166 }
 167
 168 asmlinkage int bfin_clone(struct pt_regs *regs)
 169 {
 170         unsigned long clone_flags;
 171         unsigned long newsp;
 172
 173 #ifdef __ARCH_SYNC_CORE_DCACHE
 174         if (current->rt.nr_cpus_allowed == num_possible_cpus()) {
 175                 current->cpus_allowed = cpumask_of_cpu(smp_processor_id());
 176                 current->rt.nr_cpus_allowed = 1;
 177         }
 178 #endif
 179
 180         /* syscall2 puts clone_flags in r0 and usp in r1 */
 181         clone_flags = regs->r0;
 182         newsp = regs->r1;
 183         if (!newsp)
 184                 newsp = rdusp();
 185         else
 186                 newsp -= 12;
 187         return do_fork(clone_flags, newsp, regs, 0, NULL, NULL);
 188 }
 189
 190 int
 191 copy_thread(unsigned long clone_flags,
 192             unsigned long usp, unsigned long topstk,
 193             struct task_struct *p, struct pt_regs *regs)
 194 {
 195         struct pt_regs *childregs;
 196
 197         childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1;
 198         *childregs = *regs;
 199         childregs->r0 = 0;
 200
 201         p->thread.usp = usp;
 202         p->thread.ksp = (unsigned long)childregs;
 203         p->thread.pc = (unsigned long)ret_from_fork;
 204
 205         return 0;
 206 }
 207
 208 /*
 209  * sys_execve() executes a new program.
 210  */
 211 asmlinkage int sys_execve(const char __user *name,
 212                           const char __user *const __user *argv,
 213                           const char __user *const __user *envp)
 214 {
 215         int error;
 216         char *filename;
 217         struct pt_regs *regs = (struct pt_regs *)((&name) + 6);
 218
 219         filename = getname(name);
 220         error = PTR_ERR(filename);
 221         if (IS_ERR(filename))
 222                 return error;
 223         error = do_execve(filename, argv, envp, regs);
 224         putname(filename);
 225         return error;
 226 }
 227
 228 unsigned long get_wchan(struct task_struct *p)
 229 {
 230         unsigned long fp, pc;
 231         unsigned long stack_page;
 232         int count = 0;
 233         if (!p || p == current || p->state == TASK_RUNNING)
 234                 return 0;
 235
 236         stack_page = (unsigned long)p;
 237         fp = p->thread.usp;
 238         do {
 239                 if (fp < stack_page + sizeof(struct thread_info) ||
 240                     fp >= 8184 + stack_page)
 241                         return 0;
 242                 pc = ((unsigned long *)fp)[1];
 243                 if (!in_sched_functions(pc))
 244                         return pc;
 245                 fp = *(unsigned long *)fp;
 246         }
 247         while (count++ < 16);
 248         return 0;
 249 }
 250
 251 void finish_atomic_sections (struct pt_regs *regs)
 252 {
 253         int __user *up0 = (int __user *)regs->p0;
 254
 255         switch (regs->pc) {
 256         default:
 257                 /* not in middle of an atomic step, so resume like normal */
 258                 return;
 259
 260         case ATOMIC_XCHG32 + 2:
 261                 put_user(regs->r1, up0);
 262                 break;
 263
 264         case ATOMIC_CAS32 + 2:
 265         case ATOMIC_CAS32 + 4:
 266                 if (regs->r0 == regs->r1)
 267         case ATOMIC_CAS32 + 6:
 268                         put_user(regs->r2, up0);
 269                 break;
 270
 271         case ATOMIC_ADD32 + 2:
 272                 regs->r0 = regs->r1 + regs->r0;
 273                 /* fall through */
 274         case ATOMIC_ADD32 + 4:
 275                 put_user(regs->r0, up0);
 276                 break;
 277
 278         case ATOMIC_SUB32 + 2:
 279                 regs->r0 = regs->r1 - regs->r0;
 280                 /* fall through */
 281         case ATOMIC_SUB32 + 4:
 282                 put_user(regs->r0, up0);
 283                 break;
 284
 285         case ATOMIC_IOR32 + 2:
 286                 regs->r0 = regs->r1 | regs->r0;
 287                 /* fall through */
 288         case ATOMIC_IOR32 + 4:
 289                 put_user(regs->r0, up0);
 290                 break;
 291
 292         case ATOMIC_AND32 + 2:
 293                 regs->r0 = regs->r1 & regs->r0;
 294                 /* fall through */
 295         case ATOMIC_AND32 + 4:
 296                 put_user(regs->r0, up0);
 297                 break;
 298
 299         case ATOMIC_XOR32 + 2:
 300                 regs->r0 = regs->r1 ^ regs->r0;
 301                 /* fall through */
 302         case ATOMIC_XOR32 + 4:
 303                 put_user(regs->r0, up0);
 304                 break;
 305         }
 306
 307         /*
 308          * We've finished the atomic section, and the only thing left for
 309          * userspace is to do a RTS, so we might as well handle that too
 310          * since we need to update the PC anyways.
 311          */
 312         regs->pc = regs->rets;
 313 }
 314
 315 static inline
 316 int in_mem(unsigned long addr, unsigned long size,
 317            unsigned long start, unsigned long end)
 318 {
 319         return addr >= start && addr + size <= end;
 320 }
 321 static inline
 322 int in_mem_const_off(unsigned long addr, unsigned long size, unsigned long off,
 323                      unsigned long const_addr, unsigned long const_size)
 324 {
 325         return const_size &&
 326                in_mem(addr, size, const_addr + off, const_addr + const_size);
 327 }
 328 static inline
 329 int in_mem_const(unsigned long addr, unsigned long size,
 330                  unsigned long const_addr, unsigned long const_size)
 331 {
 332         return in_mem_const_off(addr, size, 0, const_addr, const_size);
 333 }
 334 #define ASYNC_ENABLED(bnum, bctlnum) \
 335 ({ \
 336         (bfin_read_EBIU_AMGCTL() & 0xe) < ((bnum + 1) << 1) ? 0 : \
 337         bfin_read_EBIU_AMBCTL##bctlnum() & B##bnum##RDYEN ? 0 : \
 338         1; \
 339 })
 340 /*
 341  * We can't read EBIU banks that aren't enabled or we end up hanging
 342  * on the access to the async space.  Make sure we validate accesses
 343  * that cross async banks too.
 344  *      0 - found, but unusable
 345  *      1 - found & usable
 346  *      2 - not found
 347  */
 348 static
 349 int in_async(unsigned long addr, unsigned long size)
 350 {
 351         if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE) {
 352                 if (!ASYNC_ENABLED(0, 0))
 353                         return 0;
 354                 if (addr + size <= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE)
 355                         return 1;
 356                 size -= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE - addr;
 357                 addr = ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE;
 358         }
 359         if (addr >= ASYNC_BANK1_BASE && addr < ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE) {
 360                 if (!ASYNC_ENABLED(1, 0))
 361                         return 0;
 362                 if (addr + size <= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE)
 363                         return 1;
 364                 size -= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE - addr;
 365                 addr = ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE;
 366         }
 367         if (addr >= ASYNC_BANK2_BASE && addr < ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE) {
 368                 if (!ASYNC_ENABLED(2, 1))
 369                         return 0;
 370                 if (addr + size <= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE)
 371                         return 1;
 372                 size -= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE - addr;
 373                 addr = ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE;
 374         }
 375         if (addr >= ASYNC_BANK3_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) {
 376                 if (ASYNC_ENABLED(3, 1))
 377                         return 0;
 378                 if (addr + size <= ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE)
 379                         return 1;
 380                 return 0;
 381         }
 382
 383         /* not within async bounds */
 384         return 2;
 385 }
 386
 387 int bfin_mem_access_type(unsigned long addr, unsigned long size)
 388 {
 389         int cpu = raw_smp_processor_id();
 390
 391         /* Check that things do not wrap around */
 392         if (addr > ULONG_MAX - size)
 393                 return -EFAULT;
 394
 395         if (in_mem(addr, size, FIXED_CODE_START, physical_mem_end))
 396                 return BFIN_MEM_ACCESS_CORE;
 397
 398         if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH))
 399                 return cpu == 0 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA;
 400         if (in_mem_const(addr, size, L1_SCRATCH_START, L1_SCRATCH_LENGTH))
 401                 return cpu == 0 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT;
 402         if (in_mem_const(addr, size, L1_DATA_A_START, L1_DATA_A_LENGTH))
 403                 return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
 404         if (in_mem_const(addr, size, L1_DATA_B_START, L1_DATA_B_LENGTH))
 405                 return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
 406 #ifdef COREB_L1_CODE_START
 407         if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
 408                 return cpu == 1 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA;
 409         if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
 410                 return cpu == 1 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT;
 411         if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
 412                 return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
 413         if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
 414                 return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
 415 #endif
 416         if (in_mem_const(addr, size, L2_START, L2_LENGTH))
 417                 return BFIN_MEM_ACCESS_CORE;
 418
 419         if (addr >= SYSMMR_BASE)
 420                 return BFIN_MEM_ACCESS_CORE_ONLY;
 421
 422         switch (in_async(addr, size)) {
 423         case 0: return -EFAULT;
 424         case 1: return BFIN_MEM_ACCESS_CORE;
 425         case 2: /* fall through */;
 426         }
 427
 428         if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH))
 429                 return BFIN_MEM_ACCESS_CORE;
 430         if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH))
 431                 return BFIN_MEM_ACCESS_DMA;
 432
 433         return -EFAULT;
 434 }
 435
 436 #if defined(CONFIG_ACCESS_CHECK)
 437 #ifdef CONFIG_ACCESS_OK_L1
 438 __attribute__((l1_text))
 439 #endif
 440 /* Return 1 if access to memory range is OK, 0 otherwise */
 441 int _access_ok(unsigned long addr, unsigned long size)
 442 {
 443         int aret;
 444
 445         if (size == 0)
 446                 return 1;
 447         /* Check that things do not wrap around */
 448         if (addr > ULONG_MAX - size)
 449                 return 0;
 450         if (segment_eq(get_fs(), KERNEL_DS))
 451                 return 1;
 452 #ifdef CONFIG_MTD_UCLINUX
 453         if (1)
 454 #else
 455         if (0)
 456 #endif
 457         {
 458                 if (in_mem(addr, size, memory_start, memory_end))
 459                         return 1;
 460                 if (in_mem(addr, size, memory_mtd_end, physical_mem_end))
 461                         return 1;
 462 # ifndef CONFIG_ROMFS_ON_MTD
 463                 if (0)
 464 # endif
 465                         /* For XIP, allow user space to use pointers within the ROMFS.  */
 466                         if (in_mem(addr, size, memory_mtd_start, memory_mtd_end))
 467                                 return 1;
 468         } else {
 469                 if (in_mem(addr, size, memory_start, physical_mem_end))
 470                         return 1;
 471         }
 472
 473         if (in_mem(addr, size, (unsigned long)__init_begin, (unsigned long)__init_end))
 474                 return 1;
 475
 476         if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH))
 477                 return 1;
 478         if (in_mem_const_off(addr, size, _etext_l1 - _stext_l1, L1_CODE_START, L1_CODE_LENGTH))
 479                 return 1;
 480         if (in_mem_const_off(addr, size, _ebss_l1 - _sdata_l1, L1_DATA_A_START, L1_DATA_A_LENGTH))
 481                 return 1;
 482         if (in_mem_const_off(addr, size, _ebss_b_l1 - _sdata_b_l1, L1_DATA_B_START, L1_DATA_B_LENGTH))
 483                 return 1;
 484 #ifdef COREB_L1_CODE_START
 485         if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
 486                 return 1;
 487         if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
 488                 return 1;
 489         if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
 490                 return 1;
 491         if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
 492                 return 1;
 493 #endif
 494
 495 #ifndef CONFIG_EXCEPTION_L1_SCRATCH
 496         if (in_mem_const(addr, size, (unsigned long)l1_stack_base, l1_stack_len))
 497                 return 1;
 498 #endif
 499
 500         aret = in_async(addr, size);
 501         if (aret < 2)
 502                 return aret;
 503
 504         if (in_mem_const_off(addr, size, _ebss_l2 - _stext_l2, L2_START, L2_LENGTH))
 505                 return 1;
 506
 507         if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH))
 508                 return 1;
 509         if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH))
 510                 return 1;
 511
 512         return 0;
 513 }
 514 EXPORT_SYMBOL(_access_ok);
 515 #endif /* CONFIG_ACCESS_CHECK */