arch/arm/mach-omap1/serial.c

   1 /*
   2  * linux/arch/arm/mach-omap1/serial.c
   3  *
   4  * OMAP1 serial support.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #include <linux/module.h>
  12 #include <linux/kernel.h>
  13 #include <linux/init.h>
  14 #include <linux/irq.h>
  15 #include <linux/delay.h>
  16 #include <linux/serial.h>
  17 #include <linux/tty.h>
  18 #include <linux/serial_8250.h>
  19 #include <linux/serial_reg.h>
  20 #include <linux/clk.h>
  21 #include <linux/io.h>
  22
  23 #include <asm/mach-types.h>
  24
  25 #include <plat/board.h>
  26 #include <plat/mux.h>
  27 #include <mach/gpio.h>
  28 #include <plat/fpga.h>
  29
  30 static struct clk * uart1_ck;
  31 static struct clk * uart2_ck;
  32 static struct clk * uart3_ck;
  33
  34 static inline unsigned int omap_serial_in(struct plat_serial8250_port *up,
  35                                           int offset)
  36 {
  37         offset <<= up->regshift;
  38         return (unsigned int)__raw_readb(up->membase + offset);
  39 }
  40
  41 static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset,
  42                                     int value)
  43 {
  44         offset <<= p->regshift;
  45         __raw_writeb(value, p->membase + offset);
  46 }
  47
  48 /*
  49  * Internal UARTs need to be initialized for the 8250 autoconfig to work
  50  * properly. Note that the TX watermark initialization may not be needed
  51  * once the 8250.c watermark handling code is merged.
  52  */
  53 static void __init omap_serial_reset(struct plat_serial8250_port *p)
  54 {
  55         omap_serial_outp(p, UART_OMAP_MDR1, 0x07);      /* disable UART */
  56         omap_serial_outp(p, UART_OMAP_SCR, 0x08);       /* TX watermark */
  57         omap_serial_outp(p, UART_OMAP_MDR1, 0x00);      /* enable UART */
  58
  59         if (!cpu_is_omap15xx()) {
  60                 omap_serial_outp(p, UART_OMAP_SYSC, 0x01);
  61                 while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01));
  62         }
  63 }
  64
  65 static struct plat_serial8250_port serial_platform_data[] = {
  66         {
  67                 .mapbase        = OMAP1_UART1_BASE,
  68                 .irq            = INT_UART1,
  69                 .flags          = UPF_BOOT_AUTOCONF,
  70                 .iotype         = UPIO_MEM,
  71                 .regshift       = 2,
  72                 .uartclk        = OMAP16XX_BASE_BAUD * 16,
  73         },
  74         {
  75                 .mapbase        = OMAP1_UART2_BASE,
  76                 .irq            = INT_UART2,
  77                 .flags          = UPF_BOOT_AUTOCONF,
  78                 .iotype         = UPIO_MEM,
  79                 .regshift       = 2,
  80                 .uartclk        = OMAP16XX_BASE_BAUD * 16,
  81         },
  82         {
  83                 .mapbase        = OMAP1_UART3_BASE,
  84                 .irq            = INT_UART3,
  85                 .flags          = UPF_BOOT_AUTOCONF,
  86                 .iotype         = UPIO_MEM,
  87                 .regshift       = 2,
  88                 .uartclk        = OMAP16XX_BASE_BAUD * 16,
  89         },
  90         { },
  91 };
  92
  93 static struct platform_device serial_device = {
  94         .name                   = "serial8250",
  95         .id                     = PLAT8250_DEV_PLATFORM,
  96         .dev                    = {
  97                 .platform_data  = serial_platform_data,
  98         },
  99 };
 100
 101 /*
 102  * Note that on Innovator-1510 UART2 pins conflict with USB2.
 103  * By default UART2 does not work on Innovator-1510 if you have
 104  * USB OHCI enabled. To use UART2, you must disable USB2 first.
 105  */
 106 void __init omap_serial_init(void)
 107 {
 108         int i;
 109
 110         if (cpu_is_omap7xx()) {
 111                 serial_platform_data[0].regshift = 0;
 112                 serial_platform_data[1].regshift = 0;
 113                 serial_platform_data[0].irq = INT_7XX_UART_MODEM_1;
 114                 serial_platform_data[1].irq = INT_7XX_UART_MODEM_IRDA_2;
 115         }
 116
 117         if (cpu_is_omap15xx()) {
 118                 serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
 119                 serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;
 120                 serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
 121         }
 122
 123         for (i = 0; i < ARRAY_SIZE(serial_platform_data) - 1; i++) {
 124
 125                 /* Don't look at UARTs higher than 2 for omap7xx */
 126                 if (cpu_is_omap7xx() && i > 1) {
 127                         serial_platform_data[i].membase = NULL;
 128                         serial_platform_data[i].mapbase = 0;
 129                         continue;
 130                 }
 131
 132                 /* Static mapping, never released */
 133                 serial_platform_data[i].membase =
 134                         ioremap(serial_platform_data[i].mapbase, SZ_2K);
 135                 if (!serial_platform_data[i].membase) {
 136                         printk(KERN_ERR "Could not ioremap uart%i\n", i);
 137                         continue;
 138                 }
 139                 switch (i) {
 140                 case 0:
 141                         uart1_ck = clk_get(NULL, "uart1_ck");
 142                         if (IS_ERR(uart1_ck))
 143                                 printk("Could not get uart1_ck\n");
 144                         else {
 145                                 clk_enable(uart1_ck);
 146                                 if (cpu_is_omap15xx())
 147                                         clk_set_rate(uart1_ck, 12000000);
 148                         }
 149                         break;
 150                 case 1:
 151                         uart2_ck = clk_get(NULL, "uart2_ck");
 152                         if (IS_ERR(uart2_ck))
 153                                 printk("Could not get uart2_ck\n");
 154                         else {
 155                                 clk_enable(uart2_ck);
 156                                 if (cpu_is_omap15xx())
 157                                         clk_set_rate(uart2_ck, 12000000);
 158                                 else
 159                                         clk_set_rate(uart2_ck, 48000000);
 160                         }
 161                         break;
 162                 case 2:
 163                         uart3_ck = clk_get(NULL, "uart3_ck");
 164                         if (IS_ERR(uart3_ck))
 165                                 printk("Could not get uart3_ck\n");
 166                         else {
 167                                 clk_enable(uart3_ck);
 168                                 if (cpu_is_omap15xx())
 169                                         clk_set_rate(uart3_ck, 12000000);
 170                         }
 171                         break;
 172                 }
 173                 omap_serial_reset(&serial_platform_data[i]);
 174         }
 175 }
 176
 177 #ifdef CONFIG_OMAP_SERIAL_WAKE
 178
 179 static irqreturn_t omap_serial_wake_interrupt(int irq, void *dev_id)
 180 {
 181         /* Need to do something with serial port right after wake-up? */
 182         return IRQ_HANDLED;
 183 }
 184
 185 /*
 186  * Reroutes serial RX lines to GPIO lines for the duration of
 187  * sleep to allow waking up the device from serial port even
 188  * in deep sleep.
 189  */
 190 void omap_serial_wake_trigger(int enable)
 191 {
 192         if (!cpu_is_omap16xx())
 193                 return;
 194
 195         if (uart1_ck != NULL) {
 196                 if (enable)
 197                         omap_cfg_reg(V14_16XX_GPIO37);
 198                 else
 199                         omap_cfg_reg(V14_16XX_UART1_RX);
 200         }
 201         if (uart2_ck != NULL) {
 202                 if (enable)
 203                         omap_cfg_reg(R9_16XX_GPIO18);
 204                 else
 205                         omap_cfg_reg(R9_16XX_UART2_RX);
 206         }
 207         if (uart3_ck != NULL) {
 208                 if (enable)
 209                         omap_cfg_reg(L14_16XX_GPIO49);
 210                 else
 211                         omap_cfg_reg(L14_16XX_UART3_RX);
 212         }
 213 }
 214
 215 static void __init omap_serial_set_port_wakeup(int gpio_nr)
 216 {
 217         int ret;
 218
 219         ret = gpio_request(gpio_nr, "UART wake");
 220         if (ret < 0) {
 221                 printk(KERN_ERR "Could not request UART wake GPIO: %i\n",
 222                        gpio_nr);
 223                 return;
 224         }
 225         gpio_direction_input(gpio_nr);
 226         ret = request_irq(gpio_to_irq(gpio_nr), &omap_serial_wake_interrupt,
 227                           IRQF_TRIGGER_RISING, "serial wakeup", NULL);
 228         if (ret) {
 229                 gpio_free(gpio_nr);
 230                 printk(KERN_ERR "No interrupt for UART wake GPIO: %i\n",
 231                        gpio_nr);
 232                 return;
 233         }
 234         enable_irq_wake(gpio_to_irq(gpio_nr));
 235 }
 236
 237 static int __init omap_serial_wakeup_init(void)
 238 {
 239         if (!cpu_is_omap16xx())
 240                 return 0;
 241
 242         if (uart1_ck != NULL)
 243                 omap_serial_set_port_wakeup(37);
 244         if (uart2_ck != NULL)
 245                 omap_serial_set_port_wakeup(18);
 246         if (uart3_ck != NULL)
 247                 omap_serial_set_port_wakeup(49);
 248
 249         return 0;
 250 }
 251 late_initcall(omap_serial_wakeup_init);
 252
 253 #endif  /* CONFIG_OMAP_SERIAL_WAKE */
 254
 255 static int __init omap_init(void)
 256 {
 257         return platform_device_register(&serial_device);
 258 }
 259 arch_initcall(omap_init);