drivers/i2c/busses/i2c-pnx.c

   1 /*
   2  * Provides I2C support for Philips PNX010x/PNX4008 boards.
   3  *
   4  * Authors: Dennis Kovalev <dkovalev@ru.mvista.com>
   5  *          Vitaly Wool <vwool@ru.mvista.com>
   6  *
   7  * 2004-2006 (c) MontaVista Software, Inc. This file is licensed under
   8  * the terms of the GNU General Public License version 2. This program
   9  * is licensed "as is" without any warranty of any kind, whether express
  10  * or implied.
  11  */
  12
  13 #include <linux/module.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/ioport.h>
  16 #include <linux/delay.h>
  17 #include <linux/i2c.h>
  18 #include <linux/timer.h>
  19 #include <linux/completion.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/i2c-pnx.h>
  22 #include <linux/io.h>
  23 #include <linux/err.h>
  24 #include <linux/clk.h>
  25
  26 #include <mach/hardware.h>
  27 #include <mach/i2c.h>
  28 #include <asm/irq.h>
  29 #include <asm/uaccess.h>
  30
  31 #define I2C_PNX_TIMEOUT         10 /* msec */
  32 #define I2C_PNX_SPEED_KHZ       100
  33 #define I2C_PNX_REGION_SIZE     0x100
  34
  35 static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data)
  36 {
  37         while (timeout > 0 &&
  38                         (ioread32(I2C_REG_STS(data)) & mstatus_active)) {
  39                 mdelay(1);
  40                 timeout--;
  41         }
  42         return (timeout <= 0);
  43 }
  44
  45 static inline int wait_reset(long timeout, struct i2c_pnx_algo_data *data)
  46 {
  47         while (timeout > 0 &&
  48                         (ioread32(I2C_REG_CTL(data)) & mcntrl_reset)) {
  49                 mdelay(1);
  50                 timeout--;
  51         }
  52         return (timeout <= 0);
  53 }
  54
  55 static inline void i2c_pnx_arm_timer(struct i2c_adapter *adap)
  56 {
  57         struct i2c_pnx_algo_data *data = adap->algo_data;
  58         struct timer_list *timer = &data->mif.timer;
  59         int expires = I2C_PNX_TIMEOUT / (1000 / HZ);
  60
  61         if (expires <= 1)
  62                 expires = 2;
  63
  64         del_timer_sync(timer);
  65
  66         dev_dbg(&adap->dev, "Timer armed at %lu plus %u jiffies.\n",
  67                 jiffies, expires);
  68
  69         timer->expires = jiffies + expires;
  70         timer->data = (unsigned long)adap;
  71
  72         add_timer(timer);
  73 }
  74
  75 /**
  76  * i2c_pnx_start - start a device
  77  * @slave_addr:         slave address
  78  * @adap:               pointer to adapter structure
  79  *
  80  * Generate a START signal in the desired mode.
  81  */
  82 static int i2c_pnx_start(unsigned char slave_addr, struct i2c_adapter *adap)
  83 {
  84         struct i2c_pnx_algo_data *alg_data = adap->algo_data;
  85
  86         dev_dbg(&adap->dev, "%s(): addr 0x%x mode %d\n", __func__,
  87                 slave_addr, alg_data->mif.mode);
  88
  89         /* Check for 7 bit slave addresses only */
  90         if (slave_addr & ~0x7f) {
  91                 dev_err(&adap->dev, "%s: Invalid slave address %x. "
  92                        "Only 7-bit addresses are supported\n",
  93                        adap->name, slave_addr);
  94                 return -EINVAL;
  95         }
  96
  97         /* First, make sure bus is idle */
  98         if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) {
  99                 /* Somebody else is monopolizing the bus */
 100                 dev_err(&adap->dev, "%s: Bus busy. Slave addr = %02x, "
 101                        "cntrl = %x, stat = %x\n",
 102                        adap->name, slave_addr,
 103                        ioread32(I2C_REG_CTL(alg_data)),
 104                        ioread32(I2C_REG_STS(alg_data)));
 105                 return -EBUSY;
 106         } else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) {
 107                 /* Sorry, we lost the bus */
 108                 dev_err(&adap->dev, "%s: Arbitration failure. "
 109                        "Slave addr = %02x\n", adap->name, slave_addr);
 110                 return -EIO;
 111         }
 112
 113         /*
 114          * OK, I2C is enabled and we have the bus.
 115          * Clear the current TDI and AFI status flags.
 116          */
 117         iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi,
 118                   I2C_REG_STS(alg_data));
 119
 120         dev_dbg(&adap->dev, "%s(): sending %#x\n", __func__,
 121                 (slave_addr << 1) | start_bit | alg_data->mif.mode);
 122
 123         /* Write the slave address, START bit and R/W bit */
 124         iowrite32((slave_addr << 1) | start_bit | alg_data->mif.mode,
 125                   I2C_REG_TX(alg_data));
 126
 127         dev_dbg(&adap->dev, "%s(): exit\n", __func__);
 128
 129         return 0;
 130 }
 131
 132 /**
 133  * i2c_pnx_stop - stop a device
 134  * @adap:               pointer to I2C adapter structure
 135  *
 136  * Generate a STOP signal to terminate the master transaction.
 137  */
 138 static void i2c_pnx_stop(struct i2c_adapter *adap)
 139 {
 140         struct i2c_pnx_algo_data *alg_data = adap->algo_data;
 141         /* Only 1 msec max timeout due to interrupt context */
 142         long timeout = 1000;
 143
 144         dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
 145                 __func__, ioread32(I2C_REG_STS(alg_data)));
 146
 147         /* Write a STOP bit to TX FIFO */
 148         iowrite32(0xff | stop_bit, I2C_REG_TX(alg_data));
 149
 150         /* Wait until the STOP is seen. */
 151         while (timeout > 0 &&
 152                (ioread32(I2C_REG_STS(alg_data)) & mstatus_active)) {
 153                 /* may be called from interrupt context */
 154                 udelay(1);
 155                 timeout--;
 156         }
 157
 158         dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
 159                 __func__, ioread32(I2C_REG_STS(alg_data)));
 160 }
 161
 162 /**
 163  * i2c_pnx_master_xmit - transmit data to slave
 164  * @adap:               pointer to I2C adapter structure
 165  *
 166  * Sends one byte of data to the slave
 167  */
 168 static int i2c_pnx_master_xmit(struct i2c_adapter *adap)
 169 {
 170         struct i2c_pnx_algo_data *alg_data = adap->algo_data;
 171         u32 val;
 172
 173         dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
 174                 __func__, ioread32(I2C_REG_STS(alg_data)));
 175
 176         if (alg_data->mif.len > 0) {
 177                 /* We still have something to talk about... */
 178                 val = *alg_data->mif.buf++;
 179
 180                 if (alg_data->mif.len == 1) {
 181                         val |= stop_bit;
 182                         if (!alg_data->last)
 183                                 val |= start_bit;
 184                 }
 185
 186                 alg_data->mif.len--;
 187                 iowrite32(val, I2C_REG_TX(alg_data));
 188
 189                 dev_dbg(&adap->dev, "%s(): xmit %#x [%d]\n", __func__,
 190                         val, alg_data->mif.len + 1);
 191
 192                 if (alg_data->mif.len == 0) {
 193                         if (alg_data->last) {
 194                                 /* Wait until the STOP is seen. */
 195                                 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
 196                                         dev_err(&adap->dev, "The bus is still "
 197                                                 "active after timeout\n");
 198                         }
 199                         /* Disable master interrupts */
 200                         iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
 201                                 ~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),
 202                                   I2C_REG_CTL(alg_data));
 203
 204                         del_timer_sync(&alg_data->mif.timer);
 205
 206                         dev_dbg(&adap->dev, "%s(): Waking up xfer routine.\n",
 207                                 __func__);
 208
 209                         complete(&alg_data->mif.complete);
 210                 }
 211         } else if (alg_data->mif.len == 0) {
 212                 /* zero-sized transfer */
 213                 i2c_pnx_stop(adap);
 214
 215                 /* Disable master interrupts. */
 216                 iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
 217                         ~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),
 218                           I2C_REG_CTL(alg_data));
 219
 220                 /* Stop timer. */
 221                 del_timer_sync(&alg_data->mif.timer);
 222                 dev_dbg(&adap->dev, "%s(): Waking up xfer routine after "
 223                         "zero-xfer.\n", __func__);
 224
 225                 complete(&alg_data->mif.complete);
 226         }
 227
 228         dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
 229                 __func__, ioread32(I2C_REG_STS(alg_data)));
 230
 231         return 0;
 232 }
 233
 234 /**
 235  * i2c_pnx_master_rcv - receive data from slave
 236  * @adap:               pointer to I2C adapter structure
 237  *
 238  * Reads one byte data from the slave
 239  */
 240 static int i2c_pnx_master_rcv(struct i2c_adapter *adap)
 241 {
 242         struct i2c_pnx_algo_data *alg_data = adap->algo_data;
 243         unsigned int val = 0;
 244         u32 ctl = 0;
 245
 246         dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
 247                 __func__, ioread32(I2C_REG_STS(alg_data)));
 248
 249         /* Check, whether there is already data,
 250          * or we didn't 'ask' for it yet.
 251          */
 252         if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) {
 253                 dev_dbg(&adap->dev, "%s(): Write dummy data to fill "
 254                         "Rx-fifo...\n", __func__);
 255
 256                 if (alg_data->mif.len == 1) {
 257                         /* Last byte, do not acknowledge next rcv. */
 258                         val |= stop_bit;
 259                         if (!alg_data->last)
 260                                 val |= start_bit;
 261
 262                         /*
 263                          * Enable interrupt RFDAIE (data in Rx fifo),
 264                          * and disable DRMIE (need data for Tx)
 265                          */
 266                         ctl = ioread32(I2C_REG_CTL(alg_data));
 267                         ctl |= mcntrl_rffie | mcntrl_daie;
 268                         ctl &= ~mcntrl_drmie;
 269                         iowrite32(ctl, I2C_REG_CTL(alg_data));
 270                 }
 271
 272                 /*
 273                  * Now we'll 'ask' for data:
 274                  * For each byte we want to receive, we must
 275                  * write a (dummy) byte to the Tx-FIFO.
 276                  */
 277                 iowrite32(val, I2C_REG_TX(alg_data));
 278
 279                 return 0;
 280         }
 281
 282         /* Handle data. */
 283         if (alg_data->mif.len > 0) {
 284                 val = ioread32(I2C_REG_RX(alg_data));
 285                 *alg_data->mif.buf++ = (u8) (val & 0xff);
 286                 dev_dbg(&adap->dev, "%s(): rcv 0x%x [%d]\n", __func__, val,
 287                         alg_data->mif.len);
 288
 289                 alg_data->mif.len--;
 290                 if (alg_data->mif.len == 0) {
 291                         if (alg_data->last)
 292                                 /* Wait until the STOP is seen. */
 293                                 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
 294                                         dev_err(&adap->dev, "The bus is still "
 295                                                 "active after timeout\n");
 296
 297                         /* Disable master interrupts */
 298                         ctl = ioread32(I2C_REG_CTL(alg_data));
 299                         ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
 300                                  mcntrl_drmie | mcntrl_daie);
 301                         iowrite32(ctl, I2C_REG_CTL(alg_data));
 302
 303                         /* Kill timer. */
 304                         del_timer_sync(&alg_data->mif.timer);
 305                         complete(&alg_data->mif.complete);
 306                 }
 307         }
 308
 309         dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
 310                 __func__, ioread32(I2C_REG_STS(alg_data)));
 311
 312         return 0;
 313 }
 314
 315 static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
 316 {
 317         u32 stat, ctl;
 318         struct i2c_adapter *adap = dev_id;
 319         struct i2c_pnx_algo_data *alg_data = adap->algo_data;
 320
 321         dev_dbg(&adap->dev, "%s(): mstat = %x mctrl = %x, mode = %d\n",
 322                 __func__,
 323                 ioread32(I2C_REG_STS(alg_data)),
 324                 ioread32(I2C_REG_CTL(alg_data)),
 325                 alg_data->mif.mode);
 326         stat = ioread32(I2C_REG_STS(alg_data));
 327
 328         /* let's see what kind of event this is */
 329         if (stat & mstatus_afi) {
 330                 /* We lost arbitration in the midst of a transfer */
 331                 alg_data->mif.ret = -EIO;
 332
 333                 /* Disable master interrupts. */
 334                 ctl = ioread32(I2C_REG_CTL(alg_data));
 335                 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
 336                          mcntrl_drmie);
 337                 iowrite32(ctl, I2C_REG_CTL(alg_data));
 338
 339                 /* Stop timer, to prevent timeout. */
 340                 del_timer_sync(&alg_data->mif.timer);
 341                 complete(&alg_data->mif.complete);
 342         } else if (stat & mstatus_nai) {
 343                 /* Slave did not acknowledge, generate a STOP */
 344                 dev_dbg(&adap->dev, "%s(): "
 345                         "Slave did not acknowledge, generating a STOP.\n",
 346                         __func__);
 347                 i2c_pnx_stop(adap);
 348
 349                 /* Disable master interrupts. */
 350                 ctl = ioread32(I2C_REG_CTL(alg_data));
 351                 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
 352                          mcntrl_drmie);
 353                 iowrite32(ctl, I2C_REG_CTL(alg_data));
 354
 355                 /* Our return value. */
 356                 alg_data->mif.ret = -EIO;
 357
 358                 /* Stop timer, to prevent timeout. */
 359                 del_timer_sync(&alg_data->mif.timer);
 360                 complete(&alg_data->mif.complete);
 361         } else {
 362                 /*
 363                  * Two options:
 364                  * - Master Tx needs data.
 365                  * - There is data in the Rx-fifo
 366                  * The latter is only the case if we have requested for data,
 367                  * via a dummy write. (See 'i2c_pnx_master_rcv'.)
 368                  * We therefore check, as a sanity check, whether that interrupt
 369                  * has been enabled.
 370                  */
 371                 if ((stat & mstatus_drmi) || !(stat & mstatus_rfe)) {
 372                         if (alg_data->mif.mode == I2C_SMBUS_WRITE) {
 373                                 i2c_pnx_master_xmit(adap);
 374                         } else if (alg_data->mif.mode == I2C_SMBUS_READ) {
 375                                 i2c_pnx_master_rcv(adap);
 376                         }
 377                 }
 378         }
 379
 380         /* Clear TDI and AFI bits */
 381         stat = ioread32(I2C_REG_STS(alg_data));
 382         iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data));
 383
 384         dev_dbg(&adap->dev, "%s(): exiting, stat = %x ctrl = %x.\n",
 385                  __func__, ioread32(I2C_REG_STS(alg_data)),
 386                  ioread32(I2C_REG_CTL(alg_data)));
 387
 388         return IRQ_HANDLED;
 389 }
 390
 391 static void i2c_pnx_timeout(unsigned long data)
 392 {
 393         struct i2c_adapter *adap = (struct i2c_adapter *)data;
 394         struct i2c_pnx_algo_data *alg_data = adap->algo_data;
 395         u32 ctl;
 396
 397         dev_err(&adap->dev, "Master timed out. stat = %04x, cntrl = %04x. "
 398                "Resetting master...\n",
 399                ioread32(I2C_REG_STS(alg_data)),
 400                ioread32(I2C_REG_CTL(alg_data)));
 401
 402         /* Reset master and disable interrupts */
 403         ctl = ioread32(I2C_REG_CTL(alg_data));
 404         ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie | mcntrl_drmie);
 405         iowrite32(ctl, I2C_REG_CTL(alg_data));
 406
 407         ctl |= mcntrl_reset;
 408         iowrite32(ctl, I2C_REG_CTL(alg_data));
 409         wait_reset(I2C_PNX_TIMEOUT, alg_data);
 410         alg_data->mif.ret = -EIO;
 411         complete(&alg_data->mif.complete);
 412 }
 413
 414 static inline void bus_reset_if_active(struct i2c_adapter *adap)
 415 {
 416         struct i2c_pnx_algo_data *alg_data = adap->algo_data;
 417         u32 stat;
 418
 419         if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_active) {
 420                 dev_err(&adap->dev,
 421                         "%s: Bus is still active after xfer. Reset it...\n",
 422                        adap->name);
 423                 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
 424                           I2C_REG_CTL(alg_data));
 425                 wait_reset(I2C_PNX_TIMEOUT, alg_data);
 426         } else if (!(stat & mstatus_rfe) || !(stat & mstatus_tfe)) {
 427                 /* If there is data in the fifo's after transfer,
 428                  * flush fifo's by reset.
 429                  */
 430                 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
 431                           I2C_REG_CTL(alg_data));
 432                 wait_reset(I2C_PNX_TIMEOUT, alg_data);
 433         } else if (stat & mstatus_nai) {
 434                 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
 435                           I2C_REG_CTL(alg_data));
 436                 wait_reset(I2C_PNX_TIMEOUT, alg_data);
 437         }
 438 }
 439
 440 /**
 441  * i2c_pnx_xfer - generic transfer entry point
 442  * @adap:               pointer to I2C adapter structure
 443  * @msgs:               array of messages
 444  * @num:                number of messages
 445  *
 446  * Initiates the transfer
 447  */
 448 static int
 449 i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
 450 {
 451         struct i2c_msg *pmsg;
 452         int rc = 0, completed = 0, i;
 453         struct i2c_pnx_algo_data *alg_data = adap->algo_data;
 454         u32 stat = ioread32(I2C_REG_STS(alg_data));
 455
 456         dev_dbg(&adap->dev, "%s(): entering: %d messages, stat = %04x.\n",
 457                 __func__, num, ioread32(I2C_REG_STS(alg_data)));
 458
 459         bus_reset_if_active(adap);
 460
 461         /* Process transactions in a loop. */
 462         for (i = 0; rc >= 0 && i < num; i++) {
 463                 u8 addr;
 464
 465                 pmsg = &msgs[i];
 466                 addr = pmsg->addr;
 467
 468                 if (pmsg->flags & I2C_M_TEN) {
 469                         dev_err(&adap->dev,
 470                                 "%s: 10 bits addr not supported!\n",
 471                                 adap->name);
 472                         rc = -EINVAL;
 473                         break;
 474                 }
 475
 476                 alg_data->mif.buf = pmsg->buf;
 477                 alg_data->mif.len = pmsg->len;
 478                 alg_data->mif.mode = (pmsg->flags & I2C_M_RD) ?
 479                         I2C_SMBUS_READ : I2C_SMBUS_WRITE;
 480                 alg_data->mif.ret = 0;
 481                 alg_data->last = (i == num - 1);
 482
 483                 dev_dbg(&adap->dev, "%s(): mode %d, %d bytes\n", __func__,
 484                         alg_data->mif.mode,
 485                         alg_data->mif.len);
 486
 487                 i2c_pnx_arm_timer(adap);
 488
 489                 /* initialize the completion var */
 490                 init_completion(&alg_data->mif.complete);
 491
 492                 /* Enable master interrupt */
 493                 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_afie |
 494                                 mcntrl_naie | mcntrl_drmie,
 495                           I2C_REG_CTL(alg_data));
 496
 497                 /* Put start-code and slave-address on the bus. */
 498                 rc = i2c_pnx_start(addr, adap);
 499                 if (rc < 0)
 500                         break;
 501
 502                 /* Wait for completion */
 503                 wait_for_completion(&alg_data->mif.complete);
 504
 505                 if (!(rc = alg_data->mif.ret))
 506                         completed++;
 507                 dev_dbg(&adap->dev, "%s(): Complete, return code = %d.\n",
 508                         __func__, rc);
 509
 510                 /* Clear TDI and AFI bits in case they are set. */
 511                 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_tdi) {
 512                         dev_dbg(&adap->dev,
 513                                 "%s: TDI still set... clearing now.\n",
 514                                adap->name);
 515                         iowrite32(stat, I2C_REG_STS(alg_data));
 516                 }
 517                 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_afi) {
 518                         dev_dbg(&adap->dev,
 519                                 "%s: AFI still set... clearing now.\n",
 520                                adap->name);
 521                         iowrite32(stat, I2C_REG_STS(alg_data));
 522                 }
 523         }
 524
 525         bus_reset_if_active(adap);
 526
 527         /* Cleanup to be sure... */
 528         alg_data->mif.buf = NULL;
 529         alg_data->mif.len = 0;
 530
 531         dev_dbg(&adap->dev, "%s(): exiting, stat = %x\n",
 532                 __func__, ioread32(I2C_REG_STS(alg_data)));
 533
 534         if (completed != num)
 535                 return ((rc < 0) ? rc : -EREMOTEIO);
 536
 537         return num;
 538 }
 539
 540 static u32 i2c_pnx_func(struct i2c_adapter *adapter)
 541 {
 542         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 543 }
 544
 545 static struct i2c_algorithm pnx_algorithm = {
 546         .master_xfer = i2c_pnx_xfer,
 547         .functionality = i2c_pnx_func,
 548 };
 549
 550 #ifdef CONFIG_PM
 551 static int i2c_pnx_controller_suspend(struct platform_device *pdev,
 552                                       pm_message_t state)
 553 {
 554         struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
 555         struct i2c_pnx_algo_data *alg_data = i2c_pnx->adapter->algo_data;
 556
 557         /* FIXME: shouldn't this be clk_disable? */
 558         clk_enable(alg_data->clk);
 559
 560         return 0;
 561 }
 562
 563 static int i2c_pnx_controller_resume(struct platform_device *pdev)
 564 {
 565         struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
 566         struct i2c_pnx_algo_data *alg_data = i2c_pnx->adapter->algo_data;
 567
 568         return clk_enable(alg_data->clk);
 569 }
 570 #else
 571 #define i2c_pnx_controller_suspend      NULL
 572 #define i2c_pnx_controller_resume       NULL
 573 #endif
 574
 575 static int __devinit i2c_pnx_probe(struct platform_device *pdev)
 576 {
 577         unsigned long tmp;
 578         int ret = 0;
 579         struct i2c_pnx_algo_data *alg_data;
 580         unsigned long freq;
 581         struct i2c_pnx_data *i2c_pnx = pdev->dev.platform_data;
 582
 583         if (!i2c_pnx || !i2c_pnx->adapter) {
 584                 dev_err(&pdev->dev, "%s: no platform data supplied\n",
 585                        __func__);
 586                 ret = -EINVAL;
 587                 goto out;
 588         }
 589
 590         alg_data = kzalloc(sizeof(*alg_data), GFP_KERNEL);
 591         if (!alg_data) {
 592                 ret = -ENOMEM;
 593                 goto err_kzalloc;
 594         }
 595
 596         platform_set_drvdata(pdev, i2c_pnx);
 597
 598         i2c_pnx->adapter->algo = &pnx_algorithm;
 599         i2c_pnx->adapter->algo_data = alg_data;
 600
 601         alg_data->clk = clk_get(&pdev->dev, NULL);
 602         if (IS_ERR(alg_data->clk)) {
 603                 ret = PTR_ERR(alg_data->clk);
 604                 goto out_drvdata;
 605         }
 606
 607         init_timer(&alg_data->mif.timer);
 608         alg_data->mif.timer.function = i2c_pnx_timeout;
 609         alg_data->mif.timer.data = (unsigned long)i2c_pnx->adapter;
 610
 611         /* Register I/O resource */
 612         if (!request_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE,
 613                                 pdev->name)) {
 614                 dev_err(&pdev->dev,
 615                        "I/O region 0x%08x for I2C already in use.\n",
 616                        i2c_pnx->base);
 617                 ret = -ENODEV;
 618                 goto out_clkget;
 619         }
 620
 621         alg_data->ioaddr = ioremap(i2c_pnx->base, I2C_PNX_REGION_SIZE);
 622         if (!alg_data->ioaddr) {
 623                 dev_err(&pdev->dev, "Couldn't ioremap I2C I/O region\n");
 624                 ret = -ENOMEM;
 625                 goto out_release;
 626         }
 627
 628         ret = clk_enable(alg_data->clk);
 629         if (ret)
 630                 goto out_unmap;
 631
 632         freq = clk_get_rate(alg_data->clk);
 633
 634         /*
 635          * Clock Divisor High This value is the number of system clocks
 636          * the serial clock (SCL) will be high.
 637          * For example, if the system clock period is 50 ns and the maximum
 638          * desired serial period is 10000 ns (100 kHz), then CLKHI would be
 639          * set to 0.5*(f_sys/f_i2c)-2=0.5*(20e6/100e3)-2=98. The actual value
 640          * programmed into CLKHI will vary from this slightly due to
 641          * variations in the output pad's rise and fall times as well as
 642          * the deglitching filter length.
 643          */
 644
 645         tmp = ((freq / 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2;
 646         iowrite32(tmp, I2C_REG_CKH(alg_data));
 647         iowrite32(tmp, I2C_REG_CKL(alg_data));
 648
 649         iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data));
 650         if (wait_reset(I2C_PNX_TIMEOUT, alg_data)) {
 651                 ret = -ENODEV;
 652                 goto out_clock;
 653         }
 654         init_completion(&alg_data->mif.complete);
 655
 656         ret = request_irq(i2c_pnx->irq, i2c_pnx_interrupt,
 657                         0, pdev->name, i2c_pnx->adapter);
 658         if (ret)
 659                 goto out_clock;
 660
 661         /* Register this adapter with the I2C subsystem */
 662         i2c_pnx->adapter->dev.parent = &pdev->dev;
 663         i2c_pnx->adapter->nr = pdev->id;
 664         ret = i2c_add_numbered_adapter(i2c_pnx->adapter);
 665         if (ret < 0) {
 666                 dev_err(&pdev->dev, "I2C: Failed to add bus\n");
 667                 goto out_irq;
 668         }
 669
 670         dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n",
 671                i2c_pnx->adapter->name, i2c_pnx->base, i2c_pnx->irq);
 672
 673         return 0;
 674
 675 out_irq:
 676         free_irq(i2c_pnx->irq, i2c_pnx->adapter);
 677 out_clock:
 678         clk_disable(alg_data->clk);
 679 out_unmap:
 680         iounmap(alg_data->ioaddr);
 681 out_release:
 682         release_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE);
 683 out_clkget:
 684         clk_put(alg_data->clk);
 685 out_drvdata:
 686         kfree(alg_data);
 687 err_kzalloc:
 688         platform_set_drvdata(pdev, NULL);
 689 out:
 690         return ret;
 691 }
 692
 693 static int __devexit i2c_pnx_remove(struct platform_device *pdev)
 694 {
 695         struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
 696         struct i2c_adapter *adap = i2c_pnx->adapter;
 697         struct i2c_pnx_algo_data *alg_data = adap->algo_data;
 698
 699         free_irq(i2c_pnx->irq, i2c_pnx->adapter);
 700         i2c_del_adapter(adap);
 701         clk_disable(alg_data->clk);
 702         iounmap(alg_data->ioaddr);
 703         release_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE);
 704         clk_put(alg_data->clk);
 705         kfree(alg_data);
 706         platform_set_drvdata(pdev, NULL);
 707
 708         return 0;
 709 }
 710
 711 static struct platform_driver i2c_pnx_driver = {
 712         .driver = {
 713                 .name = "pnx-i2c",
 714                 .owner = THIS_MODULE,
 715         },
 716         .probe = i2c_pnx_probe,
 717         .remove = __devexit_p(i2c_pnx_remove),
 718         .suspend = i2c_pnx_controller_suspend,
 719         .resume = i2c_pnx_controller_resume,
 720 };
 721
 722 static int __init i2c_adap_pnx_init(void)
 723 {
 724         return platform_driver_register(&i2c_pnx_driver);
 725 }
 726
 727 static void __exit i2c_adap_pnx_exit(void)
 728 {
 729         platform_driver_unregister(&i2c_pnx_driver);
 730 }
 731
 732 MODULE_AUTHOR("Vitaly Wool, Dennis Kovalev <source@mvista.com>");
 733 MODULE_DESCRIPTION("I2C driver for Philips IP3204-based I2C busses");
 734 MODULE_LICENSE("GPL");
 735 MODULE_ALIAS("platform:pnx-i2c");
 736
 737 /* We need to make sure I2C is initialized before USB */
 738 subsys_initcall(i2c_adap_pnx_init);
 739 module_exit(i2c_adap_pnx_exit);