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drm/nouveau/devinit: ensure legacy vga control is enabled during post
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / scsi / mpt2sas / mpt2sas_base.c
blobffd85c511c8e2925314d27a96f268f922d1db3aa
1 /*
2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
4 *
5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
6 * Copyright (C) 2007-2012 LSI Corporation
7 * (mailto:DL-MPTFusionLinux@lsi.com)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * NO WARRANTY
20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
24 * solely responsible for determining the appropriateness of using and
25 * distributing the Program and assumes all risks associated with its
26 * exercise of rights under this Agreement, including but not limited to
27 * the risks and costs of program errors, damage to or loss of data,
28 * programs or equipment, and unavailability or interruption of operations.
29
30 * DISCLAIMER OF LIABILITY
31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
38
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
42 * USA.
43 */
44
45 #include <linux/kernel.h>
46 #include <linux/module.h>
47 #include <linux/errno.h>
48 #include <linux/init.h>
49 #include <linux/slab.h>
50 #include <linux/types.h>
51 #include <linux/pci.h>
52 #include <linux/kdev_t.h>
53 #include <linux/blkdev.h>
54 #include <linux/delay.h>
55 #include <linux/interrupt.h>
56 #include <linux/dma-mapping.h>
57 #include <linux/sort.h>
58 #include <linux/io.h>
59 #include <linux/time.h>
60 #include <linux/kthread.h>
61 #include <linux/aer.h>
62
63 #include "mpt2sas_base.h"
64
65 static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
66
67 #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
68
69 #define MAX_HBA_QUEUE_DEPTH 30000
70 #define MAX_CHAIN_DEPTH 100000
71 static int max_queue_depth = -1;
72 module_param(max_queue_depth, int, 0);
73 MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
74
75 static int max_sgl_entries = -1;
76 module_param(max_sgl_entries, int, 0);
77 MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
78
79 static int msix_disable = -1;
80 module_param(msix_disable, int, 0);
81 MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
82
83 static int missing_delay[2] = {-1, -1};
84 module_param_array(missing_delay, int, NULL, 0);
85 MODULE_PARM_DESC(missing_delay, " device missing delay , io missing delay");
86
87 static int mpt2sas_fwfault_debug;
88 MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
89 "and halt firmware - (default=0)");
90
91 static int disable_discovery = -1;
92 module_param(disable_discovery, int, 0);
93 MODULE_PARM_DESC(disable_discovery, " disable discovery ");
94
95 /**
96 * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
97 *
98 */
99 static int
100 _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
101 {
102 int ret = param_set_int(val, kp);
103 struct MPT2SAS_ADAPTER *ioc;
104
105 if (ret)
106 return ret;
107
108 printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
109 list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
110 ioc->fwfault_debug = mpt2sas_fwfault_debug;
111 return 0;
112 }
113
114 module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
115 param_get_int, &mpt2sas_fwfault_debug, 0644);
116
117 /**
118 * mpt2sas_remove_dead_ioc_func - kthread context to remove dead ioc
119 * @arg: input argument, used to derive ioc
120 *
121 * Return 0 if controller is removed from pci subsystem.
122 * Return -1 for other case.
123 */
124 static int mpt2sas_remove_dead_ioc_func(void *arg)
125 {
126 struct MPT2SAS_ADAPTER *ioc = (struct MPT2SAS_ADAPTER *)arg;
127 struct pci_dev *pdev;
128
129 if ((ioc == NULL))
130 return -1;
131
132 pdev = ioc->pdev;
133 if ((pdev == NULL))
134 return -1;
135 pci_stop_and_remove_bus_device(pdev);
136 return 0;
137 }
138
139
140 /**
141 * _base_fault_reset_work - workq handling ioc fault conditions
142 * @work: input argument, used to derive ioc
143 * Context: sleep.
144 *
145 * Return nothing.
146 */
147 static void
148 _base_fault_reset_work(struct work_struct *work)
149 {
150 struct MPT2SAS_ADAPTER *ioc =
151 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
152 unsigned long flags;
153 u32 doorbell;
154 int rc;
155 struct task_struct *p;
156
157 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
158 if (ioc->shost_recovery)
159 goto rearm_timer;
160 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
161
162 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
163 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) {
164 printk(MPT2SAS_INFO_FMT "%s : SAS host is non-operational !!!!\n",
165 ioc->name, __func__);
166
167 /*
168 * Call _scsih_flush_pending_cmds callback so that we flush all
169 * pending commands back to OS. This call is required to aovid
170 * deadlock at block layer. Dead IOC will fail to do diag reset,
171 * and this call is safe since dead ioc will never return any
172 * command back from HW.
173 */
174 ioc->schedule_dead_ioc_flush_running_cmds(ioc);
175 /*
176 * Set remove_host flag early since kernel thread will
177 * take some time to execute.
178 */
179 ioc->remove_host = 1;
180 /*Remove the Dead Host */
181 p = kthread_run(mpt2sas_remove_dead_ioc_func, ioc,
182 "mpt2sas_dead_ioc_%d", ioc->id);
183 if (IS_ERR(p)) {
184 printk(MPT2SAS_ERR_FMT
185 "%s: Running mpt2sas_dead_ioc thread failed !!!!\n",
186 ioc->name, __func__);
187 } else {
188 printk(MPT2SAS_ERR_FMT
189 "%s: Running mpt2sas_dead_ioc thread success !!!!\n",
190 ioc->name, __func__);
191 }
192
193 return; /* don't rearm timer */
194 }
195
196 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
197 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
198 FORCE_BIG_HAMMER);
199 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
200 __func__, (rc == 0) ? "success" : "failed");
201 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
202 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
203 mpt2sas_base_fault_info(ioc, doorbell &
204 MPI2_DOORBELL_DATA_MASK);
205 }
206
207 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
208 rearm_timer:
209 if (ioc->fault_reset_work_q)
210 queue_delayed_work(ioc->fault_reset_work_q,
211 &ioc->fault_reset_work,
212 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
213 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
214 }
215
216 /**
217 * mpt2sas_base_start_watchdog - start the fault_reset_work_q
218 * @ioc: per adapter object
219 * Context: sleep.
220 *
221 * Return nothing.
222 */
223 void
224 mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
225 {
226 unsigned long flags;
227
228 if (ioc->fault_reset_work_q)
229 return;
230
231 /* initialize fault polling */
232 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
233 snprintf(ioc->fault_reset_work_q_name,
234 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
235 ioc->fault_reset_work_q =
236 create_singlethread_workqueue(ioc->fault_reset_work_q_name);
237 if (!ioc->fault_reset_work_q) {
238 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
239 ioc->name, __func__, __LINE__);
240 return;
241 }
242 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
243 if (ioc->fault_reset_work_q)
244 queue_delayed_work(ioc->fault_reset_work_q,
245 &ioc->fault_reset_work,
246 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
247 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
248 }
249
250 /**
251 * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
252 * @ioc: per adapter object
253 * Context: sleep.
254 *
255 * Return nothing.
256 */
257 void
258 mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
259 {
260 unsigned long flags;
261 struct workqueue_struct *wq;
262
263 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
264 wq = ioc->fault_reset_work_q;
265 ioc->fault_reset_work_q = NULL;
266 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
267 if (wq) {
268 if (!cancel_delayed_work(&ioc->fault_reset_work))
269 flush_workqueue(wq);
270 destroy_workqueue(wq);
271 }
272 }
273
274 /**
275 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
276 * @ioc: per adapter object
277 * @fault_code: fault code
278 *
279 * Return nothing.
280 */
281 void
282 mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
283 {
284 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
285 ioc->name, fault_code);
286 }
287
288 /**
289 * mpt2sas_halt_firmware - halt's mpt controller firmware
290 * @ioc: per adapter object
291 *
292 * For debugging timeout related issues. Writing 0xCOFFEE00
293 * to the doorbell register will halt controller firmware. With
294 * the purpose to stop both driver and firmware, the enduser can
295 * obtain a ring buffer from controller UART.
296 */
297 void
298 mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
299 {
300 u32 doorbell;
301
302 if (!ioc->fwfault_debug)
303 return;
304
305 dump_stack();
306
307 doorbell = readl(&ioc->chip->Doorbell);
308 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
309 mpt2sas_base_fault_info(ioc , doorbell);
310 else {
311 writel(0xC0FFEE00, &ioc->chip->Doorbell);
312 printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
313 "timeout\n", ioc->name);
314 }
315
316 panic("panic in %s\n", __func__);
317 }
318
319 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
320 /**
321 * _base_sas_ioc_info - verbose translation of the ioc status
322 * @ioc: per adapter object
323 * @mpi_reply: reply mf payload returned from firmware
324 * @request_hdr: request mf
325 *
326 * Return nothing.
327 */
328 static void
329 _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
330 MPI2RequestHeader_t *request_hdr)
331 {
332 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
333 MPI2_IOCSTATUS_MASK;
334 char *desc = NULL;
335 u16 frame_sz;
336 char *func_str = NULL;
337
338 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
339 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
340 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
341 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
342 return;
343
344 if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
345 return;
346
347 switch (ioc_status) {
348
349 /****************************************************************************
350 * Common IOCStatus values for all replies
351 ****************************************************************************/
352
353 case MPI2_IOCSTATUS_INVALID_FUNCTION:
354 desc = "invalid function";
355 break;
356 case MPI2_IOCSTATUS_BUSY:
357 desc = "busy";
358 break;
359 case MPI2_IOCSTATUS_INVALID_SGL:
360 desc = "invalid sgl";
361 break;
362 case MPI2_IOCSTATUS_INTERNAL_ERROR:
363 desc = "internal error";
364 break;
365 case MPI2_IOCSTATUS_INVALID_VPID:
366 desc = "invalid vpid";
367 break;
368 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
369 desc = "insufficient resources";
370 break;
371 case MPI2_IOCSTATUS_INVALID_FIELD:
372 desc = "invalid field";
373 break;
374 case MPI2_IOCSTATUS_INVALID_STATE:
375 desc = "invalid state";
376 break;
377 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
378 desc = "op state not supported";
379 break;
380
381 /****************************************************************************
382 * Config IOCStatus values
383 ****************************************************************************/
384
385 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
386 desc = "config invalid action";
387 break;
388 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
389 desc = "config invalid type";
390 break;
391 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
392 desc = "config invalid page";
393 break;
394 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
395 desc = "config invalid data";
396 break;
397 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
398 desc = "config no defaults";
399 break;
400 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
401 desc = "config cant commit";
402 break;
403
404 /****************************************************************************
405 * SCSI IO Reply
406 ****************************************************************************/
407
408 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
409 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
410 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
411 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
412 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
413 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
414 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
415 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
416 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
417 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
418 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
419 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
420 break;
421
422 /****************************************************************************
423 * For use by SCSI Initiator and SCSI Target end-to-end data protection
424 ****************************************************************************/
425
426 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
427 desc = "eedp guard error";
428 break;
429 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
430 desc = "eedp ref tag error";
431 break;
432 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
433 desc = "eedp app tag error";
434 break;
435
436 /****************************************************************************
437 * SCSI Target values
438 ****************************************************************************/
439
440 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
441 desc = "target invalid io index";
442 break;
443 case MPI2_IOCSTATUS_TARGET_ABORTED:
444 desc = "target aborted";
445 break;
446 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
447 desc = "target no conn retryable";
448 break;
449 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
450 desc = "target no connection";
451 break;
452 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
453 desc = "target xfer count mismatch";
454 break;
455 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
456 desc = "target data offset error";
457 break;
458 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
459 desc = "target too much write data";
460 break;
461 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
462 desc = "target iu too short";
463 break;
464 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
465 desc = "target ack nak timeout";
466 break;
467 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
468 desc = "target nak received";
469 break;
470
471 /****************************************************************************
472 * Serial Attached SCSI values
473 ****************************************************************************/
474
475 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
476 desc = "smp request failed";
477 break;
478 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
479 desc = "smp data overrun";
480 break;
481
482 /****************************************************************************
483 * Diagnostic Buffer Post / Diagnostic Release values
484 ****************************************************************************/
485
486 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
487 desc = "diagnostic released";
488 break;
489 default:
490 break;
491 }
492
493 if (!desc)
494 return;
495
496 switch (request_hdr->Function) {
497 case MPI2_FUNCTION_CONFIG:
498 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
499 func_str = "config_page";
500 break;
501 case MPI2_FUNCTION_SCSI_TASK_MGMT:
502 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
503 func_str = "task_mgmt";
504 break;
505 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
506 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
507 func_str = "sas_iounit_ctl";
508 break;
509 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
510 frame_sz = sizeof(Mpi2SepRequest_t);
511 func_str = "enclosure";
512 break;
513 case MPI2_FUNCTION_IOC_INIT:
514 frame_sz = sizeof(Mpi2IOCInitRequest_t);
515 func_str = "ioc_init";
516 break;
517 case MPI2_FUNCTION_PORT_ENABLE:
518 frame_sz = sizeof(Mpi2PortEnableRequest_t);
519 func_str = "port_enable";
520 break;
521 case MPI2_FUNCTION_SMP_PASSTHROUGH:
522 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
523 func_str = "smp_passthru";
524 break;
525 default:
526 frame_sz = 32;
527 func_str = "unknown";
528 break;
529 }
530
531 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
532 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
533
534 _debug_dump_mf(request_hdr, frame_sz/4);
535 }
536
537 /**
538 * _base_display_event_data - verbose translation of firmware asyn events
539 * @ioc: per adapter object
540 * @mpi_reply: reply mf payload returned from firmware
541 *
542 * Return nothing.
543 */
544 static void
545 _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
546 Mpi2EventNotificationReply_t *mpi_reply)
547 {
548 char *desc = NULL;
549 u16 event;
550
551 if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
552 return;
553
554 event = le16_to_cpu(mpi_reply->Event);
555
556 switch (event) {
557 case MPI2_EVENT_LOG_DATA:
558 desc = "Log Data";
559 break;
560 case MPI2_EVENT_STATE_CHANGE:
561 desc = "Status Change";
562 break;
563 case MPI2_EVENT_HARD_RESET_RECEIVED:
564 desc = "Hard Reset Received";
565 break;
566 case MPI2_EVENT_EVENT_CHANGE:
567 desc = "Event Change";
568 break;
569 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
570 desc = "Device Status Change";
571 break;
572 case MPI2_EVENT_IR_OPERATION_STATUS:
573 if (!ioc->hide_ir_msg)
574 desc = "IR Operation Status";
575 break;
576 case MPI2_EVENT_SAS_DISCOVERY:
577 {
578 Mpi2EventDataSasDiscovery_t *event_data =
579 (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
580 printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
581 (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
582 "start" : "stop");
583 if (event_data->DiscoveryStatus)
584 printk("discovery_status(0x%08x)",
585 le32_to_cpu(event_data->DiscoveryStatus));
586 printk("\n");
587 return;
588 }
589 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
590 desc = "SAS Broadcast Primitive";
591 break;
592 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
593 desc = "SAS Init Device Status Change";
594 break;
595 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
596 desc = "SAS Init Table Overflow";
597 break;
598 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
599 desc = "SAS Topology Change List";
600 break;
601 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
602 desc = "SAS Enclosure Device Status Change";
603 break;
604 case MPI2_EVENT_IR_VOLUME:
605 if (!ioc->hide_ir_msg)
606 desc = "IR Volume";
607 break;
608 case MPI2_EVENT_IR_PHYSICAL_DISK:
609 if (!ioc->hide_ir_msg)
610 desc = "IR Physical Disk";
611 break;
612 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
613 if (!ioc->hide_ir_msg)
614 desc = "IR Configuration Change List";
615 break;
616 case MPI2_EVENT_LOG_ENTRY_ADDED:
617 if (!ioc->hide_ir_msg)
618 desc = "Log Entry Added";
619 break;
620 }
621
622 if (!desc)
623 return;
624
625 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
626 }
627 #endif
628
629 /**
630 * _base_sas_log_info - verbose translation of firmware log info
631 * @ioc: per adapter object
632 * @log_info: log info
633 *
634 * Return nothing.
635 */
636 static void
637 _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
638 {
639 union loginfo_type {
640 u32 loginfo;
641 struct {
642 u32 subcode:16;
643 u32 code:8;
644 u32 originator:4;
645 u32 bus_type:4;
646 } dw;
647 };
648 union loginfo_type sas_loginfo;
649 char *originator_str = NULL;
650
651 sas_loginfo.loginfo = log_info;
652 if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
653 return;
654
655 /* each nexus loss loginfo */
656 if (log_info == 0x31170000)
657 return;
658
659 /* eat the loginfos associated with task aborts */
660 if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info ==
661 0x31140000 || log_info == 0x31130000))
662 return;
663
664 switch (sas_loginfo.dw.originator) {
665 case 0:
666 originator_str = "IOP";
667 break;
668 case 1:
669 originator_str = "PL";
670 break;
671 case 2:
672 if (!ioc->hide_ir_msg)
673 originator_str = "IR";
674 else
675 originator_str = "WarpDrive";
676 break;
677 }
678
679 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
680 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
681 originator_str, sas_loginfo.dw.code,
682 sas_loginfo.dw.subcode);
683 }
684
685 /**
686 * _base_display_reply_info -
687 * @ioc: per adapter object
688 * @smid: system request message index
689 * @msix_index: MSIX table index supplied by the OS
690 * @reply: reply message frame(lower 32bit addr)
691 *
692 * Return nothing.
693 */
694 static void
695 _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
696 u32 reply)
697 {
698 MPI2DefaultReply_t *mpi_reply;
699 u16 ioc_status;
700
701 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
702 if (unlikely(!mpi_reply)) {
703 printk(MPT2SAS_ERR_FMT "mpi_reply not valid at %s:%d/%s()!\n",
704 ioc->name, __FILE__, __LINE__, __func__);
705 return;
706 }
707 ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
708 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
709 if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
710 (ioc->logging_level & MPT_DEBUG_REPLY)) {
711 _base_sas_ioc_info(ioc , mpi_reply,
712 mpt2sas_base_get_msg_frame(ioc, smid));
713 }
714 #endif
715 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
716 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
717 }
718
719 /**
720 * mpt2sas_base_done - base internal command completion routine
721 * @ioc: per adapter object
722 * @smid: system request message index
723 * @msix_index: MSIX table index supplied by the OS
724 * @reply: reply message frame(lower 32bit addr)
725 *
726 * Return 1 meaning mf should be freed from _base_interrupt
727 * 0 means the mf is freed from this function.
728 */
729 u8
730 mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
731 u32 reply)
732 {
733 MPI2DefaultReply_t *mpi_reply;
734
735 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
736 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
737 return 1;
738
739 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
740 return 1;
741
742 ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
743 if (mpi_reply) {
744 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
745 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
746 }
747 ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
748
749 complete(&ioc->base_cmds.done);
750 return 1;
751 }
752
753 /**
754 * _base_async_event - main callback handler for firmware asyn events
755 * @ioc: per adapter object
756 * @msix_index: MSIX table index supplied by the OS
757 * @reply: reply message frame(lower 32bit addr)
758 *
759 * Return 1 meaning mf should be freed from _base_interrupt
760 * 0 means the mf is freed from this function.
761 */
762 static u8
763 _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
764 {
765 Mpi2EventNotificationReply_t *mpi_reply;
766 Mpi2EventAckRequest_t *ack_request;
767 u16 smid;
768
769 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
770 if (!mpi_reply)
771 return 1;
772 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
773 return 1;
774 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
775 _base_display_event_data(ioc, mpi_reply);
776 #endif
777 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
778 goto out;
779 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
780 if (!smid) {
781 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
782 ioc->name, __func__);
783 goto out;
784 }
785
786 ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
787 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
788 ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
789 ack_request->Event = mpi_reply->Event;
790 ack_request->EventContext = mpi_reply->EventContext;
791 ack_request->VF_ID = 0; /* TODO */
792 ack_request->VP_ID = 0;
793 mpt2sas_base_put_smid_default(ioc, smid);
794
795 out:
796
797 /* scsih callback handler */
798 mpt2sas_scsih_event_callback(ioc, msix_index, reply);
799
800 /* ctl callback handler */
801 mpt2sas_ctl_event_callback(ioc, msix_index, reply);
802
803 return 1;
804 }
805
806 /**
807 * _base_get_cb_idx - obtain the callback index
808 * @ioc: per adapter object
809 * @smid: system request message index
810 *
811 * Return callback index.
812 */
813 static u8
814 _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
815 {
816 int i;
817 u8 cb_idx;
818
819 if (smid < ioc->hi_priority_smid) {
820 i = smid - 1;
821 cb_idx = ioc->scsi_lookup[i].cb_idx;
822 } else if (smid < ioc->internal_smid) {
823 i = smid - ioc->hi_priority_smid;
824 cb_idx = ioc->hpr_lookup[i].cb_idx;
825 } else if (smid <= ioc->hba_queue_depth) {
826 i = smid - ioc->internal_smid;
827 cb_idx = ioc->internal_lookup[i].cb_idx;
828 } else
829 cb_idx = 0xFF;
830 return cb_idx;
831 }
832
833 /**
834 * _base_mask_interrupts - disable interrupts
835 * @ioc: per adapter object
836 *
837 * Disabling ResetIRQ, Reply and Doorbell Interrupts
838 *
839 * Return nothing.
840 */
841 static void
842 _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
843 {
844 u32 him_register;
845
846 ioc->mask_interrupts = 1;
847 him_register = readl(&ioc->chip->HostInterruptMask);
848 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
849 writel(him_register, &ioc->chip->HostInterruptMask);
850 readl(&ioc->chip->HostInterruptMask);
851 }
852
853 /**
854 * _base_unmask_interrupts - enable interrupts
855 * @ioc: per adapter object
856 *
857 * Enabling only Reply Interrupts
858 *
859 * Return nothing.
860 */
861 static void
862 _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
863 {
864 u32 him_register;
865
866 him_register = readl(&ioc->chip->HostInterruptMask);
867 him_register &= ~MPI2_HIM_RIM;
868 writel(him_register, &ioc->chip->HostInterruptMask);
869 ioc->mask_interrupts = 0;
870 }
871
872 union reply_descriptor {
873 u64 word;
874 struct {
875 u32 low;
876 u32 high;
877 } u;
878 };
879
880 /**
881 * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
882 * @irq: irq number (not used)
883 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
884 * @r: pt_regs pointer (not used)
885 *
886 * Return IRQ_HANDLE if processed, else IRQ_NONE.
887 */
888 static irqreturn_t
889 _base_interrupt(int irq, void *bus_id)
890 {
891 struct adapter_reply_queue *reply_q = bus_id;
892 union reply_descriptor rd;
893 u32 completed_cmds;
894 u8 request_desript_type;
895 u16 smid;
896 u8 cb_idx;
897 u32 reply;
898 u8 msix_index = reply_q->msix_index;
899 struct MPT2SAS_ADAPTER *ioc = reply_q->ioc;
900 Mpi2ReplyDescriptorsUnion_t *rpf;
901 u8 rc;
902
903 if (ioc->mask_interrupts)
904 return IRQ_NONE;
905
906 if (!atomic_add_unless(&reply_q->busy, 1, 1))
907 return IRQ_NONE;
908
909 rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
910 request_desript_type = rpf->Default.ReplyFlags
911 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
912 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
913 atomic_dec(&reply_q->busy);
914 return IRQ_NONE;
915 }
916
917 completed_cmds = 0;
918 cb_idx = 0xFF;
919 do {
920 rd.word = le64_to_cpu(rpf->Words);
921 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
922 goto out;
923 reply = 0;
924 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
925 if (request_desript_type ==
926 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
927 reply = le32_to_cpu
928 (rpf->AddressReply.ReplyFrameAddress);
929 if (reply > ioc->reply_dma_max_address ||
930 reply < ioc->reply_dma_min_address)
931 reply = 0;
932 } else if (request_desript_type ==
933 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
934 goto next;
935 else if (request_desript_type ==
936 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
937 goto next;
938 if (smid) {
939 cb_idx = _base_get_cb_idx(ioc, smid);
940 if ((likely(cb_idx < MPT_MAX_CALLBACKS))
941 && (likely(mpt_callbacks[cb_idx] != NULL))) {
942 rc = mpt_callbacks[cb_idx](ioc, smid,
943 msix_index, reply);
944 if (reply)
945 _base_display_reply_info(ioc, smid,
946 msix_index, reply);
947 if (rc)
948 mpt2sas_base_free_smid(ioc, smid);
949 }
950 }
951 if (!smid)
952 _base_async_event(ioc, msix_index, reply);
953
954 /* reply free queue handling */
955 if (reply) {
956 ioc->reply_free_host_index =
957 (ioc->reply_free_host_index ==
958 (ioc->reply_free_queue_depth - 1)) ?
959 0 : ioc->reply_free_host_index + 1;
960 ioc->reply_free[ioc->reply_free_host_index] =
961 cpu_to_le32(reply);
962 wmb();
963 writel(ioc->reply_free_host_index,
964 &ioc->chip->ReplyFreeHostIndex);
965 }
966
967 next:
968
969 rpf->Words = cpu_to_le64(ULLONG_MAX);
970 reply_q->reply_post_host_index =
971 (reply_q->reply_post_host_index ==
972 (ioc->reply_post_queue_depth - 1)) ? 0 :
973 reply_q->reply_post_host_index + 1;
974 request_desript_type =
975 reply_q->reply_post_free[reply_q->reply_post_host_index].
976 Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
977 completed_cmds++;
978 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
979 goto out;
980 if (!reply_q->reply_post_host_index)
981 rpf = reply_q->reply_post_free;
982 else
983 rpf++;
984 } while (1);
985
986 out:
987
988 if (!completed_cmds) {
989 atomic_dec(&reply_q->busy);
990 return IRQ_NONE;
991 }
992 wmb();
993 if (ioc->is_warpdrive) {
994 writel(reply_q->reply_post_host_index,
995 ioc->reply_post_host_index[msix_index]);
996 atomic_dec(&reply_q->busy);
997 return IRQ_HANDLED;
998 }
999 writel(reply_q->reply_post_host_index | (msix_index <<
1000 MPI2_RPHI_MSIX_INDEX_SHIFT), &ioc->chip->ReplyPostHostIndex);
1001 atomic_dec(&reply_q->busy);
1002 return IRQ_HANDLED;
1003 }
1004
1005 /**
1006 * _base_is_controller_msix_enabled - is controller support muli-reply queues
1007 * @ioc: per adapter object
1008 *
1009 */
1010 static inline int
1011 _base_is_controller_msix_enabled(struct MPT2SAS_ADAPTER *ioc)
1012 {
1013 return (ioc->facts.IOCCapabilities &
1014 MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
1015 }
1016
1017 /**
1018 * mpt2sas_base_flush_reply_queues - flushing the MSIX reply queues
1019 * @ioc: per adapter object
1020 * Context: ISR conext
1021 *
1022 * Called when a Task Management request has completed. We want
1023 * to flush the other reply queues so all the outstanding IO has been
1024 * completed back to OS before we process the TM completetion.
1025 *
1026 * Return nothing.
1027 */
1028 void
1029 mpt2sas_base_flush_reply_queues(struct MPT2SAS_ADAPTER *ioc)
1030 {
1031 struct adapter_reply_queue *reply_q;
1032
1033 /* If MSIX capability is turned off
1034 * then multi-queues are not enabled
1035 */
1036 if (!_base_is_controller_msix_enabled(ioc))
1037 return;
1038
1039 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
1040 if (ioc->shost_recovery)
1041 return;
1042 /* TMs are on msix_index == 0 */
1043 if (reply_q->msix_index == 0)
1044 continue;
1045 _base_interrupt(reply_q->vector, (void *)reply_q);
1046 }
1047 }
1048
1049 /**
1050 * mpt2sas_base_release_callback_handler - clear interrupt callback handler
1051 * @cb_idx: callback index
1052 *
1053 * Return nothing.
1054 */
1055 void
1056 mpt2sas_base_release_callback_handler(u8 cb_idx)
1057 {
1058 mpt_callbacks[cb_idx] = NULL;
1059 }
1060
1061 /**
1062 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
1063 * @cb_func: callback function
1064 *
1065 * Returns cb_func.
1066 */
1067 u8
1068 mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
1069 {
1070 u8 cb_idx;
1071
1072 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
1073 if (mpt_callbacks[cb_idx] == NULL)
1074 break;
1075
1076 mpt_callbacks[cb_idx] = cb_func;
1077 return cb_idx;
1078 }
1079
1080 /**
1081 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
1082 *
1083 * Return nothing.
1084 */
1085 void
1086 mpt2sas_base_initialize_callback_handler(void)
1087 {
1088 u8 cb_idx;
1089
1090 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
1091 mpt2sas_base_release_callback_handler(cb_idx);
1092 }
1093
1094 /**
1095 * mpt2sas_base_build_zero_len_sge - build zero length sg entry
1096 * @ioc: per adapter object
1097 * @paddr: virtual address for SGE
1098 *
1099 * Create a zero length scatter gather entry to insure the IOCs hardware has
1100 * something to use if the target device goes brain dead and tries
1101 * to send data even when none is asked for.
1102 *
1103 * Return nothing.
1104 */
1105 void
1106 mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
1107 {
1108 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
1109 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
1110 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
1111 MPI2_SGE_FLAGS_SHIFT);
1112 ioc->base_add_sg_single(paddr, flags_length, -1);
1113 }
1114
1115 /**
1116 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
1117 * @paddr: virtual address for SGE
1118 * @flags_length: SGE flags and data transfer length
1119 * @dma_addr: Physical address
1120 *
1121 * Return nothing.
1122 */
1123 static void
1124 _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1125 {
1126 Mpi2SGESimple32_t *sgel = paddr;
1127
1128 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
1129 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1130 sgel->FlagsLength = cpu_to_le32(flags_length);
1131 sgel->Address = cpu_to_le32(dma_addr);
1132 }
1133
1134
1135 /**
1136 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
1137 * @paddr: virtual address for SGE
1138 * @flags_length: SGE flags and data transfer length
1139 * @dma_addr: Physical address
1140 *
1141 * Return nothing.
1142 */
1143 static void
1144 _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1145 {
1146 Mpi2SGESimple64_t *sgel = paddr;
1147
1148 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
1149 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1150 sgel->FlagsLength = cpu_to_le32(flags_length);
1151 sgel->Address = cpu_to_le64(dma_addr);
1152 }
1153
1154 #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
1155
1156 /**
1157 * _base_config_dma_addressing - set dma addressing
1158 * @ioc: per adapter object
1159 * @pdev: PCI device struct
1160 *
1161 * Returns 0 for success, non-zero for failure.
1162 */
1163 static int
1164 _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
1165 {
1166 struct sysinfo s;
1167 char *desc = NULL;
1168
1169 if (sizeof(dma_addr_t) > 4) {
1170 const uint64_t required_mask =
1171 dma_get_required_mask(&pdev->dev);
1172 if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
1173 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
1174 DMA_BIT_MASK(64))) {
1175 ioc->base_add_sg_single = &_base_add_sg_single_64;
1176 ioc->sge_size = sizeof(Mpi2SGESimple64_t);
1177 desc = "64";
1178 goto out;
1179 }
1180 }
1181
1182 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1183 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1184 ioc->base_add_sg_single = &_base_add_sg_single_32;
1185 ioc->sge_size = sizeof(Mpi2SGESimple32_t);
1186 desc = "32";
1187 } else
1188 return -ENODEV;
1189
1190 out:
1191 si_meminfo(&s);
1192 printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
1193 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
1194
1195 return 0;
1196 }
1197
1198 /**
1199 * _base_check_enable_msix - checks MSIX capabable.
1200 * @ioc: per adapter object
1201 *
1202 * Check to see if card is capable of MSIX, and set number
1203 * of available msix vectors
1204 */
1205 static int
1206 _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1207 {
1208 int base;
1209 u16 message_control;
1210
1211
1212 /* Check whether controller SAS2008 B0 controller,
1213 if it is SAS2008 B0 controller use IO-APIC instead of MSIX */
1214 if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 &&
1215 ioc->pdev->revision == 0x01) {
1216 return -EINVAL;
1217 }
1218
1219 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
1220 if (!base) {
1221 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
1222 "supported\n", ioc->name));
1223 return -EINVAL;
1224 }
1225
1226 /* get msix vector count */
1227 /* NUMA_IO not supported for older controllers */
1228 if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
1229 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
1230 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
1231 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
1232 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
1233 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
1234 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
1235 ioc->msix_vector_count = 1;
1236 else {
1237 pci_read_config_word(ioc->pdev, base + 2, &message_control);
1238 ioc->msix_vector_count = (message_control & 0x3FF) + 1;
1239 }
1240 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
1241 "vector_count(%d)\n", ioc->name, ioc->msix_vector_count));
1242
1243 return 0;
1244 }
1245
1246 /**
1247 * _base_free_irq - free irq
1248 * @ioc: per adapter object
1249 *
1250 * Freeing respective reply_queue from the list.
1251 */
1252 static void
1253 _base_free_irq(struct MPT2SAS_ADAPTER *ioc)
1254 {
1255 struct adapter_reply_queue *reply_q, *next;
1256
1257 if (list_empty(&ioc->reply_queue_list))
1258 return;
1259
1260 list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
1261 list_del(&reply_q->list);
1262 synchronize_irq(reply_q->vector);
1263 free_irq(reply_q->vector, reply_q);
1264 kfree(reply_q);
1265 }
1266 }
1267
1268 /**
1269 * _base_request_irq - request irq
1270 * @ioc: per adapter object
1271 * @index: msix index into vector table
1272 * @vector: irq vector
1273 *
1274 * Inserting respective reply_queue into the list.
1275 */
1276 static int
1277 _base_request_irq(struct MPT2SAS_ADAPTER *ioc, u8 index, u32 vector)
1278 {
1279 struct adapter_reply_queue *reply_q;
1280 int r;
1281
1282 reply_q = kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
1283 if (!reply_q) {
1284 printk(MPT2SAS_ERR_FMT "unable to allocate memory %d!\n",
1285 ioc->name, (int)sizeof(struct adapter_reply_queue));
1286 return -ENOMEM;
1287 }
1288 reply_q->ioc = ioc;
1289 reply_q->msix_index = index;
1290 reply_q->vector = vector;
1291 atomic_set(&reply_q->busy, 0);
1292 if (ioc->msix_enable)
1293 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
1294 MPT2SAS_DRIVER_NAME, ioc->id, index);
1295 else
1296 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
1297 MPT2SAS_DRIVER_NAME, ioc->id);
1298 r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
1299 reply_q);
1300 if (r) {
1301 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
1302 reply_q->name, vector);
1303 kfree(reply_q);
1304 return -EBUSY;
1305 }
1306
1307 INIT_LIST_HEAD(&reply_q->list);
1308 list_add_tail(&reply_q->list, &ioc->reply_queue_list);
1309 return 0;
1310 }
1311
1312 /**
1313 * _base_assign_reply_queues - assigning msix index for each cpu
1314 * @ioc: per adapter object
1315 *
1316 * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
1317 *
1318 * It would nice if we could call irq_set_affinity, however it is not
1319 * an exported symbol
1320 */
1321 static void
1322 _base_assign_reply_queues(struct MPT2SAS_ADAPTER *ioc)
1323 {
1324 struct adapter_reply_queue *reply_q;
1325 int cpu_id;
1326 int cpu_grouping, loop, grouping, grouping_mod;
1327
1328 if (!_base_is_controller_msix_enabled(ioc))
1329 return;
1330
1331 memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
1332 /* when there are more cpus than available msix vectors,
1333 * then group cpus togeather on same irq
1334 */
1335 if (ioc->cpu_count > ioc->msix_vector_count) {
1336 grouping = ioc->cpu_count / ioc->msix_vector_count;
1337 grouping_mod = ioc->cpu_count % ioc->msix_vector_count;
1338 if (grouping < 2 || (grouping == 2 && !grouping_mod))
1339 cpu_grouping = 2;
1340 else if (grouping < 4 || (grouping == 4 && !grouping_mod))
1341 cpu_grouping = 4;
1342 else if (grouping < 8 || (grouping == 8 && !grouping_mod))
1343 cpu_grouping = 8;
1344 else
1345 cpu_grouping = 16;
1346 } else
1347 cpu_grouping = 0;
1348
1349 loop = 0;
1350 reply_q = list_entry(ioc->reply_queue_list.next,
1351 struct adapter_reply_queue, list);
1352 for_each_online_cpu(cpu_id) {
1353 if (!cpu_grouping) {
1354 ioc->cpu_msix_table[cpu_id] = reply_q->msix_index;
1355 reply_q = list_entry(reply_q->list.next,
1356 struct adapter_reply_queue, list);
1357 } else {
1358 if (loop < cpu_grouping) {
1359 ioc->cpu_msix_table[cpu_id] =
1360 reply_q->msix_index;
1361 loop++;
1362 } else {
1363 reply_q = list_entry(reply_q->list.next,
1364 struct adapter_reply_queue, list);
1365 ioc->cpu_msix_table[cpu_id] =
1366 reply_q->msix_index;
1367 loop = 1;
1368 }
1369 }
1370 }
1371 }
1372
1373 /**
1374 * _base_disable_msix - disables msix
1375 * @ioc: per adapter object
1376 *
1377 */
1378 static void
1379 _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
1380 {
1381 if (ioc->msix_enable) {
1382 pci_disable_msix(ioc->pdev);
1383 ioc->msix_enable = 0;
1384 }
1385 }
1386
1387 /**
1388 * _base_enable_msix - enables msix, failback to io_apic
1389 * @ioc: per adapter object
1390 *
1391 */
1392 static int
1393 _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1394 {
1395 struct msix_entry *entries, *a;
1396 int r;
1397 int i;
1398 u8 try_msix = 0;
1399
1400 INIT_LIST_HEAD(&ioc->reply_queue_list);
1401
1402 if (msix_disable == -1 || msix_disable == 0)
1403 try_msix = 1;
1404
1405 if (!try_msix)
1406 goto try_ioapic;
1407
1408 if (_base_check_enable_msix(ioc) != 0)
1409 goto try_ioapic;
1410
1411 ioc->reply_queue_count = min_t(int, ioc->cpu_count,
1412 ioc->msix_vector_count);
1413
1414 entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
1415 GFP_KERNEL);
1416 if (!entries) {
1417 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "kcalloc "
1418 "failed @ at %s:%d/%s() !!!\n", ioc->name, __FILE__,
1419 __LINE__, __func__));
1420 goto try_ioapic;
1421 }
1422
1423 for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
1424 a->entry = i;
1425
1426 r = pci_enable_msix(ioc->pdev, entries, ioc->reply_queue_count);
1427 if (r) {
1428 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
1429 "failed (r=%d) !!!\n", ioc->name, r));
1430 kfree(entries);
1431 goto try_ioapic;
1432 }
1433
1434 ioc->msix_enable = 1;
1435 for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
1436 r = _base_request_irq(ioc, i, a->vector);
1437 if (r) {
1438 _base_free_irq(ioc);
1439 _base_disable_msix(ioc);
1440 kfree(entries);
1441 goto try_ioapic;
1442 }
1443 }
1444
1445 kfree(entries);
1446 return 0;
1447
1448 /* failback to io_apic interrupt routing */
1449 try_ioapic:
1450
1451 r = _base_request_irq(ioc, 0, ioc->pdev->irq);
1452
1453 return r;
1454 }
1455
1456 /**
1457 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
1458 * @ioc: per adapter object
1459 *
1460 * Returns 0 for success, non-zero for failure.
1461 */
1462 int
1463 mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
1464 {
1465 struct pci_dev *pdev = ioc->pdev;
1466 u32 memap_sz;
1467 u32 pio_sz;
1468 int i, r = 0;
1469 u64 pio_chip = 0;
1470 u64 chip_phys = 0;
1471 struct adapter_reply_queue *reply_q;
1472
1473 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
1474 ioc->name, __func__));
1475
1476 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1477 if (pci_enable_device_mem(pdev)) {
1478 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
1479 "failed\n", ioc->name);
1480 return -ENODEV;
1481 }
1482
1483
1484 if (pci_request_selected_regions(pdev, ioc->bars,
1485 MPT2SAS_DRIVER_NAME)) {
1486 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
1487 "failed\n", ioc->name);
1488 r = -ENODEV;
1489 goto out_fail;
1490 }
1491
1492 /* AER (Advanced Error Reporting) hooks */
1493 pci_enable_pcie_error_reporting(pdev);
1494
1495 pci_set_master(pdev);
1496
1497 if (_base_config_dma_addressing(ioc, pdev) != 0) {
1498 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
1499 ioc->name, pci_name(pdev));
1500 r = -ENODEV;
1501 goto out_fail;
1502 }
1503
1504 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
1505 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1506 if (pio_sz)
1507 continue;
1508 pio_chip = (u64)pci_resource_start(pdev, i);
1509 pio_sz = pci_resource_len(pdev, i);
1510 } else {
1511 if (memap_sz)
1512 continue;
1513 /* verify memory resource is valid before using */
1514 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
1515 ioc->chip_phys = pci_resource_start(pdev, i);
1516 chip_phys = (u64)ioc->chip_phys;
1517 memap_sz = pci_resource_len(pdev, i);
1518 ioc->chip = ioremap(ioc->chip_phys, memap_sz);
1519 if (ioc->chip == NULL) {
1520 printk(MPT2SAS_ERR_FMT "unable to map "
1521 "adapter memory!\n", ioc->name);
1522 r = -EINVAL;
1523 goto out_fail;
1524 }
1525 }
1526 }
1527 }
1528
1529 _base_mask_interrupts(ioc);
1530 r = _base_enable_msix(ioc);
1531 if (r)
1532 goto out_fail;
1533
1534 list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
1535 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
1536 reply_q->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
1537 "IO-APIC enabled"), reply_q->vector);
1538
1539 printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
1540 ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
1541 printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
1542 ioc->name, (unsigned long long)pio_chip, pio_sz);
1543
1544 /* Save PCI configuration state for recovery from PCI AER/EEH errors */
1545 pci_save_state(pdev);
1546
1547 return 0;
1548
1549 out_fail:
1550 if (ioc->chip_phys)
1551 iounmap(ioc->chip);
1552 ioc->chip_phys = 0;
1553 pci_release_selected_regions(ioc->pdev, ioc->bars);
1554 pci_disable_pcie_error_reporting(pdev);
1555 pci_disable_device(pdev);
1556 return r;
1557 }
1558
1559 /**
1560 * mpt2sas_base_get_msg_frame - obtain request mf pointer
1561 * @ioc: per adapter object
1562 * @smid: system request message index(smid zero is invalid)
1563 *
1564 * Returns virt pointer to message frame.
1565 */
1566 void *
1567 mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1568 {
1569 return (void *)(ioc->request + (smid * ioc->request_sz));
1570 }
1571
1572 /**
1573 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
1574 * @ioc: per adapter object
1575 * @smid: system request message index
1576 *
1577 * Returns virt pointer to sense buffer.
1578 */
1579 void *
1580 mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1581 {
1582 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1583 }
1584
1585 /**
1586 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
1587 * @ioc: per adapter object
1588 * @smid: system request message index
1589 *
1590 * Returns phys pointer to the low 32bit address of the sense buffer.
1591 */
1592 __le32
1593 mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1594 {
1595 return cpu_to_le32(ioc->sense_dma +
1596 ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1597 }
1598
1599 /**
1600 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
1601 * @ioc: per adapter object
1602 * @phys_addr: lower 32 physical addr of the reply
1603 *
1604 * Converts 32bit lower physical addr into a virt address.
1605 */
1606 void *
1607 mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
1608 {
1609 if (!phys_addr)
1610 return NULL;
1611 return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
1612 }
1613
1614 /**
1615 * mpt2sas_base_get_smid - obtain a free smid from internal queue
1616 * @ioc: per adapter object
1617 * @cb_idx: callback index
1618 *
1619 * Returns smid (zero is invalid)
1620 */
1621 u16
1622 mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1623 {
1624 unsigned long flags;
1625 struct request_tracker *request;
1626 u16 smid;
1627
1628 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1629 if (list_empty(&ioc->internal_free_list)) {
1630 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1631 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1632 ioc->name, __func__);
1633 return 0;
1634 }
1635
1636 request = list_entry(ioc->internal_free_list.next,
1637 struct request_tracker, tracker_list);
1638 request->cb_idx = cb_idx;
1639 smid = request->smid;
1640 list_del(&request->tracker_list);
1641 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1642 return smid;
1643 }
1644
1645 /**
1646 * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
1647 * @ioc: per adapter object
1648 * @cb_idx: callback index
1649 * @scmd: pointer to scsi command object
1650 *
1651 * Returns smid (zero is invalid)
1652 */
1653 u16
1654 mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
1655 struct scsi_cmnd *scmd)
1656 {
1657 unsigned long flags;
1658 struct scsiio_tracker *request;
1659 u16 smid;
1660
1661 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1662 if (list_empty(&ioc->free_list)) {
1663 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1664 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1665 ioc->name, __func__);
1666 return 0;
1667 }
1668
1669 request = list_entry(ioc->free_list.next,
1670 struct scsiio_tracker, tracker_list);
1671 request->scmd = scmd;
1672 request->cb_idx = cb_idx;
1673 smid = request->smid;
1674 list_del(&request->tracker_list);
1675 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1676 return smid;
1677 }
1678
1679 /**
1680 * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
1681 * @ioc: per adapter object
1682 * @cb_idx: callback index
1683 *
1684 * Returns smid (zero is invalid)
1685 */
1686 u16
1687 mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1688 {
1689 unsigned long flags;
1690 struct request_tracker *request;
1691 u16 smid;
1692
1693 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1694 if (list_empty(&ioc->hpr_free_list)) {
1695 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1696 return 0;
1697 }
1698
1699 request = list_entry(ioc->hpr_free_list.next,
1700 struct request_tracker, tracker_list);
1701 request->cb_idx = cb_idx;
1702 smid = request->smid;
1703 list_del(&request->tracker_list);
1704 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1705 return smid;
1706 }
1707
1708
1709 /**
1710 * mpt2sas_base_free_smid - put smid back on free_list
1711 * @ioc: per adapter object
1712 * @smid: system request message index
1713 *
1714 * Return nothing.
1715 */
1716 void
1717 mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1718 {
1719 unsigned long flags;
1720 int i;
1721 struct chain_tracker *chain_req, *next;
1722
1723 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1724 if (smid < ioc->hi_priority_smid) {
1725 /* scsiio queue */
1726 i = smid - 1;
1727 if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
1728 list_for_each_entry_safe(chain_req, next,
1729 &ioc->scsi_lookup[i].chain_list, tracker_list) {
1730 list_del_init(&chain_req->tracker_list);
1731 list_add_tail(&chain_req->tracker_list,
1732 &ioc->free_chain_list);
1733 }
1734 }
1735 ioc->scsi_lookup[i].cb_idx = 0xFF;
1736 ioc->scsi_lookup[i].scmd = NULL;
1737 ioc->scsi_lookup[i].direct_io = 0;
1738 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
1739 &ioc->free_list);
1740 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1741
1742 /*
1743 * See _wait_for_commands_to_complete() call with regards
1744 * to this code.
1745 */
1746 if (ioc->shost_recovery && ioc->pending_io_count) {
1747 if (ioc->pending_io_count == 1)
1748 wake_up(&ioc->reset_wq);
1749 ioc->pending_io_count--;
1750 }
1751 return;
1752 } else if (smid < ioc->internal_smid) {
1753 /* hi-priority */
1754 i = smid - ioc->hi_priority_smid;
1755 ioc->hpr_lookup[i].cb_idx = 0xFF;
1756 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
1757 &ioc->hpr_free_list);
1758 } else if (smid <= ioc->hba_queue_depth) {
1759 /* internal queue */
1760 i = smid - ioc->internal_smid;
1761 ioc->internal_lookup[i].cb_idx = 0xFF;
1762 list_add_tail(&ioc->internal_lookup[i].tracker_list,
1763 &ioc->internal_free_list);
1764 }
1765 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1766 }
1767
1768 /**
1769 * _base_writeq - 64 bit write to MMIO
1770 * @ioc: per adapter object
1771 * @b: data payload
1772 * @addr: address in MMIO space
1773 * @writeq_lock: spin lock
1774 *
1775 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
1776 * care of 32 bit environment where its not quarenteed to send the entire word
1777 * in one transfer.
1778 */
1779 #ifndef writeq
1780 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1781 spinlock_t *writeq_lock)
1782 {
1783 unsigned long flags;
1784 __u64 data_out = cpu_to_le64(b);
1785
1786 spin_lock_irqsave(writeq_lock, flags);
1787 writel((u32)(data_out), addr);
1788 writel((u32)(data_out >> 32), (addr + 4));
1789 spin_unlock_irqrestore(writeq_lock, flags);
1790 }
1791 #else
1792 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1793 spinlock_t *writeq_lock)
1794 {
1795 writeq(cpu_to_le64(b), addr);
1796 }
1797 #endif
1798
1799 static inline u8
1800 _base_get_msix_index(struct MPT2SAS_ADAPTER *ioc)
1801 {
1802 return ioc->cpu_msix_table[raw_smp_processor_id()];
1803 }
1804
1805 /**
1806 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
1807 * @ioc: per adapter object
1808 * @smid: system request message index
1809 * @handle: device handle
1810 *
1811 * Return nothing.
1812 */
1813 void
1814 mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
1815 {
1816 Mpi2RequestDescriptorUnion_t descriptor;
1817 u64 *request = (u64 *)&descriptor;
1818
1819
1820 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
1821 descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
1822 descriptor.SCSIIO.SMID = cpu_to_le16(smid);
1823 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
1824 descriptor.SCSIIO.LMID = 0;
1825 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1826 &ioc->scsi_lookup_lock);
1827 }
1828
1829
1830 /**
1831 * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware
1832 * @ioc: per adapter object
1833 * @smid: system request message index
1834 *
1835 * Return nothing.
1836 */
1837 void
1838 mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1839 {
1840 Mpi2RequestDescriptorUnion_t descriptor;
1841 u64 *request = (u64 *)&descriptor;
1842
1843 descriptor.HighPriority.RequestFlags =
1844 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
1845 descriptor.HighPriority.MSIxIndex = 0;
1846 descriptor.HighPriority.SMID = cpu_to_le16(smid);
1847 descriptor.HighPriority.LMID = 0;
1848 descriptor.HighPriority.Reserved1 = 0;
1849 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1850 &ioc->scsi_lookup_lock);
1851 }
1852
1853 /**
1854 * mpt2sas_base_put_smid_default - Default, primarily used for config pages
1855 * @ioc: per adapter object
1856 * @smid: system request message index
1857 *
1858 * Return nothing.
1859 */
1860 void
1861 mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1862 {
1863 Mpi2RequestDescriptorUnion_t descriptor;
1864 u64 *request = (u64 *)&descriptor;
1865
1866 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
1867 descriptor.Default.MSIxIndex = _base_get_msix_index(ioc);
1868 descriptor.Default.SMID = cpu_to_le16(smid);
1869 descriptor.Default.LMID = 0;
1870 descriptor.Default.DescriptorTypeDependent = 0;
1871 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1872 &ioc->scsi_lookup_lock);
1873 }
1874
1875 /**
1876 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
1877 * @ioc: per adapter object
1878 * @smid: system request message index
1879 * @io_index: value used to track the IO
1880 *
1881 * Return nothing.
1882 */
1883 void
1884 mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
1885 u16 io_index)
1886 {
1887 Mpi2RequestDescriptorUnion_t descriptor;
1888 u64 *request = (u64 *)&descriptor;
1889
1890 descriptor.SCSITarget.RequestFlags =
1891 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
1892 descriptor.SCSITarget.MSIxIndex = _base_get_msix_index(ioc);
1893 descriptor.SCSITarget.SMID = cpu_to_le16(smid);
1894 descriptor.SCSITarget.LMID = 0;
1895 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
1896 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1897 &ioc->scsi_lookup_lock);
1898 }
1899
1900 /**
1901 * _base_display_dell_branding - Disply branding string
1902 * @ioc: per adapter object
1903 *
1904 * Return nothing.
1905 */
1906 static void
1907 _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
1908 {
1909 char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
1910
1911 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
1912 return;
1913
1914 memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
1915 switch (ioc->pdev->subsystem_device) {
1916 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
1917 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
1918 MPT2SAS_DELL_BRANDING_SIZE - 1);
1919 break;
1920 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
1921 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
1922 MPT2SAS_DELL_BRANDING_SIZE - 1);
1923 break;
1924 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
1925 strncpy(dell_branding,
1926 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
1927 MPT2SAS_DELL_BRANDING_SIZE - 1);
1928 break;
1929 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
1930 strncpy(dell_branding,
1931 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
1932 MPT2SAS_DELL_BRANDING_SIZE - 1);
1933 break;
1934 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
1935 strncpy(dell_branding,
1936 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
1937 MPT2SAS_DELL_BRANDING_SIZE - 1);
1938 break;
1939 case MPT2SAS_DELL_PERC_H200_SSDID:
1940 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
1941 MPT2SAS_DELL_BRANDING_SIZE - 1);
1942 break;
1943 case MPT2SAS_DELL_6GBPS_SAS_SSDID:
1944 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
1945 MPT2SAS_DELL_BRANDING_SIZE - 1);
1946 break;
1947 default:
1948 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
1949 break;
1950 }
1951
1952 printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
1953 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
1954 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
1955 ioc->pdev->subsystem_device);
1956 }
1957
1958 /**
1959 * _base_display_intel_branding - Display branding string
1960 * @ioc: per adapter object
1961 *
1962 * Return nothing.
1963 */
1964 static void
1965 _base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
1966 {
1967 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
1968 return;
1969
1970 switch (ioc->pdev->device) {
1971 case MPI2_MFGPAGE_DEVID_SAS2008:
1972 switch (ioc->pdev->subsystem_device) {
1973 case MPT2SAS_INTEL_RMS2LL080_SSDID:
1974 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1975 MPT2SAS_INTEL_RMS2LL080_BRANDING);
1976 break;
1977 case MPT2SAS_INTEL_RMS2LL040_SSDID:
1978 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1979 MPT2SAS_INTEL_RMS2LL040_BRANDING);
1980 break;
1981 case MPT2SAS_INTEL_SSD910_SSDID:
1982 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1983 MPT2SAS_INTEL_SSD910_BRANDING);
1984 break;
1985 default:
1986 break;
1987 }
1988 case MPI2_MFGPAGE_DEVID_SAS2308_2:
1989 switch (ioc->pdev->subsystem_device) {
1990 case MPT2SAS_INTEL_RS25GB008_SSDID:
1991 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1992 MPT2SAS_INTEL_RS25GB008_BRANDING);
1993 break;
1994 case MPT2SAS_INTEL_RMS25JB080_SSDID:
1995 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1996 MPT2SAS_INTEL_RMS25JB080_BRANDING);
1997 break;
1998 case MPT2SAS_INTEL_RMS25JB040_SSDID:
1999 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2000 MPT2SAS_INTEL_RMS25JB040_BRANDING);
2001 break;
2002 case MPT2SAS_INTEL_RMS25KB080_SSDID:
2003 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2004 MPT2SAS_INTEL_RMS25KB080_BRANDING);
2005 break;
2006 case MPT2SAS_INTEL_RMS25KB040_SSDID:
2007 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2008 MPT2SAS_INTEL_RMS25KB040_BRANDING);
2009 break;
2010 default:
2011 break;
2012 }
2013 default:
2014 break;
2015 }
2016 }
2017
2018 /**
2019 * _base_display_hp_branding - Display branding string
2020 * @ioc: per adapter object
2021 *
2022 * Return nothing.
2023 */
2024 static void
2025 _base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
2026 {
2027 if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
2028 return;
2029
2030 switch (ioc->pdev->device) {
2031 case MPI2_MFGPAGE_DEVID_SAS2004:
2032 switch (ioc->pdev->subsystem_device) {
2033 case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
2034 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2035 MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
2036 break;
2037 default:
2038 break;
2039 }
2040 case MPI2_MFGPAGE_DEVID_SAS2308_2:
2041 switch (ioc->pdev->subsystem_device) {
2042 case MPT2SAS_HP_2_4_INTERNAL_SSDID:
2043 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2044 MPT2SAS_HP_2_4_INTERNAL_BRANDING);
2045 break;
2046 case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
2047 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2048 MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
2049 break;
2050 case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
2051 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2052 MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
2053 break;
2054 case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
2055 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2056 MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
2057 break;
2058 default:
2059 break;
2060 }
2061 default:
2062 break;
2063 }
2064 }
2065
2066 /**
2067 * _base_display_ioc_capabilities - Disply IOC's capabilities.
2068 * @ioc: per adapter object
2069 *
2070 * Return nothing.
2071 */
2072 static void
2073 _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
2074 {
2075 int i = 0;
2076 char desc[16];
2077 u32 iounit_pg1_flags;
2078 u32 bios_version;
2079
2080 bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
2081 strncpy(desc, ioc->manu_pg0.ChipName, 16);
2082 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
2083 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
2084 ioc->name, desc,
2085 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
2086 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
2087 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
2088 ioc->facts.FWVersion.Word & 0x000000FF,
2089 ioc->pdev->revision,
2090 (bios_version & 0xFF000000) >> 24,
2091 (bios_version & 0x00FF0000) >> 16,
2092 (bios_version & 0x0000FF00) >> 8,
2093 bios_version & 0x000000FF);
2094
2095 _base_display_dell_branding(ioc);
2096 _base_display_intel_branding(ioc);
2097 _base_display_hp_branding(ioc);
2098
2099 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
2100
2101 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
2102 printk("Initiator");
2103 i++;
2104 }
2105
2106 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
2107 printk("%sTarget", i ? "," : "");
2108 i++;
2109 }
2110
2111 i = 0;
2112 printk("), ");
2113 printk("Capabilities=(");
2114
2115 if (!ioc->hide_ir_msg) {
2116 if (ioc->facts.IOCCapabilities &
2117 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
2118 printk("Raid");
2119 i++;
2120 }
2121 }
2122
2123 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
2124 printk("%sTLR", i ? "," : "");
2125 i++;
2126 }
2127
2128 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
2129 printk("%sMulticast", i ? "," : "");
2130 i++;
2131 }
2132
2133 if (ioc->facts.IOCCapabilities &
2134 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
2135 printk("%sBIDI Target", i ? "," : "");
2136 i++;
2137 }
2138
2139 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
2140 printk("%sEEDP", i ? "," : "");
2141 i++;
2142 }
2143
2144 if (ioc->facts.IOCCapabilities &
2145 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
2146 printk("%sSnapshot Buffer", i ? "," : "");
2147 i++;
2148 }
2149
2150 if (ioc->facts.IOCCapabilities &
2151 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
2152 printk("%sDiag Trace Buffer", i ? "," : "");
2153 i++;
2154 }
2155
2156 if (ioc->facts.IOCCapabilities &
2157 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
2158 printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
2159 i++;
2160 }
2161
2162 if (ioc->facts.IOCCapabilities &
2163 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
2164 printk("%sTask Set Full", i ? "," : "");
2165 i++;
2166 }
2167
2168 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
2169 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
2170 printk("%sNCQ", i ? "," : "");
2171 i++;
2172 }
2173
2174 printk(")\n");
2175 }
2176
2177 /**
2178 * _base_update_missing_delay - change the missing delay timers
2179 * @ioc: per adapter object
2180 * @device_missing_delay: amount of time till device is reported missing
2181 * @io_missing_delay: interval IO is returned when there is a missing device
2182 *
2183 * Return nothing.
2184 *
2185 * Passed on the command line, this function will modify the device missing
2186 * delay, as well as the io missing delay. This should be called at driver
2187 * load time.
2188 */
2189 static void
2190 _base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
2191 u16 device_missing_delay, u8 io_missing_delay)
2192 {
2193 u16 dmd, dmd_new, dmd_orignal;
2194 u8 io_missing_delay_original;
2195 u16 sz;
2196 Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
2197 Mpi2ConfigReply_t mpi_reply;
2198 u8 num_phys = 0;
2199 u16 ioc_status;
2200
2201 mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
2202 if (!num_phys)
2203 return;
2204
2205 sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
2206 sizeof(Mpi2SasIOUnit1PhyData_t));
2207 sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
2208 if (!sas_iounit_pg1) {
2209 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
2210 ioc->name, __FILE__, __LINE__, __func__);
2211 goto out;
2212 }
2213 if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
2214 sas_iounit_pg1, sz))) {
2215 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
2216 ioc->name, __FILE__, __LINE__, __func__);
2217 goto out;
2218 }
2219 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
2220 MPI2_IOCSTATUS_MASK;
2221 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
2222 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
2223 ioc->name, __FILE__, __LINE__, __func__);
2224 goto out;
2225 }
2226
2227 /* device missing delay */
2228 dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
2229 if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
2230 dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
2231 else
2232 dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
2233 dmd_orignal = dmd;
2234 if (device_missing_delay > 0x7F) {
2235 dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
2236 device_missing_delay;
2237 dmd = dmd / 16;
2238 dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
2239 } else
2240 dmd = device_missing_delay;
2241 sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
2242
2243 /* io missing delay */
2244 io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
2245 sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
2246
2247 if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
2248 sz)) {
2249 if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
2250 dmd_new = (dmd &
2251 MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
2252 else
2253 dmd_new =
2254 dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
2255 printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
2256 "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
2257 printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
2258 "new(%d)\n", ioc->name, io_missing_delay_original,
2259 io_missing_delay);
2260 ioc->device_missing_delay = dmd_new;
2261 ioc->io_missing_delay = io_missing_delay;
2262 }
2263
2264 out:
2265 kfree(sas_iounit_pg1);
2266 }
2267
2268 /**
2269 * _base_static_config_pages - static start of day config pages
2270 * @ioc: per adapter object
2271 *
2272 * Return nothing.
2273 */
2274 static void
2275 _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
2276 {
2277 Mpi2ConfigReply_t mpi_reply;
2278 u32 iounit_pg1_flags;
2279
2280 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
2281 if (ioc->ir_firmware)
2282 mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
2283 &ioc->manu_pg10);
2284 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
2285 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
2286 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
2287 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
2288 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
2289 _base_display_ioc_capabilities(ioc);
2290
2291 /*
2292 * Enable task_set_full handling in iounit_pg1 when the
2293 * facts capabilities indicate that its supported.
2294 */
2295 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
2296 if ((ioc->facts.IOCCapabilities &
2297 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
2298 iounit_pg1_flags &=
2299 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
2300 else
2301 iounit_pg1_flags |=
2302 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
2303 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
2304 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
2305
2306 }
2307
2308 /**
2309 * _base_release_memory_pools - release memory
2310 * @ioc: per adapter object
2311 *
2312 * Free memory allocated from _base_allocate_memory_pools.
2313 *
2314 * Return nothing.
2315 */
2316 static void
2317 _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
2318 {
2319 int i;
2320
2321 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2322 __func__));
2323
2324 if (ioc->request) {
2325 pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
2326 ioc->request, ioc->request_dma);
2327 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
2328 ": free\n", ioc->name, ioc->request));
2329 ioc->request = NULL;
2330 }
2331
2332 if (ioc->sense) {
2333 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
2334 if (ioc->sense_dma_pool)
2335 pci_pool_destroy(ioc->sense_dma_pool);
2336 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
2337 ": free\n", ioc->name, ioc->sense));
2338 ioc->sense = NULL;
2339 }
2340
2341 if (ioc->reply) {
2342 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
2343 if (ioc->reply_dma_pool)
2344 pci_pool_destroy(ioc->reply_dma_pool);
2345 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
2346 ": free\n", ioc->name, ioc->reply));
2347 ioc->reply = NULL;
2348 }
2349
2350 if (ioc->reply_free) {
2351 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
2352 ioc->reply_free_dma);
2353 if (ioc->reply_free_dma_pool)
2354 pci_pool_destroy(ioc->reply_free_dma_pool);
2355 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
2356 "(0x%p): free\n", ioc->name, ioc->reply_free));
2357 ioc->reply_free = NULL;
2358 }
2359
2360 if (ioc->reply_post_free) {
2361 pci_pool_free(ioc->reply_post_free_dma_pool,
2362 ioc->reply_post_free, ioc->reply_post_free_dma);
2363 if (ioc->reply_post_free_dma_pool)
2364 pci_pool_destroy(ioc->reply_post_free_dma_pool);
2365 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
2366 "reply_post_free_pool(0x%p): free\n", ioc->name,
2367 ioc->reply_post_free));
2368 ioc->reply_post_free = NULL;
2369 }
2370
2371 if (ioc->config_page) {
2372 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
2373 "config_page(0x%p): free\n", ioc->name,
2374 ioc->config_page));
2375 pci_free_consistent(ioc->pdev, ioc->config_page_sz,
2376 ioc->config_page, ioc->config_page_dma);
2377 }
2378
2379 if (ioc->scsi_lookup) {
2380 free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
2381 ioc->scsi_lookup = NULL;
2382 }
2383 kfree(ioc->hpr_lookup);
2384 kfree(ioc->internal_lookup);
2385 if (ioc->chain_lookup) {
2386 for (i = 0; i < ioc->chain_depth; i++) {
2387 if (ioc->chain_lookup[i].chain_buffer)
2388 pci_pool_free(ioc->chain_dma_pool,
2389 ioc->chain_lookup[i].chain_buffer,
2390 ioc->chain_lookup[i].chain_buffer_dma);
2391 }
2392 if (ioc->chain_dma_pool)
2393 pci_pool_destroy(ioc->chain_dma_pool);
2394 free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
2395 ioc->chain_lookup = NULL;
2396 }
2397 }
2398
2399
2400 /**
2401 * _base_allocate_memory_pools - allocate start of day memory pools
2402 * @ioc: per adapter object
2403 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2404 *
2405 * Returns 0 success, anything else error
2406 */
2407 static int
2408 _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2409 {
2410 struct mpt2sas_facts *facts;
2411 u16 max_sge_elements;
2412 u16 chains_needed_per_io;
2413 u32 sz, total_sz, reply_post_free_sz;
2414 u32 retry_sz;
2415 u16 max_request_credit;
2416 int i;
2417
2418 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2419 __func__));
2420
2421 retry_sz = 0;
2422 facts = &ioc->facts;
2423
2424 /* command line tunables for max sgl entries */
2425 if (max_sgl_entries != -1) {
2426 ioc->shost->sg_tablesize = (max_sgl_entries <
2427 MPT2SAS_SG_DEPTH) ? max_sgl_entries :
2428 MPT2SAS_SG_DEPTH;
2429 } else {
2430 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
2431 }
2432
2433 /* command line tunables for max controller queue depth */
2434 if (max_queue_depth != -1 && max_queue_depth != 0) {
2435 max_request_credit = min_t(u16, max_queue_depth +
2436 ioc->hi_priority_depth + ioc->internal_depth,
2437 facts->RequestCredit);
2438 if (max_request_credit > MAX_HBA_QUEUE_DEPTH)
2439 max_request_credit = MAX_HBA_QUEUE_DEPTH;
2440 } else
2441 max_request_credit = min_t(u16, facts->RequestCredit,
2442 MAX_HBA_QUEUE_DEPTH);
2443
2444 ioc->hba_queue_depth = max_request_credit;
2445 ioc->hi_priority_depth = facts->HighPriorityCredit;
2446 ioc->internal_depth = ioc->hi_priority_depth + 5;
2447
2448 /* request frame size */
2449 ioc->request_sz = facts->IOCRequestFrameSize * 4;
2450
2451 /* reply frame size */
2452 ioc->reply_sz = facts->ReplyFrameSize * 4;
2453
2454 retry_allocation:
2455 total_sz = 0;
2456 /* calculate number of sg elements left over in the 1st frame */
2457 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
2458 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
2459 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
2460
2461 /* now do the same for a chain buffer */
2462 max_sge_elements = ioc->request_sz - ioc->sge_size;
2463 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
2464
2465 ioc->chain_offset_value_for_main_message =
2466 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
2467 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
2468
2469 /*
2470 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
2471 */
2472 chains_needed_per_io = ((ioc->shost->sg_tablesize -
2473 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
2474 + 1;
2475 if (chains_needed_per_io > facts->MaxChainDepth) {
2476 chains_needed_per_io = facts->MaxChainDepth;
2477 ioc->shost->sg_tablesize = min_t(u16,
2478 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
2479 * chains_needed_per_io), ioc->shost->sg_tablesize);
2480 }
2481 ioc->chains_needed_per_io = chains_needed_per_io;
2482
2483 /* reply free queue sizing - taking into account for 64 FW events */
2484 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
2485
2486 /* align the reply post queue on the next 16 count boundary */
2487 if (!ioc->reply_free_queue_depth % 16)
2488 ioc->reply_post_queue_depth = ioc->reply_free_queue_depth + 16;
2489 else
2490 ioc->reply_post_queue_depth = ioc->reply_free_queue_depth +
2491 32 - (ioc->reply_free_queue_depth % 16);
2492 if (ioc->reply_post_queue_depth >
2493 facts->MaxReplyDescriptorPostQueueDepth) {
2494 ioc->reply_post_queue_depth = min_t(u16,
2495 (facts->MaxReplyDescriptorPostQueueDepth -
2496 (facts->MaxReplyDescriptorPostQueueDepth % 16)),
2497 (ioc->hba_queue_depth - (ioc->hba_queue_depth % 16)));
2498 ioc->reply_free_queue_depth = ioc->reply_post_queue_depth - 16;
2499 ioc->hba_queue_depth = ioc->reply_free_queue_depth - 64;
2500 }
2501
2502
2503 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
2504 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
2505 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
2506 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
2507 ioc->chains_needed_per_io));
2508
2509 ioc->scsiio_depth = ioc->hba_queue_depth -
2510 ioc->hi_priority_depth - ioc->internal_depth;
2511
2512 /* set the scsi host can_queue depth
2513 * with some internal commands that could be outstanding
2514 */
2515 ioc->shost->can_queue = ioc->scsiio_depth;
2516 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
2517 "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
2518
2519 /* contiguous pool for request and chains, 16 byte align, one extra "
2520 * "frame for smid=0
2521 */
2522 ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
2523 sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
2524
2525 /* hi-priority queue */
2526 sz += (ioc->hi_priority_depth * ioc->request_sz);
2527
2528 /* internal queue */
2529 sz += (ioc->internal_depth * ioc->request_sz);
2530
2531 ioc->request_dma_sz = sz;
2532 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
2533 if (!ioc->request) {
2534 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2535 "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2536 "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
2537 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2538 if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
2539 goto out;
2540 retry_sz += 64;
2541 ioc->hba_queue_depth = max_request_credit - retry_sz;
2542 goto retry_allocation;
2543 }
2544
2545 if (retry_sz)
2546 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2547 "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2548 "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
2549 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2550
2551
2552 /* hi-priority queue */
2553 ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
2554 ioc->request_sz);
2555 ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
2556 ioc->request_sz);
2557
2558 /* internal queue */
2559 ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
2560 ioc->request_sz);
2561 ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
2562 ioc->request_sz);
2563
2564
2565 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
2566 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
2567 ioc->request, ioc->hba_queue_depth, ioc->request_sz,
2568 (ioc->hba_queue_depth * ioc->request_sz)/1024));
2569 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
2570 ioc->name, (unsigned long long) ioc->request_dma));
2571 total_sz += sz;
2572
2573 sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
2574 ioc->scsi_lookup_pages = get_order(sz);
2575 ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
2576 GFP_KERNEL, ioc->scsi_lookup_pages);
2577 if (!ioc->scsi_lookup) {
2578 printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
2579 "sz(%d)\n", ioc->name, (int)sz);
2580 goto out;
2581 }
2582
2583 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
2584 "depth(%d)\n", ioc->name, ioc->request,
2585 ioc->scsiio_depth));
2586
2587 ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH);
2588 sz = ioc->chain_depth * sizeof(struct chain_tracker);
2589 ioc->chain_pages = get_order(sz);
2590
2591 ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
2592 GFP_KERNEL, ioc->chain_pages);
2593 if (!ioc->chain_lookup) {
2594 printk(MPT2SAS_ERR_FMT "chain_lookup: get_free_pages failed, "
2595 "sz(%d)\n", ioc->name, (int)sz);
2596 goto out;
2597 }
2598 ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
2599 ioc->request_sz, 16, 0);
2600 if (!ioc->chain_dma_pool) {
2601 printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
2602 "failed\n", ioc->name);
2603 goto out;
2604 }
2605 for (i = 0; i < ioc->chain_depth; i++) {
2606 ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
2607 ioc->chain_dma_pool , GFP_KERNEL,
2608 &ioc->chain_lookup[i].chain_buffer_dma);
2609 if (!ioc->chain_lookup[i].chain_buffer) {
2610 ioc->chain_depth = i;
2611 goto chain_done;
2612 }
2613 total_sz += ioc->request_sz;
2614 }
2615 chain_done:
2616 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
2617 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
2618 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
2619 ioc->request_sz))/1024));
2620
2621 /* initialize hi-priority queue smid's */
2622 ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
2623 sizeof(struct request_tracker), GFP_KERNEL);
2624 if (!ioc->hpr_lookup) {
2625 printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
2626 ioc->name);
2627 goto out;
2628 }
2629 ioc->hi_priority_smid = ioc->scsiio_depth + 1;
2630 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
2631 "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
2632 ioc->hi_priority_depth, ioc->hi_priority_smid));
2633
2634 /* initialize internal queue smid's */
2635 ioc->internal_lookup = kcalloc(ioc->internal_depth,
2636 sizeof(struct request_tracker), GFP_KERNEL);
2637 if (!ioc->internal_lookup) {
2638 printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
2639 ioc->name);
2640 goto out;
2641 }
2642 ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
2643 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
2644 "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
2645 ioc->internal_depth, ioc->internal_smid));
2646
2647 /* sense buffers, 4 byte align */
2648 sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
2649 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
2650 0);
2651 if (!ioc->sense_dma_pool) {
2652 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
2653 ioc->name);
2654 goto out;
2655 }
2656 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
2657 &ioc->sense_dma);
2658 if (!ioc->sense) {
2659 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
2660 ioc->name);
2661 goto out;
2662 }
2663 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
2664 "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
2665 "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
2666 SCSI_SENSE_BUFFERSIZE, sz/1024));
2667 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
2668 ioc->name, (unsigned long long)ioc->sense_dma));
2669 total_sz += sz;
2670
2671 /* reply pool, 4 byte align */
2672 sz = ioc->reply_free_queue_depth * ioc->reply_sz;
2673 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
2674 0);
2675 if (!ioc->reply_dma_pool) {
2676 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
2677 ioc->name);
2678 goto out;
2679 }
2680 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
2681 &ioc->reply_dma);
2682 if (!ioc->reply) {
2683 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
2684 ioc->name);
2685 goto out;
2686 }
2687 ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
2688 ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
2689 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
2690 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
2691 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
2692 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
2693 ioc->name, (unsigned long long)ioc->reply_dma));
2694 total_sz += sz;
2695
2696 /* reply free queue, 16 byte align */
2697 sz = ioc->reply_free_queue_depth * 4;
2698 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
2699 ioc->pdev, sz, 16, 0);
2700 if (!ioc->reply_free_dma_pool) {
2701 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
2702 "failed\n", ioc->name);
2703 goto out;
2704 }
2705 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
2706 &ioc->reply_free_dma);
2707 if (!ioc->reply_free) {
2708 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
2709 "failed\n", ioc->name);
2710 goto out;
2711 }
2712 memset(ioc->reply_free, 0, sz);
2713 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
2714 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
2715 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
2716 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
2717 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
2718 total_sz += sz;
2719
2720 /* reply post queue, 16 byte align */
2721 reply_post_free_sz = ioc->reply_post_queue_depth *
2722 sizeof(Mpi2DefaultReplyDescriptor_t);
2723 if (_base_is_controller_msix_enabled(ioc))
2724 sz = reply_post_free_sz * ioc->reply_queue_count;
2725 else
2726 sz = reply_post_free_sz;
2727 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
2728 ioc->pdev, sz, 16, 0);
2729 if (!ioc->reply_post_free_dma_pool) {
2730 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
2731 "failed\n", ioc->name);
2732 goto out;
2733 }
2734 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
2735 GFP_KERNEL, &ioc->reply_post_free_dma);
2736 if (!ioc->reply_post_free) {
2737 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
2738 "failed\n", ioc->name);
2739 goto out;
2740 }
2741 memset(ioc->reply_post_free, 0, sz);
2742 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
2743 "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
2744 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
2745 sz/1024));
2746 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
2747 "(0x%llx)\n", ioc->name, (unsigned long long)
2748 ioc->reply_post_free_dma));
2749 total_sz += sz;
2750
2751 ioc->config_page_sz = 512;
2752 ioc->config_page = pci_alloc_consistent(ioc->pdev,
2753 ioc->config_page_sz, &ioc->config_page_dma);
2754 if (!ioc->config_page) {
2755 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
2756 "failed\n", ioc->name);
2757 goto out;
2758 }
2759 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
2760 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
2761 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
2762 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
2763 total_sz += ioc->config_page_sz;
2764
2765 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
2766 ioc->name, total_sz/1024);
2767 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
2768 "Max Controller Queue Depth(%d)\n",
2769 ioc->name, ioc->shost->can_queue, facts->RequestCredit);
2770 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
2771 ioc->name, ioc->shost->sg_tablesize);
2772 return 0;
2773
2774 out:
2775 return -ENOMEM;
2776 }
2777
2778
2779 /**
2780 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
2781 * @ioc: Pointer to MPT_ADAPTER structure
2782 * @cooked: Request raw or cooked IOC state
2783 *
2784 * Returns all IOC Doorbell register bits if cooked==0, else just the
2785 * Doorbell bits in MPI_IOC_STATE_MASK.
2786 */
2787 u32
2788 mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
2789 {
2790 u32 s, sc;
2791
2792 s = readl(&ioc->chip->Doorbell);
2793 sc = s & MPI2_IOC_STATE_MASK;
2794 return cooked ? sc : s;
2795 }
2796
2797 /**
2798 * _base_wait_on_iocstate - waiting on a particular ioc state
2799 * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
2800 * @timeout: timeout in second
2801 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2802 *
2803 * Returns 0 for success, non-zero for failure.
2804 */
2805 static int
2806 _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
2807 int sleep_flag)
2808 {
2809 u32 count, cntdn;
2810 u32 current_state;
2811
2812 count = 0;
2813 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2814 do {
2815 current_state = mpt2sas_base_get_iocstate(ioc, 1);
2816 if (current_state == ioc_state)
2817 return 0;
2818 if (count && current_state == MPI2_IOC_STATE_FAULT)
2819 break;
2820 if (sleep_flag == CAN_SLEEP)
2821 msleep(1);
2822 else
2823 udelay(500);
2824 count++;
2825 } while (--cntdn);
2826
2827 return current_state;
2828 }
2829
2830 /**
2831 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
2832 * a write to the doorbell)
2833 * @ioc: per adapter object
2834 * @timeout: timeout in second
2835 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2836 *
2837 * Returns 0 for success, non-zero for failure.
2838 *
2839 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
2840 */
2841 static int
2842 _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
2843 int sleep_flag)
2844 {
2845 u32 cntdn, count;
2846 u32 int_status;
2847
2848 count = 0;
2849 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2850 do {
2851 int_status = readl(&ioc->chip->HostInterruptStatus);
2852 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2853 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2854 "successful count(%d), timeout(%d)\n", ioc->name,
2855 __func__, count, timeout));
2856 return 0;
2857 }
2858 if (sleep_flag == CAN_SLEEP)
2859 msleep(1);
2860 else
2861 udelay(500);
2862 count++;
2863 } while (--cntdn);
2864
2865 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2866 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2867 return -EFAULT;
2868 }
2869
2870 /**
2871 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
2872 * @ioc: per adapter object
2873 * @timeout: timeout in second
2874 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2875 *
2876 * Returns 0 for success, non-zero for failure.
2877 *
2878 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
2879 * doorbell.
2880 */
2881 static int
2882 _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
2883 int sleep_flag)
2884 {
2885 u32 cntdn, count;
2886 u32 int_status;
2887 u32 doorbell;
2888
2889 count = 0;
2890 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2891 do {
2892 int_status = readl(&ioc->chip->HostInterruptStatus);
2893 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
2894 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2895 "successful count(%d), timeout(%d)\n", ioc->name,
2896 __func__, count, timeout));
2897 return 0;
2898 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2899 doorbell = readl(&ioc->chip->Doorbell);
2900 if ((doorbell & MPI2_IOC_STATE_MASK) ==
2901 MPI2_IOC_STATE_FAULT) {
2902 mpt2sas_base_fault_info(ioc , doorbell);
2903 return -EFAULT;
2904 }
2905 } else if (int_status == 0xFFFFFFFF)
2906 goto out;
2907
2908 if (sleep_flag == CAN_SLEEP)
2909 msleep(1);
2910 else
2911 udelay(500);
2912 count++;
2913 } while (--cntdn);
2914
2915 out:
2916 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2917 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2918 return -EFAULT;
2919 }
2920
2921 /**
2922 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
2923 * @ioc: per adapter object
2924 * @timeout: timeout in second
2925 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2926 *
2927 * Returns 0 for success, non-zero for failure.
2928 *
2929 */
2930 static int
2931 _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
2932 int sleep_flag)
2933 {
2934 u32 cntdn, count;
2935 u32 doorbell_reg;
2936
2937 count = 0;
2938 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2939 do {
2940 doorbell_reg = readl(&ioc->chip->Doorbell);
2941 if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
2942 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2943 "successful count(%d), timeout(%d)\n", ioc->name,
2944 __func__, count, timeout));
2945 return 0;
2946 }
2947 if (sleep_flag == CAN_SLEEP)
2948 msleep(1);
2949 else
2950 udelay(500);
2951 count++;
2952 } while (--cntdn);
2953
2954 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2955 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
2956 return -EFAULT;
2957 }
2958
2959 /**
2960 * _base_send_ioc_reset - send doorbell reset
2961 * @ioc: per adapter object
2962 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
2963 * @timeout: timeout in second
2964 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2965 *
2966 * Returns 0 for success, non-zero for failure.
2967 */
2968 static int
2969 _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
2970 int sleep_flag)
2971 {
2972 u32 ioc_state;
2973 int r = 0;
2974
2975 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
2976 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
2977 ioc->name, __func__);
2978 return -EFAULT;
2979 }
2980
2981 if (!(ioc->facts.IOCCapabilities &
2982 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
2983 return -EFAULT;
2984
2985 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
2986
2987 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
2988 &ioc->chip->Doorbell);
2989 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
2990 r = -EFAULT;
2991 goto out;
2992 }
2993 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
2994 timeout, sleep_flag);
2995 if (ioc_state) {
2996 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
2997 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
2998 r = -EFAULT;
2999 goto out;
3000 }
3001 out:
3002 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
3003 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
3004 return r;
3005 }
3006
3007 /**
3008 * _base_handshake_req_reply_wait - send request thru doorbell interface
3009 * @ioc: per adapter object
3010 * @request_bytes: request length
3011 * @request: pointer having request payload
3012 * @reply_bytes: reply length
3013 * @reply: pointer to reply payload
3014 * @timeout: timeout in second
3015 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3016 *
3017 * Returns 0 for success, non-zero for failure.
3018 */
3019 static int
3020 _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
3021 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
3022 {
3023 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
3024 int i;
3025 u8 failed;
3026 u16 dummy;
3027 __le32 *mfp;
3028
3029 /* make sure doorbell is not in use */
3030 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
3031 printk(MPT2SAS_ERR_FMT "doorbell is in use "
3032 " (line=%d)\n", ioc->name, __LINE__);
3033 return -EFAULT;
3034 }
3035
3036 /* clear pending doorbell interrupts from previous state changes */
3037 if (readl(&ioc->chip->HostInterruptStatus) &
3038 MPI2_HIS_IOC2SYS_DB_STATUS)
3039 writel(0, &ioc->chip->HostInterruptStatus);
3040
3041 /* send message to ioc */
3042 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
3043 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
3044 &ioc->chip->Doorbell);
3045
3046 if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
3047 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3048 "int failed (line=%d)\n", ioc->name, __LINE__);
3049 return -EFAULT;
3050 }
3051 writel(0, &ioc->chip->HostInterruptStatus);
3052
3053 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
3054 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3055 "ack failed (line=%d)\n", ioc->name, __LINE__);
3056 return -EFAULT;
3057 }
3058
3059 /* send message 32-bits at a time */
3060 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
3061 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
3062 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
3063 failed = 1;
3064 }
3065
3066 if (failed) {
3067 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3068 "sending request failed (line=%d)\n", ioc->name, __LINE__);
3069 return -EFAULT;
3070 }
3071
3072 /* now wait for the reply */
3073 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
3074 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3075 "int failed (line=%d)\n", ioc->name, __LINE__);
3076 return -EFAULT;
3077 }
3078
3079 /* read the first two 16-bits, it gives the total length of the reply */
3080 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3081 & MPI2_DOORBELL_DATA_MASK);
3082 writel(0, &ioc->chip->HostInterruptStatus);
3083 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3084 printk(MPT2SAS_ERR_FMT "doorbell handshake "
3085 "int failed (line=%d)\n", ioc->name, __LINE__);
3086 return -EFAULT;
3087 }
3088 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3089 & MPI2_DOORBELL_DATA_MASK);
3090 writel(0, &ioc->chip->HostInterruptStatus);
3091
3092 for (i = 2; i < default_reply->MsgLength * 2; i++) {
3093 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3094 printk(MPT2SAS_ERR_FMT "doorbell "
3095 "handshake int failed (line=%d)\n", ioc->name,
3096 __LINE__);
3097 return -EFAULT;
3098 }
3099 if (i >= reply_bytes/2) /* overflow case */
3100 dummy = readl(&ioc->chip->Doorbell);
3101 else
3102 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3103 & MPI2_DOORBELL_DATA_MASK);
3104 writel(0, &ioc->chip->HostInterruptStatus);
3105 }
3106
3107 _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
3108 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
3109 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
3110 " (line=%d)\n", ioc->name, __LINE__));
3111 }
3112 writel(0, &ioc->chip->HostInterruptStatus);
3113
3114 if (ioc->logging_level & MPT_DEBUG_INIT) {
3115 mfp = (__le32 *)reply;
3116 printk(KERN_INFO "\toffset:data\n");
3117 for (i = 0; i < reply_bytes/4; i++)
3118 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
3119 le32_to_cpu(mfp[i]));
3120 }
3121 return 0;
3122 }
3123
3124 /**
3125 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
3126 * @ioc: per adapter object
3127 * @mpi_reply: the reply payload from FW
3128 * @mpi_request: the request payload sent to FW
3129 *
3130 * The SAS IO Unit Control Request message allows the host to perform low-level
3131 * operations, such as resets on the PHYs of the IO Unit, also allows the host
3132 * to obtain the IOC assigned device handles for a device if it has other
3133 * identifying information about the device, in addition allows the host to
3134 * remove IOC resources associated with the device.
3135 *
3136 * Returns 0 for success, non-zero for failure.
3137 */
3138 int
3139 mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
3140 Mpi2SasIoUnitControlReply_t *mpi_reply,
3141 Mpi2SasIoUnitControlRequest_t *mpi_request)
3142 {
3143 u16 smid;
3144 u32 ioc_state;
3145 unsigned long timeleft;
3146 u8 issue_reset;
3147 int rc;
3148 void *request;
3149 u16 wait_state_count;
3150
3151 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3152 __func__));
3153
3154 mutex_lock(&ioc->base_cmds.mutex);
3155
3156 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
3157 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
3158 ioc->name, __func__);
3159 rc = -EAGAIN;
3160 goto out;
3161 }
3162
3163 wait_state_count = 0;
3164 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3165 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
3166 if (wait_state_count++ == 10) {
3167 printk(MPT2SAS_ERR_FMT
3168 "%s: failed due to ioc not operational\n",
3169 ioc->name, __func__);
3170 rc = -EFAULT;
3171 goto out;
3172 }
3173 ssleep(1);
3174 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3175 printk(MPT2SAS_INFO_FMT "%s: waiting for "
3176 "operational state(count=%d)\n", ioc->name,
3177 __func__, wait_state_count);
3178 }
3179
3180 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3181 if (!smid) {
3182 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3183 ioc->name, __func__);
3184 rc = -EAGAIN;
3185 goto out;
3186 }
3187
3188 rc = 0;
3189 ioc->base_cmds.status = MPT2_CMD_PENDING;
3190 request = mpt2sas_base_get_msg_frame(ioc, smid);
3191 ioc->base_cmds.smid = smid;
3192 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
3193 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
3194 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
3195 ioc->ioc_link_reset_in_progress = 1;
3196 init_completion(&ioc->base_cmds.done);
3197 mpt2sas_base_put_smid_default(ioc, smid);
3198 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3199 msecs_to_jiffies(10000));
3200 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
3201 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
3202 ioc->ioc_link_reset_in_progress)
3203 ioc->ioc_link_reset_in_progress = 0;
3204 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3205 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3206 ioc->name, __func__);
3207 _debug_dump_mf(mpi_request,
3208 sizeof(Mpi2SasIoUnitControlRequest_t)/4);
3209 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
3210 issue_reset = 1;
3211 goto issue_host_reset;
3212 }
3213 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
3214 memcpy(mpi_reply, ioc->base_cmds.reply,
3215 sizeof(Mpi2SasIoUnitControlReply_t));
3216 else
3217 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
3218 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3219 goto out;
3220
3221 issue_host_reset:
3222 if (issue_reset)
3223 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
3224 FORCE_BIG_HAMMER);
3225 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3226 rc = -EFAULT;
3227 out:
3228 mutex_unlock(&ioc->base_cmds.mutex);
3229 return rc;
3230 }
3231
3232
3233 /**
3234 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
3235 * @ioc: per adapter object
3236 * @mpi_reply: the reply payload from FW
3237 * @mpi_request: the request payload sent to FW
3238 *
3239 * The SCSI Enclosure Processor request message causes the IOC to
3240 * communicate with SES devices to control LED status signals.
3241 *
3242 * Returns 0 for success, non-zero for failure.
3243 */
3244 int
3245 mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
3246 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
3247 {
3248 u16 smid;
3249 u32 ioc_state;
3250 unsigned long timeleft;
3251 u8 issue_reset;
3252 int rc;
3253 void *request;
3254 u16 wait_state_count;
3255
3256 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3257 __func__));
3258
3259 mutex_lock(&ioc->base_cmds.mutex);
3260
3261 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
3262 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
3263 ioc->name, __func__);
3264 rc = -EAGAIN;
3265 goto out;
3266 }
3267
3268 wait_state_count = 0;
3269 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3270 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
3271 if (wait_state_count++ == 10) {
3272 printk(MPT2SAS_ERR_FMT
3273 "%s: failed due to ioc not operational\n",
3274 ioc->name, __func__);
3275 rc = -EFAULT;
3276 goto out;
3277 }
3278 ssleep(1);
3279 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3280 printk(MPT2SAS_INFO_FMT "%s: waiting for "
3281 "operational state(count=%d)\n", ioc->name,
3282 __func__, wait_state_count);
3283 }
3284
3285 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3286 if (!smid) {
3287 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3288 ioc->name, __func__);
3289 rc = -EAGAIN;
3290 goto out;
3291 }
3292
3293 rc = 0;
3294 ioc->base_cmds.status = MPT2_CMD_PENDING;
3295 request = mpt2sas_base_get_msg_frame(ioc, smid);
3296 ioc->base_cmds.smid = smid;
3297 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
3298 init_completion(&ioc->base_cmds.done);
3299 mpt2sas_base_put_smid_default(ioc, smid);
3300 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3301 msecs_to_jiffies(10000));
3302 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3303 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3304 ioc->name, __func__);
3305 _debug_dump_mf(mpi_request,
3306 sizeof(Mpi2SepRequest_t)/4);
3307 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
3308 issue_reset = 1;
3309 goto issue_host_reset;
3310 }
3311 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
3312 memcpy(mpi_reply, ioc->base_cmds.reply,
3313 sizeof(Mpi2SepReply_t));
3314 else
3315 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
3316 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3317 goto out;
3318
3319 issue_host_reset:
3320 if (issue_reset)
3321 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
3322 FORCE_BIG_HAMMER);
3323 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3324 rc = -EFAULT;
3325 out:
3326 mutex_unlock(&ioc->base_cmds.mutex);
3327 return rc;
3328 }
3329
3330 /**
3331 * _base_get_port_facts - obtain port facts reply and save in ioc
3332 * @ioc: per adapter object
3333 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3334 *
3335 * Returns 0 for success, non-zero for failure.
3336 */
3337 static int
3338 _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
3339 {
3340 Mpi2PortFactsRequest_t mpi_request;
3341 Mpi2PortFactsReply_t mpi_reply;
3342 struct mpt2sas_port_facts *pfacts;
3343 int mpi_reply_sz, mpi_request_sz, r;
3344
3345 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3346 __func__));
3347
3348 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
3349 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
3350 memset(&mpi_request, 0, mpi_request_sz);
3351 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
3352 mpi_request.PortNumber = port;
3353 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
3354 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
3355
3356 if (r != 0) {
3357 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3358 ioc->name, __func__, r);
3359 return r;
3360 }
3361
3362 pfacts = &ioc->pfacts[port];
3363 memset(pfacts, 0, sizeof(struct mpt2sas_port_facts));
3364 pfacts->PortNumber = mpi_reply.PortNumber;
3365 pfacts->VP_ID = mpi_reply.VP_ID;
3366 pfacts->VF_ID = mpi_reply.VF_ID;
3367 pfacts->MaxPostedCmdBuffers =
3368 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
3369
3370 return 0;
3371 }
3372
3373 /**
3374 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
3375 * @ioc: per adapter object
3376 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3377 *
3378 * Returns 0 for success, non-zero for failure.
3379 */
3380 static int
3381 _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3382 {
3383 Mpi2IOCFactsRequest_t mpi_request;
3384 Mpi2IOCFactsReply_t mpi_reply;
3385 struct mpt2sas_facts *facts;
3386 int mpi_reply_sz, mpi_request_sz, r;
3387
3388 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3389 __func__));
3390
3391 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
3392 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
3393 memset(&mpi_request, 0, mpi_request_sz);
3394 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
3395 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
3396 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
3397
3398 if (r != 0) {
3399 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3400 ioc->name, __func__, r);
3401 return r;
3402 }
3403
3404 facts = &ioc->facts;
3405 memset(facts, 0, sizeof(struct mpt2sas_facts));
3406 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
3407 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
3408 facts->VP_ID = mpi_reply.VP_ID;
3409 facts->VF_ID = mpi_reply.VF_ID;
3410 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
3411 facts->MaxChainDepth = mpi_reply.MaxChainDepth;
3412 facts->WhoInit = mpi_reply.WhoInit;
3413 facts->NumberOfPorts = mpi_reply.NumberOfPorts;
3414 facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors;
3415 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
3416 facts->MaxReplyDescriptorPostQueueDepth =
3417 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
3418 facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
3419 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
3420 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
3421 ioc->ir_firmware = 1;
3422 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
3423 facts->IOCRequestFrameSize =
3424 le16_to_cpu(mpi_reply.IOCRequestFrameSize);
3425 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
3426 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
3427 ioc->shost->max_id = -1;
3428 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
3429 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
3430 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
3431 facts->HighPriorityCredit =
3432 le16_to_cpu(mpi_reply.HighPriorityCredit);
3433 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
3434 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
3435
3436 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
3437 "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
3438 facts->MaxChainDepth));
3439 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
3440 "reply frame size(%d)\n", ioc->name,
3441 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
3442 return 0;
3443 }
3444
3445 /**
3446 * _base_send_ioc_init - send ioc_init to firmware
3447 * @ioc: per adapter object
3448 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3449 *
3450 * Returns 0 for success, non-zero for failure.
3451 */
3452 static int
3453 _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3454 {
3455 Mpi2IOCInitRequest_t mpi_request;
3456 Mpi2IOCInitReply_t mpi_reply;
3457 int r;
3458 struct timeval current_time;
3459 u16 ioc_status;
3460
3461 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3462 __func__));
3463
3464 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
3465 mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
3466 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
3467 mpi_request.VF_ID = 0; /* TODO */
3468 mpi_request.VP_ID = 0;
3469 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
3470 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
3471
3472 if (_base_is_controller_msix_enabled(ioc))
3473 mpi_request.HostMSIxVectors = ioc->reply_queue_count;
3474 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
3475 mpi_request.ReplyDescriptorPostQueueDepth =
3476 cpu_to_le16(ioc->reply_post_queue_depth);
3477 mpi_request.ReplyFreeQueueDepth =
3478 cpu_to_le16(ioc->reply_free_queue_depth);
3479
3480 mpi_request.SenseBufferAddressHigh =
3481 cpu_to_le32((u64)ioc->sense_dma >> 32);
3482 mpi_request.SystemReplyAddressHigh =
3483 cpu_to_le32((u64)ioc->reply_dma >> 32);
3484 mpi_request.SystemRequestFrameBaseAddress =
3485 cpu_to_le64((u64)ioc->request_dma);
3486 mpi_request.ReplyFreeQueueAddress =
3487 cpu_to_le64((u64)ioc->reply_free_dma);
3488 mpi_request.ReplyDescriptorPostQueueAddress =
3489 cpu_to_le64((u64)ioc->reply_post_free_dma);
3490
3491
3492 /* This time stamp specifies number of milliseconds
3493 * since epoch ~ midnight January 1, 1970.
3494 */
3495 do_gettimeofday(&current_time);
3496 mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
3497 (current_time.tv_usec / 1000));
3498
3499 if (ioc->logging_level & MPT_DEBUG_INIT) {
3500 __le32 *mfp;
3501 int i;
3502
3503 mfp = (__le32 *)&mpi_request;
3504 printk(KERN_INFO "\toffset:data\n");
3505 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
3506 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
3507 le32_to_cpu(mfp[i]));
3508 }
3509
3510 r = _base_handshake_req_reply_wait(ioc,
3511 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
3512 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
3513 sleep_flag);
3514
3515 if (r != 0) {
3516 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3517 ioc->name, __func__, r);
3518 return r;
3519 }
3520
3521 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
3522 if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
3523 mpi_reply.IOCLogInfo) {
3524 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
3525 r = -EIO;
3526 }
3527
3528 return 0;
3529 }
3530
3531 /**
3532 * mpt2sas_port_enable_done - command completion routine for port enable
3533 * @ioc: per adapter object
3534 * @smid: system request message index
3535 * @msix_index: MSIX table index supplied by the OS
3536 * @reply: reply message frame(lower 32bit addr)
3537 *
3538 * Return 1 meaning mf should be freed from _base_interrupt
3539 * 0 means the mf is freed from this function.
3540 */
3541 u8
3542 mpt2sas_port_enable_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
3543 u32 reply)
3544 {
3545 MPI2DefaultReply_t *mpi_reply;
3546 u16 ioc_status;
3547
3548 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
3549 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
3550 return 1;
3551
3552 if (ioc->port_enable_cmds.status == MPT2_CMD_NOT_USED)
3553 return 1;
3554
3555 ioc->port_enable_cmds.status |= MPT2_CMD_COMPLETE;
3556 if (mpi_reply) {
3557 ioc->port_enable_cmds.status |= MPT2_CMD_REPLY_VALID;
3558 memcpy(ioc->port_enable_cmds.reply, mpi_reply,
3559 mpi_reply->MsgLength*4);
3560 }
3561 ioc->port_enable_cmds.status &= ~MPT2_CMD_PENDING;
3562
3563 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
3564
3565 if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
3566 ioc->port_enable_failed = 1;
3567
3568 if (ioc->is_driver_loading) {
3569 if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
3570 mpt2sas_port_enable_complete(ioc);
3571 return 1;
3572 } else {
3573 ioc->start_scan_failed = ioc_status;
3574 ioc->start_scan = 0;
3575 return 1;
3576 }
3577 }
3578 complete(&ioc->port_enable_cmds.done);
3579 return 1;
3580 }
3581
3582
3583 /**
3584 * _base_send_port_enable - send port_enable(discovery stuff) to firmware
3585 * @ioc: per adapter object
3586 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3587 *
3588 * Returns 0 for success, non-zero for failure.
3589 */
3590 static int
3591 _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3592 {
3593 Mpi2PortEnableRequest_t *mpi_request;
3594 Mpi2PortEnableReply_t *mpi_reply;
3595 unsigned long timeleft;
3596 int r = 0;
3597 u16 smid;
3598 u16 ioc_status;
3599
3600 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
3601
3602 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
3603 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3604 ioc->name, __func__);
3605 return -EAGAIN;
3606 }
3607
3608 smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
3609 if (!smid) {
3610 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3611 ioc->name, __func__);
3612 return -EAGAIN;
3613 }
3614
3615 ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
3616 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3617 ioc->port_enable_cmds.smid = smid;
3618 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
3619 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
3620
3621 init_completion(&ioc->port_enable_cmds.done);
3622 mpt2sas_base_put_smid_default(ioc, smid);
3623 timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done,
3624 300*HZ);
3625 if (!(ioc->port_enable_cmds.status & MPT2_CMD_COMPLETE)) {
3626 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3627 ioc->name, __func__);
3628 _debug_dump_mf(mpi_request,
3629 sizeof(Mpi2PortEnableRequest_t)/4);
3630 if (ioc->port_enable_cmds.status & MPT2_CMD_RESET)
3631 r = -EFAULT;
3632 else
3633 r = -ETIME;
3634 goto out;
3635 }
3636 mpi_reply = ioc->port_enable_cmds.reply;
3637
3638 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
3639 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
3640 printk(MPT2SAS_ERR_FMT "%s: failed with (ioc_status=0x%08x)\n",
3641 ioc->name, __func__, ioc_status);
3642 r = -EFAULT;
3643 goto out;
3644 }
3645 out:
3646 ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
3647 printk(MPT2SAS_INFO_FMT "port enable: %s\n", ioc->name, ((r == 0) ?
3648 "SUCCESS" : "FAILED"));
3649 return r;
3650 }
3651
3652 /**
3653 * mpt2sas_port_enable - initiate firmware discovery (don't wait for reply)
3654 * @ioc: per adapter object
3655 *
3656 * Returns 0 for success, non-zero for failure.
3657 */
3658 int
3659 mpt2sas_port_enable(struct MPT2SAS_ADAPTER *ioc)
3660 {
3661 Mpi2PortEnableRequest_t *mpi_request;
3662 u16 smid;
3663
3664 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
3665
3666 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
3667 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3668 ioc->name, __func__);
3669 return -EAGAIN;
3670 }
3671
3672 smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
3673 if (!smid) {
3674 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3675 ioc->name, __func__);
3676 return -EAGAIN;
3677 }
3678
3679 ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
3680 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3681 ioc->port_enable_cmds.smid = smid;
3682 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
3683 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
3684
3685 mpt2sas_base_put_smid_default(ioc, smid);
3686 return 0;
3687 }
3688
3689 /**
3690 * _base_determine_wait_on_discovery - desposition
3691 * @ioc: per adapter object
3692 *
3693 * Decide whether to wait on discovery to complete. Used to either
3694 * locate boot device, or report volumes ahead of physical devices.
3695 *
3696 * Returns 1 for wait, 0 for don't wait
3697 */
3698 static int
3699 _base_determine_wait_on_discovery(struct MPT2SAS_ADAPTER *ioc)
3700 {
3701 /* We wait for discovery to complete if IR firmware is loaded.
3702 * The sas topology events arrive before PD events, so we need time to
3703 * turn on the bit in ioc->pd_handles to indicate PD
3704 * Also, it maybe required to report Volumes ahead of physical
3705 * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
3706 */
3707 if (ioc->ir_firmware)
3708 return 1;
3709
3710 /* if no Bios, then we don't need to wait */
3711 if (!ioc->bios_pg3.BiosVersion)
3712 return 0;
3713
3714 /* Bios is present, then we drop down here.
3715 *
3716 * If there any entries in the Bios Page 2, then we wait
3717 * for discovery to complete.
3718 */
3719
3720 /* Current Boot Device */
3721 if ((ioc->bios_pg2.CurrentBootDeviceForm &
3722 MPI2_BIOSPAGE2_FORM_MASK) ==
3723 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
3724 /* Request Boot Device */
3725 (ioc->bios_pg2.ReqBootDeviceForm &
3726 MPI2_BIOSPAGE2_FORM_MASK) ==
3727 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
3728 /* Alternate Request Boot Device */
3729 (ioc->bios_pg2.ReqAltBootDeviceForm &
3730 MPI2_BIOSPAGE2_FORM_MASK) ==
3731 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED)
3732 return 0;
3733
3734 return 1;
3735 }
3736
3737
3738 /**
3739 * _base_unmask_events - turn on notification for this event
3740 * @ioc: per adapter object
3741 * @event: firmware event
3742 *
3743 * The mask is stored in ioc->event_masks.
3744 */
3745 static void
3746 _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
3747 {
3748 u32 desired_event;
3749
3750 if (event >= 128)
3751 return;
3752
3753 desired_event = (1 << (event % 32));
3754
3755 if (event < 32)
3756 ioc->event_masks[0] &= ~desired_event;
3757 else if (event < 64)
3758 ioc->event_masks[1] &= ~desired_event;
3759 else if (event < 96)
3760 ioc->event_masks[2] &= ~desired_event;
3761 else if (event < 128)
3762 ioc->event_masks[3] &= ~desired_event;
3763 }
3764
3765 /**
3766 * _base_event_notification - send event notification
3767 * @ioc: per adapter object
3768 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3769 *
3770 * Returns 0 for success, non-zero for failure.
3771 */
3772 static int
3773 _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3774 {
3775 Mpi2EventNotificationRequest_t *mpi_request;
3776 unsigned long timeleft;
3777 u16 smid;
3778 int r = 0;
3779 int i;
3780
3781 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3782 __func__));
3783
3784 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3785 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3786 ioc->name, __func__);
3787 return -EAGAIN;
3788 }
3789
3790 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3791 if (!smid) {
3792 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3793 ioc->name, __func__);
3794 return -EAGAIN;
3795 }
3796 ioc->base_cmds.status = MPT2_CMD_PENDING;
3797 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3798 ioc->base_cmds.smid = smid;
3799 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
3800 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
3801 mpi_request->VF_ID = 0; /* TODO */
3802 mpi_request->VP_ID = 0;
3803 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
3804 mpi_request->EventMasks[i] =
3805 cpu_to_le32(ioc->event_masks[i]);
3806 init_completion(&ioc->base_cmds.done);
3807 mpt2sas_base_put_smid_default(ioc, smid);
3808 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
3809 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3810 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3811 ioc->name, __func__);
3812 _debug_dump_mf(mpi_request,
3813 sizeof(Mpi2EventNotificationRequest_t)/4);
3814 if (ioc->base_cmds.status & MPT2_CMD_RESET)
3815 r = -EFAULT;
3816 else
3817 r = -ETIME;
3818 } else
3819 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
3820 ioc->name, __func__));
3821 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3822 return r;
3823 }
3824
3825 /**
3826 * mpt2sas_base_validate_event_type - validating event types
3827 * @ioc: per adapter object
3828 * @event: firmware event
3829 *
3830 * This will turn on firmware event notification when application
3831 * ask for that event. We don't mask events that are already enabled.
3832 */
3833 void
3834 mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
3835 {
3836 int i, j;
3837 u32 event_mask, desired_event;
3838 u8 send_update_to_fw;
3839
3840 for (i = 0, send_update_to_fw = 0; i <
3841 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
3842 event_mask = ~event_type[i];
3843 desired_event = 1;
3844 for (j = 0; j < 32; j++) {
3845 if (!(event_mask & desired_event) &&
3846 (ioc->event_masks[i] & desired_event)) {
3847 ioc->event_masks[i] &= ~desired_event;
3848 send_update_to_fw = 1;
3849 }
3850 desired_event = (desired_event << 1);
3851 }
3852 }
3853
3854 if (!send_update_to_fw)
3855 return;
3856
3857 mutex_lock(&ioc->base_cmds.mutex);
3858 _base_event_notification(ioc, CAN_SLEEP);
3859 mutex_unlock(&ioc->base_cmds.mutex);
3860 }
3861
3862 /**
3863 * _base_diag_reset - the "big hammer" start of day reset
3864 * @ioc: per adapter object
3865 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3866 *
3867 * Returns 0 for success, non-zero for failure.
3868 */
3869 static int
3870 _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3871 {
3872 u32 host_diagnostic;
3873 u32 ioc_state;
3874 u32 count;
3875 u32 hcb_size;
3876
3877 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
3878 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
3879 ioc->name));
3880
3881 count = 0;
3882 do {
3883 /* Write magic sequence to WriteSequence register
3884 * Loop until in diagnostic mode
3885 */
3886 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
3887 "sequence\n", ioc->name));
3888 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3889 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
3890 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
3891 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
3892 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
3893 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
3894 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
3895
3896 /* wait 100 msec */
3897 if (sleep_flag == CAN_SLEEP)
3898 msleep(100);
3899 else
3900 mdelay(100);
3901
3902 if (count++ > 20)
3903 goto out;
3904
3905 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3906 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
3907 "sequence: count(%d), host_diagnostic(0x%08x)\n",
3908 ioc->name, count, host_diagnostic));
3909
3910 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
3911
3912 hcb_size = readl(&ioc->chip->HCBSize);
3913
3914 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
3915 ioc->name));
3916 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
3917 &ioc->chip->HostDiagnostic);
3918
3919 /* don't access any registers for 50 milliseconds */
3920 msleep(50);
3921
3922 /* 300 second max wait */
3923 for (count = 0; count < 3000000 ; count++) {
3924
3925 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3926
3927 if (host_diagnostic == 0xFFFFFFFF)
3928 goto out;
3929 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
3930 break;
3931
3932 /* wait 100 msec */
3933 if (sleep_flag == CAN_SLEEP)
3934 msleep(1);
3935 else
3936 mdelay(1);
3937 }
3938
3939 if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
3940
3941 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
3942 "assuming the HCB Address points to good F/W\n",
3943 ioc->name));
3944 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
3945 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
3946 writel(host_diagnostic, &ioc->chip->HostDiagnostic);
3947
3948 drsprintk(ioc, printk(MPT2SAS_INFO_FMT
3949 "re-enable the HCDW\n", ioc->name));
3950 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
3951 &ioc->chip->HCBSize);
3952 }
3953
3954 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
3955 ioc->name));
3956 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
3957 &ioc->chip->HostDiagnostic);
3958
3959 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
3960 "diagnostic register\n", ioc->name));
3961 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3962
3963 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
3964 "READY state\n", ioc->name));
3965 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
3966 sleep_flag);
3967 if (ioc_state) {
3968 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
3969 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
3970 goto out;
3971 }
3972
3973 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
3974 return 0;
3975
3976 out:
3977 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
3978 return -EFAULT;
3979 }
3980
3981 /**
3982 * _base_make_ioc_ready - put controller in READY state
3983 * @ioc: per adapter object
3984 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3985 * @type: FORCE_BIG_HAMMER or SOFT_RESET
3986 *
3987 * Returns 0 for success, non-zero for failure.
3988 */
3989 static int
3990 _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
3991 enum reset_type type)
3992 {
3993 u32 ioc_state;
3994 int rc;
3995
3996 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3997 __func__));
3998
3999 if (ioc->pci_error_recovery)
4000 return 0;
4001
4002 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
4003 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
4004 ioc->name, __func__, ioc_state));
4005
4006 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
4007 return 0;
4008
4009 if (ioc_state & MPI2_DOORBELL_USED) {
4010 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
4011 "active!\n", ioc->name));
4012 goto issue_diag_reset;
4013 }
4014
4015 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
4016 mpt2sas_base_fault_info(ioc, ioc_state &
4017 MPI2_DOORBELL_DATA_MASK);
4018 goto issue_diag_reset;
4019 }
4020
4021 if (type == FORCE_BIG_HAMMER)
4022 goto issue_diag_reset;
4023
4024 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
4025 if (!(_base_send_ioc_reset(ioc,
4026 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
4027 ioc->ioc_reset_count++;
4028 return 0;
4029 }
4030
4031 issue_diag_reset:
4032 rc = _base_diag_reset(ioc, CAN_SLEEP);
4033 ioc->ioc_reset_count++;
4034 return rc;
4035 }
4036
4037 /**
4038 * _base_make_ioc_operational - put controller in OPERATIONAL state
4039 * @ioc: per adapter object
4040 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4041 *
4042 * Returns 0 for success, non-zero for failure.
4043 */
4044 static int
4045 _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
4046 {
4047 int r, i;
4048 unsigned long flags;
4049 u32 reply_address;
4050 u16 smid;
4051 struct _tr_list *delayed_tr, *delayed_tr_next;
4052 u8 hide_flag;
4053 struct adapter_reply_queue *reply_q;
4054 long reply_post_free;
4055 u32 reply_post_free_sz;
4056
4057 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4058 __func__));
4059
4060 /* clean the delayed target reset list */
4061 list_for_each_entry_safe(delayed_tr, delayed_tr_next,
4062 &ioc->delayed_tr_list, list) {
4063 list_del(&delayed_tr->list);
4064 kfree(delayed_tr);
4065 }
4066
4067 list_for_each_entry_safe(delayed_tr, delayed_tr_next,
4068 &ioc->delayed_tr_volume_list, list) {
4069 list_del(&delayed_tr->list);
4070 kfree(delayed_tr);
4071 }
4072
4073 /* initialize the scsi lookup free list */
4074 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
4075 INIT_LIST_HEAD(&ioc->free_list);
4076 smid = 1;
4077 for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
4078 INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
4079 ioc->scsi_lookup[i].cb_idx = 0xFF;
4080 ioc->scsi_lookup[i].smid = smid;
4081 ioc->scsi_lookup[i].scmd = NULL;
4082 ioc->scsi_lookup[i].direct_io = 0;
4083 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
4084 &ioc->free_list);
4085 }
4086
4087 /* hi-priority queue */
4088 INIT_LIST_HEAD(&ioc->hpr_free_list);
4089 smid = ioc->hi_priority_smid;
4090 for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
4091 ioc->hpr_lookup[i].cb_idx = 0xFF;
4092 ioc->hpr_lookup[i].smid = smid;
4093 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
4094 &ioc->hpr_free_list);
4095 }
4096
4097 /* internal queue */
4098 INIT_LIST_HEAD(&ioc->internal_free_list);
4099 smid = ioc->internal_smid;
4100 for (i = 0; i < ioc->internal_depth; i++, smid++) {
4101 ioc->internal_lookup[i].cb_idx = 0xFF;
4102 ioc->internal_lookup[i].smid = smid;
4103 list_add_tail(&ioc->internal_lookup[i].tracker_list,
4104 &ioc->internal_free_list);
4105 }
4106
4107 /* chain pool */
4108 INIT_LIST_HEAD(&ioc->free_chain_list);
4109 for (i = 0; i < ioc->chain_depth; i++)
4110 list_add_tail(&ioc->chain_lookup[i].tracker_list,
4111 &ioc->free_chain_list);
4112
4113 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
4114
4115 /* initialize Reply Free Queue */
4116 for (i = 0, reply_address = (u32)ioc->reply_dma ;
4117 i < ioc->reply_free_queue_depth ; i++, reply_address +=
4118 ioc->reply_sz)
4119 ioc->reply_free[i] = cpu_to_le32(reply_address);
4120
4121 /* initialize reply queues */
4122 if (ioc->is_driver_loading)
4123 _base_assign_reply_queues(ioc);
4124
4125 /* initialize Reply Post Free Queue */
4126 reply_post_free = (long)ioc->reply_post_free;
4127 reply_post_free_sz = ioc->reply_post_queue_depth *
4128 sizeof(Mpi2DefaultReplyDescriptor_t);
4129 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
4130 reply_q->reply_post_host_index = 0;
4131 reply_q->reply_post_free = (Mpi2ReplyDescriptorsUnion_t *)
4132 reply_post_free;
4133 for (i = 0; i < ioc->reply_post_queue_depth; i++)
4134 reply_q->reply_post_free[i].Words =
4135 cpu_to_le64(ULLONG_MAX);
4136 if (!_base_is_controller_msix_enabled(ioc))
4137 goto skip_init_reply_post_free_queue;
4138 reply_post_free += reply_post_free_sz;
4139 }
4140 skip_init_reply_post_free_queue:
4141
4142 r = _base_send_ioc_init(ioc, sleep_flag);
4143 if (r)
4144 return r;
4145
4146 /* initialize reply free host index */
4147 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
4148 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
4149
4150 /* initialize reply post host index */
4151 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
4152 writel(reply_q->msix_index << MPI2_RPHI_MSIX_INDEX_SHIFT,
4153 &ioc->chip->ReplyPostHostIndex);
4154 if (!_base_is_controller_msix_enabled(ioc))
4155 goto skip_init_reply_post_host_index;
4156 }
4157
4158 skip_init_reply_post_host_index:
4159
4160 _base_unmask_interrupts(ioc);
4161
4162 r = _base_event_notification(ioc, sleep_flag);
4163 if (r)
4164 return r;
4165
4166 if (sleep_flag == CAN_SLEEP)
4167 _base_static_config_pages(ioc);
4168
4169
4170 if (ioc->is_driver_loading) {
4171 if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier
4172 == 0x80) {
4173 hide_flag = (u8) (
4174 le32_to_cpu(ioc->manu_pg10.OEMSpecificFlags0) &
4175 MFG_PAGE10_HIDE_SSDS_MASK);
4176 if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
4177 ioc->mfg_pg10_hide_flag = hide_flag;
4178 }
4179 ioc->wait_for_discovery_to_complete =
4180 _base_determine_wait_on_discovery(ioc);
4181 return r; /* scan_start and scan_finished support */
4182 }
4183 r = _base_send_port_enable(ioc, sleep_flag);
4184 if (r)
4185 return r;
4186
4187 return r;
4188 }
4189
4190 /**
4191 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
4192 * @ioc: per adapter object
4193 *
4194 * Return nothing.
4195 */
4196 void
4197 mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
4198 {
4199 struct pci_dev *pdev = ioc->pdev;
4200
4201 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4202 __func__));
4203
4204 _base_mask_interrupts(ioc);
4205 ioc->shost_recovery = 1;
4206 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
4207 ioc->shost_recovery = 0;
4208 _base_free_irq(ioc);
4209 _base_disable_msix(ioc);
4210 if (ioc->chip_phys)
4211 iounmap(ioc->chip);
4212 ioc->chip_phys = 0;
4213 pci_release_selected_regions(ioc->pdev, ioc->bars);
4214 pci_disable_pcie_error_reporting(pdev);
4215 pci_disable_device(pdev);
4216 return;
4217 }
4218
4219 /**
4220 * mpt2sas_base_attach - attach controller instance
4221 * @ioc: per adapter object
4222 *
4223 * Returns 0 for success, non-zero for failure.
4224 */
4225 int
4226 mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
4227 {
4228 int r, i;
4229 int cpu_id, last_cpu_id = 0;
4230
4231 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4232 __func__));
4233
4234 /* setup cpu_msix_table */
4235 ioc->cpu_count = num_online_cpus();
4236 for_each_online_cpu(cpu_id)
4237 last_cpu_id = cpu_id;
4238 ioc->cpu_msix_table_sz = last_cpu_id + 1;
4239 ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
4240 ioc->reply_queue_count = 1;
4241 if (!ioc->cpu_msix_table) {
4242 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
4243 "cpu_msix_table failed!!!\n", ioc->name));
4244 r = -ENOMEM;
4245 goto out_free_resources;
4246 }
4247
4248 if (ioc->is_warpdrive) {
4249 ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz,
4250 sizeof(resource_size_t *), GFP_KERNEL);
4251 if (!ioc->reply_post_host_index) {
4252 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation "
4253 "for cpu_msix_table failed!!!\n", ioc->name));
4254 r = -ENOMEM;
4255 goto out_free_resources;
4256 }
4257 }
4258
4259 r = mpt2sas_base_map_resources(ioc);
4260 if (r)
4261 goto out_free_resources;
4262
4263 if (ioc->is_warpdrive) {
4264 ioc->reply_post_host_index[0] =
4265 (resource_size_t *)&ioc->chip->ReplyPostHostIndex;
4266
4267 for (i = 1; i < ioc->cpu_msix_table_sz; i++)
4268 ioc->reply_post_host_index[i] = (resource_size_t *)
4269 ((u8 *)&ioc->chip->Doorbell + (0x4000 + ((i - 1)
4270 * 4)));
4271 }
4272
4273 pci_set_drvdata(ioc->pdev, ioc->shost);
4274 r = _base_get_ioc_facts(ioc, CAN_SLEEP);
4275 if (r)
4276 goto out_free_resources;
4277
4278 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
4279 if (r)
4280 goto out_free_resources;
4281
4282 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
4283 sizeof(struct mpt2sas_port_facts), GFP_KERNEL);
4284 if (!ioc->pfacts) {
4285 r = -ENOMEM;
4286 goto out_free_resources;
4287 }
4288
4289 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
4290 r = _base_get_port_facts(ioc, i, CAN_SLEEP);
4291 if (r)
4292 goto out_free_resources;
4293 }
4294
4295 r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
4296 if (r)
4297 goto out_free_resources;
4298
4299 init_waitqueue_head(&ioc->reset_wq);
4300 /* allocate memory pd handle bitmask list */
4301 ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
4302 if (ioc->facts.MaxDevHandle % 8)
4303 ioc->pd_handles_sz++;
4304 ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
4305 GFP_KERNEL);
4306 if (!ioc->pd_handles) {
4307 r = -ENOMEM;
4308 goto out_free_resources;
4309 }
4310 ioc->blocking_handles = kzalloc(ioc->pd_handles_sz,
4311 GFP_KERNEL);
4312 if (!ioc->blocking_handles) {
4313 r = -ENOMEM;
4314 goto out_free_resources;
4315 }
4316 ioc->fwfault_debug = mpt2sas_fwfault_debug;
4317
4318 /* base internal command bits */
4319 mutex_init(&ioc->base_cmds.mutex);
4320 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4321 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
4322
4323 /* port_enable command bits */
4324 ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4325 ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
4326
4327 /* transport internal command bits */
4328 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4329 ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
4330 mutex_init(&ioc->transport_cmds.mutex);
4331
4332 /* scsih internal command bits */
4333 ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4334 ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
4335 mutex_init(&ioc->scsih_cmds.mutex);
4336
4337 /* task management internal command bits */
4338 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4339 ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
4340 mutex_init(&ioc->tm_cmds.mutex);
4341
4342 /* config page internal command bits */
4343 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4344 ioc->config_cmds.status = MPT2_CMD_NOT_USED;
4345 mutex_init(&ioc->config_cmds.mutex);
4346
4347 /* ctl module internal command bits */
4348 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
4349 ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
4350 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
4351 mutex_init(&ioc->ctl_cmds.mutex);
4352
4353 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
4354 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
4355 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
4356 !ioc->ctl_cmds.sense) {
4357 r = -ENOMEM;
4358 goto out_free_resources;
4359 }
4360
4361 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
4362 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
4363 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
4364 r = -ENOMEM;
4365 goto out_free_resources;
4366 }
4367
4368 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
4369 ioc->event_masks[i] = -1;
4370
4371 /* here we enable the events we care about */
4372 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
4373 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
4374 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
4375 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
4376 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
4377 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
4378 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
4379 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
4380 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
4381 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
4382 r = _base_make_ioc_operational(ioc, CAN_SLEEP);
4383 if (r)
4384 goto out_free_resources;
4385
4386 if (missing_delay[0] != -1 && missing_delay[1] != -1)
4387 _base_update_missing_delay(ioc, missing_delay[0],
4388 missing_delay[1]);
4389
4390 return 0;
4391
4392 out_free_resources:
4393
4394 ioc->remove_host = 1;
4395 mpt2sas_base_free_resources(ioc);
4396 _base_release_memory_pools(ioc);
4397 pci_set_drvdata(ioc->pdev, NULL);
4398 kfree(ioc->cpu_msix_table);
4399 if (ioc->is_warpdrive)
4400 kfree(ioc->reply_post_host_index);
4401 kfree(ioc->pd_handles);
4402 kfree(ioc->blocking_handles);
4403 kfree(ioc->tm_cmds.reply);
4404 kfree(ioc->transport_cmds.reply);
4405 kfree(ioc->scsih_cmds.reply);
4406 kfree(ioc->config_cmds.reply);
4407 kfree(ioc->base_cmds.reply);
4408 kfree(ioc->port_enable_cmds.reply);
4409 kfree(ioc->ctl_cmds.reply);
4410 kfree(ioc->ctl_cmds.sense);
4411 kfree(ioc->pfacts);
4412 ioc->ctl_cmds.reply = NULL;
4413 ioc->base_cmds.reply = NULL;
4414 ioc->tm_cmds.reply = NULL;
4415 ioc->scsih_cmds.reply = NULL;
4416 ioc->transport_cmds.reply = NULL;
4417 ioc->config_cmds.reply = NULL;
4418 ioc->pfacts = NULL;
4419 return r;
4420 }
4421
4422
4423 /**
4424 * mpt2sas_base_detach - remove controller instance
4425 * @ioc: per adapter object
4426 *
4427 * Return nothing.
4428 */
4429 void
4430 mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
4431 {
4432
4433 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4434 __func__));
4435
4436 mpt2sas_base_stop_watchdog(ioc);
4437 mpt2sas_base_free_resources(ioc);
4438 _base_release_memory_pools(ioc);
4439 pci_set_drvdata(ioc->pdev, NULL);
4440 kfree(ioc->cpu_msix_table);
4441 if (ioc->is_warpdrive)
4442 kfree(ioc->reply_post_host_index);
4443 kfree(ioc->pd_handles);
4444 kfree(ioc->blocking_handles);
4445 kfree(ioc->pfacts);
4446 kfree(ioc->ctl_cmds.reply);
4447 kfree(ioc->ctl_cmds.sense);
4448 kfree(ioc->base_cmds.reply);
4449 kfree(ioc->port_enable_cmds.reply);
4450 kfree(ioc->tm_cmds.reply);
4451 kfree(ioc->transport_cmds.reply);
4452 kfree(ioc->scsih_cmds.reply);
4453 kfree(ioc->config_cmds.reply);
4454 }
4455
4456 /**
4457 * _base_reset_handler - reset callback handler (for base)
4458 * @ioc: per adapter object
4459 * @reset_phase: phase
4460 *
4461 * The handler for doing any required cleanup or initialization.
4462 *
4463 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
4464 * MPT2_IOC_DONE_RESET
4465 *
4466 * Return nothing.
4467 */
4468 static void
4469 _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
4470 {
4471 mpt2sas_scsih_reset_handler(ioc, reset_phase);
4472 mpt2sas_ctl_reset_handler(ioc, reset_phase);
4473 switch (reset_phase) {
4474 case MPT2_IOC_PRE_RESET:
4475 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4476 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
4477 break;
4478 case MPT2_IOC_AFTER_RESET:
4479 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4480 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
4481 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
4482 ioc->transport_cmds.status |= MPT2_CMD_RESET;
4483 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
4484 complete(&ioc->transport_cmds.done);
4485 }
4486 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
4487 ioc->base_cmds.status |= MPT2_CMD_RESET;
4488 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
4489 complete(&ioc->base_cmds.done);
4490 }
4491 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
4492 ioc->port_enable_failed = 1;
4493 ioc->port_enable_cmds.status |= MPT2_CMD_RESET;
4494 mpt2sas_base_free_smid(ioc, ioc->port_enable_cmds.smid);
4495 if (ioc->is_driver_loading) {
4496 ioc->start_scan_failed =
4497 MPI2_IOCSTATUS_INTERNAL_ERROR;
4498 ioc->start_scan = 0;
4499 ioc->port_enable_cmds.status =
4500 MPT2_CMD_NOT_USED;
4501 } else
4502 complete(&ioc->port_enable_cmds.done);
4503
4504 }
4505 if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
4506 ioc->config_cmds.status |= MPT2_CMD_RESET;
4507 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
4508 ioc->config_cmds.smid = USHRT_MAX;
4509 complete(&ioc->config_cmds.done);
4510 }
4511 break;
4512 case MPT2_IOC_DONE_RESET:
4513 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4514 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
4515 break;
4516 }
4517 }
4518
4519 /**
4520 * _wait_for_commands_to_complete - reset controller
4521 * @ioc: Pointer to MPT_ADAPTER structure
4522 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4523 *
4524 * This function waiting(3s) for all pending commands to complete
4525 * prior to putting controller in reset.
4526 */
4527 static void
4528 _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
4529 {
4530 u32 ioc_state;
4531 unsigned long flags;
4532 u16 i;
4533
4534 ioc->pending_io_count = 0;
4535 if (sleep_flag != CAN_SLEEP)
4536 return;
4537
4538 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
4539 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
4540 return;
4541
4542 /* pending command count */
4543 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
4544 for (i = 0; i < ioc->scsiio_depth; i++)
4545 if (ioc->scsi_lookup[i].cb_idx != 0xFF)
4546 ioc->pending_io_count++;
4547 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
4548
4549 if (!ioc->pending_io_count)
4550 return;
4551
4552 /* wait for pending commands to complete */
4553 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
4554 }
4555
4556 /**
4557 * mpt2sas_base_hard_reset_handler - reset controller
4558 * @ioc: Pointer to MPT_ADAPTER structure
4559 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4560 * @type: FORCE_BIG_HAMMER or SOFT_RESET
4561 *
4562 * Returns 0 for success, non-zero for failure.
4563 */
4564 int
4565 mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
4566 enum reset_type type)
4567 {
4568 int r;
4569 unsigned long flags;
4570
4571 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
4572 __func__));
4573
4574 if (ioc->pci_error_recovery) {
4575 printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
4576 ioc->name, __func__);
4577 r = 0;
4578 goto out_unlocked;
4579 }
4580
4581 if (mpt2sas_fwfault_debug)
4582 mpt2sas_halt_firmware(ioc);
4583
4584 /* TODO - What we really should be doing is pulling
4585 * out all the code associated with NO_SLEEP; its never used.
4586 * That is legacy code from mpt fusion driver, ported over.
4587 * I will leave this BUG_ON here for now till its been resolved.
4588 */
4589 BUG_ON(sleep_flag == NO_SLEEP);
4590
4591 /* wait for an active reset in progress to complete */
4592 if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
4593 do {
4594 ssleep(1);
4595 } while (ioc->shost_recovery == 1);
4596 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
4597 __func__));
4598 return ioc->ioc_reset_in_progress_status;
4599 }
4600
4601 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
4602 ioc->shost_recovery = 1;
4603 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
4604
4605 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
4606 _wait_for_commands_to_complete(ioc, sleep_flag);
4607 _base_mask_interrupts(ioc);
4608 r = _base_make_ioc_ready(ioc, sleep_flag, type);
4609 if (r)
4610 goto out;
4611 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
4612
4613 /* If this hard reset is called while port enable is active, then
4614 * there is no reason to call make_ioc_operational
4615 */
4616 if (ioc->is_driver_loading && ioc->port_enable_failed) {
4617 ioc->remove_host = 1;
4618 r = -EFAULT;
4619 goto out;
4620 }
4621 r = _base_make_ioc_operational(ioc, sleep_flag);
4622 if (!r)
4623 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
4624 out:
4625 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
4626 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
4627
4628 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
4629 ioc->ioc_reset_in_progress_status = r;
4630 ioc->shost_recovery = 0;
4631 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
4632 mutex_unlock(&ioc->reset_in_progress_mutex);
4633
4634 out_unlocked:
4635 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
4636 __func__));
4637 return r;
4638 }
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree