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netxen: download firmware in pci probe
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / net / netxen / netxen_nic_init.c
blob70d1b22ced220c601276f47a4e6e92b50a95f7a0
1 /*
2 * Copyright (C) 2003 - 2006 NetXen, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
19 *
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
22 *
23 * Contact Information:
24 * info@netxen.com
25 * NetXen,
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
28 *
29 *
30 * Source file for NIC routines to initialize the Phantom Hardware
31 *
32 */
33
34 #include <linux/netdevice.h>
35 #include <linux/delay.h>
36 #include "netxen_nic.h"
37 #include "netxen_nic_hw.h"
38 #include "netxen_nic_phan_reg.h"
39
40 struct crb_addr_pair {
41 u32 addr;
42 u32 data;
43 };
44
45 unsigned long last_schedule_time;
46
47 #define NETXEN_MAX_CRB_XFORM 60
48 static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
49 #define NETXEN_ADDR_ERROR (0xffffffff)
50
51 #define crb_addr_transform(name) \
52 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
53 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
54
55 #define NETXEN_NIC_XDMA_RESET 0x8000ff
56
57 static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
58 uint32_t ctx, uint32_t ringid);
59
60 #if 0
61 static void netxen_nic_locked_write_reg(struct netxen_adapter *adapter,
62 unsigned long off, int *data)
63 {
64 void __iomem *addr = pci_base_offset(adapter, off);
65 writel(*data, addr);
66 }
67 #endif /* 0 */
68
69 static void crb_addr_transform_setup(void)
70 {
71 crb_addr_transform(XDMA);
72 crb_addr_transform(TIMR);
73 crb_addr_transform(SRE);
74 crb_addr_transform(SQN3);
75 crb_addr_transform(SQN2);
76 crb_addr_transform(SQN1);
77 crb_addr_transform(SQN0);
78 crb_addr_transform(SQS3);
79 crb_addr_transform(SQS2);
80 crb_addr_transform(SQS1);
81 crb_addr_transform(SQS0);
82 crb_addr_transform(RPMX7);
83 crb_addr_transform(RPMX6);
84 crb_addr_transform(RPMX5);
85 crb_addr_transform(RPMX4);
86 crb_addr_transform(RPMX3);
87 crb_addr_transform(RPMX2);
88 crb_addr_transform(RPMX1);
89 crb_addr_transform(RPMX0);
90 crb_addr_transform(ROMUSB);
91 crb_addr_transform(SN);
92 crb_addr_transform(QMN);
93 crb_addr_transform(QMS);
94 crb_addr_transform(PGNI);
95 crb_addr_transform(PGND);
96 crb_addr_transform(PGN3);
97 crb_addr_transform(PGN2);
98 crb_addr_transform(PGN1);
99 crb_addr_transform(PGN0);
100 crb_addr_transform(PGSI);
101 crb_addr_transform(PGSD);
102 crb_addr_transform(PGS3);
103 crb_addr_transform(PGS2);
104 crb_addr_transform(PGS1);
105 crb_addr_transform(PGS0);
106 crb_addr_transform(PS);
107 crb_addr_transform(PH);
108 crb_addr_transform(NIU);
109 crb_addr_transform(I2Q);
110 crb_addr_transform(EG);
111 crb_addr_transform(MN);
112 crb_addr_transform(MS);
113 crb_addr_transform(CAS2);
114 crb_addr_transform(CAS1);
115 crb_addr_transform(CAS0);
116 crb_addr_transform(CAM);
117 crb_addr_transform(C2C1);
118 crb_addr_transform(C2C0);
119 crb_addr_transform(SMB);
120 }
121
122 int netxen_init_firmware(struct netxen_adapter *adapter)
123 {
124 u32 state = 0, loops = 0, err = 0;
125
126 /* Window 1 call */
127 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
128
129 if (state == PHAN_INITIALIZE_ACK)
130 return 0;
131
132 while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
133 udelay(100);
134 /* Window 1 call */
135 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
136
137 loops++;
138 }
139 if (loops >= 2000) {
140 printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
141 state);
142 err = -EIO;
143 return err;
144 }
145 /* Window 1 call */
146 writel(INTR_SCHEME_PERPORT,
147 NETXEN_CRB_NORMALIZE(adapter, CRB_NIC_CAPABILITIES_HOST));
148 writel(MSI_MODE_MULTIFUNC,
149 NETXEN_CRB_NORMALIZE(adapter, CRB_NIC_MSI_MODE_HOST));
150 writel(MPORT_MULTI_FUNCTION_MODE,
151 NETXEN_CRB_NORMALIZE(adapter, CRB_MPORT_MODE));
152 writel(PHAN_INITIALIZE_ACK,
153 NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
154
155 return err;
156 }
157
158 #define NETXEN_ADDR_LIMIT 0xffffffffULL
159
160 void *netxen_alloc(struct pci_dev *pdev, size_t sz, dma_addr_t * ptr,
161 struct pci_dev **used_dev)
162 {
163 void *addr;
164
165 addr = pci_alloc_consistent(pdev, sz, ptr);
166 if ((unsigned long long)(*ptr) < NETXEN_ADDR_LIMIT) {
167 *used_dev = pdev;
168 return addr;
169 }
170 pci_free_consistent(pdev, sz, addr, *ptr);
171 addr = pci_alloc_consistent(NULL, sz, ptr);
172 *used_dev = NULL;
173 return addr;
174 }
175
176 void netxen_initialize_adapter_sw(struct netxen_adapter *adapter)
177 {
178 int ctxid, ring;
179 u32 i;
180 u32 num_rx_bufs = 0;
181 struct netxen_rcv_desc_ctx *rcv_desc;
182
183 DPRINTK(INFO, "initializing some queues: %p\n", adapter);
184 for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
185 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
186 struct netxen_rx_buffer *rx_buf;
187 rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring];
188 rcv_desc->begin_alloc = 0;
189 rx_buf = rcv_desc->rx_buf_arr;
190 num_rx_bufs = rcv_desc->max_rx_desc_count;
191 /*
192 * Now go through all of them, set reference handles
193 * and put them in the queues.
194 */
195 for (i = 0; i < num_rx_bufs; i++) {
196 rx_buf->ref_handle = i;
197 rx_buf->state = NETXEN_BUFFER_FREE;
198 DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:"
199 "%p\n", ctxid, i, rx_buf);
200 rx_buf++;
201 }
202 }
203 }
204 }
205
206 void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
207 {
208 switch (adapter->ahw.board_type) {
209 case NETXEN_NIC_GBE:
210 adapter->enable_phy_interrupts =
211 netxen_niu_gbe_enable_phy_interrupts;
212 adapter->disable_phy_interrupts =
213 netxen_niu_gbe_disable_phy_interrupts;
214 adapter->handle_phy_intr = netxen_nic_gbe_handle_phy_intr;
215 adapter->macaddr_set = netxen_niu_macaddr_set;
216 adapter->set_mtu = netxen_nic_set_mtu_gb;
217 adapter->set_promisc = netxen_niu_set_promiscuous_mode;
218 adapter->unset_promisc = netxen_niu_set_promiscuous_mode;
219 adapter->phy_read = netxen_niu_gbe_phy_read;
220 adapter->phy_write = netxen_niu_gbe_phy_write;
221 adapter->init_niu = netxen_nic_init_niu_gb;
222 adapter->stop_port = netxen_niu_disable_gbe_port;
223 break;
224
225 case NETXEN_NIC_XGBE:
226 adapter->enable_phy_interrupts =
227 netxen_niu_xgbe_enable_phy_interrupts;
228 adapter->disable_phy_interrupts =
229 netxen_niu_xgbe_disable_phy_interrupts;
230 adapter->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr;
231 adapter->macaddr_set = netxen_niu_xg_macaddr_set;
232 adapter->set_mtu = netxen_nic_set_mtu_xgb;
233 adapter->init_port = netxen_niu_xg_init_port;
234 adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
235 adapter->unset_promisc = netxen_niu_xg_set_promiscuous_mode;
236 adapter->stop_port = netxen_niu_disable_xg_port;
237 break;
238
239 default:
240 break;
241 }
242 }
243
244 /*
245 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
246 * address to external PCI CRB address.
247 */
248 static u32 netxen_decode_crb_addr(u32 addr)
249 {
250 int i;
251 u32 base_addr, offset, pci_base;
252
253 crb_addr_transform_setup();
254
255 pci_base = NETXEN_ADDR_ERROR;
256 base_addr = addr & 0xfff00000;
257 offset = addr & 0x000fffff;
258
259 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
260 if (crb_addr_xform[i] == base_addr) {
261 pci_base = i << 20;
262 break;
263 }
264 }
265 if (pci_base == NETXEN_ADDR_ERROR)
266 return pci_base;
267 else
268 return (pci_base + offset);
269 }
270
271 static long rom_max_timeout = 100;
272 static long rom_lock_timeout = 10000;
273 static long rom_write_timeout = 700;
274
275 static int rom_lock(struct netxen_adapter *adapter)
276 {
277 int iter;
278 u32 done = 0;
279 int timeout = 0;
280
281 while (!done) {
282 /* acquire semaphore2 from PCI HW block */
283 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK),
284 &done);
285 if (done == 1)
286 break;
287 if (timeout >= rom_lock_timeout)
288 return -EIO;
289
290 timeout++;
291 /*
292 * Yield CPU
293 */
294 if (!in_atomic())
295 schedule();
296 else {
297 for (iter = 0; iter < 20; iter++)
298 cpu_relax(); /*This a nop instr on i386 */
299 }
300 }
301 netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
302 return 0;
303 }
304
305 static int netxen_wait_rom_done(struct netxen_adapter *adapter)
306 {
307 long timeout = 0;
308 long done = 0;
309
310 while (done == 0) {
311 done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS);
312 done &= 2;
313 timeout++;
314 if (timeout >= rom_max_timeout) {
315 printk("Timeout reached waiting for rom done");
316 return -EIO;
317 }
318 }
319 return 0;
320 }
321
322 static int netxen_rom_wren(struct netxen_adapter *adapter)
323 {
324 /* Set write enable latch in ROM status register */
325 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
326 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
327 M25P_INSTR_WREN);
328 if (netxen_wait_rom_done(adapter)) {
329 return -1;
330 }
331 return 0;
332 }
333
334 static unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter,
335 unsigned int addr)
336 {
337 unsigned int data = 0xdeaddead;
338 data = netxen_nic_reg_read(adapter, addr);
339 return data;
340 }
341
342 static int netxen_do_rom_rdsr(struct netxen_adapter *adapter)
343 {
344 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
345 M25P_INSTR_RDSR);
346 if (netxen_wait_rom_done(adapter)) {
347 return -1;
348 }
349 return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);
350 }
351
352 static void netxen_rom_unlock(struct netxen_adapter *adapter)
353 {
354 u32 val;
355
356 /* release semaphore2 */
357 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);
358
359 }
360
361 static int netxen_rom_wip_poll(struct netxen_adapter *adapter)
362 {
363 long timeout = 0;
364 long wip = 1;
365 int val;
366 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
367 while (wip != 0) {
368 val = netxen_do_rom_rdsr(adapter);
369 wip = val & 1;
370 timeout++;
371 if (timeout > rom_max_timeout) {
372 return -1;
373 }
374 }
375 return 0;
376 }
377
378 static int do_rom_fast_write(struct netxen_adapter *adapter, int addr,
379 int data)
380 {
381 if (netxen_rom_wren(adapter)) {
382 return -1;
383 }
384 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
385 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
386 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
387 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
388 M25P_INSTR_PP);
389 if (netxen_wait_rom_done(adapter)) {
390 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
391 return -1;
392 }
393
394 return netxen_rom_wip_poll(adapter);
395 }
396
397 static int do_rom_fast_read(struct netxen_adapter *adapter,
398 int addr, int *valp)
399 {
400 cond_resched();
401
402 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
403 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
404 udelay(100); /* prevent bursting on CRB */
405 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
406 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
407 if (netxen_wait_rom_done(adapter)) {
408 printk("Error waiting for rom done\n");
409 return -EIO;
410 }
411 /* reset abyte_cnt and dummy_byte_cnt */
412 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
413 udelay(100); /* prevent bursting on CRB */
414 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
415
416 *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA);
417 return 0;
418 }
419
420 static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
421 u8 *bytes, size_t size)
422 {
423 int addridx;
424 int ret = 0;
425
426 for (addridx = addr; addridx < (addr + size); addridx += 4) {
427 int v;
428 ret = do_rom_fast_read(adapter, addridx, &v);
429 if (ret != 0)
430 break;
431 *(__le32 *)bytes = cpu_to_le32(v);
432 bytes += 4;
433 }
434
435 return ret;
436 }
437
438 int
439 netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
440 u8 *bytes, size_t size)
441 {
442 int ret;
443
444 ret = rom_lock(adapter);
445 if (ret < 0)
446 return ret;
447
448 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
449
450 netxen_rom_unlock(adapter);
451 return ret;
452 }
453
454 int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
455 {
456 int ret;
457
458 if (rom_lock(adapter) != 0)
459 return -EIO;
460
461 ret = do_rom_fast_read(adapter, addr, valp);
462 netxen_rom_unlock(adapter);
463 return ret;
464 }
465
466 #if 0
467 int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data)
468 {
469 int ret = 0;
470
471 if (rom_lock(adapter) != 0) {
472 return -1;
473 }
474 ret = do_rom_fast_write(adapter, addr, data);
475 netxen_rom_unlock(adapter);
476 return ret;
477 }
478 #endif /* 0 */
479
480 static int do_rom_fast_write_words(struct netxen_adapter *adapter,
481 int addr, u8 *bytes, size_t size)
482 {
483 int addridx = addr;
484 int ret = 0;
485
486 while (addridx < (addr + size)) {
487 int last_attempt = 0;
488 int timeout = 0;
489 int data;
490
491 data = le32_to_cpu((*(__le32*)bytes));
492 ret = do_rom_fast_write(adapter, addridx, data);
493 if (ret < 0)
494 return ret;
495
496 while(1) {
497 int data1;
498
499 ret = do_rom_fast_read(adapter, addridx, &data1);
500 if (ret < 0)
501 return ret;
502
503 if (data1 == data)
504 break;
505
506 if (timeout++ >= rom_write_timeout) {
507 if (last_attempt++ < 4) {
508 ret = do_rom_fast_write(adapter,
509 addridx, data);
510 if (ret < 0)
511 return ret;
512 }
513 else {
514 printk(KERN_INFO "Data write did not "
515 "succeed at address 0x%x\n", addridx);
516 break;
517 }
518 }
519 }
520
521 bytes += 4;
522 addridx += 4;
523 }
524
525 return ret;
526 }
527
528 int netxen_rom_fast_write_words(struct netxen_adapter *adapter, int addr,
529 u8 *bytes, size_t size)
530 {
531 int ret = 0;
532
533 ret = rom_lock(adapter);
534 if (ret < 0)
535 return ret;
536
537 ret = do_rom_fast_write_words(adapter, addr, bytes, size);
538 netxen_rom_unlock(adapter);
539
540 return ret;
541 }
542
543 static int netxen_rom_wrsr(struct netxen_adapter *adapter, int data)
544 {
545 int ret;
546
547 ret = netxen_rom_wren(adapter);
548 if (ret < 0)
549 return ret;
550
551 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
552 netxen_crb_writelit_adapter(adapter,
553 NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0x1);
554
555 ret = netxen_wait_rom_done(adapter);
556 if (ret < 0)
557 return ret;
558
559 return netxen_rom_wip_poll(adapter);
560 }
561
562 static int netxen_rom_rdsr(struct netxen_adapter *adapter)
563 {
564 int ret;
565
566 ret = rom_lock(adapter);
567 if (ret < 0)
568 return ret;
569
570 ret = netxen_do_rom_rdsr(adapter);
571 netxen_rom_unlock(adapter);
572 return ret;
573 }
574
575 int netxen_backup_crbinit(struct netxen_adapter *adapter)
576 {
577 int ret = FLASH_SUCCESS;
578 int val;
579 char *buffer = kmalloc(NETXEN_FLASH_SECTOR_SIZE, GFP_KERNEL);
580
581 if (!buffer)
582 return -ENOMEM;
583 /* unlock sector 63 */
584 val = netxen_rom_rdsr(adapter);
585 val = val & 0xe3;
586 ret = netxen_rom_wrsr(adapter, val);
587 if (ret != FLASH_SUCCESS)
588 goto out_kfree;
589
590 ret = netxen_rom_wip_poll(adapter);
591 if (ret != FLASH_SUCCESS)
592 goto out_kfree;
593
594 /* copy sector 0 to sector 63 */
595 ret = netxen_rom_fast_read_words(adapter, NETXEN_CRBINIT_START,
596 buffer, NETXEN_FLASH_SECTOR_SIZE);
597 if (ret != FLASH_SUCCESS)
598 goto out_kfree;
599
600 ret = netxen_rom_fast_write_words(adapter, NETXEN_FIXED_START,
601 buffer, NETXEN_FLASH_SECTOR_SIZE);
602 if (ret != FLASH_SUCCESS)
603 goto out_kfree;
604
605 /* lock sector 63 */
606 val = netxen_rom_rdsr(adapter);
607 if (!(val & 0x8)) {
608 val |= (0x1 << 2);
609 /* lock sector 63 */
610 if (netxen_rom_wrsr(adapter, val) == 0) {
611 ret = netxen_rom_wip_poll(adapter);
612 if (ret != FLASH_SUCCESS)
613 goto out_kfree;
614
615 /* lock SR writes */
616 ret = netxen_rom_wip_poll(adapter);
617 if (ret != FLASH_SUCCESS)
618 goto out_kfree;
619 }
620 }
621
622 out_kfree:
623 kfree(buffer);
624 return ret;
625 }
626
627 static int netxen_do_rom_se(struct netxen_adapter *adapter, int addr)
628 {
629 netxen_rom_wren(adapter);
630 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
631 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
632 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
633 M25P_INSTR_SE);
634 if (netxen_wait_rom_done(adapter)) {
635 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
636 return -1;
637 }
638 return netxen_rom_wip_poll(adapter);
639 }
640
641 static void check_erased_flash(struct netxen_adapter *adapter, int addr)
642 {
643 int i;
644 int val;
645 int count = 0, erased_errors = 0;
646 int range;
647
648 range = (addr == NETXEN_USER_START) ?
649 NETXEN_FIXED_START : addr + NETXEN_FLASH_SECTOR_SIZE;
650
651 for (i = addr; i < range; i += 4) {
652 netxen_rom_fast_read(adapter, i, &val);
653 if (val != 0xffffffff)
654 erased_errors++;
655 count++;
656 }
657
658 if (erased_errors)
659 printk(KERN_INFO "0x%x out of 0x%x words fail to be erased "
660 "for sector address: %x\n", erased_errors, count, addr);
661 }
662
663 int netxen_rom_se(struct netxen_adapter *adapter, int addr)
664 {
665 int ret = 0;
666 if (rom_lock(adapter) != 0) {
667 return -1;
668 }
669 ret = netxen_do_rom_se(adapter, addr);
670 netxen_rom_unlock(adapter);
671 msleep(30);
672 check_erased_flash(adapter, addr);
673
674 return ret;
675 }
676
677 static int netxen_flash_erase_sections(struct netxen_adapter *adapter,
678 int start, int end)
679 {
680 int ret = FLASH_SUCCESS;
681 int i;
682
683 for (i = start; i < end; i++) {
684 ret = netxen_rom_se(adapter, i * NETXEN_FLASH_SECTOR_SIZE);
685 if (ret)
686 break;
687 ret = netxen_rom_wip_poll(adapter);
688 if (ret < 0)
689 return ret;
690 }
691
692 return ret;
693 }
694
695 int
696 netxen_flash_erase_secondary(struct netxen_adapter *adapter)
697 {
698 int ret = FLASH_SUCCESS;
699 int start, end;
700
701 start = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
702 end = NETXEN_USER_START / NETXEN_FLASH_SECTOR_SIZE;
703 ret = netxen_flash_erase_sections(adapter, start, end);
704
705 return ret;
706 }
707
708 int
709 netxen_flash_erase_primary(struct netxen_adapter *adapter)
710 {
711 int ret = FLASH_SUCCESS;
712 int start, end;
713
714 start = NETXEN_PRIMARY_START / NETXEN_FLASH_SECTOR_SIZE;
715 end = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
716 ret = netxen_flash_erase_sections(adapter, start, end);
717
718 return ret;
719 }
720
721 void netxen_halt_pegs(struct netxen_adapter *adapter)
722 {
723 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x3c, 1);
724 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x3c, 1);
725 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x3c, 1);
726 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x3c, 1);
727 }
728
729 int netxen_flash_unlock(struct netxen_adapter *adapter)
730 {
731 int ret = 0;
732
733 ret = netxen_rom_wrsr(adapter, 0);
734 if (ret < 0)
735 return ret;
736
737 ret = netxen_rom_wren(adapter);
738 if (ret < 0)
739 return ret;
740
741 return ret;
742 }
743
744 #define NETXEN_BOARDTYPE 0x4008
745 #define NETXEN_BOARDNUM 0x400c
746 #define NETXEN_CHIPNUM 0x4010
747 #define NETXEN_ROMBUS_RESET 0xFFFFFFFF
748 #define NETXEN_ROM_FIRST_BARRIER 0x800000000ULL
749 #define NETXEN_ROM_FOUND_INIT 0x400
750
751 int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
752 {
753 int addr, val;
754 int n, i;
755 int init_delay = 0;
756 struct crb_addr_pair *buf;
757 u32 off;
758
759 /* resetall */
760 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
761 NETXEN_ROMBUS_RESET);
762
763 if (verbose) {
764 int val;
765 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
766 printk("P2 ROM board type: 0x%08x\n", val);
767 else
768 printk("Could not read board type\n");
769 if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
770 printk("P2 ROM board num: 0x%08x\n", val);
771 else
772 printk("Could not read board number\n");
773 if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
774 printk("P2 ROM chip num: 0x%08x\n", val);
775 else
776 printk("Could not read chip number\n");
777 }
778
779 if (netxen_rom_fast_read(adapter, 0, &n) == 0
780 && (n & NETXEN_ROM_FIRST_BARRIER)) {
781 n &= ~NETXEN_ROM_ROUNDUP;
782 if (n < NETXEN_ROM_FOUND_INIT) {
783 if (verbose)
784 printk("%s: %d CRB init values found"
785 " in ROM.\n", netxen_nic_driver_name, n);
786 } else {
787 printk("%s:n=0x%x Error! NetXen card flash not"
788 " initialized.\n", __FUNCTION__, n);
789 return -EIO;
790 }
791 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
792 if (buf == NULL) {
793 printk("%s: netxen_pinit_from_rom: Unable to calloc "
794 "memory.\n", netxen_nic_driver_name);
795 return -ENOMEM;
796 }
797 for (i = 0; i < n; i++) {
798 if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0
799 || netxen_rom_fast_read(adapter, 8 * i + 8,
800 &addr) != 0)
801 return -EIO;
802
803 buf[i].addr = addr;
804 buf[i].data = val;
805
806 if (verbose)
807 printk("%s: PCI: 0x%08x == 0x%08x\n",
808 netxen_nic_driver_name, (unsigned int)
809 netxen_decode_crb_addr(addr), val);
810 }
811 for (i = 0; i < n; i++) {
812
813 off = netxen_decode_crb_addr(buf[i].addr);
814 if (off == NETXEN_ADDR_ERROR) {
815 printk(KERN_ERR"CRB init value out of range %x\n",
816 buf[i].addr);
817 continue;
818 }
819 off += NETXEN_PCI_CRBSPACE;
820 /* skipping cold reboot MAGIC */
821 if (off == NETXEN_CAM_RAM(0x1fc))
822 continue;
823
824 /* After writing this register, HW needs time for CRB */
825 /* to quiet down (else crb_window returns 0xffffffff) */
826 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
827 init_delay = 1;
828 /* hold xdma in reset also */
829 buf[i].data = NETXEN_NIC_XDMA_RESET;
830 }
831
832 if (ADDR_IN_WINDOW1(off)) {
833 writel(buf[i].data,
834 NETXEN_CRB_NORMALIZE(adapter, off));
835 } else {
836 netxen_nic_pci_change_crbwindow(adapter, 0);
837 writel(buf[i].data,
838 pci_base_offset(adapter, off));
839
840 netxen_nic_pci_change_crbwindow(adapter, 1);
841 }
842 if (init_delay == 1) {
843 msleep(1000);
844 init_delay = 0;
845 }
846 msleep(1);
847 }
848 kfree(buf);
849
850 /* disable_peg_cache_all */
851
852 /* unreset_net_cache */
853 netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val,
854 4);
855 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
856 (val & 0xffffff0f));
857 /* p2dn replyCount */
858 netxen_crb_writelit_adapter(adapter,
859 NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
860 /* disable_peg_cache 0 */
861 netxen_crb_writelit_adapter(adapter,
862 NETXEN_CRB_PEG_NET_D + 0x4c, 8);
863 /* disable_peg_cache 1 */
864 netxen_crb_writelit_adapter(adapter,
865 NETXEN_CRB_PEG_NET_I + 0x4c, 8);
866
867 /* peg_clr_all */
868
869 /* peg_clr 0 */
870 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8,
871 0);
872 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc,
873 0);
874 /* peg_clr 1 */
875 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8,
876 0);
877 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc,
878 0);
879 /* peg_clr 2 */
880 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8,
881 0);
882 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc,
883 0);
884 /* peg_clr 3 */
885 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8,
886 0);
887 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc,
888 0);
889 }
890 return 0;
891 }
892
893 int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
894 {
895 uint64_t addr;
896 uint32_t hi;
897 uint32_t lo;
898
899 adapter->dummy_dma.addr =
900 pci_alloc_consistent(adapter->ahw.pdev,
901 NETXEN_HOST_DUMMY_DMA_SIZE,
902 &adapter->dummy_dma.phys_addr);
903 if (adapter->dummy_dma.addr == NULL) {
904 printk("%s: ERROR: Could not allocate dummy DMA memory\n",
905 __FUNCTION__);
906 return -ENOMEM;
907 }
908
909 addr = (uint64_t) adapter->dummy_dma.phys_addr;
910 hi = (addr >> 32) & 0xffffffff;
911 lo = addr & 0xffffffff;
912
913 writel(hi, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI));
914 writel(lo, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO));
915
916 return 0;
917 }
918
919 void netxen_free_adapter_offload(struct netxen_adapter *adapter)
920 {
921 int i;
922
923 if (adapter->dummy_dma.addr) {
924 i = 100;
925 do {
926 if (dma_watchdog_shutdown_request(adapter) == 1)
927 break;
928 msleep(50);
929 if (dma_watchdog_shutdown_poll_result(adapter) == 1)
930 break;
931 } while (--i);
932
933 if (i) {
934 pci_free_consistent(adapter->ahw.pdev,
935 NETXEN_HOST_DUMMY_DMA_SIZE,
936 adapter->dummy_dma.addr,
937 adapter->dummy_dma.phys_addr);
938 adapter->dummy_dma.addr = NULL;
939 } else {
940 printk(KERN_ERR "%s: dma_watchdog_shutdown failed\n",
941 adapter->netdev->name);
942 }
943 }
944 }
945
946 int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
947 {
948 u32 val = 0;
949 int retries = 30;
950
951 if (!pegtune_val) {
952 do {
953 val = readl(NETXEN_CRB_NORMALIZE
954 (adapter, CRB_CMDPEG_STATE));
955 pegtune_val = readl(NETXEN_CRB_NORMALIZE
956 (adapter, NETXEN_ROMUSB_GLB_PEGTUNE_DONE));
957
958 if (val == PHAN_INITIALIZE_COMPLETE ||
959 val == PHAN_INITIALIZE_ACK)
960 return 0;
961
962 msleep(1000);
963 } while (--retries);
964 if (!retries) {
965 printk(KERN_WARNING "netxen_phantom_init: init failed, "
966 "pegtune_val=%x\n", pegtune_val);
967 return -1;
968 }
969 }
970
971 return 0;
972 }
973
974 static int netxen_nic_check_temp(struct netxen_adapter *adapter)
975 {
976 struct net_device *netdev = adapter->netdev;
977 uint32_t temp, temp_state, temp_val;
978 int rv = 0;
979
980 temp = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_TEMP_STATE));
981
982 temp_state = nx_get_temp_state(temp);
983 temp_val = nx_get_temp_val(temp);
984
985 if (temp_state == NX_TEMP_PANIC) {
986 printk(KERN_ALERT
987 "%s: Device temperature %d degrees C exceeds"
988 " maximum allowed. Hardware has been shut down.\n",
989 netxen_nic_driver_name, temp_val);
990
991 netif_carrier_off(netdev);
992 netif_stop_queue(netdev);
993 rv = 1;
994 } else if (temp_state == NX_TEMP_WARN) {
995 if (adapter->temp == NX_TEMP_NORMAL) {
996 printk(KERN_ALERT
997 "%s: Device temperature %d degrees C "
998 "exceeds operating range."
999 " Immediate action needed.\n",
1000 netxen_nic_driver_name, temp_val);
1001 }
1002 } else {
1003 if (adapter->temp == NX_TEMP_WARN) {
1004 printk(KERN_INFO
1005 "%s: Device temperature is now %d degrees C"
1006 " in normal range.\n", netxen_nic_driver_name,
1007 temp_val);
1008 }
1009 }
1010 adapter->temp = temp_state;
1011 return rv;
1012 }
1013
1014 void netxen_watchdog_task(struct work_struct *work)
1015 {
1016 struct netxen_adapter *adapter =
1017 container_of(work, struct netxen_adapter, watchdog_task);
1018
1019 if ((adapter->portnum == 0) && netxen_nic_check_temp(adapter))
1020 return;
1021
1022 if (adapter->handle_phy_intr)
1023 adapter->handle_phy_intr(adapter);
1024
1025 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1026 }
1027
1028 /*
1029 * netxen_process_rcv() send the received packet to the protocol stack.
1030 * and if the number of receives exceeds RX_BUFFERS_REFILL, then we
1031 * invoke the routine to send more rx buffers to the Phantom...
1032 */
1033 static void netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
1034 struct status_desc *desc)
1035 {
1036 struct pci_dev *pdev = adapter->pdev;
1037 struct net_device *netdev = adapter->netdev;
1038 u64 sts_data = le64_to_cpu(desc->status_desc_data);
1039 int index = netxen_get_sts_refhandle(sts_data);
1040 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1041 struct netxen_rx_buffer *buffer;
1042 struct sk_buff *skb;
1043 u32 length = netxen_get_sts_totallength(sts_data);
1044 u32 desc_ctx;
1045 struct netxen_rcv_desc_ctx *rcv_desc;
1046 int ret;
1047
1048 desc_ctx = netxen_get_sts_type(sts_data);
1049 if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
1050 printk("%s: %s Bad Rcv descriptor ring\n",
1051 netxen_nic_driver_name, netdev->name);
1052 return;
1053 }
1054
1055 rcv_desc = &recv_ctx->rcv_desc[desc_ctx];
1056 if (unlikely(index > rcv_desc->max_rx_desc_count)) {
1057 DPRINTK(ERR, "Got a buffer index:%x Max is %x\n",
1058 index, rcv_desc->max_rx_desc_count);
1059 return;
1060 }
1061 buffer = &rcv_desc->rx_buf_arr[index];
1062 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1063 buffer->lro_current_frags++;
1064 if (netxen_get_sts_desc_lro_last_frag(desc)) {
1065 buffer->lro_expected_frags =
1066 netxen_get_sts_desc_lro_cnt(desc);
1067 buffer->lro_length = length;
1068 }
1069 if (buffer->lro_current_frags != buffer->lro_expected_frags) {
1070 if (buffer->lro_expected_frags != 0) {
1071 printk("LRO: (refhandle:%x) recv frag. "
1072 "wait for last. flags: %x expected:%d "
1073 "have:%d\n", index,
1074 netxen_get_sts_desc_lro_last_frag(desc),
1075 buffer->lro_expected_frags,
1076 buffer->lro_current_frags);
1077 }
1078 return;
1079 }
1080 }
1081
1082 pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size,
1083 PCI_DMA_FROMDEVICE);
1084
1085 skb = (struct sk_buff *)buffer->skb;
1086
1087 if (likely(adapter->rx_csum &&
1088 netxen_get_sts_status(sts_data) == STATUS_CKSUM_OK)) {
1089 adapter->stats.csummed++;
1090 skb->ip_summed = CHECKSUM_UNNECESSARY;
1091 } else
1092 skb->ip_summed = CHECKSUM_NONE;
1093
1094 skb->dev = netdev;
1095 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1096 /* True length was only available on the last pkt */
1097 skb_put(skb, buffer->lro_length);
1098 } else {
1099 skb_put(skb, length);
1100 }
1101
1102 skb->protocol = eth_type_trans(skb, netdev);
1103
1104 ret = netif_receive_skb(skb);
1105 netdev->last_rx = jiffies;
1106
1107 rcv_desc->rcv_pending--;
1108
1109 /*
1110 * We just consumed one buffer so post a buffer.
1111 */
1112 buffer->skb = NULL;
1113 buffer->state = NETXEN_BUFFER_FREE;
1114 buffer->lro_current_frags = 0;
1115 buffer->lro_expected_frags = 0;
1116
1117 adapter->stats.no_rcv++;
1118 adapter->stats.rxbytes += length;
1119 }
1120
1121 /* Process Receive status ring */
1122 u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
1123 {
1124 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1125 struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
1126 struct status_desc *desc; /* used to read status desc here */
1127 u32 consumer = recv_ctx->status_rx_consumer;
1128 u32 producer = 0;
1129 int count = 0, ring;
1130
1131 while (count < max) {
1132 desc = &desc_head[consumer];
1133 if (!(netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)) {
1134 DPRINTK(ERR, "desc %p ownedby %x\n", desc,
1135 netxen_get_sts_owner(desc));
1136 break;
1137 }
1138 netxen_process_rcv(adapter, ctxid, desc);
1139 netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM);
1140 consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1);
1141 count++;
1142 }
1143 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++)
1144 netxen_post_rx_buffers_nodb(adapter, ctxid, ring);
1145
1146 /* update the consumer index in phantom */
1147 if (count) {
1148 recv_ctx->status_rx_consumer = consumer;
1149 recv_ctx->status_rx_producer = producer;
1150
1151 /* Window = 1 */
1152 writel(consumer,
1153 NETXEN_CRB_NORMALIZE(adapter,
1154 recv_crb_registers[adapter->portnum].
1155 crb_rcv_status_consumer));
1156 }
1157
1158 return count;
1159 }
1160
1161 /* Process Command status ring */
1162 int netxen_process_cmd_ring(struct netxen_adapter *adapter)
1163 {
1164 u32 last_consumer, consumer;
1165 int count = 0, i;
1166 struct netxen_cmd_buffer *buffer;
1167 struct pci_dev *pdev = adapter->pdev;
1168 struct net_device *netdev = adapter->netdev;
1169 struct netxen_skb_frag *frag;
1170 int done = 0;
1171
1172 last_consumer = adapter->last_cmd_consumer;
1173 consumer = le32_to_cpu(*(adapter->cmd_consumer));
1174
1175 while (last_consumer != consumer) {
1176 buffer = &adapter->cmd_buf_arr[last_consumer];
1177 if (buffer->skb) {
1178 frag = &buffer->frag_array[0];
1179 pci_unmap_single(pdev, frag->dma, frag->length,
1180 PCI_DMA_TODEVICE);
1181 frag->dma = 0ULL;
1182 for (i = 1; i < buffer->frag_count; i++) {
1183 frag++; /* Get the next frag */
1184 pci_unmap_page(pdev, frag->dma, frag->length,
1185 PCI_DMA_TODEVICE);
1186 frag->dma = 0ULL;
1187 }
1188
1189 adapter->stats.xmitfinished++;
1190 dev_kfree_skb_any(buffer->skb);
1191 buffer->skb = NULL;
1192 }
1193
1194 last_consumer = get_next_index(last_consumer,
1195 adapter->max_tx_desc_count);
1196 if (++count >= MAX_STATUS_HANDLE)
1197 break;
1198 }
1199
1200 if (count) {
1201 adapter->last_cmd_consumer = last_consumer;
1202 smp_mb();
1203 if (netif_queue_stopped(netdev) && netif_running(netdev)) {
1204 netif_tx_lock(netdev);
1205 netif_wake_queue(netdev);
1206 smp_mb();
1207 netif_tx_unlock(netdev);
1208 }
1209 }
1210 /*
1211 * If everything is freed up to consumer then check if the ring is full
1212 * If the ring is full then check if more needs to be freed and
1213 * schedule the call back again.
1214 *
1215 * This happens when there are 2 CPUs. One could be freeing and the
1216 * other filling it. If the ring is full when we get out of here and
1217 * the card has already interrupted the host then the host can miss the
1218 * interrupt.
1219 *
1220 * There is still a possible race condition and the host could miss an
1221 * interrupt. The card has to take care of this.
1222 */
1223 consumer = le32_to_cpu(*(adapter->cmd_consumer));
1224 done = (last_consumer == consumer);
1225
1226 return (done);
1227 }
1228
1229 /*
1230 * netxen_post_rx_buffers puts buffer in the Phantom memory
1231 */
1232 void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
1233 {
1234 struct pci_dev *pdev = adapter->ahw.pdev;
1235 struct sk_buff *skb;
1236 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1237 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
1238 uint producer;
1239 struct rcv_desc *pdesc;
1240 struct netxen_rx_buffer *buffer;
1241 int count = 0;
1242 int index = 0;
1243 netxen_ctx_msg msg = 0;
1244 dma_addr_t dma;
1245
1246 rcv_desc = &recv_ctx->rcv_desc[ringid];
1247
1248 producer = rcv_desc->producer;
1249 index = rcv_desc->begin_alloc;
1250 buffer = &rcv_desc->rx_buf_arr[index];
1251 /* We can start writing rx descriptors into the phantom memory. */
1252 while (buffer->state == NETXEN_BUFFER_FREE) {
1253 skb = dev_alloc_skb(rcv_desc->skb_size);
1254 if (unlikely(!skb)) {
1255 /*
1256 * TODO
1257 * We need to schedule the posting of buffers to the pegs.
1258 */
1259 rcv_desc->begin_alloc = index;
1260 DPRINTK(ERR, "netxen_post_rx_buffers: "
1261 " allocated only %d buffers\n", count);
1262 break;
1263 }
1264
1265 count++; /* now there should be no failure */
1266 pdesc = &rcv_desc->desc_head[producer];
1267
1268 #if defined(XGB_DEBUG)
1269 *(unsigned long *)(skb->head) = 0xc0debabe;
1270 if (skb_is_nonlinear(skb)) {
1271 printk("Allocated SKB @%p is nonlinear\n");
1272 }
1273 #endif
1274 skb_reserve(skb, 2);
1275 /* This will be setup when we receive the
1276 * buffer after it has been filled FSL TBD TBD
1277 * skb->dev = netdev;
1278 */
1279 dma = pci_map_single(pdev, skb->data, rcv_desc->dma_size,
1280 PCI_DMA_FROMDEVICE);
1281 pdesc->addr_buffer = cpu_to_le64(dma);
1282 buffer->skb = skb;
1283 buffer->state = NETXEN_BUFFER_BUSY;
1284 buffer->dma = dma;
1285 /* make a rcv descriptor */
1286 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1287 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
1288 DPRINTK(INFO, "done writing descripter\n");
1289 producer =
1290 get_next_index(producer, rcv_desc->max_rx_desc_count);
1291 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1292 buffer = &rcv_desc->rx_buf_arr[index];
1293 }
1294 /* if we did allocate buffers, then write the count to Phantom */
1295 if (count) {
1296 rcv_desc->begin_alloc = index;
1297 rcv_desc->rcv_pending += count;
1298 rcv_desc->producer = producer;
1299 /* Window = 1 */
1300 writel((producer - 1) &
1301 (rcv_desc->max_rx_desc_count - 1),
1302 NETXEN_CRB_NORMALIZE(adapter,
1303 recv_crb_registers[
1304 adapter->portnum].
1305 rcv_desc_crb[ringid].
1306 crb_rcv_producer_offset));
1307 /*
1308 * Write a doorbell msg to tell phanmon of change in
1309 * receive ring producer
1310 */
1311 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1312 netxen_set_msg_privid(msg);
1313 netxen_set_msg_count(msg,
1314 ((producer -
1315 1) & (rcv_desc->
1316 max_rx_desc_count - 1)));
1317 netxen_set_msg_ctxid(msg, adapter->portnum);
1318 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1319 writel(msg,
1320 DB_NORMALIZE(adapter,
1321 NETXEN_RCV_PRODUCER_OFFSET));
1322 }
1323 }
1324
1325 static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
1326 uint32_t ctx, uint32_t ringid)
1327 {
1328 struct pci_dev *pdev = adapter->ahw.pdev;
1329 struct sk_buff *skb;
1330 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1331 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
1332 u32 producer;
1333 struct rcv_desc *pdesc;
1334 struct netxen_rx_buffer *buffer;
1335 int count = 0;
1336 int index = 0;
1337
1338 rcv_desc = &recv_ctx->rcv_desc[ringid];
1339
1340 producer = rcv_desc->producer;
1341 index = rcv_desc->begin_alloc;
1342 buffer = &rcv_desc->rx_buf_arr[index];
1343 /* We can start writing rx descriptors into the phantom memory. */
1344 while (buffer->state == NETXEN_BUFFER_FREE) {
1345 skb = dev_alloc_skb(rcv_desc->skb_size);
1346 if (unlikely(!skb)) {
1347 /*
1348 * We need to schedule the posting of buffers to the pegs.
1349 */
1350 rcv_desc->begin_alloc = index;
1351 DPRINTK(ERR, "netxen_post_rx_buffers_nodb: "
1352 " allocated only %d buffers\n", count);
1353 break;
1354 }
1355 count++; /* now there should be no failure */
1356 pdesc = &rcv_desc->desc_head[producer];
1357 skb_reserve(skb, 2);
1358 /*
1359 * This will be setup when we receive the
1360 * buffer after it has been filled
1361 * skb->dev = netdev;
1362 */
1363 buffer->skb = skb;
1364 buffer->state = NETXEN_BUFFER_BUSY;
1365 buffer->dma = pci_map_single(pdev, skb->data,
1366 rcv_desc->dma_size,
1367 PCI_DMA_FROMDEVICE);
1368
1369 /* make a rcv descriptor */
1370 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1371 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
1372 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1373 DPRINTK(INFO, "done writing descripter\n");
1374 producer =
1375 get_next_index(producer, rcv_desc->max_rx_desc_count);
1376 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1377 buffer = &rcv_desc->rx_buf_arr[index];
1378 }
1379
1380 /* if we did allocate buffers, then write the count to Phantom */
1381 if (count) {
1382 rcv_desc->begin_alloc = index;
1383 rcv_desc->rcv_pending += count;
1384 rcv_desc->producer = producer;
1385 /* Window = 1 */
1386 writel((producer - 1) &
1387 (rcv_desc->max_rx_desc_count - 1),
1388 NETXEN_CRB_NORMALIZE(adapter,
1389 recv_crb_registers[
1390 adapter->portnum].
1391 rcv_desc_crb[ringid].
1392 crb_rcv_producer_offset));
1393 wmb();
1394 }
1395 }
1396
1397 void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1398 {
1399 memset(&adapter->stats, 0, sizeof(adapter->stats));
1400 return;
1401 }
1402
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree