1 #ifndef _ASM_IA64_SAL_H
2 #define _ASM_IA64_SAL_H
5 * System Abstraction Layer definitions.
7 * This is based on version 2.5 of the manual "IA-64 System
10 * Copyright (C) 2001 Intel
11 * Copyright (C) 2002 Jenna Hall <jenna.s.hall@intel.com>
12 * Copyright (C) 2001 Fred Lewis <frederick.v.lewis@intel.com>
13 * Copyright (C) 1998, 1999, 2001, 2003 Hewlett-Packard Co
14 * David Mosberger-Tang <davidm@hpl.hp.com>
15 * Copyright (C) 1999 Srinivasa Prasad Thirumalachar <sprasad@sprasad.engr.sgi.com>
17 * 02/01/04 J. Hall Updated Error Record Structures to conform to July 2001
18 * revision of the SAL spec.
19 * 01/01/03 fvlewis Updated Error Record Structures to conform with Nov. 2000
20 * revision of the SAL spec.
21 * 99/09/29 davidm Updated for SAL 2.6.
22 * 00/03/29 cfleck Updated SAL Error Logging info for processor (SAL 2.6)
23 * (plus examples of platform error info structures from smariset @ Intel)
26 #define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT 0
27 #define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT 1
28 #define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT 2
29 #define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT 3
31 #define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK (1<<IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT)
32 #define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT)
33 #define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT)
34 #define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT (1<<IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT)
38 #include <linux/bcd.h>
39 #include <linux/spinlock.h>
40 #include <linux/efi.h>
43 #include <asm/system.h>
46 extern spinlock_t sal_lock
;
48 /* SAL spec _requires_ eight args for each call. */
49 #define __IA64_FW_CALL(entry,result,a0,a1,a2,a3,a4,a5,a6,a7) \
50 result = (*entry)(a0,a1,a2,a3,a4,a5,a6,a7)
52 # define IA64_FW_CALL(entry,result,args...) do { \
53 unsigned long __ia64_sc_flags; \
54 struct ia64_fpreg __ia64_sc_fr[6]; \
55 ia64_save_scratch_fpregs(__ia64_sc_fr); \
56 spin_lock_irqsave(&sal_lock, __ia64_sc_flags); \
57 __IA64_FW_CALL(entry, result, args); \
58 spin_unlock_irqrestore(&sal_lock, __ia64_sc_flags); \
59 ia64_load_scratch_fpregs(__ia64_sc_fr); \
62 # define SAL_CALL(result,args...) \
63 IA64_FW_CALL(ia64_sal, result, args);
65 # define SAL_CALL_NOLOCK(result,args...) do { \
66 unsigned long __ia64_scn_flags; \
67 struct ia64_fpreg __ia64_scn_fr[6]; \
68 ia64_save_scratch_fpregs(__ia64_scn_fr); \
69 local_irq_save(__ia64_scn_flags); \
70 __IA64_FW_CALL(ia64_sal, result, args); \
71 local_irq_restore(__ia64_scn_flags); \
72 ia64_load_scratch_fpregs(__ia64_scn_fr); \
75 # define SAL_CALL_REENTRANT(result,args...) do { \
76 struct ia64_fpreg __ia64_scs_fr[6]; \
77 ia64_save_scratch_fpregs(__ia64_scs_fr); \
79 __IA64_FW_CALL(ia64_sal, result, args); \
81 ia64_load_scratch_fpregs(__ia64_scs_fr); \
84 #define SAL_SET_VECTORS 0x01000000
85 #define SAL_GET_STATE_INFO 0x01000001
86 #define SAL_GET_STATE_INFO_SIZE 0x01000002
87 #define SAL_CLEAR_STATE_INFO 0x01000003
88 #define SAL_MC_RENDEZ 0x01000004
89 #define SAL_MC_SET_PARAMS 0x01000005
90 #define SAL_REGISTER_PHYSICAL_ADDR 0x01000006
92 #define SAL_CACHE_FLUSH 0x01000008
93 #define SAL_CACHE_INIT 0x01000009
94 #define SAL_PCI_CONFIG_READ 0x01000010
95 #define SAL_PCI_CONFIG_WRITE 0x01000011
96 #define SAL_FREQ_BASE 0x01000012
97 #define SAL_PHYSICAL_ID_INFO 0x01000013
99 #define SAL_UPDATE_PAL 0x01000020
101 struct ia64_sal_retval
{
103 * A zero status value indicates call completed without error.
104 * A negative status value indicates reason of call failure.
105 * A positive status value indicates success but an
106 * informational value should be printed (e.g., "reboot for
107 * change to take effect").
115 typedef struct ia64_sal_retval (*ia64_sal_handler
) (u64
, ...);
118 SAL_FREQ_BASE_PLATFORM
= 0,
119 SAL_FREQ_BASE_INTERVAL_TIMER
= 1,
120 SAL_FREQ_BASE_REALTIME_CLOCK
= 2
124 * The SAL system table is followed by a variable number of variable
125 * length descriptors. The structure of these descriptors follows
127 * The defininition follows SAL specs from July 2000
129 struct ia64_sal_systab
{
130 u8 signature
[4]; /* should be "SST_" */
131 u32 size
; /* size of this table in bytes */
134 u16 entry_count
; /* # of entries in variable portion */
141 /* oem_id & product_id: terminating NUL is missing if string is exactly 32 bytes long. */
143 u8 product_id
[32]; /* ASCII product id */
147 enum sal_systab_entry_type
{
148 SAL_DESC_ENTRY_POINT
= 0,
150 SAL_DESC_PLATFORM_FEATURE
= 2,
153 SAL_DESC_AP_WAKEUP
= 5
165 #define SAL_DESC_SIZE(type) "\060\040\020\040\020\020"[(unsigned) type]
167 typedef struct ia64_sal_desc_entry_point
{
174 }ia64_sal_desc_entry_point_t
;
176 typedef struct ia64_sal_desc_memory
{
178 u8 used_by_sal
; /* needs to be mapped for SAL? */
179 u8 mem_attr
; /* current memory attribute setting */
180 u8 access_rights
; /* access rights set up by SAL */
181 u8 mem_attr_mask
; /* mask of supported memory attributes */
183 u8 mem_type
; /* memory type */
184 u8 mem_usage
; /* memory usage */
185 u64 addr
; /* physical address of memory */
186 u32 length
; /* length (multiple of 4KB pages) */
189 } ia64_sal_desc_memory_t
;
191 typedef struct ia64_sal_desc_platform_feature
{
195 } ia64_sal_desc_platform_feature_t
;
197 typedef struct ia64_sal_desc_tr
{
199 u8 tr_type
; /* 0 == instruction, 1 == data */
200 u8 regnum
; /* translation register number */
202 u64 addr
; /* virtual address of area covered */
203 u64 page_size
; /* encoded page size */
205 } ia64_sal_desc_tr_t
;
207 typedef struct ia64_sal_desc_ptc
{
210 u32 num_domains
; /* # of coherence domains */
211 u64 domain_info
; /* physical address of domain info table */
212 } ia64_sal_desc_ptc_t
;
214 typedef struct ia64_sal_ptc_domain_info
{
215 u64 proc_count
; /* number of processors in domain */
216 u64 proc_list
; /* physical address of LID array */
217 } ia64_sal_ptc_domain_info_t
;
219 typedef struct ia64_sal_ptc_domain_proc_entry
{
220 u64 id
: 8; /* id of processor */
221 u64 eid
: 8; /* eid of processor */
222 } ia64_sal_ptc_domain_proc_entry_t
;
225 #define IA64_SAL_AP_EXTERNAL_INT 0
227 typedef struct ia64_sal_desc_ap_wakeup
{
229 u8 mechanism
; /* 0 == external interrupt */
231 u64 vector
; /* interrupt vector in range 0x10-0xff */
232 } ia64_sal_desc_ap_wakeup_t
;
234 extern ia64_sal_handler ia64_sal
;
235 extern struct ia64_sal_desc_ptc
*ia64_ptc_domain_info
;
237 extern unsigned short sal_revision
; /* supported SAL spec revision */
238 extern unsigned short sal_version
; /* SAL version; OEM dependent */
239 #define SAL_VERSION_CODE(major, minor) ((bin2bcd(major) << 8) | bin2bcd(minor))
241 extern const char *ia64_sal_strerror (long status
);
242 extern void ia64_sal_init (struct ia64_sal_systab
*sal_systab
);
244 /* SAL information type encodings */
246 SAL_INFO_TYPE_MCA
= 0, /* Machine check abort information */
247 SAL_INFO_TYPE_INIT
= 1, /* Init information */
248 SAL_INFO_TYPE_CMC
= 2, /* Corrected machine check information */
249 SAL_INFO_TYPE_CPE
= 3 /* Corrected platform error information */
252 /* Encodings for machine check parameter types */
254 SAL_MC_PARAM_RENDEZ_INT
= 1, /* Rendezvous interrupt */
255 SAL_MC_PARAM_RENDEZ_WAKEUP
= 2, /* Wakeup */
256 SAL_MC_PARAM_CPE_INT
= 3 /* Corrected Platform Error Int */
259 /* Encodings for rendezvous mechanisms */
261 SAL_MC_PARAM_MECHANISM_INT
= 1, /* Use interrupt */
262 SAL_MC_PARAM_MECHANISM_MEM
= 2 /* Use memory synchronization variable*/
265 /* Encodings for vectors which can be registered by the OS with SAL */
267 SAL_VECTOR_OS_MCA
= 0,
268 SAL_VECTOR_OS_INIT
= 1,
269 SAL_VECTOR_OS_BOOT_RENDEZ
= 2
272 /* Encodings for mca_opt parameter sent to SAL_MC_SET_PARAMS */
273 #define SAL_MC_PARAM_RZ_ALWAYS 0x1
274 #define SAL_MC_PARAM_BINIT_ESCALATE 0x10
277 * Definition of the SAL Error Log from the SAL spec
280 /* SAL Error Record Section GUID Definitions */
281 #define SAL_PROC_DEV_ERR_SECT_GUID \
282 EFI_GUID(0xe429faf1, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
283 #define SAL_PLAT_MEM_DEV_ERR_SECT_GUID \
284 EFI_GUID(0xe429faf2, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
285 #define SAL_PLAT_SEL_DEV_ERR_SECT_GUID \
286 EFI_GUID(0xe429faf3, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
287 #define SAL_PLAT_PCI_BUS_ERR_SECT_GUID \
288 EFI_GUID(0xe429faf4, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
289 #define SAL_PLAT_SMBIOS_DEV_ERR_SECT_GUID \
290 EFI_GUID(0xe429faf5, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
291 #define SAL_PLAT_PCI_COMP_ERR_SECT_GUID \
292 EFI_GUID(0xe429faf6, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
293 #define SAL_PLAT_SPECIFIC_ERR_SECT_GUID \
294 EFI_GUID(0xe429faf7, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
295 #define SAL_PLAT_HOST_CTLR_ERR_SECT_GUID \
296 EFI_GUID(0xe429faf8, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
297 #define SAL_PLAT_BUS_ERR_SECT_GUID \
298 EFI_GUID(0xe429faf9, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
299 #define PROCESSOR_ABSTRACTION_LAYER_OVERWRITE_GUID \
300 EFI_GUID(0x6cb0a200, 0x893a, 0x11da, 0x96, 0xd2, 0x0, 0x10, 0x83, 0xff, \
303 #define MAX_CACHE_ERRORS 6
304 #define MAX_TLB_ERRORS 6
305 #define MAX_BUS_ERRORS 1
307 /* Definition of version according to SAL spec for logging purposes */
308 typedef struct sal_log_revision
{
309 u8 minor
; /* BCD (0..99) */
310 u8 major
; /* BCD (0..99) */
311 } sal_log_revision_t
;
313 /* Definition of timestamp according to SAL spec for logging purposes */
314 typedef struct sal_log_timestamp
{
315 u8 slh_second
; /* Second (0..59) */
316 u8 slh_minute
; /* Minute (0..59) */
317 u8 slh_hour
; /* Hour (0..23) */
319 u8 slh_day
; /* Day (1..31) */
320 u8 slh_month
; /* Month (1..12) */
321 u8 slh_year
; /* Year (00..99) */
322 u8 slh_century
; /* Century (19, 20, 21, ...) */
323 } sal_log_timestamp_t
;
325 /* Definition of log record header structures */
326 typedef struct sal_log_record_header
{
327 u64 id
; /* Unique monotonically increasing ID */
328 sal_log_revision_t revision
; /* Major and Minor revision of header */
329 u8 severity
; /* Error Severity */
330 u8 validation_bits
; /* 0: platform_guid, 1: !timestamp */
331 u32 len
; /* Length of this error log in bytes */
332 sal_log_timestamp_t timestamp
; /* Timestamp */
333 efi_guid_t platform_guid
; /* Unique OEM Platform ID */
334 } sal_log_record_header_t
;
336 #define sal_log_severity_recoverable 0
337 #define sal_log_severity_fatal 1
338 #define sal_log_severity_corrected 2
340 /* Definition of log section header structures */
341 typedef struct sal_log_sec_header
{
342 efi_guid_t guid
; /* Unique Section ID */
343 sal_log_revision_t revision
; /* Major and Minor revision of Section */
345 u32 len
; /* Section length */
346 } sal_log_section_hdr_t
;
348 typedef struct sal_log_mod_error_info
{
351 requestor_identifier
: 1,
352 responder_identifier
: 1,
353 target_identifier
: 1,
358 u64 requestor_identifier
;
359 u64 responder_identifier
;
360 u64 target_identifier
;
362 } sal_log_mod_error_info_t
;
364 typedef struct sal_processor_static_info
{
374 pal_min_state_area_t min_state_area
;
379 struct ia64_fpreg
__attribute__ ((packed
)) fr
[128];
380 } sal_processor_static_info_t
;
382 struct sal_cpuid_info
{
387 typedef struct sal_log_processor_info
{
388 sal_log_section_hdr_t header
;
390 u64 proc_error_map
: 1,
391 proc_state_param
: 1,
393 psi_static_struct
: 1,
397 num_reg_file_check
: 4,
403 u64 proc_state_parameter
;
406 * The rest of this structure consists of variable-length arrays, which can't be
409 sal_log_mod_error_info_t info
[0];
411 * This is what the rest looked like if C supported variable-length arrays:
413 * sal_log_mod_error_info_t cache_check_info[.valid.num_cache_check];
414 * sal_log_mod_error_info_t tlb_check_info[.valid.num_tlb_check];
415 * sal_log_mod_error_info_t bus_check_info[.valid.num_bus_check];
416 * sal_log_mod_error_info_t reg_file_check_info[.valid.num_reg_file_check];
417 * sal_log_mod_error_info_t ms_check_info[.valid.num_ms_check];
418 * struct sal_cpuid_info cpuid_info;
419 * sal_processor_static_info_t processor_static_info;
421 } sal_log_processor_info_t
;
423 /* Given a sal_log_processor_info_t pointer, return a pointer to the processor_static_info: */
424 #define SAL_LPI_PSI_INFO(l) \
425 ({ sal_log_processor_info_t *_l = (l); \
426 ((sal_processor_static_info_t *) \
427 ((char *) _l->info + ((_l->valid.num_cache_check + _l->valid.num_tlb_check \
428 + _l->valid.num_bus_check + _l->valid.num_reg_file_check \
429 + _l->valid.num_ms_check) * sizeof(sal_log_mod_error_info_t) \
430 + sizeof(struct sal_cpuid_info)))); \
433 /* platform error log structures */
435 typedef struct sal_log_mem_dev_err_info
{
436 sal_log_section_hdr_t header
;
438 u64 error_status
: 1,
473 u8 oem_data
[1]; /* Variable length data */
474 } sal_log_mem_dev_err_info_t
;
476 typedef struct sal_log_sel_dev_err_info
{
477 sal_log_section_hdr_t header
;
502 } sal_log_sel_dev_err_info_t
;
504 typedef struct sal_log_pci_bus_err_info
{
505 sal_log_section_hdr_t header
;
529 u8 oem_data
[1]; /* Variable length data */
530 } sal_log_pci_bus_err_info_t
;
532 typedef struct sal_log_smbios_dev_err_info
{
533 sal_log_section_hdr_t header
;
544 u8 data
[1]; /* data of variable length, length == slsmb_length */
545 } sal_log_smbios_dev_err_info_t
;
547 typedef struct sal_log_pci_comp_err_info
{
548 sal_log_section_hdr_t header
;
571 u64 reg_data_pairs
[1];
573 * array of address/data register pairs is num_mem_regs + num_io_regs elements
574 * long. Each array element consists of a u64 address followed by a u64 data
575 * value. The oem_data array immediately follows the reg_data_pairs array
577 u8 oem_data
[1]; /* Variable length data */
578 } sal_log_pci_comp_err_info_t
;
580 typedef struct sal_log_plat_specific_err_info
{
581 sal_log_section_hdr_t header
;
590 u8 oem_data
[1]; /* platform specific variable length data */
591 } sal_log_plat_specific_err_info_t
;
593 typedef struct sal_log_host_ctlr_err_info
{
594 sal_log_section_hdr_t header
;
609 u8 oem_data
[1]; /* Variable length OEM data */
610 } sal_log_host_ctlr_err_info_t
;
612 typedef struct sal_log_plat_bus_err_info
{
613 sal_log_section_hdr_t header
;
628 u8 oem_data
[1]; /* Variable length OEM data */
629 } sal_log_plat_bus_err_info_t
;
631 /* Overall platform error section structure */
632 typedef union sal_log_platform_err_info
{
633 sal_log_mem_dev_err_info_t mem_dev_err
;
634 sal_log_sel_dev_err_info_t sel_dev_err
;
635 sal_log_pci_bus_err_info_t pci_bus_err
;
636 sal_log_smbios_dev_err_info_t smbios_dev_err
;
637 sal_log_pci_comp_err_info_t pci_comp_err
;
638 sal_log_plat_specific_err_info_t plat_specific_err
;
639 sal_log_host_ctlr_err_info_t host_ctlr_err
;
640 sal_log_plat_bus_err_info_t plat_bus_err
;
641 } sal_log_platform_err_info_t
;
643 /* SAL log over-all, multi-section error record structure (processor+platform) */
644 typedef struct err_rec
{
645 sal_log_record_header_t sal_elog_header
;
646 sal_log_processor_info_t proc_err
;
647 sal_log_platform_err_info_t plat_err
;
648 u8 oem_data_pad
[1024];
652 * Now define a couple of inline functions for improved type checking
656 extern s64
ia64_sal_cache_flush (u64 cache_type
);
657 extern void __init
check_sal_cache_flush (void);
659 /* Initialize all the processor and platform level instruction and data caches */
661 ia64_sal_cache_init (void)
663 struct ia64_sal_retval isrv
;
664 SAL_CALL(isrv
, SAL_CACHE_INIT
, 0, 0, 0, 0, 0, 0, 0);
669 * Clear the processor and platform information logged by SAL with respect to the machine
670 * state at the time of MCA's, INITs, CMCs, or CPEs.
673 ia64_sal_clear_state_info (u64 sal_info_type
)
675 struct ia64_sal_retval isrv
;
676 SAL_CALL_REENTRANT(isrv
, SAL_CLEAR_STATE_INFO
, sal_info_type
, 0,
682 /* Get the processor and platform information logged by SAL with respect to the machine
683 * state at the time of the MCAs, INITs, CMCs, or CPEs.
686 ia64_sal_get_state_info (u64 sal_info_type
, u64
*sal_info
)
688 struct ia64_sal_retval isrv
;
689 SAL_CALL_REENTRANT(isrv
, SAL_GET_STATE_INFO
, sal_info_type
, 0,
690 sal_info
, 0, 0, 0, 0);
698 * Get the maximum size of the information logged by SAL with respect to the machine state
699 * at the time of MCAs, INITs, CMCs, or CPEs.
702 ia64_sal_get_state_info_size (u64 sal_info_type
)
704 struct ia64_sal_retval isrv
;
705 SAL_CALL_REENTRANT(isrv
, SAL_GET_STATE_INFO_SIZE
, sal_info_type
, 0,
713 * Causes the processor to go into a spin loop within SAL where SAL awaits a wakeup from
714 * the monarch processor. Must not lock, because it will not return on any cpu until the
715 * monarch processor sends a wake up.
718 ia64_sal_mc_rendez (void)
720 struct ia64_sal_retval isrv
;
721 SAL_CALL_NOLOCK(isrv
, SAL_MC_RENDEZ
, 0, 0, 0, 0, 0, 0, 0);
726 * Allow the OS to specify the interrupt number to be used by SAL to interrupt OS during
727 * the machine check rendezvous sequence as well as the mechanism to wake up the
728 * non-monarch processor at the end of machine check processing.
729 * Returns the complete ia64_sal_retval because some calls return more than just a status
732 static inline struct ia64_sal_retval
733 ia64_sal_mc_set_params (u64 param_type
, u64 i_or_m
, u64 i_or_m_val
, u64 timeout
, u64 rz_always
)
735 struct ia64_sal_retval isrv
;
736 SAL_CALL(isrv
, SAL_MC_SET_PARAMS
, param_type
, i_or_m
, i_or_m_val
,
737 timeout
, rz_always
, 0, 0);
741 /* Read from PCI configuration space */
743 ia64_sal_pci_config_read (u64 pci_config_addr
, int type
, u64 size
, u64
*value
)
745 struct ia64_sal_retval isrv
;
746 SAL_CALL(isrv
, SAL_PCI_CONFIG_READ
, pci_config_addr
, size
, type
, 0, 0, 0, 0);
752 /* Write to PCI configuration space */
754 ia64_sal_pci_config_write (u64 pci_config_addr
, int type
, u64 size
, u64 value
)
756 struct ia64_sal_retval isrv
;
757 SAL_CALL(isrv
, SAL_PCI_CONFIG_WRITE
, pci_config_addr
, size
, value
,
763 * Register physical addresses of locations needed by SAL when SAL procedures are invoked
767 ia64_sal_register_physical_addr (u64 phys_entry
, u64 phys_addr
)
769 struct ia64_sal_retval isrv
;
770 SAL_CALL(isrv
, SAL_REGISTER_PHYSICAL_ADDR
, phys_entry
, phys_addr
,
776 * Register software dependent code locations within SAL. These locations are handlers or
777 * entry points where SAL will pass control for the specified event. These event handlers
778 * are for the bott rendezvous, MCAs and INIT scenarios.
781 ia64_sal_set_vectors (u64 vector_type
,
782 u64 handler_addr1
, u64 gp1
, u64 handler_len1
,
783 u64 handler_addr2
, u64 gp2
, u64 handler_len2
)
785 struct ia64_sal_retval isrv
;
786 SAL_CALL(isrv
, SAL_SET_VECTORS
, vector_type
,
787 handler_addr1
, gp1
, handler_len1
,
788 handler_addr2
, gp2
, handler_len2
);
793 /* Update the contents of PAL block in the non-volatile storage device */
795 ia64_sal_update_pal (u64 param_buf
, u64 scratch_buf
, u64 scratch_buf_size
,
796 u64
*error_code
, u64
*scratch_buf_size_needed
)
798 struct ia64_sal_retval isrv
;
799 SAL_CALL(isrv
, SAL_UPDATE_PAL
, param_buf
, scratch_buf
, scratch_buf_size
,
802 *error_code
= isrv
.v0
;
803 if (scratch_buf_size_needed
)
804 *scratch_buf_size_needed
= isrv
.v1
;
808 /* Get physical processor die mapping in the platform. */
810 ia64_sal_physical_id_info(u16
*splid
)
812 struct ia64_sal_retval isrv
;
814 if (sal_revision
< SAL_VERSION_CODE(3,2))
817 SAL_CALL(isrv
, SAL_PHYSICAL_ID_INFO
, 0, 0, 0, 0, 0, 0, 0);
823 extern unsigned long sal_platform_features
;
825 extern int (*salinfo_platform_oemdata
)(const u8
*, u8
**, u64
*);
827 struct sal_ret_values
{
828 long r8
; long r9
; long r10
; long r11
;
831 #define IA64_SAL_OEMFUNC_MIN 0x02000000
832 #define IA64_SAL_OEMFUNC_MAX 0x03ffffff
834 extern int ia64_sal_oemcall(struct ia64_sal_retval
*, u64
, u64
, u64
, u64
, u64
,
836 extern int ia64_sal_oemcall_nolock(struct ia64_sal_retval
*, u64
, u64
, u64
,
837 u64
, u64
, u64
, u64
, u64
);
838 extern int ia64_sal_oemcall_reentrant(struct ia64_sal_retval
*, u64
, u64
, u64
,
839 u64
, u64
, u64
, u64
, u64
);
841 ia64_sal_freq_base (unsigned long which
, unsigned long *ticks_per_second
,
842 unsigned long *drift_info
);
843 #ifdef CONFIG_HOTPLUG_CPU
845 * System Abstraction Layer Specification
846 * Section 3.2.5.1: OS_BOOT_RENDEZ to SAL return State.
847 * Note: region regs are stored first in head.S _start. Hence they must
850 struct sal_to_os_boot
{
851 u64 rr
[8]; /* Region Registers */
853 * return addr into SAL boot rendez routine */
854 u64 gr1
; /* SAL:GP */
855 u64 gr12
; /* SAL:SP */
856 u64 gr13
; /* SAL: Task Pointer */
862 u64 dcr
; /* Default Control Register */
870 u64 pr
; /* Predicate registers */
871 u64 lc
; /* Loop Count */
872 struct ia64_fpreg fp
[20];
876 * Global array allocated for NR_CPUS at boot time
878 extern struct sal_to_os_boot sal_boot_rendez_state
[NR_CPUS
];
880 extern void ia64_jump_to_sal(struct sal_to_os_boot
*);
883 extern void ia64_sal_handler_init(void *entry_point
, void *gpval
);
885 #define PALO_MAX_TLB_PURGES 0xFFFF
886 #define PALO_SIG "PALO"
889 u8 signature
[4]; /* Should be "PALO" */
899 #define NPTCG_FROM_PAL 0
900 #define NPTCG_FROM_PALO 1
901 #define NPTCG_FROM_KERNEL_PARAMETER 2
903 #endif /* __ASSEMBLY__ */
905 #endif /* _ASM_IA64_SAL_H */