1 /***************************************************************************
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 ***************************************************************************
21 * Rewritten, heavily based on smsc911x simple driver by SMSC.
22 * Partly uses io macros from smc91x.c by Nicolas Pitre
25 * LAN9115, LAN9116, LAN9117, LAN9118
26 * LAN9215, LAN9216, LAN9217, LAN9218
32 #include <linux/crc32.h>
33 #include <linux/delay.h>
34 #include <linux/errno.h>
35 #include <linux/etherdevice.h>
36 #include <linux/ethtool.h>
37 #include <linux/init.h>
38 #include <linux/ioport.h>
39 #include <linux/kernel.h>
40 #include <linux/module.h>
41 #include <linux/netdevice.h>
42 #include <linux/platform_device.h>
43 #include <linux/sched.h>
44 #include <linux/slab.h>
45 #include <linux/timer.h>
46 #include <linux/version.h>
47 #include <linux/bug.h>
48 #include <linux/bitops.h>
49 #include <linux/irq.h>
51 #include <linux/phy.h>
52 #include <linux/smsc911x.h>
55 #define SMSC_CHIPNAME "smsc911x"
56 #define SMSC_MDIONAME "smsc911x-mdio"
57 #define SMSC_DRV_VERSION "2008-10-21"
59 MODULE_LICENSE("GPL");
60 MODULE_VERSION(SMSC_DRV_VERSION
);
63 static int debug
= 16;
68 module_param(debug
, int, 0);
69 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
71 struct smsc911x_data
{
76 /* used to decide which workarounds apply */
77 unsigned int generation
;
79 /* device configuration (copied from platform_data during probe) */
80 unsigned int irq_polarity
;
81 unsigned int irq_type
;
82 phy_interface_t phy_interface
;
84 /* This needs to be acquired before calling any of below:
85 * smsc911x_mac_read(), smsc911x_mac_write()
89 #if (!SMSC_CAN_USE_32BIT)
90 /* spinlock to ensure 16-bit accesses are serialised */
94 struct phy_device
*phy_dev
;
95 struct mii_bus
*mii_bus
;
96 int phy_irq
[PHY_MAX_ADDR
];
97 unsigned int using_extphy
;
102 unsigned int gpio_setting
;
103 unsigned int gpio_orig_setting
;
104 struct net_device
*dev
;
105 struct napi_struct napi
;
107 unsigned int software_irq_signal
;
109 #ifdef USE_PHY_WORK_AROUND
110 #define MIN_PACKET_SIZE (64)
111 char loopback_tx_pkt
[MIN_PACKET_SIZE
];
112 char loopback_rx_pkt
[MIN_PACKET_SIZE
];
113 unsigned int resetcount
;
116 /* Members for Multicast filter workaround */
117 unsigned int multicast_update_pending
;
118 unsigned int set_bits_mask
;
119 unsigned int clear_bits_mask
;
124 #if SMSC_CAN_USE_32BIT
126 static inline u32
smsc911x_reg_read(struct smsc911x_data
*pdata
, u32 reg
)
128 return readl(pdata
->ioaddr
+ reg
);
131 static inline void smsc911x_reg_write(struct smsc911x_data
*pdata
, u32 reg
,
134 writel(val
, pdata
->ioaddr
+ reg
);
137 /* Writes a packet to the TX_DATA_FIFO */
139 smsc911x_tx_writefifo(struct smsc911x_data
*pdata
, unsigned int *buf
,
140 unsigned int wordcount
)
142 writesl(pdata
->ioaddr
+ TX_DATA_FIFO
, buf
, wordcount
);
145 /* Reads a packet out of the RX_DATA_FIFO */
147 smsc911x_rx_readfifo(struct smsc911x_data
*pdata
, unsigned int *buf
,
148 unsigned int wordcount
)
150 readsl(pdata
->ioaddr
+ RX_DATA_FIFO
, buf
, wordcount
);
153 #else /* SMSC_CAN_USE_32BIT */
155 /* These 16-bit access functions are significantly slower, due to the locking
156 * necessary. If your bus hardware can be configured to do this for you
157 * (in response to a single 32-bit operation from software), you should use
158 * the 32-bit access functions instead. */
160 static inline u32
smsc911x_reg_read(struct smsc911x_data
*pdata
, u32 reg
)
165 /* these two 16-bit reads must be performed consecutively, so must
166 * not be interrupted by our own ISR (which would start another
168 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
169 data
= ((readw(pdata
->ioaddr
+ reg
) & 0xFFFF) |
170 ((readw(pdata
->ioaddr
+ reg
+ 2) & 0xFFFF) << 16));
171 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
176 static inline void smsc911x_reg_write(struct smsc911x_data
*pdata
, u32 reg
,
181 /* these two 16-bit writes must be performed consecutively, so must
182 * not be interrupted by our own ISR (which would start another
184 spin_lock_irqsave(&pdata
->dev_lock
, flags
);
185 writew(val
& 0xFFFF, pdata
->ioaddr
+ reg
);
186 writew((val
>> 16) & 0xFFFF, pdata
->ioaddr
+ reg
+ 2);
187 spin_unlock_irqrestore(&pdata
->dev_lock
, flags
);
190 /* Writes a packet to the TX_DATA_FIFO */
192 smsc911x_tx_writefifo(struct smsc911x_data
*pdata
, unsigned int *buf
,
193 unsigned int wordcount
)
196 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, *buf
++);
199 /* Reads a packet out of the RX_DATA_FIFO */
201 smsc911x_rx_readfifo(struct smsc911x_data
*pdata
, unsigned int *buf
,
202 unsigned int wordcount
)
205 *buf
++ = smsc911x_reg_read(pdata
, RX_DATA_FIFO
);
208 #endif /* SMSC_CAN_USE_32BIT */
210 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
211 * and smsc911x_mac_write, so assumes mac_lock is held */
212 static int smsc911x_mac_complete(struct smsc911x_data
*pdata
)
217 SMSC_ASSERT_MAC_LOCK(pdata
);
219 for (i
= 0; i
< 40; i
++) {
220 val
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
221 if (!(val
& MAC_CSR_CMD_CSR_BUSY_
))
224 SMSC_WARNING(HW
, "Timed out waiting for MAC not BUSY. "
225 "MAC_CSR_CMD: 0x%08X", val
);
229 /* Fetches a MAC register value. Assumes mac_lock is acquired */
230 static u32
smsc911x_mac_read(struct smsc911x_data
*pdata
, unsigned int offset
)
234 SMSC_ASSERT_MAC_LOCK(pdata
);
236 temp
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
237 if (unlikely(temp
& MAC_CSR_CMD_CSR_BUSY_
)) {
238 SMSC_WARNING(HW
, "MAC busy at entry");
242 /* Send the MAC cmd */
243 smsc911x_reg_write(pdata
, MAC_CSR_CMD
, ((offset
& 0xFF) |
244 MAC_CSR_CMD_CSR_BUSY_
| MAC_CSR_CMD_R_NOT_W_
));
246 /* Workaround for hardware read-after-write restriction */
247 temp
= smsc911x_reg_read(pdata
, BYTE_TEST
);
249 /* Wait for the read to complete */
250 if (likely(smsc911x_mac_complete(pdata
) == 0))
251 return smsc911x_reg_read(pdata
, MAC_CSR_DATA
);
253 SMSC_WARNING(HW
, "MAC busy after read");
257 /* Set a mac register, mac_lock must be acquired before calling */
258 static void smsc911x_mac_write(struct smsc911x_data
*pdata
,
259 unsigned int offset
, u32 val
)
263 SMSC_ASSERT_MAC_LOCK(pdata
);
265 temp
= smsc911x_reg_read(pdata
, MAC_CSR_CMD
);
266 if (unlikely(temp
& MAC_CSR_CMD_CSR_BUSY_
)) {
268 "smsc911x_mac_write failed, MAC busy at entry");
272 /* Send data to write */
273 smsc911x_reg_write(pdata
, MAC_CSR_DATA
, val
);
275 /* Write the actual data */
276 smsc911x_reg_write(pdata
, MAC_CSR_CMD
, ((offset
& 0xFF) |
277 MAC_CSR_CMD_CSR_BUSY_
));
279 /* Workaround for hardware read-after-write restriction */
280 temp
= smsc911x_reg_read(pdata
, BYTE_TEST
);
282 /* Wait for the write to complete */
283 if (likely(smsc911x_mac_complete(pdata
) == 0))
287 "smsc911x_mac_write failed, MAC busy after write");
290 /* Get a phy register */
291 static int smsc911x_mii_read(struct mii_bus
*bus
, int phyaddr
, int regidx
)
293 struct smsc911x_data
*pdata
= (struct smsc911x_data
*)bus
->priv
;
298 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
300 /* Confirm MII not busy */
301 if (unlikely(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
303 "MII is busy in smsc911x_mii_read???");
308 /* Set the address, index & direction (read from PHY) */
309 addr
= ((phyaddr
& 0x1F) << 11) | ((regidx
& 0x1F) << 6);
310 smsc911x_mac_write(pdata
, MII_ACC
, addr
);
312 /* Wait for read to complete w/ timeout */
313 for (i
= 0; i
< 100; i
++)
314 if (!(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
315 reg
= smsc911x_mac_read(pdata
, MII_DATA
);
319 SMSC_WARNING(HW
, "Timed out waiting for MII write to finish");
323 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
327 /* Set a phy register */
328 static int smsc911x_mii_write(struct mii_bus
*bus
, int phyaddr
, int regidx
,
331 struct smsc911x_data
*pdata
= (struct smsc911x_data
*)bus
->priv
;
336 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
338 /* Confirm MII not busy */
339 if (unlikely(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
341 "MII is busy in smsc911x_mii_write???");
346 /* Put the data to write in the MAC */
347 smsc911x_mac_write(pdata
, MII_DATA
, val
);
349 /* Set the address, index & direction (write to PHY) */
350 addr
= ((phyaddr
& 0x1F) << 11) | ((regidx
& 0x1F) << 6) |
352 smsc911x_mac_write(pdata
, MII_ACC
, addr
);
354 /* Wait for write to complete w/ timeout */
355 for (i
= 0; i
< 100; i
++)
356 if (!(smsc911x_mac_read(pdata
, MII_ACC
) & MII_ACC_MII_BUSY_
)) {
361 SMSC_WARNING(HW
, "Timed out waiting for MII write to finish");
365 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
369 /* Autodetects and initialises external phy for SMSC9115 and SMSC9117 flavors.
370 * If something goes wrong, returns -ENODEV to revert back to internal phy.
371 * Performed at initialisation only, so interrupts are enabled */
372 static int smsc911x_phy_initialise_external(struct smsc911x_data
*pdata
)
374 unsigned int hwcfg
= smsc911x_reg_read(pdata
, HW_CFG
);
376 /* External phy is requested, supported, and detected */
377 if (hwcfg
& HW_CFG_EXT_PHY_DET_
) {
379 /* Switch to external phy. Assuming tx and rx are stopped
380 * because smsc911x_phy_initialise is called before
381 * smsc911x_rx_initialise and tx_initialise. */
383 /* Disable phy clocks to the MAC */
384 hwcfg
&= (~HW_CFG_PHY_CLK_SEL_
);
385 hwcfg
|= HW_CFG_PHY_CLK_SEL_CLK_DIS_
;
386 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
387 udelay(10); /* Enough time for clocks to stop */
389 /* Switch to external phy */
390 hwcfg
|= HW_CFG_EXT_PHY_EN_
;
391 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
393 /* Enable phy clocks to the MAC */
394 hwcfg
&= (~HW_CFG_PHY_CLK_SEL_
);
395 hwcfg
|= HW_CFG_PHY_CLK_SEL_EXT_PHY_
;
396 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
397 udelay(10); /* Enough time for clocks to restart */
399 hwcfg
|= HW_CFG_SMI_SEL_
;
400 smsc911x_reg_write(pdata
, HW_CFG
, hwcfg
);
402 SMSC_TRACE(HW
, "Successfully switched to external PHY");
403 pdata
->using_extphy
= 1;
405 SMSC_WARNING(HW
, "No external PHY detected, "
406 "Using internal PHY instead.");
407 /* Use internal phy */
413 /* Fetches a tx status out of the status fifo */
414 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data
*pdata
)
416 unsigned int result
=
417 smsc911x_reg_read(pdata
, TX_FIFO_INF
) & TX_FIFO_INF_TSUSED_
;
420 result
= smsc911x_reg_read(pdata
, TX_STATUS_FIFO
);
425 /* Fetches the next rx status */
426 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data
*pdata
)
428 unsigned int result
=
429 smsc911x_reg_read(pdata
, RX_FIFO_INF
) & RX_FIFO_INF_RXSUSED_
;
432 result
= smsc911x_reg_read(pdata
, RX_STATUS_FIFO
);
437 #ifdef USE_PHY_WORK_AROUND
438 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data
*pdata
)
445 for (tries
= 0; tries
< 10; tries
++) {
446 unsigned int txcmd_a
;
447 unsigned int txcmd_b
;
449 unsigned int pktlength
;
452 /* Zero-out rx packet memory */
453 memset(pdata
->loopback_rx_pkt
, 0, MIN_PACKET_SIZE
);
455 /* Write tx packet to 118 */
456 txcmd_a
= (u32
)((ulong
)pdata
->loopback_tx_pkt
& 0x03) << 16;
457 txcmd_a
|= TX_CMD_A_FIRST_SEG_
| TX_CMD_A_LAST_SEG_
;
458 txcmd_a
|= MIN_PACKET_SIZE
;
460 txcmd_b
= MIN_PACKET_SIZE
<< 16 | MIN_PACKET_SIZE
;
462 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, txcmd_a
);
463 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, txcmd_b
);
465 bufp
= (ulong
)pdata
->loopback_tx_pkt
& (~0x3);
466 wrsz
= MIN_PACKET_SIZE
+ 3;
467 wrsz
+= (u32
)((ulong
)pdata
->loopback_tx_pkt
& 0x3);
470 smsc911x_tx_writefifo(pdata
, (unsigned int *)bufp
, wrsz
);
472 /* Wait till transmit is done */
476 status
= smsc911x_tx_get_txstatus(pdata
);
477 } while ((i
--) && (!status
));
480 SMSC_WARNING(HW
, "Failed to transmit "
481 "during loopback test");
484 if (status
& TX_STS_ES_
) {
485 SMSC_WARNING(HW
, "Transmit encountered "
486 "errors during loopback test");
490 /* Wait till receive is done */
494 status
= smsc911x_rx_get_rxstatus(pdata
);
495 } while ((i
--) && (!status
));
499 "Failed to receive during loopback test");
502 if (status
& RX_STS_ES_
) {
503 SMSC_WARNING(HW
, "Receive encountered "
504 "errors during loopback test");
508 pktlength
= ((status
& 0x3FFF0000UL
) >> 16);
509 bufp
= (ulong
)pdata
->loopback_rx_pkt
;
510 rdsz
= pktlength
+ 3;
511 rdsz
+= (u32
)((ulong
)pdata
->loopback_rx_pkt
& 0x3);
514 smsc911x_rx_readfifo(pdata
, (unsigned int *)bufp
, rdsz
);
516 if (pktlength
!= (MIN_PACKET_SIZE
+ 4)) {
517 SMSC_WARNING(HW
, "Unexpected packet size "
518 "during loop back test, size=%d, will retry",
523 for (j
= 0; j
< MIN_PACKET_SIZE
; j
++) {
524 if (pdata
->loopback_tx_pkt
[j
]
525 != pdata
->loopback_rx_pkt
[j
]) {
531 SMSC_TRACE(HW
, "Successfully verified "
535 SMSC_WARNING(HW
, "Data mismatch "
536 "during loop back test, will retry");
544 static int smsc911x_phy_reset(struct smsc911x_data
*pdata
)
546 struct phy_device
*phy_dev
= pdata
->phy_dev
;
548 unsigned int i
= 100000;
551 BUG_ON(!phy_dev
->bus
);
553 SMSC_TRACE(HW
, "Performing PHY BCR Reset");
554 smsc911x_mii_write(phy_dev
->bus
, phy_dev
->addr
, MII_BMCR
, BMCR_RESET
);
557 temp
= smsc911x_mii_read(phy_dev
->bus
, phy_dev
->addr
,
559 } while ((i
--) && (temp
& BMCR_RESET
));
561 if (temp
& BMCR_RESET
) {
562 SMSC_WARNING(HW
, "PHY reset failed to complete.");
565 /* Extra delay required because the phy may not be completed with
566 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
567 * enough delay but using 1ms here to be safe */
573 static int smsc911x_phy_loopbacktest(struct net_device
*dev
)
575 struct smsc911x_data
*pdata
= netdev_priv(dev
);
576 struct phy_device
*phy_dev
= pdata
->phy_dev
;
581 /* Initialise tx packet using broadcast destination address */
582 memset(pdata
->loopback_tx_pkt
, 0xff, ETH_ALEN
);
584 /* Use incrementing source address */
585 for (i
= 6; i
< 12; i
++)
586 pdata
->loopback_tx_pkt
[i
] = (char)i
;
588 /* Set length type field */
589 pdata
->loopback_tx_pkt
[12] = 0x00;
590 pdata
->loopback_tx_pkt
[13] = 0x00;
592 for (i
= 14; i
< MIN_PACKET_SIZE
; i
++)
593 pdata
->loopback_tx_pkt
[i
] = (char)i
;
595 val
= smsc911x_reg_read(pdata
, HW_CFG
);
596 val
&= HW_CFG_TX_FIF_SZ_
;
598 smsc911x_reg_write(pdata
, HW_CFG
, val
);
600 smsc911x_reg_write(pdata
, TX_CFG
, TX_CFG_TX_ON_
);
601 smsc911x_reg_write(pdata
, RX_CFG
,
602 (u32
)((ulong
)pdata
->loopback_rx_pkt
& 0x03) << 8);
604 for (i
= 0; i
< 10; i
++) {
605 /* Set PHY to 10/FD, no ANEG, and loopback mode */
606 smsc911x_mii_write(phy_dev
->bus
, phy_dev
->addr
, MII_BMCR
,
607 BMCR_LOOPBACK
| BMCR_FULLDPLX
);
609 /* Enable MAC tx/rx, FD */
610 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
611 smsc911x_mac_write(pdata
, MAC_CR
, MAC_CR_FDPX_
612 | MAC_CR_TXEN_
| MAC_CR_RXEN_
);
613 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
615 if (smsc911x_phy_check_loopbackpkt(pdata
) == 0) {
622 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
623 smsc911x_mac_write(pdata
, MAC_CR
, 0);
624 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
626 smsc911x_phy_reset(pdata
);
630 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
631 smsc911x_mac_write(pdata
, MAC_CR
, 0);
632 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
634 /* Cancel PHY loopback mode */
635 smsc911x_mii_write(phy_dev
->bus
, phy_dev
->addr
, MII_BMCR
, 0);
637 smsc911x_reg_write(pdata
, TX_CFG
, 0);
638 smsc911x_reg_write(pdata
, RX_CFG
, 0);
642 #endif /* USE_PHY_WORK_AROUND */
644 static u8
smsc95xx_resolve_flowctrl_fulldplx(u16 lcladv
, u16 rmtadv
)
648 if (lcladv
& ADVERTISE_PAUSE_CAP
) {
649 if (lcladv
& ADVERTISE_PAUSE_ASYM
) {
650 if (rmtadv
& LPA_PAUSE_CAP
)
651 cap
= FLOW_CTRL_TX
| FLOW_CTRL_RX
;
652 else if (rmtadv
& LPA_PAUSE_ASYM
)
655 if (rmtadv
& LPA_PAUSE_CAP
)
656 cap
= FLOW_CTRL_TX
| FLOW_CTRL_RX
;
658 } else if (lcladv
& ADVERTISE_PAUSE_ASYM
) {
659 if ((rmtadv
& LPA_PAUSE_CAP
) && (rmtadv
& LPA_PAUSE_ASYM
))
666 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data
*pdata
)
668 struct phy_device
*phy_dev
= pdata
->phy_dev
;
669 u32 afc
= smsc911x_reg_read(pdata
, AFC_CFG
);
673 if (phy_dev
->duplex
== DUPLEX_FULL
) {
674 u16 lcladv
= phy_read(phy_dev
, MII_ADVERTISE
);
675 u16 rmtadv
= phy_read(phy_dev
, MII_LPA
);
676 u8 cap
= smsc95xx_resolve_flowctrl_fulldplx(lcladv
, rmtadv
);
678 if (cap
& FLOW_CTRL_RX
)
683 if (cap
& FLOW_CTRL_TX
)
688 SMSC_TRACE(HW
, "rx pause %s, tx pause %s",
689 (cap
& FLOW_CTRL_RX
? "enabled" : "disabled"),
690 (cap
& FLOW_CTRL_TX
? "enabled" : "disabled"));
692 SMSC_TRACE(HW
, "half duplex");
697 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
698 smsc911x_mac_write(pdata
, FLOW
, flow
);
699 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
701 smsc911x_reg_write(pdata
, AFC_CFG
, afc
);
704 /* Update link mode if anything has changed. Called periodically when the
705 * PHY is in polling mode, even if nothing has changed. */
706 static void smsc911x_phy_adjust_link(struct net_device
*dev
)
708 struct smsc911x_data
*pdata
= netdev_priv(dev
);
709 struct phy_device
*phy_dev
= pdata
->phy_dev
;
713 if (phy_dev
->duplex
!= pdata
->last_duplex
) {
715 SMSC_TRACE(HW
, "duplex state has changed");
717 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
718 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
719 if (phy_dev
->duplex
) {
721 "configuring for full duplex mode");
722 mac_cr
|= MAC_CR_FDPX_
;
725 "configuring for half duplex mode");
726 mac_cr
&= ~MAC_CR_FDPX_
;
728 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
729 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
731 smsc911x_phy_update_flowcontrol(pdata
);
732 pdata
->last_duplex
= phy_dev
->duplex
;
735 carrier
= netif_carrier_ok(dev
);
736 if (carrier
!= pdata
->last_carrier
) {
737 SMSC_TRACE(HW
, "carrier state has changed");
739 SMSC_TRACE(HW
, "configuring for carrier OK");
740 if ((pdata
->gpio_orig_setting
& GPIO_CFG_LED1_EN_
) &&
741 (!pdata
->using_extphy
)) {
742 /* Restore orginal GPIO configuration */
743 pdata
->gpio_setting
= pdata
->gpio_orig_setting
;
744 smsc911x_reg_write(pdata
, GPIO_CFG
,
745 pdata
->gpio_setting
);
748 SMSC_TRACE(HW
, "configuring for no carrier");
749 /* Check global setting that LED1
750 * usage is 10/100 indicator */
751 pdata
->gpio_setting
= smsc911x_reg_read(pdata
,
753 if ((pdata
->gpio_setting
& GPIO_CFG_LED1_EN_
)
754 && (!pdata
->using_extphy
)) {
755 /* Force 10/100 LED off, after saving
756 * orginal GPIO configuration */
757 pdata
->gpio_orig_setting
= pdata
->gpio_setting
;
759 pdata
->gpio_setting
&= ~GPIO_CFG_LED1_EN_
;
760 pdata
->gpio_setting
|= (GPIO_CFG_GPIOBUF0_
763 smsc911x_reg_write(pdata
, GPIO_CFG
,
764 pdata
->gpio_setting
);
767 pdata
->last_carrier
= carrier
;
771 static int smsc911x_mii_probe(struct net_device
*dev
)
773 struct smsc911x_data
*pdata
= netdev_priv(dev
);
774 struct phy_device
*phydev
= NULL
;
777 /* find the first phy */
778 for (phy_addr
= 0; phy_addr
< PHY_MAX_ADDR
; phy_addr
++) {
779 if (pdata
->mii_bus
->phy_map
[phy_addr
]) {
780 phydev
= pdata
->mii_bus
->phy_map
[phy_addr
];
781 SMSC_TRACE(PROBE
, "PHY %d: addr %d, phy_id 0x%08X",
782 phy_addr
, phydev
->addr
, phydev
->phy_id
);
788 pr_err("%s: no PHY found\n", dev
->name
);
792 phydev
= phy_connect(dev
, phydev
->dev
.bus_id
,
793 &smsc911x_phy_adjust_link
, 0, pdata
->phy_interface
);
795 if (IS_ERR(phydev
)) {
796 pr_err("%s: Could not attach to PHY\n", dev
->name
);
797 return PTR_ERR(phydev
);
800 pr_info("%s: attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
801 dev
->name
, phydev
->drv
->name
, phydev
->dev
.bus_id
, phydev
->irq
);
803 /* mask with MAC supported features */
804 phydev
->supported
&= (PHY_BASIC_FEATURES
| SUPPORTED_Pause
|
805 SUPPORTED_Asym_Pause
);
806 phydev
->advertising
= phydev
->supported
;
808 pdata
->phy_dev
= phydev
;
809 pdata
->last_duplex
= -1;
810 pdata
->last_carrier
= -1;
812 #ifdef USE_PHY_WORK_AROUND
813 if (smsc911x_phy_loopbacktest(dev
) < 0) {
814 SMSC_WARNING(HW
, "Failed Loop Back Test");
817 SMSC_TRACE(HW
, "Passed Loop Back Test");
818 #endif /* USE_PHY_WORK_AROUND */
820 SMSC_TRACE(HW
, "phy initialised succesfully");
824 static int __devinit
smsc911x_mii_init(struct platform_device
*pdev
,
825 struct net_device
*dev
)
827 struct smsc911x_data
*pdata
= netdev_priv(dev
);
830 pdata
->mii_bus
= mdiobus_alloc();
831 if (!pdata
->mii_bus
) {
836 pdata
->mii_bus
->name
= SMSC_MDIONAME
;
837 snprintf(pdata
->mii_bus
->id
, MII_BUS_ID_SIZE
, "%x", pdev
->id
);
838 pdata
->mii_bus
->priv
= pdata
;
839 pdata
->mii_bus
->read
= smsc911x_mii_read
;
840 pdata
->mii_bus
->write
= smsc911x_mii_write
;
841 pdata
->mii_bus
->irq
= pdata
->phy_irq
;
842 for (i
= 0; i
< PHY_MAX_ADDR
; ++i
)
843 pdata
->mii_bus
->irq
[i
] = PHY_POLL
;
845 pdata
->mii_bus
->parent
= &pdev
->dev
;
846 dev_set_drvdata(&pdev
->dev
, &pdata
->mii_bus
);
848 pdata
->using_extphy
= 0;
850 switch (pdata
->idrev
& 0xFFFF0000) {
855 /* External PHY supported, try to autodetect */
856 if (smsc911x_phy_initialise_external(pdata
) < 0) {
857 SMSC_TRACE(HW
, "No external PHY detected, "
858 "using internal PHY");
862 SMSC_TRACE(HW
, "External PHY is not supported, "
863 "using internal PHY");
867 if (!pdata
->using_extphy
) {
868 /* Mask all PHYs except ID 1 (internal) */
869 pdata
->mii_bus
->phy_mask
= ~(1 << 1);
872 if (mdiobus_register(pdata
->mii_bus
)) {
873 SMSC_WARNING(PROBE
, "Error registering mii bus");
874 goto err_out_free_bus_2
;
877 if (smsc911x_mii_probe(dev
) < 0) {
878 SMSC_WARNING(PROBE
, "Error registering mii bus");
879 goto err_out_unregister_bus_3
;
884 err_out_unregister_bus_3
:
885 mdiobus_unregister(pdata
->mii_bus
);
887 mdiobus_free(pdata
->mii_bus
);
892 /* Gets the number of tx statuses in the fifo */
893 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data
*pdata
)
895 return (smsc911x_reg_read(pdata
, TX_FIFO_INF
)
896 & TX_FIFO_INF_TSUSED_
) >> 16;
899 /* Reads tx statuses and increments counters where necessary */
900 static void smsc911x_tx_update_txcounters(struct net_device
*dev
)
902 struct smsc911x_data
*pdata
= netdev_priv(dev
);
903 unsigned int tx_stat
;
905 while ((tx_stat
= smsc911x_tx_get_txstatus(pdata
)) != 0) {
906 if (unlikely(tx_stat
& 0x80000000)) {
907 /* In this driver the packet tag is used as the packet
908 * length. Since a packet length can never reach the
909 * size of 0x8000, this bit is reserved. It is worth
910 * noting that the "reserved bit" in the warning above
911 * does not reference a hardware defined reserved bit
912 * but rather a driver defined one.
915 "Packet tag reserved bit is high");
917 if (unlikely(tx_stat
& 0x00008000)) {
918 dev
->stats
.tx_errors
++;
920 dev
->stats
.tx_packets
++;
921 dev
->stats
.tx_bytes
+= (tx_stat
>> 16);
923 if (unlikely(tx_stat
& 0x00000100)) {
924 dev
->stats
.collisions
+= 16;
925 dev
->stats
.tx_aborted_errors
+= 1;
927 dev
->stats
.collisions
+=
928 ((tx_stat
>> 3) & 0xF);
930 if (unlikely(tx_stat
& 0x00000800))
931 dev
->stats
.tx_carrier_errors
+= 1;
932 if (unlikely(tx_stat
& 0x00000200)) {
933 dev
->stats
.collisions
++;
934 dev
->stats
.tx_aborted_errors
++;
940 /* Increments the Rx error counters */
942 smsc911x_rx_counterrors(struct net_device
*dev
, unsigned int rxstat
)
946 if (unlikely(rxstat
& 0x00008000)) {
947 dev
->stats
.rx_errors
++;
948 if (unlikely(rxstat
& 0x00000002)) {
949 dev
->stats
.rx_crc_errors
++;
953 if (likely(!crc_err
)) {
954 if (unlikely((rxstat
& 0x00001020) == 0x00001020)) {
955 /* Frame type indicates length,
956 * and length error is set */
957 dev
->stats
.rx_length_errors
++;
959 if (rxstat
& RX_STS_MCAST_
)
960 dev
->stats
.multicast
++;
964 /* Quickly dumps bad packets */
966 smsc911x_rx_fastforward(struct smsc911x_data
*pdata
, unsigned int pktbytes
)
968 unsigned int pktwords
= (pktbytes
+ NET_IP_ALIGN
+ 3) >> 2;
970 if (likely(pktwords
>= 4)) {
971 unsigned int timeout
= 500;
973 smsc911x_reg_write(pdata
, RX_DP_CTRL
, RX_DP_CTRL_RX_FFWD_
);
976 val
= smsc911x_reg_read(pdata
, RX_DP_CTRL
);
977 } while (timeout
-- && (val
& RX_DP_CTRL_RX_FFWD_
));
979 if (unlikely(timeout
== 0))
980 SMSC_WARNING(HW
, "Timed out waiting for "
981 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val
);
985 temp
= smsc911x_reg_read(pdata
, RX_DATA_FIFO
);
989 /* NAPI poll function */
990 static int smsc911x_poll(struct napi_struct
*napi
, int budget
)
992 struct smsc911x_data
*pdata
=
993 container_of(napi
, struct smsc911x_data
, napi
);
994 struct net_device
*dev
= pdata
->dev
;
997 while (likely(netif_running(dev
)) && (npackets
< budget
)) {
998 unsigned int pktlength
;
999 unsigned int pktwords
;
1000 struct sk_buff
*skb
;
1001 unsigned int rxstat
= smsc911x_rx_get_rxstatus(pdata
);
1005 /* We processed all packets available. Tell NAPI it can
1006 * stop polling then re-enable rx interrupts */
1007 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RSFL_
);
1008 netif_rx_complete(dev
, napi
);
1009 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1010 temp
|= INT_EN_RSFL_EN_
;
1011 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1015 /* Count packet for NAPI scheduling, even if it has an error.
1016 * Error packets still require cycles to discard */
1019 pktlength
= ((rxstat
& 0x3FFF0000) >> 16);
1020 pktwords
= (pktlength
+ NET_IP_ALIGN
+ 3) >> 2;
1021 smsc911x_rx_counterrors(dev
, rxstat
);
1023 if (unlikely(rxstat
& RX_STS_ES_
)) {
1024 SMSC_WARNING(RX_ERR
,
1025 "Discarding packet with error bit set");
1026 /* Packet has an error, discard it and continue with
1028 smsc911x_rx_fastforward(pdata
, pktwords
);
1029 dev
->stats
.rx_dropped
++;
1033 skb
= netdev_alloc_skb(dev
, pktlength
+ NET_IP_ALIGN
);
1034 if (unlikely(!skb
)) {
1035 SMSC_WARNING(RX_ERR
,
1036 "Unable to allocate skb for rx packet");
1037 /* Drop the packet and stop this polling iteration */
1038 smsc911x_rx_fastforward(pdata
, pktwords
);
1039 dev
->stats
.rx_dropped
++;
1043 skb
->data
= skb
->head
;
1044 skb_reset_tail_pointer(skb
);
1046 /* Align IP on 16B boundary */
1047 skb_reserve(skb
, NET_IP_ALIGN
);
1048 skb_put(skb
, pktlength
- 4);
1049 smsc911x_rx_readfifo(pdata
, (unsigned int *)skb
->head
,
1051 skb
->protocol
= eth_type_trans(skb
, dev
);
1052 skb
->ip_summed
= CHECKSUM_NONE
;
1053 netif_receive_skb(skb
);
1055 /* Update counters */
1056 dev
->stats
.rx_packets
++;
1057 dev
->stats
.rx_bytes
+= (pktlength
- 4);
1058 dev
->last_rx
= jiffies
;
1061 /* Return total received packets */
1065 /* Returns hash bit number for given MAC address
1067 * 01 00 5E 00 00 01 -> returns bit number 31 */
1068 static unsigned int smsc911x_hash(char addr
[ETH_ALEN
])
1070 return (ether_crc(ETH_ALEN
, addr
) >> 26) & 0x3f;
1073 static void smsc911x_rx_multicast_update(struct smsc911x_data
*pdata
)
1075 /* Performs the multicast & mac_cr update. This is called when
1076 * safe on the current hardware, and with the mac_lock held */
1077 unsigned int mac_cr
;
1079 SMSC_ASSERT_MAC_LOCK(pdata
);
1081 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
1082 mac_cr
|= pdata
->set_bits_mask
;
1083 mac_cr
&= ~(pdata
->clear_bits_mask
);
1084 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
1085 smsc911x_mac_write(pdata
, HASHH
, pdata
->hashhi
);
1086 smsc911x_mac_write(pdata
, HASHL
, pdata
->hashlo
);
1087 SMSC_TRACE(HW
, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1088 mac_cr
, pdata
->hashhi
, pdata
->hashlo
);
1091 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data
*pdata
)
1093 unsigned int mac_cr
;
1095 /* This function is only called for older LAN911x devices
1096 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1097 * be modified during Rx - newer devices immediately update the
1100 * This is called from interrupt context */
1102 spin_lock(&pdata
->mac_lock
);
1104 /* Check Rx has stopped */
1105 if (smsc911x_mac_read(pdata
, MAC_CR
) & MAC_CR_RXEN_
)
1106 SMSC_WARNING(DRV
, "Rx not stopped");
1108 /* Perform the update - safe to do now Rx has stopped */
1109 smsc911x_rx_multicast_update(pdata
);
1112 mac_cr
= smsc911x_mac_read(pdata
, MAC_CR
);
1113 mac_cr
|= MAC_CR_RXEN_
;
1114 smsc911x_mac_write(pdata
, MAC_CR
, mac_cr
);
1116 pdata
->multicast_update_pending
= 0;
1118 spin_unlock(&pdata
->mac_lock
);
1121 static int smsc911x_soft_reset(struct smsc911x_data
*pdata
)
1123 unsigned int timeout
;
1126 /* Reset the LAN911x */
1127 smsc911x_reg_write(pdata
, HW_CFG
, HW_CFG_SRST_
);
1131 temp
= smsc911x_reg_read(pdata
, HW_CFG
);
1132 } while ((--timeout
) && (temp
& HW_CFG_SRST_
));
1134 if (unlikely(temp
& HW_CFG_SRST_
)) {
1135 SMSC_WARNING(DRV
, "Failed to complete reset");
1141 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1143 smsc911x_set_mac_address(struct smsc911x_data
*pdata
, u8 dev_addr
[6])
1145 u32 mac_high16
= (dev_addr
[5] << 8) | dev_addr
[4];
1146 u32 mac_low32
= (dev_addr
[3] << 24) | (dev_addr
[2] << 16) |
1147 (dev_addr
[1] << 8) | dev_addr
[0];
1149 SMSC_ASSERT_MAC_LOCK(pdata
);
1151 smsc911x_mac_write(pdata
, ADDRH
, mac_high16
);
1152 smsc911x_mac_write(pdata
, ADDRL
, mac_low32
);
1155 static int smsc911x_open(struct net_device
*dev
)
1157 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1158 unsigned int timeout
;
1160 unsigned int intcfg
;
1162 /* if the phy is not yet registered, retry later*/
1163 if (!pdata
->phy_dev
) {
1164 SMSC_WARNING(HW
, "phy_dev is NULL");
1168 if (!is_valid_ether_addr(dev
->dev_addr
)) {
1169 SMSC_WARNING(HW
, "dev_addr is not a valid MAC address");
1170 return -EADDRNOTAVAIL
;
1173 /* Reset the LAN911x */
1174 if (smsc911x_soft_reset(pdata
)) {
1175 SMSC_WARNING(HW
, "soft reset failed");
1179 smsc911x_reg_write(pdata
, HW_CFG
, 0x00050000);
1180 smsc911x_reg_write(pdata
, AFC_CFG
, 0x006E3740);
1182 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1184 while ((timeout
--) &&
1185 (smsc911x_reg_read(pdata
, E2P_CMD
) & E2P_CMD_EPC_BUSY_
)) {
1189 if (unlikely(timeout
== 0))
1191 "Timed out waiting for EEPROM busy bit to clear");
1193 smsc911x_reg_write(pdata
, GPIO_CFG
, 0x70070000);
1195 /* The soft reset above cleared the device's MAC address,
1196 * restore it from local copy (set in probe) */
1197 spin_lock_irq(&pdata
->mac_lock
);
1198 smsc911x_set_mac_address(pdata
, dev
->dev_addr
);
1199 spin_unlock_irq(&pdata
->mac_lock
);
1201 /* Initialise irqs, but leave all sources disabled */
1202 smsc911x_reg_write(pdata
, INT_EN
, 0);
1203 smsc911x_reg_write(pdata
, INT_STS
, 0xFFFFFFFF);
1205 /* Set interrupt deassertion to 100uS */
1206 intcfg
= ((10 << 24) | INT_CFG_IRQ_EN_
);
1208 if (pdata
->irq_polarity
) {
1209 SMSC_TRACE(IFUP
, "irq polarity: active high");
1210 intcfg
|= INT_CFG_IRQ_POL_
;
1212 SMSC_TRACE(IFUP
, "irq polarity: active low");
1215 if (pdata
->irq_type
) {
1216 SMSC_TRACE(IFUP
, "irq type: push-pull");
1217 intcfg
|= INT_CFG_IRQ_TYPE_
;
1219 SMSC_TRACE(IFUP
, "irq type: open drain");
1222 smsc911x_reg_write(pdata
, INT_CFG
, intcfg
);
1224 SMSC_TRACE(IFUP
, "Testing irq handler using IRQ %d", dev
->irq
);
1225 pdata
->software_irq_signal
= 0;
1228 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1229 temp
|= INT_EN_SW_INT_EN_
;
1230 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1234 if (pdata
->software_irq_signal
)
1239 if (!pdata
->software_irq_signal
) {
1240 dev_warn(&dev
->dev
, "ISR failed signaling test (IRQ %d)\n",
1244 SMSC_TRACE(IFUP
, "IRQ handler passed test using IRQ %d", dev
->irq
);
1246 dev_info(&dev
->dev
, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1247 (unsigned long)pdata
->ioaddr
, dev
->irq
);
1249 /* Bring the PHY up */
1250 phy_start(pdata
->phy_dev
);
1252 temp
= smsc911x_reg_read(pdata
, HW_CFG
);
1253 /* Preserve TX FIFO size and external PHY configuration */
1254 temp
&= (HW_CFG_TX_FIF_SZ_
|0x00000FFF);
1256 smsc911x_reg_write(pdata
, HW_CFG
, temp
);
1258 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1259 temp
|= FIFO_INT_TX_AVAIL_LEVEL_
;
1260 temp
&= ~(FIFO_INT_RX_STS_LEVEL_
);
1261 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1263 /* set RX Data offset to 2 bytes for alignment */
1264 smsc911x_reg_write(pdata
, RX_CFG
, (2 << 8));
1266 /* enable NAPI polling before enabling RX interrupts */
1267 napi_enable(&pdata
->napi
);
1269 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1270 temp
|= (INT_EN_TDFA_EN_
| INT_EN_RSFL_EN_
);
1271 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1273 spin_lock_irq(&pdata
->mac_lock
);
1274 temp
= smsc911x_mac_read(pdata
, MAC_CR
);
1275 temp
|= (MAC_CR_TXEN_
| MAC_CR_RXEN_
| MAC_CR_HBDIS_
);
1276 smsc911x_mac_write(pdata
, MAC_CR
, temp
);
1277 spin_unlock_irq(&pdata
->mac_lock
);
1279 smsc911x_reg_write(pdata
, TX_CFG
, TX_CFG_TX_ON_
);
1281 netif_start_queue(dev
);
1285 /* Entry point for stopping the interface */
1286 static int smsc911x_stop(struct net_device
*dev
)
1288 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1291 BUG_ON(!pdata
->phy_dev
);
1293 /* Disable all device interrupts */
1294 temp
= smsc911x_reg_read(pdata
, INT_CFG
);
1295 temp
&= ~INT_CFG_IRQ_EN_
;
1296 smsc911x_reg_write(pdata
, INT_CFG
, temp
);
1298 /* Stop Tx and Rx polling */
1299 netif_stop_queue(dev
);
1300 napi_disable(&pdata
->napi
);
1302 /* At this point all Rx and Tx activity is stopped */
1303 dev
->stats
.rx_dropped
+= smsc911x_reg_read(pdata
, RX_DROP
);
1304 smsc911x_tx_update_txcounters(dev
);
1306 /* Bring the PHY down */
1307 phy_stop(pdata
->phy_dev
);
1309 SMSC_TRACE(IFDOWN
, "Interface stopped");
1313 /* Entry point for transmitting a packet */
1314 static int smsc911x_hard_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1316 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1317 unsigned int freespace
;
1318 unsigned int tx_cmd_a
;
1319 unsigned int tx_cmd_b
;
1324 freespace
= smsc911x_reg_read(pdata
, TX_FIFO_INF
) & TX_FIFO_INF_TDFREE_
;
1326 if (unlikely(freespace
< TX_FIFO_LOW_THRESHOLD
))
1327 SMSC_WARNING(TX_ERR
,
1328 "Tx data fifo low, space available: %d", freespace
);
1330 /* Word alignment adjustment */
1331 tx_cmd_a
= (u32
)((ulong
)skb
->data
& 0x03) << 16;
1332 tx_cmd_a
|= TX_CMD_A_FIRST_SEG_
| TX_CMD_A_LAST_SEG_
;
1333 tx_cmd_a
|= (unsigned int)skb
->len
;
1335 tx_cmd_b
= ((unsigned int)skb
->len
) << 16;
1336 tx_cmd_b
|= (unsigned int)skb
->len
;
1338 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, tx_cmd_a
);
1339 smsc911x_reg_write(pdata
, TX_DATA_FIFO
, tx_cmd_b
);
1341 bufp
= (ulong
)skb
->data
& (~0x3);
1342 wrsz
= (u32
)skb
->len
+ 3;
1343 wrsz
+= (u32
)((ulong
)skb
->data
& 0x3);
1346 smsc911x_tx_writefifo(pdata
, (unsigned int *)bufp
, wrsz
);
1347 freespace
-= (skb
->len
+ 32);
1349 dev
->trans_start
= jiffies
;
1351 if (unlikely(smsc911x_tx_get_txstatcount(pdata
) >= 30))
1352 smsc911x_tx_update_txcounters(dev
);
1354 if (freespace
< TX_FIFO_LOW_THRESHOLD
) {
1355 netif_stop_queue(dev
);
1356 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1359 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1362 return NETDEV_TX_OK
;
1365 /* Entry point for getting status counters */
1366 static struct net_device_stats
*smsc911x_get_stats(struct net_device
*dev
)
1368 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1369 smsc911x_tx_update_txcounters(dev
);
1370 dev
->stats
.rx_dropped
+= smsc911x_reg_read(pdata
, RX_DROP
);
1374 /* Entry point for setting addressing modes */
1375 static void smsc911x_set_multicast_list(struct net_device
*dev
)
1377 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1378 unsigned long flags
;
1380 if (dev
->flags
& IFF_PROMISC
) {
1381 /* Enabling promiscuous mode */
1382 pdata
->set_bits_mask
= MAC_CR_PRMS_
;
1383 pdata
->clear_bits_mask
= (MAC_CR_MCPAS_
| MAC_CR_HPFILT_
);
1386 } else if (dev
->flags
& IFF_ALLMULTI
) {
1387 /* Enabling all multicast mode */
1388 pdata
->set_bits_mask
= MAC_CR_MCPAS_
;
1389 pdata
->clear_bits_mask
= (MAC_CR_PRMS_
| MAC_CR_HPFILT_
);
1392 } else if (dev
->mc_count
> 0) {
1393 /* Enabling specific multicast addresses */
1394 unsigned int hash_high
= 0;
1395 unsigned int hash_low
= 0;
1396 unsigned int count
= 0;
1397 struct dev_mc_list
*mc_list
= dev
->mc_list
;
1399 pdata
->set_bits_mask
= MAC_CR_HPFILT_
;
1400 pdata
->clear_bits_mask
= (MAC_CR_PRMS_
| MAC_CR_MCPAS_
);
1404 if ((mc_list
->dmi_addrlen
) == ETH_ALEN
) {
1405 unsigned int bitnum
=
1406 smsc911x_hash(mc_list
->dmi_addr
);
1407 unsigned int mask
= 0x01 << (bitnum
& 0x1F);
1413 SMSC_WARNING(DRV
, "dmi_addrlen != 6");
1415 mc_list
= mc_list
->next
;
1417 if (count
!= (unsigned int)dev
->mc_count
)
1418 SMSC_WARNING(DRV
, "mc_count != dev->mc_count");
1420 pdata
->hashhi
= hash_high
;
1421 pdata
->hashlo
= hash_low
;
1423 /* Enabling local MAC address only */
1424 pdata
->set_bits_mask
= 0;
1425 pdata
->clear_bits_mask
=
1426 (MAC_CR_PRMS_
| MAC_CR_MCPAS_
| MAC_CR_HPFILT_
);
1431 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
1433 if (pdata
->generation
<= 1) {
1434 /* Older hardware revision - cannot change these flags while
1436 if (!pdata
->multicast_update_pending
) {
1438 SMSC_TRACE(HW
, "scheduling mcast update");
1439 pdata
->multicast_update_pending
= 1;
1441 /* Request the hardware to stop, then perform the
1442 * update when we get an RX_STOP interrupt */
1443 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RXSTOP_INT_
);
1444 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1445 temp
|= INT_EN_RXSTOP_INT_EN_
;
1446 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1448 temp
= smsc911x_mac_read(pdata
, MAC_CR
);
1449 temp
&= ~(MAC_CR_RXEN_
);
1450 smsc911x_mac_write(pdata
, MAC_CR
, temp
);
1452 /* There is another update pending, this should now
1453 * use the newer values */
1456 /* Newer hardware revision - can write immediately */
1457 smsc911x_rx_multicast_update(pdata
);
1460 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
1463 static irqreturn_t
smsc911x_irqhandler(int irq
, void *dev_id
)
1465 struct net_device
*dev
= dev_id
;
1466 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1467 u32 intsts
= smsc911x_reg_read(pdata
, INT_STS
);
1468 u32 inten
= smsc911x_reg_read(pdata
, INT_EN
);
1469 int serviced
= IRQ_NONE
;
1472 if (unlikely(intsts
& inten
& INT_STS_SW_INT_
)) {
1473 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1474 temp
&= (~INT_EN_SW_INT_EN_
);
1475 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1476 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_SW_INT_
);
1477 pdata
->software_irq_signal
= 1;
1479 serviced
= IRQ_HANDLED
;
1482 if (unlikely(intsts
& inten
& INT_STS_RXSTOP_INT_
)) {
1483 /* Called when there is a multicast update scheduled and
1484 * it is now safe to complete the update */
1485 SMSC_TRACE(INTR
, "RX Stop interrupt");
1486 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1487 temp
&= (~INT_EN_RXSTOP_INT_EN_
);
1488 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1489 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RXSTOP_INT_
);
1490 smsc911x_rx_multicast_update_workaround(pdata
);
1491 serviced
= IRQ_HANDLED
;
1494 if (intsts
& inten
& INT_STS_TDFA_
) {
1495 temp
= smsc911x_reg_read(pdata
, FIFO_INT
);
1496 temp
|= FIFO_INT_TX_AVAIL_LEVEL_
;
1497 smsc911x_reg_write(pdata
, FIFO_INT
, temp
);
1498 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_TDFA_
);
1499 netif_wake_queue(dev
);
1500 serviced
= IRQ_HANDLED
;
1503 if (unlikely(intsts
& inten
& INT_STS_RXE_
)) {
1504 SMSC_TRACE(INTR
, "RX Error interrupt");
1505 smsc911x_reg_write(pdata
, INT_STS
, INT_STS_RXE_
);
1506 serviced
= IRQ_HANDLED
;
1509 if (likely(intsts
& inten
& INT_STS_RSFL_
)) {
1510 if (likely(netif_rx_schedule_prep(dev
, &pdata
->napi
))) {
1511 /* Disable Rx interrupts */
1512 temp
= smsc911x_reg_read(pdata
, INT_EN
);
1513 temp
&= (~INT_EN_RSFL_EN_
);
1514 smsc911x_reg_write(pdata
, INT_EN
, temp
);
1515 /* Schedule a NAPI poll */
1516 __netif_rx_schedule(dev
, &pdata
->napi
);
1518 SMSC_WARNING(RX_ERR
,
1519 "netif_rx_schedule_prep failed");
1521 serviced
= IRQ_HANDLED
;
1527 #ifdef CONFIG_NET_POLL_CONTROLLER
1528 void smsc911x_poll_controller(struct net_device
*dev
)
1530 disable_irq(dev
->irq
);
1531 smsc911x_irqhandler(0, dev
);
1532 enable_irq(dev
->irq
);
1534 #endif /* CONFIG_NET_POLL_CONTROLLER */
1536 /* Standard ioctls for mii-tool */
1537 static int smsc911x_do_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
1539 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1541 if (!netif_running(dev
) || !pdata
->phy_dev
)
1544 return phy_mii_ioctl(pdata
->phy_dev
, if_mii(ifr
), cmd
);
1548 smsc911x_ethtool_getsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1550 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1554 return phy_ethtool_gset(pdata
->phy_dev
, cmd
);
1558 smsc911x_ethtool_setsettings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1560 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1562 return phy_ethtool_sset(pdata
->phy_dev
, cmd
);
1565 static void smsc911x_ethtool_getdrvinfo(struct net_device
*dev
,
1566 struct ethtool_drvinfo
*info
)
1568 strlcpy(info
->driver
, SMSC_CHIPNAME
, sizeof(info
->driver
));
1569 strlcpy(info
->version
, SMSC_DRV_VERSION
, sizeof(info
->version
));
1570 strlcpy(info
->bus_info
, dev
->dev
.parent
->bus_id
,
1571 sizeof(info
->bus_info
));
1574 static int smsc911x_ethtool_nwayreset(struct net_device
*dev
)
1576 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1578 return phy_start_aneg(pdata
->phy_dev
);
1581 static u32
smsc911x_ethtool_getmsglevel(struct net_device
*dev
)
1583 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1584 return pdata
->msg_enable
;
1587 static void smsc911x_ethtool_setmsglevel(struct net_device
*dev
, u32 level
)
1589 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1590 pdata
->msg_enable
= level
;
1593 static int smsc911x_ethtool_getregslen(struct net_device
*dev
)
1595 return (((E2P_DATA
- ID_REV
) / 4 + 1) + (WUCSR
- MAC_CR
) + 1 + 32) *
1600 smsc911x_ethtool_getregs(struct net_device
*dev
, struct ethtool_regs
*regs
,
1603 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1604 struct phy_device
*phy_dev
= pdata
->phy_dev
;
1605 unsigned long flags
;
1610 regs
->version
= pdata
->idrev
;
1611 for (i
= ID_REV
; i
<= E2P_DATA
; i
+= (sizeof(u32
)))
1612 data
[j
++] = smsc911x_reg_read(pdata
, i
);
1614 for (i
= MAC_CR
; i
<= WUCSR
; i
++) {
1615 spin_lock_irqsave(&pdata
->mac_lock
, flags
);
1616 data
[j
++] = smsc911x_mac_read(pdata
, i
);
1617 spin_unlock_irqrestore(&pdata
->mac_lock
, flags
);
1620 for (i
= 0; i
<= 31; i
++)
1621 data
[j
++] = smsc911x_mii_read(phy_dev
->bus
, phy_dev
->addr
, i
);
1624 static void smsc911x_eeprom_enable_access(struct smsc911x_data
*pdata
)
1626 unsigned int temp
= smsc911x_reg_read(pdata
, GPIO_CFG
);
1627 temp
&= ~GPIO_CFG_EEPR_EN_
;
1628 smsc911x_reg_write(pdata
, GPIO_CFG
, temp
);
1632 static int smsc911x_eeprom_send_cmd(struct smsc911x_data
*pdata
, u32 op
)
1637 SMSC_TRACE(DRV
, "op 0x%08x", op
);
1638 if (smsc911x_reg_read(pdata
, E2P_CMD
) & E2P_CMD_EPC_BUSY_
) {
1639 SMSC_WARNING(DRV
, "Busy at start");
1643 e2cmd
= op
| E2P_CMD_EPC_BUSY_
;
1644 smsc911x_reg_write(pdata
, E2P_CMD
, e2cmd
);
1648 e2cmd
= smsc911x_reg_read(pdata
, E2P_CMD
);
1649 } while ((e2cmd
& E2P_CMD_EPC_BUSY_
) && (timeout
--));
1652 SMSC_TRACE(DRV
, "TIMED OUT");
1656 if (e2cmd
& E2P_CMD_EPC_TIMEOUT_
) {
1657 SMSC_TRACE(DRV
, "Error occured during eeprom operation");
1664 static int smsc911x_eeprom_read_location(struct smsc911x_data
*pdata
,
1665 u8 address
, u8
*data
)
1667 u32 op
= E2P_CMD_EPC_CMD_READ_
| address
;
1670 SMSC_TRACE(DRV
, "address 0x%x", address
);
1671 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
1674 data
[address
] = smsc911x_reg_read(pdata
, E2P_DATA
);
1679 static int smsc911x_eeprom_write_location(struct smsc911x_data
*pdata
,
1680 u8 address
, u8 data
)
1682 u32 op
= E2P_CMD_EPC_CMD_ERASE_
| address
;
1685 SMSC_TRACE(DRV
, "address 0x%x, data 0x%x", address
, data
);
1686 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
1689 op
= E2P_CMD_EPC_CMD_WRITE_
| address
;
1690 smsc911x_reg_write(pdata
, E2P_DATA
, (u32
)data
);
1691 ret
= smsc911x_eeprom_send_cmd(pdata
, op
);
1697 static int smsc911x_ethtool_get_eeprom_len(struct net_device
*dev
)
1699 return SMSC911X_EEPROM_SIZE
;
1702 static int smsc911x_ethtool_get_eeprom(struct net_device
*dev
,
1703 struct ethtool_eeprom
*eeprom
, u8
*data
)
1705 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1706 u8 eeprom_data
[SMSC911X_EEPROM_SIZE
];
1710 smsc911x_eeprom_enable_access(pdata
);
1712 len
= min(eeprom
->len
, SMSC911X_EEPROM_SIZE
);
1713 for (i
= 0; i
< len
; i
++) {
1714 int ret
= smsc911x_eeprom_read_location(pdata
, i
, eeprom_data
);
1721 memcpy(data
, &eeprom_data
[eeprom
->offset
], len
);
1726 static int smsc911x_ethtool_set_eeprom(struct net_device
*dev
,
1727 struct ethtool_eeprom
*eeprom
, u8
*data
)
1730 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1732 smsc911x_eeprom_enable_access(pdata
);
1733 smsc911x_eeprom_send_cmd(pdata
, E2P_CMD_EPC_CMD_EWEN_
);
1734 ret
= smsc911x_eeprom_write_location(pdata
, eeprom
->offset
, *data
);
1735 smsc911x_eeprom_send_cmd(pdata
, E2P_CMD_EPC_CMD_EWDS_
);
1737 /* Single byte write, according to man page */
1743 static struct ethtool_ops smsc911x_ethtool_ops
= {
1744 .get_settings
= smsc911x_ethtool_getsettings
,
1745 .set_settings
= smsc911x_ethtool_setsettings
,
1746 .get_link
= ethtool_op_get_link
,
1747 .get_drvinfo
= smsc911x_ethtool_getdrvinfo
,
1748 .nway_reset
= smsc911x_ethtool_nwayreset
,
1749 .get_msglevel
= smsc911x_ethtool_getmsglevel
,
1750 .set_msglevel
= smsc911x_ethtool_setmsglevel
,
1751 .get_regs_len
= smsc911x_ethtool_getregslen
,
1752 .get_regs
= smsc911x_ethtool_getregs
,
1753 .get_eeprom_len
= smsc911x_ethtool_get_eeprom_len
,
1754 .get_eeprom
= smsc911x_ethtool_get_eeprom
,
1755 .set_eeprom
= smsc911x_ethtool_set_eeprom
,
1758 /* Initializing private device structures, only called from probe */
1759 static int __devinit
smsc911x_init(struct net_device
*dev
)
1761 struct smsc911x_data
*pdata
= netdev_priv(dev
);
1762 unsigned int byte_test
;
1764 SMSC_TRACE(PROBE
, "Driver Parameters:");
1765 SMSC_TRACE(PROBE
, "LAN base: 0x%08lX",
1766 (unsigned long)pdata
->ioaddr
);
1767 SMSC_TRACE(PROBE
, "IRQ: %d", dev
->irq
);
1768 SMSC_TRACE(PROBE
, "PHY will be autodetected.");
1770 #if (!SMSC_CAN_USE_32BIT)
1771 spin_lock_init(&pdata
->dev_lock
);
1774 if (pdata
->ioaddr
== 0) {
1775 SMSC_WARNING(PROBE
, "pdata->ioaddr: 0x00000000");
1779 /* Check byte ordering */
1780 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
1781 SMSC_TRACE(PROBE
, "BYTE_TEST: 0x%08X", byte_test
);
1782 if (byte_test
== 0x43218765) {
1783 SMSC_TRACE(PROBE
, "BYTE_TEST looks swapped, "
1784 "applying WORD_SWAP");
1785 smsc911x_reg_write(pdata
, WORD_SWAP
, 0xffffffff);
1787 /* 1 dummy read of BYTE_TEST is needed after a write to
1788 * WORD_SWAP before its contents are valid */
1789 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
1791 byte_test
= smsc911x_reg_read(pdata
, BYTE_TEST
);
1794 if (byte_test
!= 0x87654321) {
1795 SMSC_WARNING(DRV
, "BYTE_TEST: 0x%08X", byte_test
);
1796 if (((byte_test
>> 16) & 0xFFFF) == (byte_test
& 0xFFFF)) {
1798 "top 16 bits equal to bottom 16 bits");
1799 SMSC_TRACE(PROBE
, "This may mean the chip is set "
1800 "for 32 bit while the bus is reading 16 bit");
1805 /* Default generation to zero (all workarounds apply) */
1806 pdata
->generation
= 0;
1808 pdata
->idrev
= smsc911x_reg_read(pdata
, ID_REV
);
1809 switch (pdata
->idrev
& 0xFFFF0000) {
1814 /* LAN911[5678] family */
1815 pdata
->generation
= pdata
->idrev
& 0x0000FFFF;
1822 /* LAN921[5678] family */
1823 pdata
->generation
= 3;
1830 /* LAN9210/LAN9211/LAN9220/LAN9221 */
1831 pdata
->generation
= 4;
1835 SMSC_WARNING(PROBE
, "LAN911x not identified, idrev: 0x%08X",
1840 SMSC_TRACE(PROBE
, "LAN911x identified, idrev: 0x%08X, generation: %d",
1841 pdata
->idrev
, pdata
->generation
);
1843 if (pdata
->generation
== 0)
1845 "This driver is not intended for this chip revision");
1847 /* Reset the LAN911x */
1848 if (smsc911x_soft_reset(pdata
))
1851 /* Disable all interrupt sources until we bring the device up */
1852 smsc911x_reg_write(pdata
, INT_EN
, 0);
1855 dev
->open
= smsc911x_open
;
1856 dev
->stop
= smsc911x_stop
;
1857 dev
->hard_start_xmit
= smsc911x_hard_start_xmit
;
1858 dev
->get_stats
= smsc911x_get_stats
;
1859 dev
->set_multicast_list
= smsc911x_set_multicast_list
;
1860 dev
->flags
|= IFF_MULTICAST
;
1861 dev
->do_ioctl
= smsc911x_do_ioctl
;
1862 netif_napi_add(dev
, &pdata
->napi
, smsc911x_poll
, SMSC_NAPI_WEIGHT
);
1863 dev
->ethtool_ops
= &smsc911x_ethtool_ops
;
1865 #ifdef CONFIG_NET_POLL_CONTROLLER
1866 dev
->poll_controller
= smsc911x_poll_controller
;
1867 #endif /* CONFIG_NET_POLL_CONTROLLER */
1872 static int __devexit
smsc911x_drv_remove(struct platform_device
*pdev
)
1874 struct net_device
*dev
;
1875 struct smsc911x_data
*pdata
;
1876 struct resource
*res
;
1878 dev
= platform_get_drvdata(pdev
);
1880 pdata
= netdev_priv(dev
);
1882 BUG_ON(!pdata
->ioaddr
);
1883 BUG_ON(!pdata
->phy_dev
);
1885 SMSC_TRACE(IFDOWN
, "Stopping driver.");
1887 phy_disconnect(pdata
->phy_dev
);
1888 pdata
->phy_dev
= NULL
;
1889 mdiobus_unregister(pdata
->mii_bus
);
1890 mdiobus_free(pdata
->mii_bus
);
1892 platform_set_drvdata(pdev
, NULL
);
1893 unregister_netdev(dev
);
1894 free_irq(dev
->irq
, dev
);
1895 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
,
1898 platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1900 release_mem_region(res
->start
, res
->end
- res
->start
);
1902 iounmap(pdata
->ioaddr
);
1909 static int __devinit
smsc911x_drv_probe(struct platform_device
*pdev
)
1911 struct net_device
*dev
;
1912 struct smsc911x_data
*pdata
;
1913 struct resource
*res
;
1914 unsigned int intcfg
= 0;
1917 DECLARE_MAC_BUF(mac
);
1919 pr_info("%s: Driver version %s.\n", SMSC_CHIPNAME
, SMSC_DRV_VERSION
);
1921 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
,
1924 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1926 pr_warning("%s: Could not allocate resource.\n",
1931 res_size
= res
->end
- res
->start
;
1933 if (!request_mem_region(res
->start
, res_size
, SMSC_CHIPNAME
)) {
1938 dev
= alloc_etherdev(sizeof(struct smsc911x_data
));
1940 pr_warning("%s: Could not allocate device.\n", SMSC_CHIPNAME
);
1942 goto out_release_io_1
;
1945 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1947 pdata
= netdev_priv(dev
);
1949 dev
->irq
= platform_get_irq(pdev
, 0);
1950 pdata
->ioaddr
= ioremap_nocache(res
->start
, res_size
);
1952 /* copy config parameters across if present, otherwise pdata
1953 * defaults to zeros */
1954 if (pdev
->dev
.platform_data
) {
1955 struct smsc911x_platform_config
*config
=
1956 pdev
->dev
.platform_data
;
1957 pdata
->irq_polarity
= config
->irq_polarity
;
1958 pdata
->irq_type
= config
->irq_type
;
1959 pdata
->phy_interface
= config
->phy_interface
;
1963 pdata
->msg_enable
= ((1 << debug
) - 1);
1965 if (pdata
->ioaddr
== NULL
) {
1967 "Error smsc911x base address invalid");
1969 goto out_free_netdev_2
;
1972 retval
= smsc911x_init(dev
);
1974 goto out_unmap_io_3
;
1976 /* configure irq polarity and type before connecting isr */
1977 if (pdata
->irq_polarity
== SMSC911X_IRQ_POLARITY_ACTIVE_HIGH
)
1978 intcfg
|= INT_CFG_IRQ_POL_
;
1980 if (pdata
->irq_type
== SMSC911X_IRQ_TYPE_PUSH_PULL
)
1981 intcfg
|= INT_CFG_IRQ_TYPE_
;
1983 smsc911x_reg_write(pdata
, INT_CFG
, intcfg
);
1985 /* Ensure interrupts are globally disabled before connecting ISR */
1986 smsc911x_reg_write(pdata
, INT_EN
, 0);
1987 smsc911x_reg_write(pdata
, INT_STS
, 0xFFFFFFFF);
1989 retval
= request_irq(dev
->irq
, smsc911x_irqhandler
, IRQF_DISABLED
,
1990 SMSC_CHIPNAME
, dev
);
1993 "Unable to claim requested irq: %d", dev
->irq
);
1994 goto out_unmap_io_3
;
1997 platform_set_drvdata(pdev
, dev
);
1999 retval
= register_netdev(dev
);
2002 "Error %i registering device", retval
);
2003 goto out_unset_drvdata_4
;
2005 SMSC_TRACE(PROBE
, "Network interface: \"%s\"", dev
->name
);
2008 spin_lock_init(&pdata
->mac_lock
);
2010 retval
= smsc911x_mii_init(pdev
, dev
);
2013 "Error %i initialising mii", retval
);
2014 goto out_unregister_netdev_5
;
2017 spin_lock_irq(&pdata
->mac_lock
);
2019 /* Check if mac address has been specified when bringing interface up */
2020 if (is_valid_ether_addr(dev
->dev_addr
)) {
2021 smsc911x_set_mac_address(pdata
, dev
->dev_addr
);
2022 SMSC_TRACE(PROBE
, "MAC Address is specified by configuration");
2024 /* Try reading mac address from device. if EEPROM is present
2025 * it will already have been set */
2026 u32 mac_high16
= smsc911x_mac_read(pdata
, ADDRH
);
2027 u32 mac_low32
= smsc911x_mac_read(pdata
, ADDRL
);
2028 dev
->dev_addr
[0] = (u8
)(mac_low32
);
2029 dev
->dev_addr
[1] = (u8
)(mac_low32
>> 8);
2030 dev
->dev_addr
[2] = (u8
)(mac_low32
>> 16);
2031 dev
->dev_addr
[3] = (u8
)(mac_low32
>> 24);
2032 dev
->dev_addr
[4] = (u8
)(mac_high16
);
2033 dev
->dev_addr
[5] = (u8
)(mac_high16
>> 8);
2035 if (is_valid_ether_addr(dev
->dev_addr
)) {
2036 /* eeprom values are valid so use them */
2038 "Mac Address is read from LAN911x EEPROM");
2040 /* eeprom values are invalid, generate random MAC */
2041 random_ether_addr(dev
->dev_addr
);
2042 smsc911x_set_mac_address(pdata
, dev
->dev_addr
);
2044 "MAC Address is set to random_ether_addr");
2048 spin_unlock_irq(&pdata
->mac_lock
);
2050 dev_info(&dev
->dev
, "MAC Address: %s\n",
2051 print_mac(mac
, dev
->dev_addr
));
2055 out_unregister_netdev_5
:
2056 unregister_netdev(dev
);
2057 out_unset_drvdata_4
:
2058 platform_set_drvdata(pdev
, NULL
);
2059 free_irq(dev
->irq
, dev
);
2061 iounmap(pdata
->ioaddr
);
2065 release_mem_region(res
->start
, res
->end
- res
->start
);
2070 static struct platform_driver smsc911x_driver
= {
2071 .probe
= smsc911x_drv_probe
,
2072 .remove
= smsc911x_drv_remove
,
2074 .name
= SMSC_CHIPNAME
,
2078 /* Entry point for loading the module */
2079 static int __init
smsc911x_init_module(void)
2081 return platform_driver_register(&smsc911x_driver
);
2084 /* entry point for unloading the module */
2085 static void __exit
smsc911x_cleanup_module(void)
2087 platform_driver_unregister(&smsc911x_driver
);
2090 module_init(smsc911x_init_module
);
2091 module_exit(smsc911x_cleanup_module
);