ARM: 6668/1: ptrace: remove single-step emulation code
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / arm / mach-msm / clock.h
blobc270b552ed1356609cb96e9bbc551fb50908615f
1 /* arch/arm/mach-msm/clock.h
3 * Copyright (C) 2007 Google, Inc.
4 * Copyright (c) 2007-2010, Code Aurora Forum. All rights reserved.
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
17 #ifndef __ARCH_ARM_MACH_MSM_CLOCK_H
18 #define __ARCH_ARM_MACH_MSM_CLOCK_H
20 #include <linux/list.h>
21 #include <mach/clk.h>
23 #include "clock-pcom.h"
24 #include "clock-7x30.h"
26 #define CLKFLAG_INVERT 0x00000001
27 #define CLKFLAG_NOINVERT 0x00000002
28 #define CLKFLAG_NONEST 0x00000004
29 #define CLKFLAG_NORESET 0x00000008
31 #define CLK_FIRST_AVAILABLE_FLAG 0x00000100
32 #define CLKFLAG_AUTO_OFF 0x00000200
33 #define CLKFLAG_MIN 0x00000400
34 #define CLKFLAG_MAX 0x00000800
36 struct clk_ops {
37 int (*enable)(unsigned id);
38 void (*disable)(unsigned id);
39 void (*auto_off)(unsigned id);
40 int (*reset)(unsigned id, enum clk_reset_action action);
41 int (*set_rate)(unsigned id, unsigned rate);
42 int (*set_min_rate)(unsigned id, unsigned rate);
43 int (*set_max_rate)(unsigned id, unsigned rate);
44 int (*set_flags)(unsigned id, unsigned flags);
45 unsigned (*get_rate)(unsigned id);
46 unsigned (*is_enabled)(unsigned id);
47 long (*round_rate)(unsigned id, unsigned rate);
50 struct clk {
51 uint32_t id;
52 uint32_t remote_id;
53 uint32_t count;
54 uint32_t flags;
55 const char *name;
56 struct clk_ops *ops;
57 const char *dbg_name;
58 struct list_head list;
59 struct device *dev;
62 #define A11S_CLK_CNTL_ADDR (MSM_CSR_BASE + 0x100)
63 #define A11S_CLK_SEL_ADDR (MSM_CSR_BASE + 0x104)
64 #define A11S_VDD_SVS_PLEVEL_ADDR (MSM_CSR_BASE + 0x124)
66 #ifdef CONFIG_DEBUG_FS
67 #define CLOCK_DBG_NAME(x) .dbg_name = x,
68 #else
69 #define CLOCK_DBG_NAME(x)
70 #endif
72 #define CLOCK(clk_name, clk_id, clk_dev, clk_flags) { \
73 .name = clk_name, \
74 .id = clk_id, \
75 .flags = clk_flags, \
76 .dev = clk_dev, \
77 CLOCK_DBG_NAME(#clk_id) \
80 #define OFF CLKFLAG_AUTO_OFF
81 #define CLK_MIN CLKFLAG_MIN
82 #define CLK_MAX CLKFLAG_MAX
83 #define CLK_MINMAX (CLK_MIN | CLK_MAX)
84 #define NR_CLKS P_NR_CLKS
86 enum {
87 PLL_0 = 0,
88 PLL_1,
89 PLL_2,
90 PLL_3,
91 PLL_4,
92 PLL_5,
93 PLL_6,
94 NUM_PLL
97 enum clkvote_client {
98 CLKVOTE_ACPUCLK = 0,
99 CLKVOTE_PMQOS,
100 CLKVOTE_MAX,
103 int msm_clock_require_tcxo(unsigned long *reason, int nbits);
104 int msm_clock_get_name(uint32_t id, char *name, uint32_t size);
105 int ebi1_clk_set_min_rate(enum clkvote_client client, unsigned long rate);
106 unsigned long clk_get_max_axi_khz(void);
108 #endif