5 #include <asm-generic/pci-dma-compat.h>
7 #include <asm/mach/pci.h> /* for pci_sys_data */
8 #include <mach/hardware.h> /* for PCIBIOS_MIN_* */
10 #ifdef CONFIG_PCI_DOMAINS
11 static inline int pci_domain_nr(struct pci_bus
*bus
)
13 struct pci_sys_data
*root
= bus
->sysdata
;
18 static inline int pci_proc_domain(struct pci_bus
*bus
)
20 return pci_domain_nr(bus
);
22 #endif /* CONFIG_PCI_DOMAINS */
24 #ifdef CONFIG_PCI_HOST_ITE8152
25 /* ITE bridge requires setting latency timer to avoid early bus access
26 termination by PIC bus mater devices
28 extern void pcibios_set_master(struct pci_dev
*dev
);
30 static inline void pcibios_set_master(struct pci_dev
*dev
)
32 /* No special bus mastering setup handling */
36 static inline void pcibios_penalize_isa_irq(int irq
, int active
)
38 /* We don't do dynamic PCI IRQ allocation */
42 * The PCI address space does equal the physical memory address space.
43 * The networking and block device layers use this boolean for bounce
46 #define PCI_DMA_BUS_IS_PHYS (1)
49 static inline void pci_dma_burst_advice(struct pci_dev
*pdev
,
50 enum pci_dma_burst_strategy
*strat
,
51 unsigned long *strategy_parameter
)
53 *strat
= PCI_DMA_BURST_INFINITY
;
54 *strategy_parameter
= ~0UL;
59 extern int pci_mmap_page_range(struct pci_dev
*dev
, struct vm_area_struct
*vma
,
60 enum pci_mmap_state mmap_state
, int write_combine
);
63 pcibios_resource_to_bus(struct pci_dev
*dev
, struct pci_bus_region
*region
,
64 struct resource
*res
);
67 pcibios_bus_to_resource(struct pci_dev
*dev
, struct resource
*res
,
68 struct pci_bus_region
*region
);
71 * Dummy implementation; always return 0.
73 static inline int pci_get_legacy_ide_irq(struct pci_dev
*dev
, int channel
)
78 #endif /* __KERNEL__ */