2 * Copyright (c) 2006, Intel Corporation.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
15 * Place - Suite 330, Boston, MA 02111-1307 USA.
17 * Copyright (C) Ashok Raj <ashok.raj@intel.com>
18 * Copyright (C) Shaohua Li <shaohua.li@intel.com>
24 #include <linux/acpi.h>
25 #include <linux/types.h>
26 #include <linux/msi.h>
28 #if defined(CONFIG_DMAR) || defined(CONFIG_INTR_REMAP)
31 struct dmar_drhd_unit
{
32 struct list_head list
; /* list of drhd units */
33 struct acpi_dmar_header
*hdr
; /* ACPI header */
34 u64 reg_base_addr
; /* register base address*/
35 struct pci_dev
**devices
; /* target device array */
36 int devices_cnt
; /* target device count */
37 u8 ignored
:1; /* ignore drhd */
39 struct intel_iommu
*iommu
;
42 extern struct list_head dmar_drhd_units
;
44 #define for_each_drhd_unit(drhd) \
45 list_for_each_entry(drhd, &dmar_drhd_units, list)
47 extern int dmar_table_init(void);
48 extern int dmar_dev_scope_init(void);
50 /* Intel IOMMU detection */
51 extern void detect_intel_iommu(void);
54 extern int parse_ioapics_under_ir(void);
55 extern int alloc_iommu(struct dmar_drhd_unit
*);
57 static inline void detect_intel_iommu(void)
62 static inline int dmar_table_init(void)
66 #endif /* !CONFIG_DMAR && !CONFIG_INTR_REMAP */
68 #ifdef CONFIG_INTR_REMAP
69 extern int intr_remapping_enabled
;
70 extern int enable_intr_remapping(int);
100 extern int get_irte(int irq
, struct irte
*entry
);
101 extern int modify_irte(int irq
, struct irte
*irte_modified
);
102 extern int alloc_irte(struct intel_iommu
*iommu
, int irq
, u16 count
);
103 extern int set_irte_irq(int irq
, struct intel_iommu
*iommu
, u16 index
,
105 extern int map_irq_to_irte_handle(int irq
, u16
*sub_handle
);
106 extern int clear_irte_irq(int irq
, struct intel_iommu
*iommu
, u16 index
);
107 extern int flush_irte(int irq
);
108 extern int free_irte(int irq
);
110 extern int irq_remapped(int irq
);
111 extern struct intel_iommu
*map_dev_to_ir(struct pci_dev
*dev
);
112 extern struct intel_iommu
*map_ioapic_to_ir(int apic
);
114 #define irq_remapped(irq) (0)
115 #define enable_intr_remapping(mode) (-1)
116 #define intr_remapping_enabled (0)
120 extern const char *dmar_get_fault_reason(u8 fault_reason
);
122 /* Can't use the common MSI interrupt functions
123 * since DMAR is not a pci device
125 extern void dmar_msi_unmask(unsigned int irq
);
126 extern void dmar_msi_mask(unsigned int irq
);
127 extern void dmar_msi_read(int irq
, struct msi_msg
*msg
);
128 extern void dmar_msi_write(int irq
, struct msi_msg
*msg
);
129 extern int dmar_set_interrupt(struct intel_iommu
*iommu
);
130 extern int arch_setup_dmar_msi(unsigned int irq
);
132 extern int iommu_detected
, no_iommu
;
133 extern struct list_head dmar_rmrr_units
;
134 struct dmar_rmrr_unit
{
135 struct list_head list
; /* list of rmrr units */
136 struct acpi_dmar_header
*hdr
; /* ACPI header */
137 u64 base_address
; /* reserved base address*/
138 u64 end_address
; /* reserved end address */
139 struct pci_dev
**devices
; /* target devices */
140 int devices_cnt
; /* target device count */
143 #define for_each_rmrr_units(rmrr) \
144 list_for_each_entry(rmrr, &dmar_rmrr_units, list)
145 /* Intel DMAR initialization functions */
146 extern int intel_iommu_init(void);
148 static inline int intel_iommu_init(void)
150 #ifdef CONFIG_INTR_REMAP
151 return dmar_dev_scope_init();
156 #endif /* !CONFIG_DMAR */
157 #endif /* __DMAR_H__ */