include/linux/ssb/ssb.h

   1 #ifndef LINUX_SSB_H_
   2 #define LINUX_SSB_H_
   3
   4 #include <linux/device.h>
   5 #include <linux/list.h>
   6 #include <linux/types.h>
   7 #include <linux/spinlock.h>
   8 #include <linux/pci.h>
   9 #include <linux/mod_devicetable.h>
  10 #include <linux/dma-mapping.h>
  11
  12 #include <linux/ssb/ssb_regs.h>
  13
  14
  15 struct pcmcia_device;
  16 struct ssb_bus;
  17 struct ssb_driver;
  18
  19 struct ssb_sprom {
  20         u8 revision;
  21         u8 il0mac[6];           /* MAC address for 802.11b/g */
  22         u8 et0mac[6];           /* MAC address for Ethernet */
  23         u8 et1mac[6];           /* MAC address for 802.11a */
  24         u8 et0phyaddr;          /* MII address for enet0 */
  25         u8 et1phyaddr;          /* MII address for enet1 */
  26         u8 et0mdcport;          /* MDIO for enet0 */
  27         u8 et1mdcport;          /* MDIO for enet1 */
  28         u8 board_rev;           /* Board revision number from SPROM. */
  29         u8 country_code;        /* Country Code */
  30         u8 ant_available_a;     /* 2GHz antenna available bits (up to 4) */
  31         u8 ant_available_bg;    /* 5GHz antenna available bits (up to 4) */
  32         u16 pa0b0;
  33         u16 pa0b1;
  34         u16 pa0b2;
  35         u16 pa1b0;
  36         u16 pa1b1;
  37         u16 pa1b2;
  38         u16 pa1lob0;
  39         u16 pa1lob1;
  40         u16 pa1lob2;
  41         u16 pa1hib0;
  42         u16 pa1hib1;
  43         u16 pa1hib2;
  44         u8 gpio0;               /* GPIO pin 0 */
  45         u8 gpio1;               /* GPIO pin 1 */
  46         u8 gpio2;               /* GPIO pin 2 */
  47         u8 gpio3;               /* GPIO pin 3 */
  48         u16 maxpwr_bg;          /* 2.4GHz Amplifier Max Power (in dBm Q5.2) */
  49         u16 maxpwr_al;          /* 5.2GHz Amplifier Max Power (in dBm Q5.2) */
  50         u16 maxpwr_a;           /* 5.3GHz Amplifier Max Power (in dBm Q5.2) */
  51         u16 maxpwr_ah;          /* 5.8GHz Amplifier Max Power (in dBm Q5.2) */
  52         u8 itssi_a;             /* Idle TSSI Target for A-PHY */
  53         u8 itssi_bg;            /* Idle TSSI Target for B/G-PHY */
  54         u8 tri2g;               /* 2.4GHz TX isolation */
  55         u8 tri5gl;              /* 5.2GHz TX isolation */
  56         u8 tri5g;               /* 5.3GHz TX isolation */
  57         u8 tri5gh;              /* 5.8GHz TX isolation */
  58         u8 rxpo2g;              /* 2GHz RX power offset */
  59         u8 rxpo5g;              /* 5GHz RX power offset */
  60         u8 rssisav2g;           /* 2GHz RSSI params */
  61         u8 rssismc2g;
  62         u8 rssismf2g;
  63         u8 bxa2g;               /* 2GHz BX arch */
  64         u8 rssisav5g;           /* 5GHz RSSI params */
  65         u8 rssismc5g;
  66         u8 rssismf5g;
  67         u8 bxa5g;               /* 5GHz BX arch */
  68         u16 cck2gpo;            /* CCK power offset */
  69         u32 ofdm2gpo;           /* 2.4GHz OFDM power offset */
  70         u32 ofdm5glpo;          /* 5.2GHz OFDM power offset */
  71         u32 ofdm5gpo;           /* 5.3GHz OFDM power offset */
  72         u32 ofdm5ghpo;          /* 5.8GHz OFDM power offset */
  73         u16 boardflags_lo;      /* Board flags (bits 0-15) */
  74         u16 boardflags_hi;      /* Board flags (bits 16-31) */
  75         u16 boardflags2_lo;     /* Board flags (bits 32-47) */
  76         u16 boardflags2_hi;     /* Board flags (bits 48-63) */
  77         /* TODO store board flags in a single u64 */
  78
  79         /* Antenna gain values for up to 4 antennas
  80          * on each band. Values in dBm/4 (Q5.2). Negative gain means the
  81          * loss in the connectors is bigger than the gain. */
  82         struct {
  83                 struct {
  84                         s8 a0, a1, a2, a3;
  85                 } ghz24;        /* 2.4GHz band */
  86                 struct {
  87                         s8 a0, a1, a2, a3;
  88                 } ghz5;         /* 5GHz band */
  89         } antenna_gain;
  90
  91         /* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */
  92 };
  93
  94 /* Information about the PCB the circuitry is soldered on. */
  95 struct ssb_boardinfo {
  96         u16 vendor;
  97         u16 type;
  98         u16 rev;
  99 };
 100
 101
 102 struct ssb_device;
 103 /* Lowlevel read/write operations on the device MMIO.
 104  * Internal, don't use that outside of ssb. */
 105 struct ssb_bus_ops {
 106         u8 (*read8)(struct ssb_device *dev, u16 offset);
 107         u16 (*read16)(struct ssb_device *dev, u16 offset);
 108         u32 (*read32)(struct ssb_device *dev, u16 offset);
 109         void (*write8)(struct ssb_device *dev, u16 offset, u8 value);
 110         void (*write16)(struct ssb_device *dev, u16 offset, u16 value);
 111         void (*write32)(struct ssb_device *dev, u16 offset, u32 value);
 112 #ifdef CONFIG_SSB_BLOCKIO
 113         void (*block_read)(struct ssb_device *dev, void *buffer,
 114                            size_t count, u16 offset, u8 reg_width);
 115         void (*block_write)(struct ssb_device *dev, const void *buffer,
 116                             size_t count, u16 offset, u8 reg_width);
 117 #endif
 118 };
 119
 120
 121 /* Core-ID values. */
 122 #define SSB_DEV_CHIPCOMMON      0x800
 123 #define SSB_DEV_ILINE20         0x801
 124 #define SSB_DEV_SDRAM           0x803
 125 #define SSB_DEV_PCI             0x804
 126 #define SSB_DEV_MIPS            0x805
 127 #define SSB_DEV_ETHERNET        0x806
 128 #define SSB_DEV_V90             0x807
 129 #define SSB_DEV_USB11_HOSTDEV   0x808
 130 #define SSB_DEV_ADSL            0x809
 131 #define SSB_DEV_ILINE100        0x80A
 132 #define SSB_DEV_IPSEC           0x80B
 133 #define SSB_DEV_PCMCIA          0x80D
 134 #define SSB_DEV_INTERNAL_MEM    0x80E
 135 #define SSB_DEV_MEMC_SDRAM      0x80F
 136 #define SSB_DEV_EXTIF           0x811
 137 #define SSB_DEV_80211           0x812
 138 #define SSB_DEV_MIPS_3302       0x816
 139 #define SSB_DEV_USB11_HOST      0x817
 140 #define SSB_DEV_USB11_DEV       0x818
 141 #define SSB_DEV_USB20_HOST      0x819
 142 #define SSB_DEV_USB20_DEV       0x81A
 143 #define SSB_DEV_SDIO_HOST       0x81B
 144 #define SSB_DEV_ROBOSWITCH      0x81C
 145 #define SSB_DEV_PARA_ATA        0x81D
 146 #define SSB_DEV_SATA_XORDMA     0x81E
 147 #define SSB_DEV_ETHERNET_GBIT   0x81F
 148 #define SSB_DEV_PCIE            0x820
 149 #define SSB_DEV_MIMO_PHY        0x821
 150 #define SSB_DEV_SRAM_CTRLR      0x822
 151 #define SSB_DEV_MINI_MACPHY     0x823
 152 #define SSB_DEV_ARM_1176        0x824
 153 #define SSB_DEV_ARM_7TDMI       0x825
 154
 155 /* Vendor-ID values */
 156 #define SSB_VENDOR_BROADCOM     0x4243
 157
 158 /* Some kernel subsystems poke with dev->drvdata, so we must use the
 159  * following ugly workaround to get from struct device to struct ssb_device */
 160 struct __ssb_dev_wrapper {
 161         struct device dev;
 162         struct ssb_device *sdev;
 163 };
 164
 165 struct ssb_device {
 166         /* Having a copy of the ops pointer in each dev struct
 167          * is an optimization. */
 168         const struct ssb_bus_ops *ops;
 169
 170         struct device *dev;
 171
 172         struct ssb_bus *bus;
 173         struct ssb_device_id id;
 174
 175         u8 core_index;
 176         unsigned int irq;
 177
 178         /* Internal-only stuff follows. */
 179         void *drvdata;          /* Per-device data */
 180         void *devtypedata;      /* Per-devicetype (eg 802.11) data */
 181 };
 182
 183 /* Go from struct device to struct ssb_device. */
 184 static inline
 185 struct ssb_device * dev_to_ssb_dev(struct device *dev)
 186 {
 187         struct __ssb_dev_wrapper *wrap;
 188         wrap = container_of(dev, struct __ssb_dev_wrapper, dev);
 189         return wrap->sdev;
 190 }
 191
 192 /* Device specific user data */
 193 static inline
 194 void ssb_set_drvdata(struct ssb_device *dev, void *data)
 195 {
 196         dev->drvdata = data;
 197 }
 198 static inline
 199 void * ssb_get_drvdata(struct ssb_device *dev)
 200 {
 201         return dev->drvdata;
 202 }
 203
 204 /* Devicetype specific user data. This is per device-type (not per device) */
 205 void ssb_set_devtypedata(struct ssb_device *dev, void *data);
 206 static inline
 207 void * ssb_get_devtypedata(struct ssb_device *dev)
 208 {
 209         return dev->devtypedata;
 210 }
 211
 212
 213 struct ssb_driver {
 214         const char *name;
 215         const struct ssb_device_id *id_table;
 216
 217         int (*probe)(struct ssb_device *dev, const struct ssb_device_id *id);
 218         void (*remove)(struct ssb_device *dev);
 219         int (*suspend)(struct ssb_device *dev, pm_message_t state);
 220         int (*resume)(struct ssb_device *dev);
 221         void (*shutdown)(struct ssb_device *dev);
 222
 223         struct device_driver drv;
 224 };
 225 #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
 226
 227 extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
 228 static inline int ssb_driver_register(struct ssb_driver *drv)
 229 {
 230         return __ssb_driver_register(drv, THIS_MODULE);
 231 }
 232 extern void ssb_driver_unregister(struct ssb_driver *drv);
 233
 234
 235
 236
 237 enum ssb_bustype {
 238         SSB_BUSTYPE_SSB,        /* This SSB bus is the system bus */
 239         SSB_BUSTYPE_PCI,        /* SSB is connected to PCI bus */
 240         SSB_BUSTYPE_PCMCIA,     /* SSB is connected to PCMCIA bus */
 241         SSB_BUSTYPE_SDIO,       /* SSB is connected to SDIO bus */
 242 };
 243
 244 /* board_vendor */
 245 #define SSB_BOARDVENDOR_BCM     0x14E4  /* Broadcom */
 246 #define SSB_BOARDVENDOR_DELL    0x1028  /* Dell */
 247 #define SSB_BOARDVENDOR_HP      0x0E11  /* HP */
 248 /* board_type */
 249 #define SSB_BOARD_BCM94306MP    0x0418
 250 #define SSB_BOARD_BCM4309G      0x0421
 251 #define SSB_BOARD_BCM4306CB     0x0417
 252 #define SSB_BOARD_BCM4309MP     0x040C
 253 #define SSB_BOARD_MP4318        0x044A
 254 #define SSB_BOARD_BU4306        0x0416
 255 #define SSB_BOARD_BU4309        0x040A
 256 /* chip_package */
 257 #define SSB_CHIPPACK_BCM4712S   1       /* Small 200pin 4712 */
 258 #define SSB_CHIPPACK_BCM4712M   2       /* Medium 225pin 4712 */
 259 #define SSB_CHIPPACK_BCM4712L   0       /* Large 340pin 4712 */
 260
 261 #include <linux/ssb/ssb_driver_chipcommon.h>
 262 #include <linux/ssb/ssb_driver_mips.h>
 263 #include <linux/ssb/ssb_driver_extif.h>
 264 #include <linux/ssb/ssb_driver_pci.h>
 265
 266 struct ssb_bus {
 267         /* The MMIO area. */
 268         void __iomem *mmio;
 269
 270         const struct ssb_bus_ops *ops;
 271
 272         /* The core in the basic address register window. (PCI bus only) */
 273         struct ssb_device *mapped_device;
 274         union {
 275                 /* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
 276                 u8 mapped_pcmcia_seg;
 277                 /* Current SSB base address window for SDIO. */
 278                 u32 sdio_sbaddr;
 279         };
 280         /* Lock for core and segment switching.
 281          * On PCMCIA-host busses this is used to protect the whole MMIO access. */
 282         spinlock_t bar_lock;
 283
 284         /* The bus this backplane is running on. */
 285         enum ssb_bustype bustype;
 286         /* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */
 287         struct pci_dev *host_pci;
 288         /* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */
 289         struct pcmcia_device *host_pcmcia;
 290         /* Pointer to the SDIO device (only if bustype == SSB_BUSTYPE_SDIO). */
 291         struct sdio_func *host_sdio;
 292
 293         /* See enum ssb_quirks */
 294         unsigned int quirks;
 295
 296 #ifdef CONFIG_SSB_SPROM
 297         /* Mutex to protect the SPROM writing. */
 298         struct mutex sprom_mutex;
 299 #endif
 300
 301         /* ID information about the Chip. */
 302         u16 chip_id;
 303         u16 chip_rev;
 304         u16 sprom_size;         /* number of words in sprom */
 305         u8 chip_package;
 306
 307         /* List of devices (cores) on the backplane. */
 308         struct ssb_device devices[SSB_MAX_NR_CORES];
 309         u8 nr_devices;
 310
 311         /* Software ID number for this bus. */
 312         unsigned int busnumber;
 313
 314         /* The ChipCommon device (if available). */
 315         struct ssb_chipcommon chipco;
 316         /* The PCI-core device (if available). */
 317         struct ssb_pcicore pcicore;
 318         /* The MIPS-core device (if available). */
 319         struct ssb_mipscore mipscore;
 320         /* The EXTif-core device (if available). */
 321         struct ssb_extif extif;
 322
 323         /* The following structure elements are not available in early
 324          * SSB initialization. Though, they are available for regular
 325          * registered drivers at any stage. So be careful when
 326          * using them in the ssb core code. */
 327
 328         /* ID information about the PCB. */
 329         struct ssb_boardinfo boardinfo;
 330         /* Contents of the SPROM. */
 331         struct ssb_sprom sprom;
 332         /* If the board has a cardbus slot, this is set to true. */
 333         bool has_cardbus_slot;
 334
 335 #ifdef CONFIG_SSB_EMBEDDED
 336         /* Lock for GPIO register access. */
 337         spinlock_t gpio_lock;
 338 #endif /* EMBEDDED */
 339
 340         /* Internal-only stuff follows. Do not touch. */
 341         struct list_head list;
 342 #ifdef CONFIG_SSB_DEBUG
 343         /* Is the bus already powered up? */
 344         bool powered_up;
 345         int power_warn_count;
 346 #endif /* DEBUG */
 347 };
 348
 349 enum ssb_quirks {
 350         /* SDIO connected card requires performing a read after writing a 32-bit value */
 351         SSB_QUIRK_SDIO_READ_AFTER_WRITE32       = (1 << 0),
 352 };
 353
 354 /* The initialization-invariants. */
 355 struct ssb_init_invariants {
 356         /* Versioning information about the PCB. */
 357         struct ssb_boardinfo boardinfo;
 358         /* The SPROM information. That's either stored in an
 359          * EEPROM or NVRAM on the board. */
 360         struct ssb_sprom sprom;
 361         /* If the board has a cardbus slot, this is set to true. */
 362         bool has_cardbus_slot;
 363 };
 364 /* Type of function to fetch the invariants. */
 365 typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus,
 366                                      struct ssb_init_invariants *iv);
 367
 368 /* Register a SSB system bus. get_invariants() is called after the
 369  * basic system devices are initialized.
 370  * The invariants are usually fetched from some NVRAM.
 371  * Put the invariants into the struct pointed to by iv. */
 372 extern int ssb_bus_ssbbus_register(struct ssb_bus *bus,
 373                                    unsigned long baseaddr,
 374                                    ssb_invariants_func_t get_invariants);
 375 #ifdef CONFIG_SSB_PCIHOST
 376 extern int ssb_bus_pcibus_register(struct ssb_bus *bus,
 377                                    struct pci_dev *host_pci);
 378 #endif /* CONFIG_SSB_PCIHOST */
 379 #ifdef CONFIG_SSB_PCMCIAHOST
 380 extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
 381                                       struct pcmcia_device *pcmcia_dev,
 382                                       unsigned long baseaddr);
 383 #endif /* CONFIG_SSB_PCMCIAHOST */
 384 #ifdef CONFIG_SSB_SDIOHOST
 385 extern int ssb_bus_sdiobus_register(struct ssb_bus *bus,
 386                                     struct sdio_func *sdio_func,
 387                                     unsigned int quirks);
 388 #endif /* CONFIG_SSB_SDIOHOST */
 389
 390
 391 extern void ssb_bus_unregister(struct ssb_bus *bus);
 392
 393 /* Set a fallback SPROM.
 394  * See kdoc at the function definition for complete documentation. */
 395 extern int ssb_arch_set_fallback_sprom(const struct ssb_sprom *sprom);
 396
 397 /* Suspend a SSB bus.
 398  * Call this from the parent bus suspend routine. */
 399 extern int ssb_bus_suspend(struct ssb_bus *bus);
 400 /* Resume a SSB bus.
 401  * Call this from the parent bus resume routine. */
 402 extern int ssb_bus_resume(struct ssb_bus *bus);
 403
 404 extern u32 ssb_clockspeed(struct ssb_bus *bus);
 405
 406 /* Is the device enabled in hardware? */
 407 int ssb_device_is_enabled(struct ssb_device *dev);
 408 /* Enable a device and pass device-specific SSB_TMSLOW flags.
 409  * If no device-specific flags are available, use 0. */
 410 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags);
 411 /* Disable a device in hardware and pass SSB_TMSLOW flags (if any). */
 412 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags);
 413
 414
 415 /* Device MMIO register read/write functions. */
 416 static inline u8 ssb_read8(struct ssb_device *dev, u16 offset)
 417 {
 418         return dev->ops->read8(dev, offset);
 419 }
 420 static inline u16 ssb_read16(struct ssb_device *dev, u16 offset)
 421 {
 422         return dev->ops->read16(dev, offset);
 423 }
 424 static inline u32 ssb_read32(struct ssb_device *dev, u16 offset)
 425 {
 426         return dev->ops->read32(dev, offset);
 427 }
 428 static inline void ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
 429 {
 430         dev->ops->write8(dev, offset, value);
 431 }
 432 static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
 433 {
 434         dev->ops->write16(dev, offset, value);
 435 }
 436 static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
 437 {
 438         dev->ops->write32(dev, offset, value);
 439 }
 440 #ifdef CONFIG_SSB_BLOCKIO
 441 static inline void ssb_block_read(struct ssb_device *dev, void *buffer,
 442                                   size_t count, u16 offset, u8 reg_width)
 443 {
 444         dev->ops->block_read(dev, buffer, count, offset, reg_width);
 445 }
 446
 447 static inline void ssb_block_write(struct ssb_device *dev, const void *buffer,
 448                                    size_t count, u16 offset, u8 reg_width)
 449 {
 450         dev->ops->block_write(dev, buffer, count, offset, reg_width);
 451 }
 452 #endif /* CONFIG_SSB_BLOCKIO */
 453
 454
 455 /* The SSB DMA API. Use this API for any DMA operation on the device.
 456  * This API basically is a wrapper that calls the correct DMA API for
 457  * the host device type the SSB device is attached to. */
 458
 459 /* Translation (routing) bits that need to be ORed to DMA
 460  * addresses before they are given to a device. */
 461 extern u32 ssb_dma_translation(struct ssb_device *dev);
 462 #define SSB_DMA_TRANSLATION_MASK        0xC0000000
 463 #define SSB_DMA_TRANSLATION_SHIFT       30
 464
 465 extern int ssb_dma_set_mask(struct ssb_device *dev, u64 mask);
 466
 467 extern void * ssb_dma_alloc_consistent(struct ssb_device *dev, size_t size,
 468                                        dma_addr_t *dma_handle, gfp_t gfp_flags);
 469 extern void ssb_dma_free_consistent(struct ssb_device *dev, size_t size,
 470                                     void *vaddr, dma_addr_t dma_handle,
 471                                     gfp_t gfp_flags);
 472
 473 static inline void __cold __ssb_dma_not_implemented(struct ssb_device *dev)
 474 {
 475 #ifdef CONFIG_SSB_DEBUG
 476         printk(KERN_ERR "SSB: BUG! Calling DMA API for "
 477                "unsupported bustype %d\n", dev->bus->bustype);
 478 #endif /* DEBUG */
 479 }
 480
 481 static inline int ssb_dma_mapping_error(struct ssb_device *dev, dma_addr_t addr)
 482 {
 483         switch (dev->bus->bustype) {
 484         case SSB_BUSTYPE_PCI:
 485 #ifdef CONFIG_SSB_PCIHOST
 486                 return pci_dma_mapping_error(dev->bus->host_pci, addr);
 487 #endif
 488                 break;
 489         case SSB_BUSTYPE_SSB:
 490                 return dma_mapping_error(dev->dev, addr);
 491         default:
 492                 break;
 493         }
 494         __ssb_dma_not_implemented(dev);
 495         return -ENOSYS;
 496 }
 497
 498 static inline dma_addr_t ssb_dma_map_single(struct ssb_device *dev, void *p,
 499                                             size_t size, enum dma_data_direction dir)
 500 {
 501         switch (dev->bus->bustype) {
 502         case SSB_BUSTYPE_PCI:
 503 #ifdef CONFIG_SSB_PCIHOST
 504                 return pci_map_single(dev->bus->host_pci, p, size, dir);
 505 #endif
 506                 break;
 507         case SSB_BUSTYPE_SSB:
 508                 return dma_map_single(dev->dev, p, size, dir);
 509         default:
 510                 break;
 511         }
 512         __ssb_dma_not_implemented(dev);
 513         return 0;
 514 }
 515
 516 static inline void ssb_dma_unmap_single(struct ssb_device *dev, dma_addr_t dma_addr,
 517                                         size_t size, enum dma_data_direction dir)
 518 {
 519         switch (dev->bus->bustype) {
 520         case SSB_BUSTYPE_PCI:
 521 #ifdef CONFIG_SSB_PCIHOST
 522                 pci_unmap_single(dev->bus->host_pci, dma_addr, size, dir);
 523                 return;
 524 #endif
 525                 break;
 526         case SSB_BUSTYPE_SSB:
 527                 dma_unmap_single(dev->dev, dma_addr, size, dir);
 528                 return;
 529         default:
 530                 break;
 531         }
 532         __ssb_dma_not_implemented(dev);
 533 }
 534
 535 static inline void ssb_dma_sync_single_for_cpu(struct ssb_device *dev,
 536                                                dma_addr_t dma_addr,
 537                                                size_t size,
 538                                                enum dma_data_direction dir)
 539 {
 540         switch (dev->bus->bustype) {
 541         case SSB_BUSTYPE_PCI:
 542 #ifdef CONFIG_SSB_PCIHOST
 543                 pci_dma_sync_single_for_cpu(dev->bus->host_pci, dma_addr,
 544                                             size, dir);
 545                 return;
 546 #endif
 547                 break;
 548         case SSB_BUSTYPE_SSB:
 549                 dma_sync_single_for_cpu(dev->dev, dma_addr, size, dir);
 550                 return;
 551         default:
 552                 break;
 553         }
 554         __ssb_dma_not_implemented(dev);
 555 }
 556
 557 static inline void ssb_dma_sync_single_for_device(struct ssb_device *dev,
 558                                                   dma_addr_t dma_addr,
 559                                                   size_t size,
 560                                                   enum dma_data_direction dir)
 561 {
 562         switch (dev->bus->bustype) {
 563         case SSB_BUSTYPE_PCI:
 564 #ifdef CONFIG_SSB_PCIHOST
 565                 pci_dma_sync_single_for_device(dev->bus->host_pci, dma_addr,
 566                                                size, dir);
 567                 return;
 568 #endif
 569                 break;
 570         case SSB_BUSTYPE_SSB:
 571                 dma_sync_single_for_device(dev->dev, dma_addr, size, dir);
 572                 return;
 573         default:
 574                 break;
 575         }
 576         __ssb_dma_not_implemented(dev);
 577 }
 578
 579 static inline void ssb_dma_sync_single_range_for_cpu(struct ssb_device *dev,
 580                                                      dma_addr_t dma_addr,
 581                                                      unsigned long offset,
 582                                                      size_t size,
 583                                                      enum dma_data_direction dir)
 584 {
 585         switch (dev->bus->bustype) {
 586         case SSB_BUSTYPE_PCI:
 587 #ifdef CONFIG_SSB_PCIHOST
 588                 /* Just sync everything. That's all the PCI API can do. */
 589                 pci_dma_sync_single_for_cpu(dev->bus->host_pci, dma_addr,
 590                                             offset + size, dir);
 591                 return;
 592 #endif
 593                 break;
 594         case SSB_BUSTYPE_SSB:
 595                 dma_sync_single_range_for_cpu(dev->dev, dma_addr, offset,
 596                                               size, dir);
 597                 return;
 598         default:
 599                 break;
 600         }
 601         __ssb_dma_not_implemented(dev);
 602 }
 603
 604 static inline void ssb_dma_sync_single_range_for_device(struct ssb_device *dev,
 605                                                         dma_addr_t dma_addr,
 606                                                         unsigned long offset,
 607                                                         size_t size,
 608                                                         enum dma_data_direction dir)
 609 {
 610         switch (dev->bus->bustype) {
 611         case SSB_BUSTYPE_PCI:
 612 #ifdef CONFIG_SSB_PCIHOST
 613                 /* Just sync everything. That's all the PCI API can do. */
 614                 pci_dma_sync_single_for_device(dev->bus->host_pci, dma_addr,
 615                                                offset + size, dir);
 616                 return;
 617 #endif
 618                 break;
 619         case SSB_BUSTYPE_SSB:
 620                 dma_sync_single_range_for_device(dev->dev, dma_addr, offset,
 621                                                  size, dir);
 622                 return;
 623         default:
 624                 break;
 625         }
 626         __ssb_dma_not_implemented(dev);
 627 }
 628
 629
 630 #ifdef CONFIG_SSB_PCIHOST
 631 /* PCI-host wrapper driver */
 632 extern int ssb_pcihost_register(struct pci_driver *driver);
 633 static inline void ssb_pcihost_unregister(struct pci_driver *driver)
 634 {
 635         pci_unregister_driver(driver);
 636 }
 637
 638 static inline
 639 void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
 640 {
 641         if (sdev->bus->bustype == SSB_BUSTYPE_PCI)
 642                 pci_set_power_state(sdev->bus->host_pci, state);
 643 }
 644 #else
 645 static inline void ssb_pcihost_unregister(struct pci_driver *driver)
 646 {
 647 }
 648
 649 static inline
 650 void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
 651 {
 652 }
 653 #endif /* CONFIG_SSB_PCIHOST */
 654
 655
 656 /* If a driver is shutdown or suspended, call this to signal
 657  * that the bus may be completely powered down. SSB will decide,
 658  * if it's really time to power down the bus, based on if there
 659  * are other devices that want to run. */
 660 extern int ssb_bus_may_powerdown(struct ssb_bus *bus);
 661 /* Before initializing and enabling a device, call this to power-up the bus.
 662  * If you want to allow use of dynamic-power-control, pass the flag.
 663  * Otherwise static always-on powercontrol will be used. */
 664 extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
 665
 666
 667 /* Various helper functions */
 668 extern u32 ssb_admatch_base(u32 adm);
 669 extern u32 ssb_admatch_size(u32 adm);
 670
 671 /* PCI device mapping and fixup routines.
 672  * Called from the architecture pcibios init code.
 673  * These are only available on SSB_EMBEDDED configurations. */
 674 #ifdef CONFIG_SSB_EMBEDDED
 675 int ssb_pcibios_plat_dev_init(struct pci_dev *dev);
 676 int ssb_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
 677 #endif /* CONFIG_SSB_EMBEDDED */
 678
 679 #endif /* LINUX_SSB_H_ */