5 select HAVE_DMA_API_DEBUG
9 select SYS_SUPPORTS_APM_EMULATION
10 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
13 select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
14 select HAVE_KRETPROBES if (HAVE_KPROBES)
15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
19 select HAVE_GENERIC_DMA_COHERENT
20 select HAVE_KERNEL_GZIP
21 select HAVE_KERNEL_LZO
22 select HAVE_KERNEL_LZMA
24 select HAVE_PERF_EVENTS
25 select PERF_USE_VMALLOC
26 select HAVE_REGS_AND_STACK_ACCESS_API
27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
28 select HAVE_C_RECORDMCOUNT
29 select HAVE_GENERIC_HARDIRQS
30 select HAVE_SPARSE_IRQ
32 The ARM series is a line of low-power-consumption RISC chip designs
33 licensed by ARM Ltd and targeted at embedded applications and
34 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
35 manufactured, but legacy ARM-based PC hardware remains popular in
36 Europe. There is an ARM Linux project with a web page at
37 <http://www.arm.linux.org.uk/>.
45 config SYS_SUPPORTS_APM_EMULATION
48 config HAVE_SCHED_CLOCK
54 config ARCH_USES_GETTIMEOFFSET
58 config GENERIC_CLOCKEVENTS
61 config GENERIC_CLOCKEVENTS_BROADCAST
63 depends on GENERIC_CLOCKEVENTS
68 select GENERIC_ALLOCATOR
79 The Extended Industry Standard Architecture (EISA) bus was
80 developed as an open alternative to the IBM MicroChannel bus.
82 The EISA bus provided some of the features of the IBM MicroChannel
83 bus while maintaining backward compatibility with cards made for
84 the older ISA bus. The EISA bus saw limited use between 1988 and
85 1995 when it was made obsolete by the PCI bus.
87 Say Y here if you are building a kernel for an EISA-based machine.
97 MicroChannel Architecture is found in some IBM PS/2 machines and
98 laptops. It is a bus system similar to PCI or ISA. See
99 <file:Documentation/mca.txt> (and especially the web page given
100 there) before attempting to build an MCA bus kernel.
102 config STACKTRACE_SUPPORT
106 config HAVE_LATENCYTOP_SUPPORT
111 config LOCKDEP_SUPPORT
115 config TRACE_IRQFLAGS_SUPPORT
119 config HARDIRQS_SW_RESEND
123 config GENERIC_IRQ_PROBE
127 config GENERIC_LOCKBREAK
130 depends on SMP && PREEMPT
132 config RWSEM_GENERIC_SPINLOCK
136 config RWSEM_XCHGADD_ALGORITHM
139 config ARCH_HAS_ILOG2_U32
142 config ARCH_HAS_ILOG2_U64
145 config ARCH_HAS_CPUFREQ
148 Internal node to signify that the ARCH has CPUFREQ support
149 and that the relevant menu configurations are displayed for
152 config ARCH_HAS_CPU_IDLE_WAIT
155 config GENERIC_HWEIGHT
159 config GENERIC_CALIBRATE_DELAY
163 config ARCH_MAY_HAVE_PC_FDC
169 config NEED_DMA_MAP_STATE
172 config GENERIC_ISA_DMA
181 config ARM_L1_CACHE_SHIFT_6
184 Setting ARM L1 cache line size to 64 Bytes.
188 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
189 default DRAM_BASE if REMAP_VECTORS_TO_RAM
192 The base address of exception vectors.
194 source "init/Kconfig"
196 source "kernel/Kconfig.freezer"
201 bool "MMU-based Paged Memory Management Support"
204 Select if you want MMU-based virtualised addressing space
205 support by paged memory management. If unsure, say 'Y'.
208 # The "ARM system type" choice list is ordered alphabetically by option
209 # text. Please add new entries in the option alphabetic order.
212 prompt "ARM system type"
213 default ARCH_VERSATILE
216 bool "Agilent AAEC-2000 based"
220 select ARCH_USES_GETTIMEOFFSET
222 This enables support for systems based on the Agilent AAEC-2000
224 config ARCH_INTEGRATOR
225 bool "ARM Ltd. Integrator family"
227 select ARCH_HAS_CPUFREQ
230 select GENERIC_CLOCKEVENTS
231 select PLAT_VERSATILE
233 Support for ARM's Integrator platform.
236 bool "ARM Ltd. RealView family"
239 select HAVE_SCHED_CLOCK
241 select GENERIC_CLOCKEVENTS
242 select ARCH_WANT_OPTIONAL_GPIOLIB
243 select PLAT_VERSATILE
244 select ARM_TIMER_SP804
245 select GPIO_PL061 if GPIOLIB
247 This enables support for ARM Ltd RealView boards.
249 config ARCH_VERSATILE
250 bool "ARM Ltd. Versatile family"
254 select HAVE_SCHED_CLOCK
256 select GENERIC_CLOCKEVENTS
257 select ARCH_WANT_OPTIONAL_GPIOLIB
258 select PLAT_VERSATILE
259 select ARM_TIMER_SP804
261 This enables support for ARM Ltd Versatile board.
264 bool "ARM Ltd. Versatile Express family"
265 select ARCH_WANT_OPTIONAL_GPIOLIB
267 select ARM_TIMER_SP804
269 select GENERIC_CLOCKEVENTS
271 select HAVE_SCHED_CLOCK
272 select HAVE_PATA_PLATFORM
274 select PLAT_VERSATILE
276 This enables support for the ARM Ltd Versatile Express boards.
280 select ARCH_REQUIRE_GPIOLIB
283 This enables support for systems based on the Atmel AT91RM9200,
284 AT91SAM9 and AT91CAP9 processors.
287 bool "Broadcom BCMRING"
292 select GENERIC_CLOCKEVENTS
293 select ARCH_WANT_OPTIONAL_GPIOLIB
295 Support for Broadcom's BCMRing platform.
298 bool "Cirrus Logic CLPS711x/EP721x-based"
300 select ARCH_USES_GETTIMEOFFSET
302 Support for Cirrus Logic 711x/721x based boards.
305 bool "Cavium Networks CNS3XXX family"
307 select GENERIC_CLOCKEVENTS
309 select MIGHT_HAVE_PCI
310 select PCI_DOMAINS if PCI
312 Support for Cavium Networks CNS3XXX platform.
315 bool "Cortina Systems Gemini"
317 select ARCH_REQUIRE_GPIOLIB
318 select ARCH_USES_GETTIMEOFFSET
320 Support for the Cortina Systems Gemini family SoCs
327 select ARCH_USES_GETTIMEOFFSET
329 This is an evaluation board for the StrongARM processor available
330 from Digital. It has limited hardware on-board, including an
331 Ethernet interface, two PCMCIA sockets, two serial ports and a
340 select ARCH_REQUIRE_GPIOLIB
341 select ARCH_HAS_HOLES_MEMORYMODEL
342 select ARCH_USES_GETTIMEOFFSET
344 This enables support for the Cirrus EP93xx series of CPUs.
346 config ARCH_FOOTBRIDGE
350 select ARCH_USES_GETTIMEOFFSET
352 Support for systems based on the DC21285 companion chip
353 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
356 bool "Freescale MXC/iMX-based"
357 select GENERIC_CLOCKEVENTS
358 select ARCH_REQUIRE_GPIOLIB
361 Support for Freescale MXC/iMX-based family of processors
364 bool "Freescale MXS-based"
365 select GENERIC_CLOCKEVENTS
366 select ARCH_REQUIRE_GPIOLIB
369 Support for Freescale MXS-based family of processors
372 bool "Freescale STMP3xxx"
375 select ARCH_REQUIRE_GPIOLIB
376 select GENERIC_CLOCKEVENTS
377 select USB_ARCH_HAS_EHCI
379 Support for systems based on the Freescale 3xxx CPUs.
382 bool "Hilscher NetX based"
385 select GENERIC_CLOCKEVENTS
387 This enables support for systems based on the Hilscher NetX Soc
390 bool "Hynix HMS720x-based"
393 select ARCH_USES_GETTIMEOFFSET
395 This enables support for systems based on the Hynix HMS720x
403 select ARCH_SUPPORTS_MSI
406 Support for Intel's IOP13XX (XScale) family of processors.
414 select ARCH_REQUIRE_GPIOLIB
416 Support for Intel's 80219 and IOP32X (XScale) family of
425 select ARCH_REQUIRE_GPIOLIB
427 Support for Intel's IOP33X (XScale) family of processors.
434 select ARCH_USES_GETTIMEOFFSET
436 Support for Intel's IXP23xx (XScale) family of processors.
439 bool "IXP2400/2800-based"
443 select ARCH_USES_GETTIMEOFFSET
445 Support for Intel's IXP2400/2800 (XScale) family of processors.
452 select GENERIC_CLOCKEVENTS
453 select HAVE_SCHED_CLOCK
454 select MIGHT_HAVE_PCI
455 select DMABOUNCE if PCI
457 Support for Intel's IXP4XX (XScale) family of processors.
462 select ARCH_REQUIRE_GPIOLIB
463 select GENERIC_CLOCKEVENTS
466 Support for the Marvell Dove SoC 88AP510
469 bool "Marvell Kirkwood"
472 select ARCH_REQUIRE_GPIOLIB
473 select GENERIC_CLOCKEVENTS
476 Support for the following Marvell Kirkwood series SoCs:
477 88F6180, 88F6192 and 88F6281.
480 bool "Marvell Loki (88RC8480)"
482 select GENERIC_CLOCKEVENTS
485 Support for the Marvell Loki (88RC8480) SoC.
490 select ARCH_REQUIRE_GPIOLIB
493 select USB_ARCH_HAS_OHCI
496 select GENERIC_CLOCKEVENTS
498 Support for the NXP LPC32XX family of processors
501 bool "Marvell MV78xx0"
504 select ARCH_REQUIRE_GPIOLIB
505 select GENERIC_CLOCKEVENTS
508 Support for the following Marvell MV78xx0 series SoCs:
516 select ARCH_REQUIRE_GPIOLIB
517 select GENERIC_CLOCKEVENTS
520 Support for the following Marvell Orion 5x series SoCs:
521 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
522 Orion-2 (5281), Orion-1-90 (6183).
525 bool "Marvell PXA168/910/MMP2"
527 select ARCH_REQUIRE_GPIOLIB
529 select GENERIC_CLOCKEVENTS
530 select HAVE_SCHED_CLOCK
535 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
538 bool "Micrel/Kendin KS8695"
540 select ARCH_REQUIRE_GPIOLIB
541 select ARCH_USES_GETTIMEOFFSET
543 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
544 System-on-Chip devices.
547 bool "NetSilicon NS9xxx"
550 select GENERIC_CLOCKEVENTS
553 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
556 <http://www.digi.com/products/microprocessors/index.jsp>
559 bool "Nuvoton W90X900 CPU"
561 select ARCH_REQUIRE_GPIOLIB
563 select GENERIC_CLOCKEVENTS
565 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
566 At present, the w90x900 has been renamed nuc900, regarding
567 the ARM series product line, you can login the following
568 link address to know more.
570 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
571 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
574 bool "Nuvoton NUC93X CPU"
578 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
579 low-power and high performance MPEG-4/JPEG multimedia controller chip.
585 select GENERIC_CLOCKEVENTS
588 select HAVE_SCHED_CLOCK
589 select ARCH_HAS_BARRIERS if CACHE_L2X0
590 select ARCH_HAS_CPUFREQ
592 This enables support for NVIDIA Tegra based systems (Tegra APX,
593 Tegra 6xx and Tegra 2 series).
596 bool "Philips Nexperia PNX4008 Mobile"
599 select ARCH_USES_GETTIMEOFFSET
601 This enables support for Philips PNX4008 mobile platform.
604 bool "PXA2xx/PXA3xx-based"
607 select ARCH_HAS_CPUFREQ
609 select ARCH_REQUIRE_GPIOLIB
610 select GENERIC_CLOCKEVENTS
611 select HAVE_SCHED_CLOCK
616 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
621 select GENERIC_CLOCKEVENTS
622 select ARCH_REQUIRE_GPIOLIB
624 Support for Qualcomm MSM/QSD based systems. This runs on the
625 apps processor of the MSM/QSD and depends on a shared memory
626 interface to the modem processor which runs the baseband
627 stack and controls some vital subsystems
628 (clock and power control, etc).
631 bool "Renesas SH-Mobile / R-Mobile"
634 select GENERIC_CLOCKEVENTS
637 select MULTI_IRQ_HANDLER
639 Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
646 select ARCH_MAY_HAVE_PC_FDC
647 select HAVE_PATA_PLATFORM
650 select ARCH_SPARSEMEM_ENABLE
651 select ARCH_USES_GETTIMEOFFSET
653 On the Acorn Risc-PC, Linux can support the internal IDE disk and
654 CD-ROM interface, serial and parallel port, and the floppy drive.
660 select ARCH_SPARSEMEM_ENABLE
662 select ARCH_HAS_CPUFREQ
664 select GENERIC_CLOCKEVENTS
666 select HAVE_SCHED_CLOCK
668 select ARCH_REQUIRE_GPIOLIB
670 Support for StrongARM 11x0 based boards.
673 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
675 select ARCH_HAS_CPUFREQ
677 select ARCH_USES_GETTIMEOFFSET
678 select HAVE_S3C2410_I2C if I2C
680 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
681 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
682 the Samsung SMDK2410 development board (and derivatives).
684 Note, the S3C2416 and the S3C2450 are so close that they even share
685 the same SoC ID code. This means that there is no seperate machine
686 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
689 bool "Samsung S3C64XX"
695 select ARCH_USES_GETTIMEOFFSET
696 select ARCH_HAS_CPUFREQ
697 select ARCH_REQUIRE_GPIOLIB
698 select SAMSUNG_CLKSRC
699 select SAMSUNG_IRQ_VIC_TIMER
700 select SAMSUNG_IRQ_UART
701 select S3C_GPIO_TRACK
702 select S3C_GPIO_PULL_UPDOWN
703 select S3C_GPIO_CFG_S3C24XX
704 select S3C_GPIO_CFG_S3C64XX
706 select USB_ARCH_HAS_OHCI
707 select SAMSUNG_GPIOLIB_4BIT
708 select HAVE_S3C2410_I2C if I2C
709 select HAVE_S3C2410_WATCHDOG if WATCHDOG
711 Samsung S3C64XX series based systems
714 bool "Samsung S5P6440 S5P6450"
718 select HAVE_S3C2410_WATCHDOG if WATCHDOG
719 select ARCH_USES_GETTIMEOFFSET
720 select HAVE_S3C2410_I2C if I2C
721 select HAVE_S3C_RTC if RTC_CLASS
723 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
727 bool "Samsung S5P6442"
731 select ARCH_USES_GETTIMEOFFSET
732 select HAVE_S3C2410_WATCHDOG if WATCHDOG
734 Samsung S5P6442 CPU based systems
737 bool "Samsung S5PC100"
741 select ARM_L1_CACHE_SHIFT_6
742 select ARCH_USES_GETTIMEOFFSET
743 select HAVE_S3C2410_I2C if I2C
744 select HAVE_S3C_RTC if RTC_CLASS
745 select HAVE_S3C2410_WATCHDOG if WATCHDOG
747 Samsung S5PC100 series based systems
750 bool "Samsung S5PV210/S5PC110"
752 select ARCH_SPARSEMEM_ENABLE
755 select ARM_L1_CACHE_SHIFT_6
756 select ARCH_HAS_CPUFREQ
757 select ARCH_USES_GETTIMEOFFSET
758 select HAVE_S3C2410_I2C if I2C
759 select HAVE_S3C_RTC if RTC_CLASS
760 select HAVE_S3C2410_WATCHDOG if WATCHDOG
762 Samsung S5PV210/S5PC110 series based systems
765 bool "Samsung S5PV310/S5PC210"
767 select ARCH_SPARSEMEM_ENABLE
770 select ARCH_HAS_CPUFREQ
771 select GENERIC_CLOCKEVENTS
772 select HAVE_S3C_RTC if RTC_CLASS
773 select HAVE_S3C2410_I2C if I2C
774 select HAVE_S3C2410_WATCHDOG if WATCHDOG
776 Samsung S5PV310 series based systems
785 select ARCH_USES_GETTIMEOFFSET
787 Support for the StrongARM based Digital DNARD machine, also known
788 as "Shark" (<http://www.shark-linux.de/shark.html>).
791 bool "Telechips TCC ARM926-based systems"
795 select GENERIC_CLOCKEVENTS
797 Support for Telechips TCC ARM926-based systems.
802 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
803 select ARCH_USES_GETTIMEOFFSET
805 Say Y here for systems based on one of the Sharp LH7A40X
806 System on a Chip processors. These CPUs include an ARM922T
807 core with a wide array of integrated devices for
808 hand-held and low-power applications.
811 bool "ST-Ericsson U300 Series"
814 select HAVE_SCHED_CLOCK
818 select GENERIC_CLOCKEVENTS
822 Support for ST-Ericsson U300 series mobile platforms.
825 bool "ST-Ericsson U8500 Series"
828 select GENERIC_CLOCKEVENTS
830 select ARCH_REQUIRE_GPIOLIB
831 select ARCH_HAS_CPUFREQ
833 Support for ST-Ericsson's Ux500 architecture
836 bool "STMicroelectronics Nomadik"
841 select GENERIC_CLOCKEVENTS
842 select ARCH_REQUIRE_GPIOLIB
844 Support for the Nomadik platform by ST-Ericsson
848 select GENERIC_CLOCKEVENTS
849 select ARCH_REQUIRE_GPIOLIB
853 select GENERIC_ALLOCATOR
854 select ARCH_HAS_HOLES_MEMORYMODEL
856 Support for TI's DaVinci platform.
861 select ARCH_REQUIRE_GPIOLIB
862 select ARCH_HAS_CPUFREQ
863 select GENERIC_CLOCKEVENTS
864 select HAVE_SCHED_CLOCK
865 select ARCH_HAS_HOLES_MEMORYMODEL
867 Support for TI's OMAP platform (OMAP1/2/3/4).
872 select ARCH_REQUIRE_GPIOLIB
874 select GENERIC_CLOCKEVENTS
877 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
882 # This is sorted alphabetically by mach-* pathname. However, plat-*
883 # Kconfigs may be included either alphabetically (according to the
884 # plat- suffix) or along side the corresponding mach-* source.
886 source "arch/arm/mach-aaec2000/Kconfig"
888 source "arch/arm/mach-at91/Kconfig"
890 source "arch/arm/mach-bcmring/Kconfig"
892 source "arch/arm/mach-clps711x/Kconfig"
894 source "arch/arm/mach-cns3xxx/Kconfig"
896 source "arch/arm/mach-davinci/Kconfig"
898 source "arch/arm/mach-dove/Kconfig"
900 source "arch/arm/mach-ep93xx/Kconfig"
902 source "arch/arm/mach-footbridge/Kconfig"
904 source "arch/arm/mach-gemini/Kconfig"
906 source "arch/arm/mach-h720x/Kconfig"
908 source "arch/arm/mach-integrator/Kconfig"
910 source "arch/arm/mach-iop32x/Kconfig"
912 source "arch/arm/mach-iop33x/Kconfig"
914 source "arch/arm/mach-iop13xx/Kconfig"
916 source "arch/arm/mach-ixp4xx/Kconfig"
918 source "arch/arm/mach-ixp2000/Kconfig"
920 source "arch/arm/mach-ixp23xx/Kconfig"
922 source "arch/arm/mach-kirkwood/Kconfig"
924 source "arch/arm/mach-ks8695/Kconfig"
926 source "arch/arm/mach-lh7a40x/Kconfig"
928 source "arch/arm/mach-loki/Kconfig"
930 source "arch/arm/mach-lpc32xx/Kconfig"
932 source "arch/arm/mach-msm/Kconfig"
934 source "arch/arm/mach-mv78xx0/Kconfig"
936 source "arch/arm/plat-mxc/Kconfig"
938 source "arch/arm/mach-mxs/Kconfig"
940 source "arch/arm/mach-netx/Kconfig"
942 source "arch/arm/mach-nomadik/Kconfig"
943 source "arch/arm/plat-nomadik/Kconfig"
945 source "arch/arm/mach-ns9xxx/Kconfig"
947 source "arch/arm/mach-nuc93x/Kconfig"
949 source "arch/arm/plat-omap/Kconfig"
951 source "arch/arm/mach-omap1/Kconfig"
953 source "arch/arm/mach-omap2/Kconfig"
955 source "arch/arm/mach-orion5x/Kconfig"
957 source "arch/arm/mach-pxa/Kconfig"
958 source "arch/arm/plat-pxa/Kconfig"
960 source "arch/arm/mach-mmp/Kconfig"
962 source "arch/arm/mach-realview/Kconfig"
964 source "arch/arm/mach-sa1100/Kconfig"
966 source "arch/arm/plat-samsung/Kconfig"
967 source "arch/arm/plat-s3c24xx/Kconfig"
968 source "arch/arm/plat-s5p/Kconfig"
970 source "arch/arm/plat-spear/Kconfig"
972 source "arch/arm/plat-tcc/Kconfig"
975 source "arch/arm/mach-s3c2400/Kconfig"
976 source "arch/arm/mach-s3c2410/Kconfig"
977 source "arch/arm/mach-s3c2412/Kconfig"
978 source "arch/arm/mach-s3c2416/Kconfig"
979 source "arch/arm/mach-s3c2440/Kconfig"
980 source "arch/arm/mach-s3c2443/Kconfig"
984 source "arch/arm/mach-s3c64xx/Kconfig"
987 source "arch/arm/mach-s5p64x0/Kconfig"
989 source "arch/arm/mach-s5p6442/Kconfig"
991 source "arch/arm/mach-s5pc100/Kconfig"
993 source "arch/arm/mach-s5pv210/Kconfig"
995 source "arch/arm/mach-s5pv310/Kconfig"
997 source "arch/arm/mach-shmobile/Kconfig"
999 source "arch/arm/plat-stmp3xxx/Kconfig"
1001 source "arch/arm/mach-tegra/Kconfig"
1003 source "arch/arm/mach-u300/Kconfig"
1005 source "arch/arm/mach-ux500/Kconfig"
1007 source "arch/arm/mach-versatile/Kconfig"
1009 source "arch/arm/mach-vexpress/Kconfig"
1010 source "arch/arm/plat-versatile/Kconfig"
1012 source "arch/arm/mach-w90x900/Kconfig"
1014 # Definitions to make life easier
1020 select GENERIC_CLOCKEVENTS
1021 select HAVE_SCHED_CLOCK
1025 select HAVE_SCHED_CLOCK
1030 config PLAT_VERSATILE
1033 config ARM_TIMER_SP804
1036 source arch/arm/mm/Kconfig
1039 bool "Enable iWMMXt support"
1040 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1041 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
1043 Enable support for iWMMXt context switching at run time if
1044 running on a CPU that supports it.
1046 # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1049 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1053 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1054 (!ARCH_OMAP3 || OMAP3_EMU)
1058 config MULTI_IRQ_HANDLER
1061 Allow each machine to specify it's own IRQ handler at run time.
1064 source "arch/arm/Kconfig-nommu"
1067 config ARM_ERRATA_411920
1068 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1071 Invalidation of the Instruction Cache operation can
1072 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1073 It does not affect the MPCore. This option enables the ARM Ltd.
1074 recommended workaround.
1076 config ARM_ERRATA_430973
1077 bool "ARM errata: Stale prediction on replaced interworking branch"
1080 This option enables the workaround for the 430973 Cortex-A8
1081 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1082 interworking branch is replaced with another code sequence at the
1083 same virtual address, whether due to self-modifying code or virtual
1084 to physical address re-mapping, Cortex-A8 does not recover from the
1085 stale interworking branch prediction. This results in Cortex-A8
1086 executing the new code sequence in the incorrect ARM or Thumb state.
1087 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1088 and also flushes the branch target cache at every context switch.
1089 Note that setting specific bits in the ACTLR register may not be
1090 available in non-secure mode.
1092 config ARM_ERRATA_458693
1093 bool "ARM errata: Processor deadlock when a false hazard is created"
1096 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1097 erratum. For very specific sequences of memory operations, it is
1098 possible for a hazard condition intended for a cache line to instead
1099 be incorrectly associated with a different cache line. This false
1100 hazard might then cause a processor deadlock. The workaround enables
1101 the L1 caching of the NEON accesses and disables the PLD instruction
1102 in the ACTLR register. Note that setting specific bits in the ACTLR
1103 register may not be available in non-secure mode.
1105 config ARM_ERRATA_460075
1106 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1109 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1110 erratum. Any asynchronous access to the L2 cache may encounter a
1111 situation in which recent store transactions to the L2 cache are lost
1112 and overwritten with stale memory contents from external memory. The
1113 workaround disables the write-allocate mode for the L2 cache via the
1114 ACTLR register. Note that setting specific bits in the ACTLR register
1115 may not be available in non-secure mode.
1117 config ARM_ERRATA_742230
1118 bool "ARM errata: DMB operation may be faulty"
1119 depends on CPU_V7 && SMP
1121 This option enables the workaround for the 742230 Cortex-A9
1122 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1123 between two write operations may not ensure the correct visibility
1124 ordering of the two writes. This workaround sets a specific bit in
1125 the diagnostic register of the Cortex-A9 which causes the DMB
1126 instruction to behave as a DSB, ensuring the correct behaviour of
1129 config ARM_ERRATA_742231
1130 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1131 depends on CPU_V7 && SMP
1133 This option enables the workaround for the 742231 Cortex-A9
1134 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1135 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1136 accessing some data located in the same cache line, may get corrupted
1137 data due to bad handling of the address hazard when the line gets
1138 replaced from one of the CPUs at the same time as another CPU is
1139 accessing it. This workaround sets specific bits in the diagnostic
1140 register of the Cortex-A9 which reduces the linefill issuing
1141 capabilities of the processor.
1143 config PL310_ERRATA_588369
1144 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1145 depends on CACHE_L2X0 && ARCH_OMAP4
1147 The PL310 L2 cache controller implements three types of Clean &
1148 Invalidate maintenance operations: by Physical Address
1149 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1150 They are architecturally defined to behave as the execution of a
1151 clean operation followed immediately by an invalidate operation,
1152 both performing to the same memory location. This functionality
1153 is not correctly implemented in PL310 as clean lines are not
1154 invalidated as a result of these operations. Note that this errata
1155 uses Texas Instrument's secure monitor api.
1157 config ARM_ERRATA_720789
1158 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1159 depends on CPU_V7 && SMP
1161 This option enables the workaround for the 720789 Cortex-A9 (prior to
1162 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1163 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1164 As a consequence of this erratum, some TLB entries which should be
1165 invalidated are not, resulting in an incoherency in the system page
1166 tables. The workaround changes the TLB flushing routines to invalidate
1167 entries regardless of the ASID.
1169 config ARM_ERRATA_743622
1170 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1173 This option enables the workaround for the 743622 Cortex-A9
1174 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1175 optimisation in the Cortex-A9 Store Buffer may lead to data
1176 corruption. This workaround sets a specific bit in the diagnostic
1177 register of the Cortex-A9 which disables the Store Buffer
1178 optimisation, preventing the defect from occurring. This has no
1179 visible impact on the overall performance or power consumption of the
1184 source "arch/arm/common/Kconfig"
1194 Find out whether you have ISA slots on your motherboard. ISA is the
1195 name of a bus system, i.e. the way the CPU talks to the other stuff
1196 inside your box. Other bus systems are PCI, EISA, MicroChannel
1197 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1198 newer boards don't support it. If you have ISA, say Y, otherwise N.
1200 # Select ISA DMA controller support
1205 # Select ISA DMA interface
1210 bool "PCI support" if MIGHT_HAVE_PCI
1212 Find out whether you have a PCI motherboard. PCI is the name of a
1213 bus system, i.e. the way the CPU talks to the other stuff inside
1214 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1215 VESA. If you have PCI, say Y, otherwise N.
1221 config PCI_NANOENGINE
1222 bool "BSE nanoEngine PCI support"
1223 depends on SA1100_NANOENGINE
1225 Enable PCI on the BSE nanoEngine board.
1230 # Select the host bridge type
1231 config PCI_HOST_VIA82C505
1233 depends on PCI && ARCH_SHARK
1236 config PCI_HOST_ITE8152
1238 depends on PCI && MACH_ARMCORE
1242 source "drivers/pci/Kconfig"
1244 source "drivers/pcmcia/Kconfig"
1248 menu "Kernel Features"
1250 source "kernel/time/Kconfig"
1253 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1254 depends on EXPERIMENTAL
1255 depends on GENERIC_CLOCKEVENTS
1256 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1257 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1258 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
1259 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
1260 select USE_GENERIC_SMP_HELPERS
1261 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1263 This enables support for systems with more than one CPU. If you have
1264 a system with only one CPU, like most personal computers, say N. If
1265 you have a system with more than one CPU, say Y.
1267 If you say N here, the kernel will run on single and multiprocessor
1268 machines, but will use only one CPU of a multiprocessor machine. If
1269 you say Y here, the kernel will run on many, but not all, single
1270 processor machines. On a single processor machine, the kernel will
1271 run faster if you say N here.
1273 See also <file:Documentation/i386/IO-APIC.txt>,
1274 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1275 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1277 If you don't know what to do here, say N.
1280 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1281 depends on EXPERIMENTAL
1282 depends on SMP && !XIP_KERNEL
1285 SMP kernels contain instructions which fail on non-SMP processors.
1286 Enabling this option allows the kernel to modify itself to make
1287 these instructions safe. Disabling it allows about 1K of space
1290 If you don't know what to do here, say Y.
1296 This option enables support for the ARM system coherency unit
1303 This options enables support for the ARM timer and watchdog unit
1306 prompt "Memory split"
1309 Select the desired split between kernel and user memory.
1311 If you are not absolutely sure what you are doing, leave this
1315 bool "3G/1G user/kernel split"
1317 bool "2G/2G user/kernel split"
1319 bool "1G/3G user/kernel split"
1324 default 0x40000000 if VMSPLIT_1G
1325 default 0x80000000 if VMSPLIT_2G
1329 int "Maximum number of CPUs (2-32)"
1335 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1336 depends on SMP && HOTPLUG && EXPERIMENTAL
1337 depends on !ARCH_MSM
1339 Say Y here to experiment with turning CPUs off and on. CPUs
1340 can be controlled through /sys/devices/system/cpu.
1343 bool "Use local timer interrupts"
1346 select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
1348 Enable support for local timers on SMP platforms, rather then the
1349 legacy IPI broadcast method. Local timers allows the system
1350 accounting to be spread across the timer interval, preventing a
1351 "thundering herd" at every timer tick.
1353 source kernel/Kconfig.preempt
1357 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1358 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1359 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1360 default AT91_TIMER_HZ if ARCH_AT91
1361 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1364 config THUMB2_KERNEL
1365 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
1366 depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL
1368 select ARM_ASM_UNIFIED
1370 By enabling this option, the kernel will be compiled in
1371 Thumb-2 mode. A compiler/assembler that understand the unified
1372 ARM-Thumb syntax is needed.
1376 config ARM_ASM_UNIFIED
1380 bool "Use the ARM EABI to compile the kernel"
1382 This option allows for the kernel to be compiled using the latest
1383 ARM ABI (aka EABI). This is only useful if you are using a user
1384 space environment that is also compiled with EABI.
1386 Since there are major incompatibilities between the legacy ABI and
1387 EABI, especially with regard to structure member alignment, this
1388 option also changes the kernel syscall calling convention to
1389 disambiguate both ABIs and allow for backward compatibility support
1390 (selected with CONFIG_OABI_COMPAT).
1392 To use this you need GCC version 4.0.0 or later.
1395 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1396 depends on AEABI && EXPERIMENTAL
1399 This option preserves the old syscall interface along with the
1400 new (ARM EABI) one. It also provides a compatibility layer to
1401 intercept syscalls that have structure arguments which layout
1402 in memory differs between the legacy ABI and the new ARM EABI
1403 (only for non "thumb" binaries). This option adds a tiny
1404 overhead to all syscalls and produces a slightly larger kernel.
1405 If you know you'll be using only pure EABI user space then you
1406 can say N here. If this option is not selected and you attempt
1407 to execute a legacy ABI binary then the result will be
1408 UNPREDICTABLE (in fact it can be predicted that it won't work
1409 at all). If in doubt say Y.
1411 config ARCH_HAS_HOLES_MEMORYMODEL
1414 config ARCH_SPARSEMEM_ENABLE
1417 config ARCH_SPARSEMEM_DEFAULT
1418 def_bool ARCH_SPARSEMEM_ENABLE
1420 config ARCH_SELECT_MEMORY_MODEL
1421 def_bool ARCH_SPARSEMEM_ENABLE
1424 bool "High Memory Support (EXPERIMENTAL)"
1425 depends on MMU && EXPERIMENTAL
1427 The address space of ARM processors is only 4 Gigabytes large
1428 and it has to accommodate user address space, kernel address
1429 space as well as some memory mapped IO. That means that, if you
1430 have a large amount of physical memory and/or IO, not all of the
1431 memory can be "permanently mapped" by the kernel. The physical
1432 memory that is not permanently mapped is called "high memory".
1434 Depending on the selected kernel/user memory split, minimum
1435 vmalloc space and actual amount of RAM, you may not need this
1436 option which should result in a slightly faster kernel.
1441 bool "Allocate 2nd-level pagetables from highmem"
1443 depends on !OUTER_CACHE
1445 config HW_PERF_EVENTS
1446 bool "Enable hardware performance counter support for perf events"
1447 depends on PERF_EVENTS && CPU_HAS_PMU
1450 Enable hardware performance counter support for perf events. If
1451 disabled, perf events will use software events only.
1455 config FORCE_MAX_ZONEORDER
1456 int "Maximum zone order" if ARCH_SHMOBILE
1457 range 11 64 if ARCH_SHMOBILE
1458 default "9" if SA1111
1461 The kernel memory allocator divides physically contiguous memory
1462 blocks into "zones", where each zone is a power of two number of
1463 pages. This option selects the largest power of two that the kernel
1464 keeps in the memory allocator. If you need to allocate very large
1465 blocks of physically contiguous memory, then you may need to
1466 increase this value.
1468 This config option is actually maximum order plus one. For example,
1469 a value of 11 means that the largest free memory block is 2^10 pages.
1472 bool "Timer and CPU usage LEDs"
1473 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1474 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1475 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1476 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1477 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1478 ARCH_AT91 || ARCH_DAVINCI || \
1479 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1481 If you say Y here, the LEDs on your machine will be used
1482 to provide useful information about your current system status.
1484 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1485 be able to select which LEDs are active using the options below. If
1486 you are compiling a kernel for the EBSA-110 or the LART however, the
1487 red LED will simply flash regularly to indicate that the system is
1488 still functional. It is safe to say Y here if you have a CATS
1489 system, but the driver will do nothing.
1492 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1493 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1494 || MACH_OMAP_PERSEUS2
1496 depends on !GENERIC_CLOCKEVENTS
1497 default y if ARCH_EBSA110
1499 If you say Y here, one of the system LEDs (the green one on the
1500 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1501 will flash regularly to indicate that the system is still
1502 operational. This is mainly useful to kernel hackers who are
1503 debugging unstable kernels.
1505 The LART uses the same LED for both Timer LED and CPU usage LED
1506 functions. You may choose to use both, but the Timer LED function
1507 will overrule the CPU usage LED.
1510 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1512 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1513 || MACH_OMAP_PERSEUS2
1516 If you say Y here, the red LED will be used to give a good real
1517 time indication of CPU usage, by lighting whenever the idle task
1518 is not currently executing.
1520 The LART uses the same LED for both Timer LED and CPU usage LED
1521 functions. You may choose to use both, but the Timer LED function
1522 will overrule the CPU usage LED.
1524 config ALIGNMENT_TRAP
1526 depends on CPU_CP15_MMU
1527 default y if !ARCH_EBSA110
1528 select HAVE_PROC_CPU if PROC_FS
1530 ARM processors cannot fetch/store information which is not
1531 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1532 address divisible by 4. On 32-bit ARM processors, these non-aligned
1533 fetch/store instructions will be emulated in software if you say
1534 here, which has a severe performance impact. This is necessary for
1535 correct operation of some network protocols. With an IP-only
1536 configuration it is safe to say N, otherwise say Y.
1538 config UACCESS_WITH_MEMCPY
1539 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1540 depends on MMU && EXPERIMENTAL
1541 default y if CPU_FEROCEON
1543 Implement faster copy_to_user and clear_user methods for CPU
1544 cores where a 8-word STM instruction give significantly higher
1545 memory write throughput than a sequence of individual 32bit stores.
1547 A possible side effect is a slight increase in scheduling latency
1548 between threads sharing the same address space if they invoke
1549 such copy operations with large buffers.
1551 However, if the CPU data cache is using a write-allocate mode,
1552 this option is unlikely to provide any performance gain.
1556 prompt "Enable seccomp to safely compute untrusted bytecode"
1558 This kernel feature is useful for number crunching applications
1559 that may need to compute untrusted bytecode during their
1560 execution. By using pipes or other transports made available to
1561 the process as file descriptors supporting the read/write
1562 syscalls, it's possible to isolate those applications in
1563 their own address space using seccomp. Once seccomp is
1564 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1565 and the task is only allowed to execute a few safe syscalls
1566 defined by each seccomp mode.
1568 config CC_STACKPROTECTOR
1569 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1570 depends on EXPERIMENTAL
1572 This option turns on the -fstack-protector GCC feature. This
1573 feature puts, at the beginning of functions, a canary value on
1574 the stack just before the return address, and validates
1575 the value just before actually returning. Stack based buffer
1576 overflows (that need to overwrite this return address) now also
1577 overwrite the canary, which gets detected and the attack is then
1578 neutralized via a kernel panic.
1579 This feature requires gcc version 4.2 or above.
1581 config DEPRECATED_PARAM_STRUCT
1582 bool "Provide old way to pass kernel parameters"
1584 This was deprecated in 2001 and announced to live on for 5 years.
1585 Some old boot loaders still use this way.
1591 # Compressed boot loader in ROM. Yes, we really want to ask about
1592 # TEXT and BSS so we preserve their values in the config files.
1593 config ZBOOT_ROM_TEXT
1594 hex "Compressed ROM boot loader base address"
1597 The physical address at which the ROM-able zImage is to be
1598 placed in the target. Platforms which normally make use of
1599 ROM-able zImage formats normally set this to a suitable
1600 value in their defconfig file.
1602 If ZBOOT_ROM is not enabled, this has no effect.
1604 config ZBOOT_ROM_BSS
1605 hex "Compressed ROM boot loader BSS address"
1608 The base address of an area of read/write memory in the target
1609 for the ROM-able zImage which must be available while the
1610 decompressor is running. It must be large enough to hold the
1611 entire decompressed kernel plus an additional 128 KiB.
1612 Platforms which normally make use of ROM-able zImage formats
1613 normally set this to a suitable value in their defconfig file.
1615 If ZBOOT_ROM is not enabled, this has no effect.
1618 bool "Compressed boot loader in ROM/flash"
1619 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1621 Say Y here if you intend to execute your compressed kernel image
1622 (zImage) directly from ROM or flash. If unsure, say N.
1625 string "Default kernel command string"
1628 On some architectures (EBSA110 and CATS), there is currently no way
1629 for the boot loader to pass arguments to the kernel. For these
1630 architectures, you should supply some command-line options at build
1631 time by entering them here. As a minimum, you should specify the
1632 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1634 config CMDLINE_FORCE
1635 bool "Always use the default kernel command string"
1636 depends on CMDLINE != ""
1638 Always use the default kernel command string, even if the boot
1639 loader passes other arguments to the kernel.
1640 This is useful if you cannot or don't want to change the
1641 command-line options your boot loader passes to the kernel.
1646 bool "Kernel Execute-In-Place from ROM"
1647 depends on !ZBOOT_ROM
1649 Execute-In-Place allows the kernel to run from non-volatile storage
1650 directly addressable by the CPU, such as NOR flash. This saves RAM
1651 space since the text section of the kernel is not loaded from flash
1652 to RAM. Read-write sections, such as the data section and stack,
1653 are still copied to RAM. The XIP kernel is not compressed since
1654 it has to run directly from flash, so it will take more space to
1655 store it. The flash address used to link the kernel object files,
1656 and for storing it, is configuration dependent. Therefore, if you
1657 say Y here, you must know the proper physical address where to
1658 store the kernel image depending on your own flash memory usage.
1660 Also note that the make target becomes "make xipImage" rather than
1661 "make zImage" or "make Image". The final kernel binary to put in
1662 ROM memory will be arch/arm/boot/xipImage.
1666 config XIP_PHYS_ADDR
1667 hex "XIP Kernel Physical Location"
1668 depends on XIP_KERNEL
1669 default "0x00080000"
1671 This is the physical address in your flash memory the kernel will
1672 be linked for and stored to. This address is dependent on your
1676 bool "Kexec system call (EXPERIMENTAL)"
1677 depends on EXPERIMENTAL
1679 kexec is a system call that implements the ability to shutdown your
1680 current kernel, and to start another kernel. It is like a reboot
1681 but it is independent of the system firmware. And like a reboot
1682 you can start any kernel with it, not just Linux.
1684 It is an ongoing process to be certain the hardware in a machine
1685 is properly shutdown, so do not be surprised if this code does not
1686 initially work for you. It may help to enable device hotplugging
1690 bool "Export atags in procfs"
1694 Should the atags used to boot the kernel be exported in an "atags"
1695 file in procfs. Useful with kexec.
1698 bool "Build kdump crash kernel (EXPERIMENTAL)"
1699 depends on EXPERIMENTAL
1701 Generate crash dump after being started by kexec. This should
1702 be normally only set in special crash dump kernels which are
1703 loaded in the main kernel with kexec-tools into a specially
1704 reserved region and then later executed after a crash by
1705 kdump/kexec. The crash dump kernel must be compiled to a
1706 memory address not used by the main kernel
1708 For more details see Documentation/kdump/kdump.txt
1710 config AUTO_ZRELADDR
1711 bool "Auto calculation of the decompressed kernel image address"
1712 depends on !ZBOOT_ROM && !ARCH_U300
1714 ZRELADDR is the physical address where the decompressed kernel
1715 image will be placed. If AUTO_ZRELADDR is selected, the address
1716 will be determined at run-time by masking the current IP with
1717 0xf8000000. This assumes the zImage being placed in the first 128MB
1718 from start of memory.
1722 menu "CPU Power Management"
1726 source "drivers/cpufreq/Kconfig"
1729 tristate "CPUfreq driver for i.MX CPUs"
1730 depends on ARCH_MXC && CPU_FREQ
1732 This enables the CPUfreq driver for i.MX CPUs.
1734 config CPU_FREQ_SA1100
1737 config CPU_FREQ_SA1110
1740 config CPU_FREQ_INTEGRATOR
1741 tristate "CPUfreq driver for ARM Integrator CPUs"
1742 depends on ARCH_INTEGRATOR && CPU_FREQ
1745 This enables the CPUfreq driver for ARM Integrator CPUs.
1747 For details, take a look at <file:Documentation/cpu-freq>.
1753 depends on CPU_FREQ && ARCH_PXA && PXA25x
1755 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1757 config CPU_FREQ_S3C64XX
1758 bool "CPUfreq support for Samsung S3C64XX CPUs"
1759 depends on CPU_FREQ && CPU_S3C6410
1764 Internal configuration node for common cpufreq on Samsung SoC
1766 config CPU_FREQ_S3C24XX
1767 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
1768 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1771 This enables the CPUfreq driver for the Samsung S3C24XX family
1774 For details, take a look at <file:Documentation/cpu-freq>.
1778 config CPU_FREQ_S3C24XX_PLL
1779 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
1780 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1782 Compile in support for changing the PLL frequency from the
1783 S3C24XX series CPUfreq driver. The PLL takes time to settle
1784 after a frequency change, so by default it is not enabled.
1786 This also means that the PLL tables for the selected CPU(s) will
1787 be built which may increase the size of the kernel image.
1789 config CPU_FREQ_S3C24XX_DEBUG
1790 bool "Debug CPUfreq Samsung driver core"
1791 depends on CPU_FREQ_S3C24XX
1793 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1795 config CPU_FREQ_S3C24XX_IODEBUG
1796 bool "Debug CPUfreq Samsung driver IO timing"
1797 depends on CPU_FREQ_S3C24XX
1799 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1801 config CPU_FREQ_S3C24XX_DEBUGFS
1802 bool "Export debugfs for CPUFreq"
1803 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1805 Export status information via debugfs.
1809 source "drivers/cpuidle/Kconfig"
1813 menu "Floating point emulation"
1815 comment "At least one emulation must be selected"
1818 bool "NWFPE math emulation"
1819 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1821 Say Y to include the NWFPE floating point emulator in the kernel.
1822 This is necessary to run most binaries. Linux does not currently
1823 support floating point hardware so you need to say Y here even if
1824 your machine has an FPA or floating point co-processor podule.
1826 You may say N here if you are going to load the Acorn FPEmulator
1827 early in the bootup.
1830 bool "Support extended precision"
1831 depends on FPE_NWFPE
1833 Say Y to include 80-bit support in the kernel floating-point
1834 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1835 Note that gcc does not generate 80-bit operations by default,
1836 so in most cases this option only enlarges the size of the
1837 floating point emulator without any good reason.
1839 You almost surely want to say N here.
1842 bool "FastFPE math emulation (EXPERIMENTAL)"
1843 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1845 Say Y here to include the FAST floating point emulator in the kernel.
1846 This is an experimental much faster emulator which now also has full
1847 precision for the mantissa. It does not support any exceptions.
1848 It is very simple, and approximately 3-6 times faster than NWFPE.
1850 It should be sufficient for most programs. It may be not suitable
1851 for scientific calculations, but you have to check this for yourself.
1852 If you do not feel you need a faster FP emulation you should better
1856 bool "VFP-format floating point maths"
1857 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1859 Say Y to include VFP support code in the kernel. This is needed
1860 if your hardware includes a VFP unit.
1862 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1863 release notes and additional status information.
1865 Say N if your target does not have VFP hardware.
1873 bool "Advanced SIMD (NEON) Extension support"
1874 depends on VFPv3 && CPU_V7
1876 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1881 menu "Userspace binary formats"
1883 source "fs/Kconfig.binfmt"
1886 tristate "RISC OS personality"
1889 Say Y here to include the kernel code necessary if you want to run
1890 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1891 experimental; if this sounds frightening, say N and sleep in peace.
1892 You can also say M here to compile this support as a module (which
1893 will be called arthur).
1897 menu "Power management options"
1899 source "kernel/power/Kconfig"
1901 config ARCH_SUSPEND_POSSIBLE
1906 source "net/Kconfig"
1908 source "drivers/Kconfig"
1912 source "arch/arm/Kconfig.debug"
1914 source "security/Kconfig"
1916 source "crypto/Kconfig"
1918 source "lib/Kconfig"