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gre: minor cleanups
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / usb / gadget / ci13xxx_udc.c
blob98b36fc88c77d298bf4f8efb4c9dc2f773f1931a
1 /*
2 * ci13xxx_udc.c - MIPS USB IP core family device controller
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 /*
14 * Description: MIPS USB IP core family device controller
15 * Currently it only supports IP part number CI13412
16 *
17 * This driver is composed of several blocks:
18 * - HW: hardware interface
19 * - DBG: debug facilities (optional)
20 * - UTIL: utilities
21 * - ISR: interrupts handling
22 * - ENDPT: endpoint operations (Gadget API)
23 * - GADGET: gadget operations (Gadget API)
24 * - BUS: bus glue code, bus abstraction layer
25 * - PCI: PCI core interface and PCI resources (interrupts, memory...)
26 *
27 * Compile Options
28 * - CONFIG_USB_GADGET_DEBUG_FILES: enable debug facilities
29 * - STALL_IN: non-empty bulk-in pipes cannot be halted
30 * if defined mass storage compliance succeeds but with warnings
31 * => case 4: Hi > Dn
32 * => case 5: Hi > Di
33 * => case 8: Hi <> Do
34 * if undefined usbtest 13 fails
35 * - TRACE: enable function tracing (depends on DEBUG)
36 *
37 * Main Features
38 * - Chapter 9 & Mass Storage Compliance with Gadget File Storage
39 * - Chapter 9 Compliance with Gadget Zero (STALL_IN undefined)
40 * - Normal & LPM support
41 *
42 * USBTEST Report
43 * - OK: 0-12, 13 (STALL_IN defined) & 14
44 * - Not Supported: 15 & 16 (ISO)
45 *
46 * TODO List
47 * - OTG
48 * - Isochronous & Interrupt Traffic
49 * - Handle requests which spawns into several TDs
50 * - GET_STATUS(device) - always reports 0
51 * - Gadget API (majority of optional features)
52 * - Suspend & Remote Wakeup
53 */
54 #include <linux/delay.h>
55 #include <linux/device.h>
56 #include <linux/dmapool.h>
57 #include <linux/dma-mapping.h>
58 #include <linux/init.h>
59 #include <linux/interrupt.h>
60 #include <linux/io.h>
61 #include <linux/irq.h>
62 #include <linux/kernel.h>
63 #include <linux/module.h>
64 #include <linux/pci.h>
65 #include <linux/slab.h>
66 #include <linux/usb/ch9.h>
67 #include <linux/usb/gadget.h>
68
69 #include "ci13xxx_udc.h"
70
71
72 /******************************************************************************
73 * DEFINE
74 *****************************************************************************/
75 /* ctrl register bank access */
76 static DEFINE_SPINLOCK(udc_lock);
77
78 /* driver name */
79 #define UDC_DRIVER_NAME "ci13xxx_udc"
80
81 /* control endpoint description */
82 static const struct usb_endpoint_descriptor
83 ctrl_endpt_desc = {
84 .bLength = USB_DT_ENDPOINT_SIZE,
85 .bDescriptorType = USB_DT_ENDPOINT,
86
87 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
88 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
89 };
90
91 /* UDC descriptor */
92 static struct ci13xxx *_udc;
93
94 /* Interrupt statistics */
95 #define ISR_MASK 0x1F
96 static struct {
97 u32 test;
98 u32 ui;
99 u32 uei;
100 u32 pci;
101 u32 uri;
102 u32 sli;
103 u32 none;
104 struct {
105 u32 cnt;
106 u32 buf[ISR_MASK+1];
107 u32 idx;
108 } hndl;
109 } isr_statistics;
110
111 /**
112 * ffs_nr: find first (least significant) bit set
113 * @x: the word to search
114 *
115 * This function returns bit number (instead of position)
116 */
117 static int ffs_nr(u32 x)
118 {
119 int n = ffs(x);
120
121 return n ? n-1 : 32;
122 }
123
124 /******************************************************************************
125 * HW block
126 *****************************************************************************/
127 /* register bank descriptor */
128 static struct {
129 unsigned lpm; /* is LPM? */
130 void __iomem *abs; /* bus map offset */
131 void __iomem *cap; /* bus map offset + CAP offset + CAP data */
132 size_t size; /* bank size */
133 } hw_bank;
134
135 /* UDC register map */
136 #define ABS_CAPLENGTH (0x100UL)
137 #define ABS_HCCPARAMS (0x108UL)
138 #define ABS_DCCPARAMS (0x124UL)
139 #define ABS_TESTMODE (hw_bank.lpm ? 0x0FCUL : 0x138UL)
140 /* offset to CAPLENTGH (addr + data) */
141 #define CAP_USBCMD (0x000UL)
142 #define CAP_USBSTS (0x004UL)
143 #define CAP_USBINTR (0x008UL)
144 #define CAP_DEVICEADDR (0x014UL)
145 #define CAP_ENDPTLISTADDR (0x018UL)
146 #define CAP_PORTSC (0x044UL)
147 #define CAP_DEVLC (0x084UL)
148 #define CAP_USBMODE (hw_bank.lpm ? 0x0C8UL : 0x068UL)
149 #define CAP_ENDPTSETUPSTAT (hw_bank.lpm ? 0x0D8UL : 0x06CUL)
150 #define CAP_ENDPTPRIME (hw_bank.lpm ? 0x0DCUL : 0x070UL)
151 #define CAP_ENDPTFLUSH (hw_bank.lpm ? 0x0E0UL : 0x074UL)
152 #define CAP_ENDPTSTAT (hw_bank.lpm ? 0x0E4UL : 0x078UL)
153 #define CAP_ENDPTCOMPLETE (hw_bank.lpm ? 0x0E8UL : 0x07CUL)
154 #define CAP_ENDPTCTRL (hw_bank.lpm ? 0x0ECUL : 0x080UL)
155 #define CAP_LAST (hw_bank.lpm ? 0x12CUL : 0x0C0UL)
156
157 /* maximum number of enpoints: valid only after hw_device_reset() */
158 static unsigned hw_ep_max;
159
160 /**
161 * hw_ep_bit: calculates the bit number
162 * @num: endpoint number
163 * @dir: endpoint direction
164 *
165 * This function returns bit number
166 */
167 static inline int hw_ep_bit(int num, int dir)
168 {
169 return num + (dir ? 16 : 0);
170 }
171
172 /**
173 * hw_aread: reads from register bitfield
174 * @addr: address relative to bus map
175 * @mask: bitfield mask
176 *
177 * This function returns register bitfield data
178 */
179 static u32 hw_aread(u32 addr, u32 mask)
180 {
181 return ioread32(addr + hw_bank.abs) & mask;
182 }
183
184 /**
185 * hw_awrite: writes to register bitfield
186 * @addr: address relative to bus map
187 * @mask: bitfield mask
188 * @data: new data
189 */
190 static void hw_awrite(u32 addr, u32 mask, u32 data)
191 {
192 iowrite32(hw_aread(addr, ~mask) | (data & mask),
193 addr + hw_bank.abs);
194 }
195
196 /**
197 * hw_cread: reads from register bitfield
198 * @addr: address relative to CAP offset plus content
199 * @mask: bitfield mask
200 *
201 * This function returns register bitfield data
202 */
203 static u32 hw_cread(u32 addr, u32 mask)
204 {
205 return ioread32(addr + hw_bank.cap) & mask;
206 }
207
208 /**
209 * hw_cwrite: writes to register bitfield
210 * @addr: address relative to CAP offset plus content
211 * @mask: bitfield mask
212 * @data: new data
213 */
214 static void hw_cwrite(u32 addr, u32 mask, u32 data)
215 {
216 iowrite32(hw_cread(addr, ~mask) | (data & mask),
217 addr + hw_bank.cap);
218 }
219
220 /**
221 * hw_ctest_and_clear: tests & clears register bitfield
222 * @addr: address relative to CAP offset plus content
223 * @mask: bitfield mask
224 *
225 * This function returns register bitfield data
226 */
227 static u32 hw_ctest_and_clear(u32 addr, u32 mask)
228 {
229 u32 reg = hw_cread(addr, mask);
230
231 iowrite32(reg, addr + hw_bank.cap);
232 return reg;
233 }
234
235 /**
236 * hw_ctest_and_write: tests & writes register bitfield
237 * @addr: address relative to CAP offset plus content
238 * @mask: bitfield mask
239 * @data: new data
240 *
241 * This function returns register bitfield data
242 */
243 static u32 hw_ctest_and_write(u32 addr, u32 mask, u32 data)
244 {
245 u32 reg = hw_cread(addr, ~0);
246
247 iowrite32((reg & ~mask) | (data & mask), addr + hw_bank.cap);
248 return (reg & mask) >> ffs_nr(mask);
249 }
250
251 /**
252 * hw_device_reset: resets chip (execute without interruption)
253 * @base: register base address
254 *
255 * This function returns an error code
256 */
257 static int hw_device_reset(void __iomem *base)
258 {
259 u32 reg;
260
261 /* bank is a module variable */
262 hw_bank.abs = base;
263
264 hw_bank.cap = hw_bank.abs;
265 hw_bank.cap += ABS_CAPLENGTH;
266 hw_bank.cap += ioread8(hw_bank.cap);
267
268 reg = hw_aread(ABS_HCCPARAMS, HCCPARAMS_LEN) >> ffs_nr(HCCPARAMS_LEN);
269 hw_bank.lpm = reg;
270 hw_bank.size = hw_bank.cap - hw_bank.abs;
271 hw_bank.size += CAP_LAST;
272 hw_bank.size /= sizeof(u32);
273
274 /* should flush & stop before reset */
275 hw_cwrite(CAP_ENDPTFLUSH, ~0, ~0);
276 hw_cwrite(CAP_USBCMD, USBCMD_RS, 0);
277
278 hw_cwrite(CAP_USBCMD, USBCMD_RST, USBCMD_RST);
279 while (hw_cread(CAP_USBCMD, USBCMD_RST))
280 udelay(10); /* not RTOS friendly */
281
282 /* USBMODE should be configured step by step */
283 hw_cwrite(CAP_USBMODE, USBMODE_CM, USBMODE_CM_IDLE);
284 hw_cwrite(CAP_USBMODE, USBMODE_CM, USBMODE_CM_DEVICE);
285 hw_cwrite(CAP_USBMODE, USBMODE_SLOM, USBMODE_SLOM); /* HW >= 2.3 */
286
287 if (hw_cread(CAP_USBMODE, USBMODE_CM) != USBMODE_CM_DEVICE) {
288 pr_err("cannot enter in device mode");
289 pr_err("lpm = %i", hw_bank.lpm);
290 return -ENODEV;
291 }
292
293 reg = hw_aread(ABS_DCCPARAMS, DCCPARAMS_DEN) >> ffs_nr(DCCPARAMS_DEN);
294 if (reg == 0 || reg > ENDPT_MAX)
295 return -ENODEV;
296
297 hw_ep_max = reg; /* cache hw ENDPT_MAX */
298
299 /* setup lock mode ? */
300
301 /* ENDPTSETUPSTAT is '0' by default */
302
303 /* HCSPARAMS.bf.ppc SHOULD BE zero for device */
304
305 return 0;
306 }
307
308 /**
309 * hw_device_state: enables/disables interrupts & starts/stops device (execute
310 * without interruption)
311 * @dma: 0 => disable, !0 => enable and set dma engine
312 *
313 * This function returns an error code
314 */
315 static int hw_device_state(u32 dma)
316 {
317 if (dma) {
318 hw_cwrite(CAP_ENDPTLISTADDR, ~0, dma);
319 /* interrupt, error, port change, reset, sleep/suspend */
320 hw_cwrite(CAP_USBINTR, ~0,
321 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
322 hw_cwrite(CAP_USBCMD, USBCMD_RS, USBCMD_RS);
323 } else {
324 hw_cwrite(CAP_USBCMD, USBCMD_RS, 0);
325 hw_cwrite(CAP_USBINTR, ~0, 0);
326 }
327 return 0;
328 }
329
330 /**
331 * hw_ep_flush: flush endpoint fifo (execute without interruption)
332 * @num: endpoint number
333 * @dir: endpoint direction
334 *
335 * This function returns an error code
336 */
337 static int hw_ep_flush(int num, int dir)
338 {
339 int n = hw_ep_bit(num, dir);
340
341 do {
342 /* flush any pending transfer */
343 hw_cwrite(CAP_ENDPTFLUSH, BIT(n), BIT(n));
344 while (hw_cread(CAP_ENDPTFLUSH, BIT(n)))
345 cpu_relax();
346 } while (hw_cread(CAP_ENDPTSTAT, BIT(n)));
347
348 return 0;
349 }
350
351 /**
352 * hw_ep_disable: disables endpoint (execute without interruption)
353 * @num: endpoint number
354 * @dir: endpoint direction
355 *
356 * This function returns an error code
357 */
358 static int hw_ep_disable(int num, int dir)
359 {
360 hw_ep_flush(num, dir);
361 hw_cwrite(CAP_ENDPTCTRL + num * sizeof(u32),
362 dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
363 return 0;
364 }
365
366 /**
367 * hw_ep_enable: enables endpoint (execute without interruption)
368 * @num: endpoint number
369 * @dir: endpoint direction
370 * @type: endpoint type
371 *
372 * This function returns an error code
373 */
374 static int hw_ep_enable(int num, int dir, int type)
375 {
376 u32 mask, data;
377
378 if (dir) {
379 mask = ENDPTCTRL_TXT; /* type */
380 data = type << ffs_nr(mask);
381
382 mask |= ENDPTCTRL_TXS; /* unstall */
383 mask |= ENDPTCTRL_TXR; /* reset data toggle */
384 data |= ENDPTCTRL_TXR;
385 mask |= ENDPTCTRL_TXE; /* enable */
386 data |= ENDPTCTRL_TXE;
387 } else {
388 mask = ENDPTCTRL_RXT; /* type */
389 data = type << ffs_nr(mask);
390
391 mask |= ENDPTCTRL_RXS; /* unstall */
392 mask |= ENDPTCTRL_RXR; /* reset data toggle */
393 data |= ENDPTCTRL_RXR;
394 mask |= ENDPTCTRL_RXE; /* enable */
395 data |= ENDPTCTRL_RXE;
396 }
397 hw_cwrite(CAP_ENDPTCTRL + num * sizeof(u32), mask, data);
398 return 0;
399 }
400
401 /**
402 * hw_ep_get_halt: return endpoint halt status
403 * @num: endpoint number
404 * @dir: endpoint direction
405 *
406 * This function returns 1 if endpoint halted
407 */
408 static int hw_ep_get_halt(int num, int dir)
409 {
410 u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
411
412 return hw_cread(CAP_ENDPTCTRL + num * sizeof(u32), mask) ? 1 : 0;
413 }
414
415 /**
416 * hw_ep_is_primed: test if endpoint is primed (execute without interruption)
417 * @num: endpoint number
418 * @dir: endpoint direction
419 *
420 * This function returns true if endpoint primed
421 */
422 static int hw_ep_is_primed(int num, int dir)
423 {
424 u32 reg = hw_cread(CAP_ENDPTPRIME, ~0) | hw_cread(CAP_ENDPTSTAT, ~0);
425
426 return test_bit(hw_ep_bit(num, dir), (void *)&reg);
427 }
428
429 /**
430 * hw_test_and_clear_setup_status: test & clear setup status (execute without
431 * interruption)
432 * @n: bit number (endpoint)
433 *
434 * This function returns setup status
435 */
436 static int hw_test_and_clear_setup_status(int n)
437 {
438 return hw_ctest_and_clear(CAP_ENDPTSETUPSTAT, BIT(n));
439 }
440
441 /**
442 * hw_ep_prime: primes endpoint (execute without interruption)
443 * @num: endpoint number
444 * @dir: endpoint direction
445 * @is_ctrl: true if control endpoint
446 *
447 * This function returns an error code
448 */
449 static int hw_ep_prime(int num, int dir, int is_ctrl)
450 {
451 int n = hw_ep_bit(num, dir);
452
453 /* the caller should flush first */
454 if (hw_ep_is_primed(num, dir))
455 return -EBUSY;
456
457 if (is_ctrl && dir == RX && hw_cread(CAP_ENDPTSETUPSTAT, BIT(num)))
458 return -EAGAIN;
459
460 hw_cwrite(CAP_ENDPTPRIME, BIT(n), BIT(n));
461
462 while (hw_cread(CAP_ENDPTPRIME, BIT(n)))
463 cpu_relax();
464 if (is_ctrl && dir == RX && hw_cread(CAP_ENDPTSETUPSTAT, BIT(num)))
465 return -EAGAIN;
466
467 /* status shoult be tested according with manual but it doesn't work */
468 return 0;
469 }
470
471 /**
472 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
473 * without interruption)
474 * @num: endpoint number
475 * @dir: endpoint direction
476 * @value: true => stall, false => unstall
477 *
478 * This function returns an error code
479 */
480 static int hw_ep_set_halt(int num, int dir, int value)
481 {
482 if (value != 0 && value != 1)
483 return -EINVAL;
484
485 do {
486 u32 addr = CAP_ENDPTCTRL + num * sizeof(u32);
487 u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
488 u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
489
490 /* data toggle - reserved for EP0 but it's in ESS */
491 hw_cwrite(addr, mask_xs|mask_xr, value ? mask_xs : mask_xr);
492
493 } while (value != hw_ep_get_halt(num, dir));
494
495 return 0;
496 }
497
498 /**
499 * hw_intr_clear: disables interrupt & clears interrupt status (execute without
500 * interruption)
501 * @n: interrupt bit
502 *
503 * This function returns an error code
504 */
505 static int hw_intr_clear(int n)
506 {
507 if (n >= REG_BITS)
508 return -EINVAL;
509
510 hw_cwrite(CAP_USBINTR, BIT(n), 0);
511 hw_cwrite(CAP_USBSTS, BIT(n), BIT(n));
512 return 0;
513 }
514
515 /**
516 * hw_intr_force: enables interrupt & forces interrupt status (execute without
517 * interruption)
518 * @n: interrupt bit
519 *
520 * This function returns an error code
521 */
522 static int hw_intr_force(int n)
523 {
524 if (n >= REG_BITS)
525 return -EINVAL;
526
527 hw_awrite(ABS_TESTMODE, TESTMODE_FORCE, TESTMODE_FORCE);
528 hw_cwrite(CAP_USBINTR, BIT(n), BIT(n));
529 hw_cwrite(CAP_USBSTS, BIT(n), BIT(n));
530 hw_awrite(ABS_TESTMODE, TESTMODE_FORCE, 0);
531 return 0;
532 }
533
534 /**
535 * hw_is_port_high_speed: test if port is high speed
536 *
537 * This function returns true if high speed port
538 */
539 static int hw_port_is_high_speed(void)
540 {
541 return hw_bank.lpm ? hw_cread(CAP_DEVLC, DEVLC_PSPD) :
542 hw_cread(CAP_PORTSC, PORTSC_HSP);
543 }
544
545 /**
546 * hw_port_test_get: reads port test mode value
547 *
548 * This function returns port test mode value
549 */
550 static u8 hw_port_test_get(void)
551 {
552 return hw_cread(CAP_PORTSC, PORTSC_PTC) >> ffs_nr(PORTSC_PTC);
553 }
554
555 /**
556 * hw_port_test_set: writes port test mode (execute without interruption)
557 * @mode: new value
558 *
559 * This function returns an error code
560 */
561 static int hw_port_test_set(u8 mode)
562 {
563 const u8 TEST_MODE_MAX = 7;
564
565 if (mode > TEST_MODE_MAX)
566 return -EINVAL;
567
568 hw_cwrite(CAP_PORTSC, PORTSC_PTC, mode << ffs_nr(PORTSC_PTC));
569 return 0;
570 }
571
572 /**
573 * hw_read_intr_enable: returns interrupt enable register
574 *
575 * This function returns register data
576 */
577 static u32 hw_read_intr_enable(void)
578 {
579 return hw_cread(CAP_USBINTR, ~0);
580 }
581
582 /**
583 * hw_read_intr_status: returns interrupt status register
584 *
585 * This function returns register data
586 */
587 static u32 hw_read_intr_status(void)
588 {
589 return hw_cread(CAP_USBSTS, ~0);
590 }
591
592 /**
593 * hw_register_read: reads all device registers (execute without interruption)
594 * @buf: destination buffer
595 * @size: buffer size
596 *
597 * This function returns number of registers read
598 */
599 static size_t hw_register_read(u32 *buf, size_t size)
600 {
601 unsigned i;
602
603 if (size > hw_bank.size)
604 size = hw_bank.size;
605
606 for (i = 0; i < size; i++)
607 buf[i] = hw_aread(i * sizeof(u32), ~0);
608
609 return size;
610 }
611
612 /**
613 * hw_register_write: writes to register
614 * @addr: register address
615 * @data: register value
616 *
617 * This function returns an error code
618 */
619 static int hw_register_write(u16 addr, u32 data)
620 {
621 /* align */
622 addr /= sizeof(u32);
623
624 if (addr >= hw_bank.size)
625 return -EINVAL;
626
627 /* align */
628 addr *= sizeof(u32);
629
630 hw_awrite(addr, ~0, data);
631 return 0;
632 }
633
634 /**
635 * hw_test_and_clear_complete: test & clear complete status (execute without
636 * interruption)
637 * @n: bit number (endpoint)
638 *
639 * This function returns complete status
640 */
641 static int hw_test_and_clear_complete(int n)
642 {
643 return hw_ctest_and_clear(CAP_ENDPTCOMPLETE, BIT(n));
644 }
645
646 /**
647 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
648 * without interruption)
649 *
650 * This function returns active interrutps
651 */
652 static u32 hw_test_and_clear_intr_active(void)
653 {
654 u32 reg = hw_read_intr_status() & hw_read_intr_enable();
655
656 hw_cwrite(CAP_USBSTS, ~0, reg);
657 return reg;
658 }
659
660 /**
661 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
662 * interruption)
663 *
664 * This function returns guard value
665 */
666 static int hw_test_and_clear_setup_guard(void)
667 {
668 return hw_ctest_and_write(CAP_USBCMD, USBCMD_SUTW, 0);
669 }
670
671 /**
672 * hw_test_and_set_setup_guard: test & set setup guard (execute without
673 * interruption)
674 *
675 * This function returns guard value
676 */
677 static int hw_test_and_set_setup_guard(void)
678 {
679 return hw_ctest_and_write(CAP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
680 }
681
682 /**
683 * hw_usb_set_address: configures USB address (execute without interruption)
684 * @value: new USB address
685 *
686 * This function returns an error code
687 */
688 static int hw_usb_set_address(u8 value)
689 {
690 /* advance */
691 hw_cwrite(CAP_DEVICEADDR, DEVICEADDR_USBADR | DEVICEADDR_USBADRA,
692 value << ffs_nr(DEVICEADDR_USBADR) | DEVICEADDR_USBADRA);
693 return 0;
694 }
695
696 /**
697 * hw_usb_reset: restart device after a bus reset (execute without
698 * interruption)
699 *
700 * This function returns an error code
701 */
702 static int hw_usb_reset(void)
703 {
704 hw_usb_set_address(0);
705
706 /* ESS flushes only at end?!? */
707 hw_cwrite(CAP_ENDPTFLUSH, ~0, ~0); /* flush all EPs */
708
709 /* clear setup token semaphores */
710 hw_cwrite(CAP_ENDPTSETUPSTAT, 0, 0); /* writes its content */
711
712 /* clear complete status */
713 hw_cwrite(CAP_ENDPTCOMPLETE, 0, 0); /* writes its content */
714
715 /* wait until all bits cleared */
716 while (hw_cread(CAP_ENDPTPRIME, ~0))
717 udelay(10); /* not RTOS friendly */
718
719 /* reset all endpoints ? */
720
721 /* reset internal status and wait for further instructions
722 no need to verify the port reset status (ESS does it) */
723
724 return 0;
725 }
726
727 /******************************************************************************
728 * DBG block
729 *****************************************************************************/
730 /**
731 * show_device: prints information about device capabilities and status
732 *
733 * Check "device.h" for details
734 */
735 static ssize_t show_device(struct device *dev, struct device_attribute *attr,
736 char *buf)
737 {
738 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
739 struct usb_gadget *gadget = &udc->gadget;
740 int n = 0;
741
742 dbg_trace("[%s] %p\n", __func__, buf);
743 if (attr == NULL || buf == NULL) {
744 dev_err(dev, "[%s] EINVAL\n", __func__);
745 return 0;
746 }
747
748 n += scnprintf(buf + n, PAGE_SIZE - n, "speed = %d\n",
749 gadget->speed);
750 n += scnprintf(buf + n, PAGE_SIZE - n, "is_dualspeed = %d\n",
751 gadget->is_dualspeed);
752 n += scnprintf(buf + n, PAGE_SIZE - n, "is_otg = %d\n",
753 gadget->is_otg);
754 n += scnprintf(buf + n, PAGE_SIZE - n, "is_a_peripheral = %d\n",
755 gadget->is_a_peripheral);
756 n += scnprintf(buf + n, PAGE_SIZE - n, "b_hnp_enable = %d\n",
757 gadget->b_hnp_enable);
758 n += scnprintf(buf + n, PAGE_SIZE - n, "a_hnp_support = %d\n",
759 gadget->a_hnp_support);
760 n += scnprintf(buf + n, PAGE_SIZE - n, "a_alt_hnp_support = %d\n",
761 gadget->a_alt_hnp_support);
762 n += scnprintf(buf + n, PAGE_SIZE - n, "name = %s\n",
763 (gadget->name ? gadget->name : ""));
764
765 return n;
766 }
767 static DEVICE_ATTR(device, S_IRUSR, show_device, NULL);
768
769 /**
770 * show_driver: prints information about attached gadget (if any)
771 *
772 * Check "device.h" for details
773 */
774 static ssize_t show_driver(struct device *dev, struct device_attribute *attr,
775 char *buf)
776 {
777 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
778 struct usb_gadget_driver *driver = udc->driver;
779 int n = 0;
780
781 dbg_trace("[%s] %p\n", __func__, buf);
782 if (attr == NULL || buf == NULL) {
783 dev_err(dev, "[%s] EINVAL\n", __func__);
784 return 0;
785 }
786
787 if (driver == NULL)
788 return scnprintf(buf, PAGE_SIZE,
789 "There is no gadget attached!\n");
790
791 n += scnprintf(buf + n, PAGE_SIZE - n, "function = %s\n",
792 (driver->function ? driver->function : ""));
793 n += scnprintf(buf + n, PAGE_SIZE - n, "max speed = %d\n",
794 driver->speed);
795
796 return n;
797 }
798 static DEVICE_ATTR(driver, S_IRUSR, show_driver, NULL);
799
800 /* Maximum event message length */
801 #define DBG_DATA_MSG 64UL
802
803 /* Maximum event messages */
804 #define DBG_DATA_MAX 128UL
805
806 /* Event buffer descriptor */
807 static struct {
808 char (buf[DBG_DATA_MAX])[DBG_DATA_MSG]; /* buffer */
809 unsigned idx; /* index */
810 unsigned tty; /* print to console? */
811 rwlock_t lck; /* lock */
812 } dbg_data = {
813 .idx = 0,
814 .tty = 0,
815 .lck = __RW_LOCK_UNLOCKED(lck)
816 };
817
818 /**
819 * dbg_dec: decrements debug event index
820 * @idx: buffer index
821 */
822 static void dbg_dec(unsigned *idx)
823 {
824 *idx = (*idx - 1) & (DBG_DATA_MAX-1);
825 }
826
827 /**
828 * dbg_inc: increments debug event index
829 * @idx: buffer index
830 */
831 static void dbg_inc(unsigned *idx)
832 {
833 *idx = (*idx + 1) & (DBG_DATA_MAX-1);
834 }
835
836 /**
837 * dbg_print: prints the common part of the event
838 * @addr: endpoint address
839 * @name: event name
840 * @status: status
841 * @extra: extra information
842 */
843 static void dbg_print(u8 addr, const char *name, int status, const char *extra)
844 {
845 struct timeval tval;
846 unsigned int stamp;
847 unsigned long flags;
848
849 write_lock_irqsave(&dbg_data.lck, flags);
850
851 do_gettimeofday(&tval);
852 stamp = tval.tv_sec & 0xFFFF; /* 2^32 = 4294967296. Limit to 4096s */
853 stamp = stamp * 1000000 + tval.tv_usec;
854
855 scnprintf(dbg_data.buf[dbg_data.idx], DBG_DATA_MSG,
856 "%04X\t» %02X %-7.7s %4i «\t%s\n",
857 stamp, addr, name, status, extra);
858
859 dbg_inc(&dbg_data.idx);
860
861 write_unlock_irqrestore(&dbg_data.lck, flags);
862
863 if (dbg_data.tty != 0)
864 pr_notice("%04X\t» %02X %-7.7s %4i «\t%s\n",
865 stamp, addr, name, status, extra);
866 }
867
868 /**
869 * dbg_done: prints a DONE event
870 * @addr: endpoint address
871 * @td: transfer descriptor
872 * @status: status
873 */
874 static void dbg_done(u8 addr, const u32 token, int status)
875 {
876 char msg[DBG_DATA_MSG];
877
878 scnprintf(msg, sizeof(msg), "%d %02X",
879 (int)(token & TD_TOTAL_BYTES) >> ffs_nr(TD_TOTAL_BYTES),
880 (int)(token & TD_STATUS) >> ffs_nr(TD_STATUS));
881 dbg_print(addr, "DONE", status, msg);
882 }
883
884 /**
885 * dbg_event: prints a generic event
886 * @addr: endpoint address
887 * @name: event name
888 * @status: status
889 */
890 static void dbg_event(u8 addr, const char *name, int status)
891 {
892 if (name != NULL)
893 dbg_print(addr, name, status, "");
894 }
895
896 /*
897 * dbg_queue: prints a QUEUE event
898 * @addr: endpoint address
899 * @req: USB request
900 * @status: status
901 */
902 static void dbg_queue(u8 addr, const struct usb_request *req, int status)
903 {
904 char msg[DBG_DATA_MSG];
905
906 if (req != NULL) {
907 scnprintf(msg, sizeof(msg),
908 "%d %d", !req->no_interrupt, req->length);
909 dbg_print(addr, "QUEUE", status, msg);
910 }
911 }
912
913 /**
914 * dbg_setup: prints a SETUP event
915 * @addr: endpoint address
916 * @req: setup request
917 */
918 static void dbg_setup(u8 addr, const struct usb_ctrlrequest *req)
919 {
920 char msg[DBG_DATA_MSG];
921
922 if (req != NULL) {
923 scnprintf(msg, sizeof(msg),
924 "%02X %02X %04X %04X %d", req->bRequestType,
925 req->bRequest, le16_to_cpu(req->wValue),
926 le16_to_cpu(req->wIndex), le16_to_cpu(req->wLength));
927 dbg_print(addr, "SETUP", 0, msg);
928 }
929 }
930
931 /**
932 * show_events: displays the event buffer
933 *
934 * Check "device.h" for details
935 */
936 static ssize_t show_events(struct device *dev, struct device_attribute *attr,
937 char *buf)
938 {
939 unsigned long flags;
940 unsigned i, j, n = 0;
941
942 dbg_trace("[%s] %p\n", __func__, buf);
943 if (attr == NULL || buf == NULL) {
944 dev_err(dev, "[%s] EINVAL\n", __func__);
945 return 0;
946 }
947
948 read_lock_irqsave(&dbg_data.lck, flags);
949
950 i = dbg_data.idx;
951 for (dbg_dec(&i); i != dbg_data.idx; dbg_dec(&i)) {
952 n += strlen(dbg_data.buf[i]);
953 if (n >= PAGE_SIZE) {
954 n -= strlen(dbg_data.buf[i]);
955 break;
956 }
957 }
958 for (j = 0, dbg_inc(&i); j < n; dbg_inc(&i))
959 j += scnprintf(buf + j, PAGE_SIZE - j,
960 "%s", dbg_data.buf[i]);
961
962 read_unlock_irqrestore(&dbg_data.lck, flags);
963
964 return n;
965 }
966
967 /**
968 * store_events: configure if events are going to be also printed to console
969 *
970 * Check "device.h" for details
971 */
972 static ssize_t store_events(struct device *dev, struct device_attribute *attr,
973 const char *buf, size_t count)
974 {
975 unsigned tty;
976
977 dbg_trace("[%s] %p, %d\n", __func__, buf, count);
978 if (attr == NULL || buf == NULL) {
979 dev_err(dev, "[%s] EINVAL\n", __func__);
980 goto done;
981 }
982
983 if (sscanf(buf, "%u", &tty) != 1 || tty > 1) {
984 dev_err(dev, "<1|0>: enable|disable console log\n");
985 goto done;
986 }
987
988 dbg_data.tty = tty;
989 dev_info(dev, "tty = %u", dbg_data.tty);
990
991 done:
992 return count;
993 }
994 static DEVICE_ATTR(events, S_IRUSR | S_IWUSR, show_events, store_events);
995
996 /**
997 * show_inters: interrupt status, enable status and historic
998 *
999 * Check "device.h" for details
1000 */
1001 static ssize_t show_inters(struct device *dev, struct device_attribute *attr,
1002 char *buf)
1003 {
1004 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1005 unsigned long flags;
1006 u32 intr;
1007 unsigned i, j, n = 0;
1008
1009 dbg_trace("[%s] %p\n", __func__, buf);
1010 if (attr == NULL || buf == NULL) {
1011 dev_err(dev, "[%s] EINVAL\n", __func__);
1012 return 0;
1013 }
1014
1015 spin_lock_irqsave(udc->lock, flags);
1016
1017 n += scnprintf(buf + n, PAGE_SIZE - n,
1018 "status = %08x\n", hw_read_intr_status());
1019 n += scnprintf(buf + n, PAGE_SIZE - n,
1020 "enable = %08x\n", hw_read_intr_enable());
1021
1022 n += scnprintf(buf + n, PAGE_SIZE - n, "*test = %d\n",
1023 isr_statistics.test);
1024 n += scnprintf(buf + n, PAGE_SIZE - n, "» ui = %d\n",
1025 isr_statistics.ui);
1026 n += scnprintf(buf + n, PAGE_SIZE - n, "» uei = %d\n",
1027 isr_statistics.uei);
1028 n += scnprintf(buf + n, PAGE_SIZE - n, "» pci = %d\n",
1029 isr_statistics.pci);
1030 n += scnprintf(buf + n, PAGE_SIZE - n, "» uri = %d\n",
1031 isr_statistics.uri);
1032 n += scnprintf(buf + n, PAGE_SIZE - n, "» sli = %d\n",
1033 isr_statistics.sli);
1034 n += scnprintf(buf + n, PAGE_SIZE - n, "*none = %d\n",
1035 isr_statistics.none);
1036 n += scnprintf(buf + n, PAGE_SIZE - n, "*hndl = %d\n",
1037 isr_statistics.hndl.cnt);
1038
1039 for (i = isr_statistics.hndl.idx, j = 0; j <= ISR_MASK; j++, i++) {
1040 i &= ISR_MASK;
1041 intr = isr_statistics.hndl.buf[i];
1042
1043 if (USBi_UI & intr)
1044 n += scnprintf(buf + n, PAGE_SIZE - n, "ui ");
1045 intr &= ~USBi_UI;
1046 if (USBi_UEI & intr)
1047 n += scnprintf(buf + n, PAGE_SIZE - n, "uei ");
1048 intr &= ~USBi_UEI;
1049 if (USBi_PCI & intr)
1050 n += scnprintf(buf + n, PAGE_SIZE - n, "pci ");
1051 intr &= ~USBi_PCI;
1052 if (USBi_URI & intr)
1053 n += scnprintf(buf + n, PAGE_SIZE - n, "uri ");
1054 intr &= ~USBi_URI;
1055 if (USBi_SLI & intr)
1056 n += scnprintf(buf + n, PAGE_SIZE - n, "sli ");
1057 intr &= ~USBi_SLI;
1058 if (intr)
1059 n += scnprintf(buf + n, PAGE_SIZE - n, "??? ");
1060 if (isr_statistics.hndl.buf[i])
1061 n += scnprintf(buf + n, PAGE_SIZE - n, "\n");
1062 }
1063
1064 spin_unlock_irqrestore(udc->lock, flags);
1065
1066 return n;
1067 }
1068
1069 /**
1070 * store_inters: enable & force or disable an individual interrutps
1071 * (to be used for test purposes only)
1072 *
1073 * Check "device.h" for details
1074 */
1075 static ssize_t store_inters(struct device *dev, struct device_attribute *attr,
1076 const char *buf, size_t count)
1077 {
1078 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1079 unsigned long flags;
1080 unsigned en, bit;
1081
1082 dbg_trace("[%s] %p, %d\n", __func__, buf, count);
1083 if (attr == NULL || buf == NULL) {
1084 dev_err(dev, "[%s] EINVAL\n", __func__);
1085 goto done;
1086 }
1087
1088 if (sscanf(buf, "%u %u", &en, &bit) != 2 || en > 1) {
1089 dev_err(dev, "<1|0> <bit>: enable|disable interrupt");
1090 goto done;
1091 }
1092
1093 spin_lock_irqsave(udc->lock, flags);
1094 if (en) {
1095 if (hw_intr_force(bit))
1096 dev_err(dev, "invalid bit number\n");
1097 else
1098 isr_statistics.test++;
1099 } else {
1100 if (hw_intr_clear(bit))
1101 dev_err(dev, "invalid bit number\n");
1102 }
1103 spin_unlock_irqrestore(udc->lock, flags);
1104
1105 done:
1106 return count;
1107 }
1108 static DEVICE_ATTR(inters, S_IRUSR | S_IWUSR, show_inters, store_inters);
1109
1110 /**
1111 * show_port_test: reads port test mode
1112 *
1113 * Check "device.h" for details
1114 */
1115 static ssize_t show_port_test(struct device *dev,
1116 struct device_attribute *attr, char *buf)
1117 {
1118 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1119 unsigned long flags;
1120 unsigned mode;
1121
1122 dbg_trace("[%s] %p\n", __func__, buf);
1123 if (attr == NULL || buf == NULL) {
1124 dev_err(dev, "[%s] EINVAL\n", __func__);
1125 return 0;
1126 }
1127
1128 spin_lock_irqsave(udc->lock, flags);
1129 mode = hw_port_test_get();
1130 spin_unlock_irqrestore(udc->lock, flags);
1131
1132 return scnprintf(buf, PAGE_SIZE, "mode = %u\n", mode);
1133 }
1134
1135 /**
1136 * store_port_test: writes port test mode
1137 *
1138 * Check "device.h" for details
1139 */
1140 static ssize_t store_port_test(struct device *dev,
1141 struct device_attribute *attr,
1142 const char *buf, size_t count)
1143 {
1144 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1145 unsigned long flags;
1146 unsigned mode;
1147
1148 dbg_trace("[%s] %p, %d\n", __func__, buf, count);
1149 if (attr == NULL || buf == NULL) {
1150 dev_err(dev, "[%s] EINVAL\n", __func__);
1151 goto done;
1152 }
1153
1154 if (sscanf(buf, "%u", &mode) != 1) {
1155 dev_err(dev, "<mode>: set port test mode");
1156 goto done;
1157 }
1158
1159 spin_lock_irqsave(udc->lock, flags);
1160 if (hw_port_test_set(mode))
1161 dev_err(dev, "invalid mode\n");
1162 spin_unlock_irqrestore(udc->lock, flags);
1163
1164 done:
1165 return count;
1166 }
1167 static DEVICE_ATTR(port_test, S_IRUSR | S_IWUSR,
1168 show_port_test, store_port_test);
1169
1170 /**
1171 * show_qheads: DMA contents of all queue heads
1172 *
1173 * Check "device.h" for details
1174 */
1175 static ssize_t show_qheads(struct device *dev, struct device_attribute *attr,
1176 char *buf)
1177 {
1178 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1179 unsigned long flags;
1180 unsigned i, j, n = 0;
1181
1182 dbg_trace("[%s] %p\n", __func__, buf);
1183 if (attr == NULL || buf == NULL) {
1184 dev_err(dev, "[%s] EINVAL\n", __func__);
1185 return 0;
1186 }
1187
1188 spin_lock_irqsave(udc->lock, flags);
1189 for (i = 0; i < hw_ep_max; i++) {
1190 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
1191 n += scnprintf(buf + n, PAGE_SIZE - n,
1192 "EP=%02i: RX=%08X TX=%08X\n",
1193 i, (u32)mEp->qh[RX].dma, (u32)mEp->qh[TX].dma);
1194 for (j = 0; j < (sizeof(struct ci13xxx_qh)/sizeof(u32)); j++) {
1195 n += scnprintf(buf + n, PAGE_SIZE - n,
1196 " %04X: %08X %08X\n", j,
1197 *((u32 *)mEp->qh[RX].ptr + j),
1198 *((u32 *)mEp->qh[TX].ptr + j));
1199 }
1200 }
1201 spin_unlock_irqrestore(udc->lock, flags);
1202
1203 return n;
1204 }
1205 static DEVICE_ATTR(qheads, S_IRUSR, show_qheads, NULL);
1206
1207 /**
1208 * show_registers: dumps all registers
1209 *
1210 * Check "device.h" for details
1211 */
1212 static ssize_t show_registers(struct device *dev,
1213 struct device_attribute *attr, char *buf)
1214 {
1215 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1216 unsigned long flags;
1217 u32 dump[512];
1218 unsigned i, k, n = 0;
1219
1220 dbg_trace("[%s] %p\n", __func__, buf);
1221 if (attr == NULL || buf == NULL) {
1222 dev_err(dev, "[%s] EINVAL\n", __func__);
1223 return 0;
1224 }
1225
1226 spin_lock_irqsave(udc->lock, flags);
1227 k = hw_register_read(dump, sizeof(dump)/sizeof(u32));
1228 spin_unlock_irqrestore(udc->lock, flags);
1229
1230 for (i = 0; i < k; i++) {
1231 n += scnprintf(buf + n, PAGE_SIZE - n,
1232 "reg[0x%04X] = 0x%08X\n",
1233 i * (unsigned)sizeof(u32), dump[i]);
1234 }
1235
1236 return n;
1237 }
1238
1239 /**
1240 * store_registers: writes value to register address
1241 *
1242 * Check "device.h" for details
1243 */
1244 static ssize_t store_registers(struct device *dev,
1245 struct device_attribute *attr,
1246 const char *buf, size_t count)
1247 {
1248 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1249 unsigned long addr, data, flags;
1250
1251 dbg_trace("[%s] %p, %d\n", __func__, buf, count);
1252 if (attr == NULL || buf == NULL) {
1253 dev_err(dev, "[%s] EINVAL\n", __func__);
1254 goto done;
1255 }
1256
1257 if (sscanf(buf, "%li %li", &addr, &data) != 2) {
1258 dev_err(dev, "<addr> <data>: write data to register address");
1259 goto done;
1260 }
1261
1262 spin_lock_irqsave(udc->lock, flags);
1263 if (hw_register_write(addr, data))
1264 dev_err(dev, "invalid address range\n");
1265 spin_unlock_irqrestore(udc->lock, flags);
1266
1267 done:
1268 return count;
1269 }
1270 static DEVICE_ATTR(registers, S_IRUSR | S_IWUSR,
1271 show_registers, store_registers);
1272
1273 /**
1274 * show_requests: DMA contents of all requests currently queued (all endpts)
1275 *
1276 * Check "device.h" for details
1277 */
1278 static ssize_t show_requests(struct device *dev, struct device_attribute *attr,
1279 char *buf)
1280 {
1281 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1282 unsigned long flags;
1283 struct list_head *ptr = NULL;
1284 struct ci13xxx_req *req = NULL;
1285 unsigned i, j, k, n = 0, qSize = sizeof(struct ci13xxx_td)/sizeof(u32);
1286
1287 dbg_trace("[%s] %p\n", __func__, buf);
1288 if (attr == NULL || buf == NULL) {
1289 dev_err(dev, "[%s] EINVAL\n", __func__);
1290 return 0;
1291 }
1292
1293 spin_lock_irqsave(udc->lock, flags);
1294 for (i = 0; i < hw_ep_max; i++)
1295 for (k = RX; k <= TX; k++)
1296 list_for_each(ptr, &udc->ci13xxx_ep[i].qh[k].queue)
1297 {
1298 req = list_entry(ptr,
1299 struct ci13xxx_req, queue);
1300
1301 n += scnprintf(buf + n, PAGE_SIZE - n,
1302 "EP=%02i: TD=%08X %s\n",
1303 i, (u32)req->dma,
1304 ((k == RX) ? "RX" : "TX"));
1305
1306 for (j = 0; j < qSize; j++)
1307 n += scnprintf(buf + n, PAGE_SIZE - n,
1308 " %04X: %08X\n", j,
1309 *((u32 *)req->ptr + j));
1310 }
1311 spin_unlock_irqrestore(udc->lock, flags);
1312
1313 return n;
1314 }
1315 static DEVICE_ATTR(requests, S_IRUSR, show_requests, NULL);
1316
1317 /**
1318 * dbg_create_files: initializes the attribute interface
1319 * @dev: device
1320 *
1321 * This function returns an error code
1322 */
1323 __maybe_unused static int dbg_create_files(struct device *dev)
1324 {
1325 int retval = 0;
1326
1327 if (dev == NULL)
1328 return -EINVAL;
1329 retval = device_create_file(dev, &dev_attr_device);
1330 if (retval)
1331 goto done;
1332 retval = device_create_file(dev, &dev_attr_driver);
1333 if (retval)
1334 goto rm_device;
1335 retval = device_create_file(dev, &dev_attr_events);
1336 if (retval)
1337 goto rm_driver;
1338 retval = device_create_file(dev, &dev_attr_inters);
1339 if (retval)
1340 goto rm_events;
1341 retval = device_create_file(dev, &dev_attr_port_test);
1342 if (retval)
1343 goto rm_inters;
1344 retval = device_create_file(dev, &dev_attr_qheads);
1345 if (retval)
1346 goto rm_port_test;
1347 retval = device_create_file(dev, &dev_attr_registers);
1348 if (retval)
1349 goto rm_qheads;
1350 retval = device_create_file(dev, &dev_attr_requests);
1351 if (retval)
1352 goto rm_registers;
1353 return 0;
1354
1355 rm_registers:
1356 device_remove_file(dev, &dev_attr_registers);
1357 rm_qheads:
1358 device_remove_file(dev, &dev_attr_qheads);
1359 rm_port_test:
1360 device_remove_file(dev, &dev_attr_port_test);
1361 rm_inters:
1362 device_remove_file(dev, &dev_attr_inters);
1363 rm_events:
1364 device_remove_file(dev, &dev_attr_events);
1365 rm_driver:
1366 device_remove_file(dev, &dev_attr_driver);
1367 rm_device:
1368 device_remove_file(dev, &dev_attr_device);
1369 done:
1370 return retval;
1371 }
1372
1373 /**
1374 * dbg_remove_files: destroys the attribute interface
1375 * @dev: device
1376 *
1377 * This function returns an error code
1378 */
1379 __maybe_unused static int dbg_remove_files(struct device *dev)
1380 {
1381 if (dev == NULL)
1382 return -EINVAL;
1383 device_remove_file(dev, &dev_attr_requests);
1384 device_remove_file(dev, &dev_attr_registers);
1385 device_remove_file(dev, &dev_attr_qheads);
1386 device_remove_file(dev, &dev_attr_port_test);
1387 device_remove_file(dev, &dev_attr_inters);
1388 device_remove_file(dev, &dev_attr_events);
1389 device_remove_file(dev, &dev_attr_driver);
1390 device_remove_file(dev, &dev_attr_device);
1391 return 0;
1392 }
1393
1394 /******************************************************************************
1395 * UTIL block
1396 *****************************************************************************/
1397 /**
1398 * _usb_addr: calculates endpoint address from direction & number
1399 * @ep: endpoint
1400 */
1401 static inline u8 _usb_addr(struct ci13xxx_ep *ep)
1402 {
1403 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
1404 }
1405
1406 /**
1407 * _hardware_queue: configures a request at hardware level
1408 * @gadget: gadget
1409 * @mEp: endpoint
1410 *
1411 * This function returns an error code
1412 */
1413 static int _hardware_enqueue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
1414 {
1415 unsigned i;
1416
1417 trace("%p, %p", mEp, mReq);
1418
1419 /* don't queue twice */
1420 if (mReq->req.status == -EALREADY)
1421 return -EALREADY;
1422
1423 if (hw_ep_is_primed(mEp->num, mEp->dir))
1424 return -EBUSY;
1425
1426 mReq->req.status = -EALREADY;
1427
1428 if (mReq->req.length && !mReq->req.dma) {
1429 mReq->req.dma = \
1430 dma_map_single(mEp->device, mReq->req.buf,
1431 mReq->req.length, mEp->dir ?
1432 DMA_TO_DEVICE : DMA_FROM_DEVICE);
1433 if (mReq->req.dma == 0)
1434 return -ENOMEM;
1435
1436 mReq->map = 1;
1437 }
1438
1439 /*
1440 * TD configuration
1441 * TODO - handle requests which spawns into several TDs
1442 */
1443 memset(mReq->ptr, 0, sizeof(*mReq->ptr));
1444 mReq->ptr->next |= TD_TERMINATE;
1445 mReq->ptr->token = mReq->req.length << ffs_nr(TD_TOTAL_BYTES);
1446 mReq->ptr->token &= TD_TOTAL_BYTES;
1447 mReq->ptr->token |= TD_IOC;
1448 mReq->ptr->token |= TD_STATUS_ACTIVE;
1449 mReq->ptr->page[0] = mReq->req.dma;
1450 for (i = 1; i < 5; i++)
1451 mReq->ptr->page[i] =
1452 (mReq->req.dma + i * PAGE_SIZE) & ~TD_RESERVED_MASK;
1453
1454 /*
1455 * QH configuration
1456 * At this point it's guaranteed exclusive access to qhead
1457 * (endpt is not primed) so it's no need to use tripwire
1458 */
1459 mEp->qh[mEp->dir].ptr->td.next = mReq->dma; /* TERMINATE = 0 */
1460 mEp->qh[mEp->dir].ptr->td.token &= ~TD_STATUS; /* clear status */
1461 if (mReq->req.zero == 0)
1462 mEp->qh[mEp->dir].ptr->cap |= QH_ZLT;
1463 else
1464 mEp->qh[mEp->dir].ptr->cap &= ~QH_ZLT;
1465
1466 wmb(); /* synchronize before ep prime */
1467
1468 return hw_ep_prime(mEp->num, mEp->dir,
1469 mEp->type == USB_ENDPOINT_XFER_CONTROL);
1470 }
1471
1472 /**
1473 * _hardware_dequeue: handles a request at hardware level
1474 * @gadget: gadget
1475 * @mEp: endpoint
1476 *
1477 * This function returns an error code
1478 */
1479 static int _hardware_dequeue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
1480 {
1481 trace("%p, %p", mEp, mReq);
1482
1483 if (mReq->req.status != -EALREADY)
1484 return -EINVAL;
1485
1486 if (hw_ep_is_primed(mEp->num, mEp->dir))
1487 hw_ep_flush(mEp->num, mEp->dir);
1488
1489 mReq->req.status = 0;
1490
1491 if (mReq->map) {
1492 dma_unmap_single(mEp->device, mReq->req.dma, mReq->req.length,
1493 mEp->dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1494 mReq->req.dma = 0;
1495 mReq->map = 0;
1496 }
1497
1498 mReq->req.status = mReq->ptr->token & TD_STATUS;
1499 if ((TD_STATUS_ACTIVE & mReq->req.status) != 0)
1500 mReq->req.status = -ECONNRESET;
1501 else if ((TD_STATUS_HALTED & mReq->req.status) != 0)
1502 mReq->req.status = -1;
1503 else if ((TD_STATUS_DT_ERR & mReq->req.status) != 0)
1504 mReq->req.status = -1;
1505 else if ((TD_STATUS_TR_ERR & mReq->req.status) != 0)
1506 mReq->req.status = -1;
1507
1508 mReq->req.actual = mReq->ptr->token & TD_TOTAL_BYTES;
1509 mReq->req.actual >>= ffs_nr(TD_TOTAL_BYTES);
1510 mReq->req.actual = mReq->req.length - mReq->req.actual;
1511 mReq->req.actual = mReq->req.status ? 0 : mReq->req.actual;
1512
1513 return mReq->req.actual;
1514 }
1515
1516 /**
1517 * _ep_nuke: dequeues all endpoint requests
1518 * @mEp: endpoint
1519 *
1520 * This function returns an error code
1521 * Caller must hold lock
1522 */
1523 static int _ep_nuke(struct ci13xxx_ep *mEp)
1524 __releases(mEp->lock)
1525 __acquires(mEp->lock)
1526 {
1527 trace("%p", mEp);
1528
1529 if (mEp == NULL)
1530 return -EINVAL;
1531
1532 hw_ep_flush(mEp->num, mEp->dir);
1533
1534 while (!list_empty(&mEp->qh[mEp->dir].queue)) {
1535
1536 /* pop oldest request */
1537 struct ci13xxx_req *mReq = \
1538 list_entry(mEp->qh[mEp->dir].queue.next,
1539 struct ci13xxx_req, queue);
1540 list_del_init(&mReq->queue);
1541 mReq->req.status = -ESHUTDOWN;
1542
1543 if (!mReq->req.no_interrupt && mReq->req.complete != NULL) {
1544 spin_unlock(mEp->lock);
1545 mReq->req.complete(&mEp->ep, &mReq->req);
1546 spin_lock(mEp->lock);
1547 }
1548 }
1549 return 0;
1550 }
1551
1552 /**
1553 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
1554 * @gadget: gadget
1555 *
1556 * This function returns an error code
1557 * Caller must hold lock
1558 */
1559 static int _gadget_stop_activity(struct usb_gadget *gadget)
1560 __releases(udc->lock)
1561 __acquires(udc->lock)
1562 {
1563 struct usb_ep *ep;
1564 struct ci13xxx *udc = container_of(gadget, struct ci13xxx, gadget);
1565 struct ci13xxx_ep *mEp = container_of(gadget->ep0,
1566 struct ci13xxx_ep, ep);
1567
1568 trace("%p", gadget);
1569
1570 if (gadget == NULL)
1571 return -EINVAL;
1572
1573 spin_unlock(udc->lock);
1574
1575 /* flush all endpoints */
1576 gadget_for_each_ep(ep, gadget) {
1577 usb_ep_fifo_flush(ep);
1578 }
1579 usb_ep_fifo_flush(gadget->ep0);
1580
1581 udc->driver->disconnect(gadget);
1582
1583 /* make sure to disable all endpoints */
1584 gadget_for_each_ep(ep, gadget) {
1585 usb_ep_disable(ep);
1586 }
1587 usb_ep_disable(gadget->ep0);
1588
1589 if (mEp->status != NULL) {
1590 usb_ep_free_request(gadget->ep0, mEp->status);
1591 mEp->status = NULL;
1592 }
1593
1594 spin_lock(udc->lock);
1595
1596 return 0;
1597 }
1598
1599 /******************************************************************************
1600 * ISR block
1601 *****************************************************************************/
1602 /**
1603 * isr_reset_handler: USB reset interrupt handler
1604 * @udc: UDC device
1605 *
1606 * This function resets USB engine after a bus reset occurred
1607 */
1608 static void isr_reset_handler(struct ci13xxx *udc)
1609 __releases(udc->lock)
1610 __acquires(udc->lock)
1611 {
1612 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[0];
1613 int retval;
1614
1615 trace("%p", udc);
1616
1617 if (udc == NULL) {
1618 err("EINVAL");
1619 return;
1620 }
1621
1622 dbg_event(0xFF, "BUS RST", 0);
1623
1624 retval = _gadget_stop_activity(&udc->gadget);
1625 if (retval)
1626 goto done;
1627
1628 retval = hw_usb_reset();
1629 if (retval)
1630 goto done;
1631
1632 spin_unlock(udc->lock);
1633 retval = usb_ep_enable(&mEp->ep, &ctrl_endpt_desc);
1634 if (!retval) {
1635 mEp->status = usb_ep_alloc_request(&mEp->ep, GFP_KERNEL);
1636 if (mEp->status == NULL) {
1637 usb_ep_disable(&mEp->ep);
1638 retval = -ENOMEM;
1639 }
1640 }
1641 spin_lock(udc->lock);
1642
1643 done:
1644 if (retval)
1645 err("error: %i", retval);
1646 }
1647
1648 /**
1649 * isr_get_status_complete: get_status request complete function
1650 * @ep: endpoint
1651 * @req: request handled
1652 *
1653 * Caller must release lock
1654 */
1655 static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
1656 {
1657 trace("%p, %p", ep, req);
1658
1659 if (ep == NULL || req == NULL) {
1660 err("EINVAL");
1661 return;
1662 }
1663
1664 kfree(req->buf);
1665 usb_ep_free_request(ep, req);
1666 }
1667
1668 /**
1669 * isr_get_status_response: get_status request response
1670 * @ep: endpoint
1671 * @setup: setup request packet
1672 *
1673 * This function returns an error code
1674 */
1675 static int isr_get_status_response(struct ci13xxx_ep *mEp,
1676 struct usb_ctrlrequest *setup)
1677 __releases(mEp->lock)
1678 __acquires(mEp->lock)
1679 {
1680 struct usb_request *req = NULL;
1681 gfp_t gfp_flags = GFP_ATOMIC;
1682 int dir, num, retval;
1683
1684 trace("%p, %p", mEp, setup);
1685
1686 if (mEp == NULL || setup == NULL)
1687 return -EINVAL;
1688
1689 spin_unlock(mEp->lock);
1690 req = usb_ep_alloc_request(&mEp->ep, gfp_flags);
1691 spin_lock(mEp->lock);
1692 if (req == NULL)
1693 return -ENOMEM;
1694
1695 req->complete = isr_get_status_complete;
1696 req->length = 2;
1697 req->buf = kzalloc(req->length, gfp_flags);
1698 if (req->buf == NULL) {
1699 retval = -ENOMEM;
1700 goto err_free_req;
1701 }
1702
1703 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1704 /* TODO: D1 - Remote Wakeup; D0 - Self Powered */
1705 retval = 0;
1706 } else if ((setup->bRequestType & USB_RECIP_MASK) \
1707 == USB_RECIP_ENDPOINT) {
1708 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
1709 TX : RX;
1710 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
1711 *((u16 *)req->buf) = hw_ep_get_halt(num, dir);
1712 }
1713 /* else do nothing; reserved for future use */
1714
1715 spin_unlock(mEp->lock);
1716 retval = usb_ep_queue(&mEp->ep, req, gfp_flags);
1717 spin_lock(mEp->lock);
1718 if (retval)
1719 goto err_free_buf;
1720
1721 return 0;
1722
1723 err_free_buf:
1724 kfree(req->buf);
1725 err_free_req:
1726 spin_unlock(mEp->lock);
1727 usb_ep_free_request(&mEp->ep, req);
1728 spin_lock(mEp->lock);
1729 return retval;
1730 }
1731
1732 /**
1733 * isr_setup_status_phase: queues the status phase of a setup transation
1734 * @mEp: endpoint
1735 *
1736 * This function returns an error code
1737 */
1738 static int isr_setup_status_phase(struct ci13xxx_ep *mEp)
1739 __releases(mEp->lock)
1740 __acquires(mEp->lock)
1741 {
1742 int retval;
1743
1744 trace("%p", mEp);
1745
1746 /* mEp is always valid & configured */
1747
1748 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
1749 mEp->dir = (mEp->dir == TX) ? RX : TX;
1750
1751 mEp->status->no_interrupt = 1;
1752
1753 spin_unlock(mEp->lock);
1754 retval = usb_ep_queue(&mEp->ep, mEp->status, GFP_ATOMIC);
1755 spin_lock(mEp->lock);
1756
1757 return retval;
1758 }
1759
1760 /**
1761 * isr_tr_complete_low: transaction complete low level handler
1762 * @mEp: endpoint
1763 *
1764 * This function returns an error code
1765 * Caller must hold lock
1766 */
1767 static int isr_tr_complete_low(struct ci13xxx_ep *mEp)
1768 __releases(mEp->lock)
1769 __acquires(mEp->lock)
1770 {
1771 struct ci13xxx_req *mReq;
1772 int retval;
1773
1774 trace("%p", mEp);
1775
1776 if (list_empty(&mEp->qh[mEp->dir].queue))
1777 return -EINVAL;
1778
1779 /* pop oldest request */
1780 mReq = list_entry(mEp->qh[mEp->dir].queue.next,
1781 struct ci13xxx_req, queue);
1782 list_del_init(&mReq->queue);
1783
1784 retval = _hardware_dequeue(mEp, mReq);
1785 if (retval < 0) {
1786 dbg_event(_usb_addr(mEp), "DONE", retval);
1787 goto done;
1788 }
1789
1790 dbg_done(_usb_addr(mEp), mReq->ptr->token, retval);
1791
1792 if (!mReq->req.no_interrupt && mReq->req.complete != NULL) {
1793 spin_unlock(mEp->lock);
1794 mReq->req.complete(&mEp->ep, &mReq->req);
1795 spin_lock(mEp->lock);
1796 }
1797
1798 if (!list_empty(&mEp->qh[mEp->dir].queue)) {
1799 mReq = list_entry(mEp->qh[mEp->dir].queue.next,
1800 struct ci13xxx_req, queue);
1801 _hardware_enqueue(mEp, mReq);
1802 }
1803
1804 done:
1805 return retval;
1806 }
1807
1808 /**
1809 * isr_tr_complete_handler: transaction complete interrupt handler
1810 * @udc: UDC descriptor
1811 *
1812 * This function handles traffic events
1813 */
1814 static void isr_tr_complete_handler(struct ci13xxx *udc)
1815 __releases(udc->lock)
1816 __acquires(udc->lock)
1817 {
1818 unsigned i;
1819
1820 trace("%p", udc);
1821
1822 if (udc == NULL) {
1823 err("EINVAL");
1824 return;
1825 }
1826
1827 for (i = 0; i < hw_ep_max; i++) {
1828 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
1829 int type, num, err = -EINVAL;
1830 struct usb_ctrlrequest req;
1831
1832
1833 if (mEp->desc == NULL)
1834 continue; /* not configured */
1835
1836 if ((mEp->dir == RX && hw_test_and_clear_complete(i)) ||
1837 (mEp->dir == TX && hw_test_and_clear_complete(i + 16))) {
1838 err = isr_tr_complete_low(mEp);
1839 if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
1840 if (err > 0) /* needs status phase */
1841 err = isr_setup_status_phase(mEp);
1842 if (err < 0) {
1843 dbg_event(_usb_addr(mEp),
1844 "ERROR", err);
1845 spin_unlock(udc->lock);
1846 if (usb_ep_set_halt(&mEp->ep))
1847 err("error: ep_set_halt");
1848 spin_lock(udc->lock);
1849 }
1850 }
1851 }
1852
1853 if (mEp->type != USB_ENDPOINT_XFER_CONTROL ||
1854 !hw_test_and_clear_setup_status(i))
1855 continue;
1856
1857 if (i != 0) {
1858 warn("ctrl traffic received at endpoint");
1859 continue;
1860 }
1861
1862 /* read_setup_packet */
1863 do {
1864 hw_test_and_set_setup_guard();
1865 memcpy(&req, &mEp->qh[RX].ptr->setup, sizeof(req));
1866 } while (!hw_test_and_clear_setup_guard());
1867
1868 type = req.bRequestType;
1869
1870 mEp->dir = (type & USB_DIR_IN) ? TX : RX;
1871
1872 dbg_setup(_usb_addr(mEp), &req);
1873
1874 switch (req.bRequest) {
1875 case USB_REQ_CLEAR_FEATURE:
1876 if (type != (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1877 le16_to_cpu(req.wValue) != USB_ENDPOINT_HALT)
1878 goto delegate;
1879 if (req.wLength != 0)
1880 break;
1881 num = le16_to_cpu(req.wIndex);
1882 num &= USB_ENDPOINT_NUMBER_MASK;
1883 if (!udc->ci13xxx_ep[num].wedge) {
1884 spin_unlock(udc->lock);
1885 err = usb_ep_clear_halt(
1886 &udc->ci13xxx_ep[num].ep);
1887 spin_lock(udc->lock);
1888 if (err)
1889 break;
1890 }
1891 err = isr_setup_status_phase(mEp);
1892 break;
1893 case USB_REQ_GET_STATUS:
1894 if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
1895 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1896 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1897 goto delegate;
1898 if (le16_to_cpu(req.wLength) != 2 ||
1899 le16_to_cpu(req.wValue) != 0)
1900 break;
1901 err = isr_get_status_response(mEp, &req);
1902 break;
1903 case USB_REQ_SET_ADDRESS:
1904 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1905 goto delegate;
1906 if (le16_to_cpu(req.wLength) != 0 ||
1907 le16_to_cpu(req.wIndex) != 0)
1908 break;
1909 err = hw_usb_set_address((u8)le16_to_cpu(req.wValue));
1910 if (err)
1911 break;
1912 err = isr_setup_status_phase(mEp);
1913 break;
1914 case USB_REQ_SET_FEATURE:
1915 if (type != (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1916 le16_to_cpu(req.wValue) != USB_ENDPOINT_HALT)
1917 goto delegate;
1918 if (req.wLength != 0)
1919 break;
1920 num = le16_to_cpu(req.wIndex);
1921 num &= USB_ENDPOINT_NUMBER_MASK;
1922
1923 spin_unlock(udc->lock);
1924 err = usb_ep_set_halt(&udc->ci13xxx_ep[num].ep);
1925 spin_lock(udc->lock);
1926 if (err)
1927 break;
1928 err = isr_setup_status_phase(mEp);
1929 break;
1930 default:
1931 delegate:
1932 if (req.wLength == 0) /* no data phase */
1933 mEp->dir = TX;
1934
1935 spin_unlock(udc->lock);
1936 err = udc->driver->setup(&udc->gadget, &req);
1937 spin_lock(udc->lock);
1938 break;
1939 }
1940
1941 if (err < 0) {
1942 dbg_event(_usb_addr(mEp), "ERROR", err);
1943
1944 spin_unlock(udc->lock);
1945 if (usb_ep_set_halt(&mEp->ep))
1946 err("error: ep_set_halt");
1947 spin_lock(udc->lock);
1948 }
1949 }
1950 }
1951
1952 /******************************************************************************
1953 * ENDPT block
1954 *****************************************************************************/
1955 /**
1956 * ep_enable: configure endpoint, making it usable
1957 *
1958 * Check usb_ep_enable() at "usb_gadget.h" for details
1959 */
1960 static int ep_enable(struct usb_ep *ep,
1961 const struct usb_endpoint_descriptor *desc)
1962 {
1963 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1964 int direction, retval = 0;
1965 unsigned long flags;
1966
1967 trace("%p, %p", ep, desc);
1968
1969 if (ep == NULL || desc == NULL)
1970 return -EINVAL;
1971
1972 spin_lock_irqsave(mEp->lock, flags);
1973
1974 /* only internal SW should enable ctrl endpts */
1975
1976 mEp->desc = desc;
1977
1978 if (!list_empty(&mEp->qh[mEp->dir].queue))
1979 warn("enabling a non-empty endpoint!");
1980
1981 mEp->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1982 mEp->num = usb_endpoint_num(desc);
1983 mEp->type = usb_endpoint_type(desc);
1984
1985 mEp->ep.maxpacket = __constant_le16_to_cpu(desc->wMaxPacketSize);
1986
1987 direction = mEp->dir;
1988 do {
1989 dbg_event(_usb_addr(mEp), "ENABLE", 0);
1990
1991 mEp->qh[mEp->dir].ptr->cap = 0;
1992
1993 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
1994 mEp->qh[mEp->dir].ptr->cap |= QH_IOS;
1995 else if (mEp->type == USB_ENDPOINT_XFER_ISOC)
1996 mEp->qh[mEp->dir].ptr->cap &= ~QH_MULT;
1997 else
1998 mEp->qh[mEp->dir].ptr->cap &= ~QH_ZLT;
1999
2000 mEp->qh[mEp->dir].ptr->cap |=
2001 (mEp->ep.maxpacket << ffs_nr(QH_MAX_PKT)) & QH_MAX_PKT;
2002 mEp->qh[mEp->dir].ptr->td.next |= TD_TERMINATE; /* needed? */
2003
2004 retval |= hw_ep_enable(mEp->num, mEp->dir, mEp->type);
2005
2006 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
2007 mEp->dir = (mEp->dir == TX) ? RX : TX;
2008
2009 } while (mEp->dir != direction);
2010
2011 spin_unlock_irqrestore(mEp->lock, flags);
2012 return retval;
2013 }
2014
2015 /**
2016 * ep_disable: endpoint is no longer usable
2017 *
2018 * Check usb_ep_disable() at "usb_gadget.h" for details
2019 */
2020 static int ep_disable(struct usb_ep *ep)
2021 {
2022 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2023 int direction, retval = 0;
2024 unsigned long flags;
2025
2026 trace("%p", ep);
2027
2028 if (ep == NULL)
2029 return -EINVAL;
2030 else if (mEp->desc == NULL)
2031 return -EBUSY;
2032
2033 spin_lock_irqsave(mEp->lock, flags);
2034
2035 /* only internal SW should disable ctrl endpts */
2036
2037 direction = mEp->dir;
2038 do {
2039 dbg_event(_usb_addr(mEp), "DISABLE", 0);
2040
2041 retval |= _ep_nuke(mEp);
2042 retval |= hw_ep_disable(mEp->num, mEp->dir);
2043
2044 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
2045 mEp->dir = (mEp->dir == TX) ? RX : TX;
2046
2047 } while (mEp->dir != direction);
2048
2049 mEp->desc = NULL;
2050
2051 spin_unlock_irqrestore(mEp->lock, flags);
2052 return retval;
2053 }
2054
2055 /**
2056 * ep_alloc_request: allocate a request object to use with this endpoint
2057 *
2058 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
2059 */
2060 static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
2061 {
2062 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2063 struct ci13xxx_req *mReq = NULL;
2064 unsigned long flags;
2065
2066 trace("%p, %i", ep, gfp_flags);
2067
2068 if (ep == NULL) {
2069 err("EINVAL");
2070 return NULL;
2071 }
2072
2073 spin_lock_irqsave(mEp->lock, flags);
2074
2075 mReq = kzalloc(sizeof(struct ci13xxx_req), gfp_flags);
2076 if (mReq != NULL) {
2077 INIT_LIST_HEAD(&mReq->queue);
2078
2079 mReq->ptr = dma_pool_alloc(mEp->td_pool, gfp_flags,
2080 &mReq->dma);
2081 if (mReq->ptr == NULL) {
2082 kfree(mReq);
2083 mReq = NULL;
2084 }
2085 }
2086
2087 dbg_event(_usb_addr(mEp), "ALLOC", mReq == NULL);
2088
2089 spin_unlock_irqrestore(mEp->lock, flags);
2090
2091 return (mReq == NULL) ? NULL : &mReq->req;
2092 }
2093
2094 /**
2095 * ep_free_request: frees a request object
2096 *
2097 * Check usb_ep_free_request() at "usb_gadget.h" for details
2098 */
2099 static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
2100 {
2101 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2102 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
2103 unsigned long flags;
2104
2105 trace("%p, %p", ep, req);
2106
2107 if (ep == NULL || req == NULL) {
2108 err("EINVAL");
2109 return;
2110 } else if (!list_empty(&mReq->queue)) {
2111 err("EBUSY");
2112 return;
2113 }
2114
2115 spin_lock_irqsave(mEp->lock, flags);
2116
2117 if (mReq->ptr)
2118 dma_pool_free(mEp->td_pool, mReq->ptr, mReq->dma);
2119 kfree(mReq);
2120
2121 dbg_event(_usb_addr(mEp), "FREE", 0);
2122
2123 spin_unlock_irqrestore(mEp->lock, flags);
2124 }
2125
2126 /**
2127 * ep_queue: queues (submits) an I/O request to an endpoint
2128 *
2129 * Check usb_ep_queue()* at usb_gadget.h" for details
2130 */
2131 static int ep_queue(struct usb_ep *ep, struct usb_request *req,
2132 gfp_t __maybe_unused gfp_flags)
2133 {
2134 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2135 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
2136 int retval = 0;
2137 unsigned long flags;
2138
2139 trace("%p, %p, %X", ep, req, gfp_flags);
2140
2141 if (ep == NULL || req == NULL || mEp->desc == NULL)
2142 return -EINVAL;
2143
2144 spin_lock_irqsave(mEp->lock, flags);
2145
2146 if (mEp->type == USB_ENDPOINT_XFER_CONTROL &&
2147 !list_empty(&mEp->qh[mEp->dir].queue)) {
2148 _ep_nuke(mEp);
2149 retval = -EOVERFLOW;
2150 warn("endpoint ctrl %X nuked", _usb_addr(mEp));
2151 }
2152
2153 /* first nuke then test link, e.g. previous status has not sent */
2154 if (!list_empty(&mReq->queue)) {
2155 retval = -EBUSY;
2156 err("request already in queue");
2157 goto done;
2158 }
2159
2160 if (req->length > (4 * PAGE_SIZE)) {
2161 req->length = (4 * PAGE_SIZE);
2162 retval = -EMSGSIZE;
2163 warn("request length truncated");
2164 }
2165
2166 dbg_queue(_usb_addr(mEp), req, retval);
2167
2168 /* push request */
2169 mReq->req.status = -EINPROGRESS;
2170 mReq->req.actual = 0;
2171 list_add_tail(&mReq->queue, &mEp->qh[mEp->dir].queue);
2172
2173 retval = _hardware_enqueue(mEp, mReq);
2174 if (retval == -EALREADY || retval == -EBUSY) {
2175 dbg_event(_usb_addr(mEp), "QUEUE", retval);
2176 retval = 0;
2177 }
2178
2179 done:
2180 spin_unlock_irqrestore(mEp->lock, flags);
2181 return retval;
2182 }
2183
2184 /**
2185 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
2186 *
2187 * Check usb_ep_dequeue() at "usb_gadget.h" for details
2188 */
2189 static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
2190 {
2191 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2192 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
2193 unsigned long flags;
2194
2195 trace("%p, %p", ep, req);
2196
2197 if (ep == NULL || req == NULL || mEp->desc == NULL ||
2198 list_empty(&mReq->queue) || list_empty(&mEp->qh[mEp->dir].queue))
2199 return -EINVAL;
2200
2201 spin_lock_irqsave(mEp->lock, flags);
2202
2203 dbg_event(_usb_addr(mEp), "DEQUEUE", 0);
2204
2205 if (mReq->req.status == -EALREADY)
2206 _hardware_dequeue(mEp, mReq);
2207
2208 /* pop request */
2209 list_del_init(&mReq->queue);
2210 req->status = -ECONNRESET;
2211
2212 if (!mReq->req.no_interrupt && mReq->req.complete != NULL) {
2213 spin_unlock(mEp->lock);
2214 mReq->req.complete(&mEp->ep, &mReq->req);
2215 spin_lock(mEp->lock);
2216 }
2217
2218 spin_unlock_irqrestore(mEp->lock, flags);
2219 return 0;
2220 }
2221
2222 /**
2223 * ep_set_halt: sets the endpoint halt feature
2224 *
2225 * Check usb_ep_set_halt() at "usb_gadget.h" for details
2226 */
2227 static int ep_set_halt(struct usb_ep *ep, int value)
2228 {
2229 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2230 int direction, retval = 0;
2231 unsigned long flags;
2232
2233 trace("%p, %i", ep, value);
2234
2235 if (ep == NULL || mEp->desc == NULL)
2236 return -EINVAL;
2237
2238 spin_lock_irqsave(mEp->lock, flags);
2239
2240 #ifndef STALL_IN
2241 /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
2242 if (value && mEp->type == USB_ENDPOINT_XFER_BULK && mEp->dir == TX &&
2243 !list_empty(&mEp->qh[mEp->dir].queue)) {
2244 spin_unlock_irqrestore(mEp->lock, flags);
2245 return -EAGAIN;
2246 }
2247 #endif
2248
2249 direction = mEp->dir;
2250 do {
2251 dbg_event(_usb_addr(mEp), "HALT", value);
2252 retval |= hw_ep_set_halt(mEp->num, mEp->dir, value);
2253
2254 if (!value)
2255 mEp->wedge = 0;
2256
2257 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
2258 mEp->dir = (mEp->dir == TX) ? RX : TX;
2259
2260 } while (mEp->dir != direction);
2261
2262 spin_unlock_irqrestore(mEp->lock, flags);
2263 return retval;
2264 }
2265
2266 /**
2267 * ep_set_wedge: sets the halt feature and ignores clear requests
2268 *
2269 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
2270 */
2271 static int ep_set_wedge(struct usb_ep *ep)
2272 {
2273 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2274 unsigned long flags;
2275
2276 trace("%p", ep);
2277
2278 if (ep == NULL || mEp->desc == NULL)
2279 return -EINVAL;
2280
2281 spin_lock_irqsave(mEp->lock, flags);
2282
2283 dbg_event(_usb_addr(mEp), "WEDGE", 0);
2284 mEp->wedge = 1;
2285
2286 spin_unlock_irqrestore(mEp->lock, flags);
2287
2288 return usb_ep_set_halt(ep);
2289 }
2290
2291 /**
2292 * ep_fifo_flush: flushes contents of a fifo
2293 *
2294 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
2295 */
2296 static void ep_fifo_flush(struct usb_ep *ep)
2297 {
2298 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
2299 unsigned long flags;
2300
2301 trace("%p", ep);
2302
2303 if (ep == NULL) {
2304 err("%02X: -EINVAL", _usb_addr(mEp));
2305 return;
2306 }
2307
2308 spin_lock_irqsave(mEp->lock, flags);
2309
2310 dbg_event(_usb_addr(mEp), "FFLUSH", 0);
2311 hw_ep_flush(mEp->num, mEp->dir);
2312
2313 spin_unlock_irqrestore(mEp->lock, flags);
2314 }
2315
2316 /**
2317 * Endpoint-specific part of the API to the USB controller hardware
2318 * Check "usb_gadget.h" for details
2319 */
2320 static const struct usb_ep_ops usb_ep_ops = {
2321 .enable = ep_enable,
2322 .disable = ep_disable,
2323 .alloc_request = ep_alloc_request,
2324 .free_request = ep_free_request,
2325 .queue = ep_queue,
2326 .dequeue = ep_dequeue,
2327 .set_halt = ep_set_halt,
2328 .set_wedge = ep_set_wedge,
2329 .fifo_flush = ep_fifo_flush,
2330 };
2331
2332 /******************************************************************************
2333 * GADGET block
2334 *****************************************************************************/
2335 /**
2336 * Device operations part of the API to the USB controller hardware,
2337 * which don't involve endpoints (or i/o)
2338 * Check "usb_gadget.h" for details
2339 */
2340 static const struct usb_gadget_ops usb_gadget_ops;
2341
2342 /**
2343 * usb_gadget_probe_driver: register a gadget driver
2344 * @driver: the driver being registered
2345 * @bind: the driver's bind callback
2346 *
2347 * Check usb_gadget_probe_driver() at <linux/usb/gadget.h> for details.
2348 * Interrupts are enabled here.
2349 */
2350 int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
2351 int (*bind)(struct usb_gadget *))
2352 {
2353 struct ci13xxx *udc = _udc;
2354 unsigned long i, k, flags;
2355 int retval = -ENOMEM;
2356
2357 trace("%p", driver);
2358
2359 if (driver == NULL ||
2360 bind == NULL ||
2361 driver->unbind == NULL ||
2362 driver->setup == NULL ||
2363 driver->disconnect == NULL ||
2364 driver->suspend == NULL ||
2365 driver->resume == NULL)
2366 return -EINVAL;
2367 else if (udc == NULL)
2368 return -ENODEV;
2369 else if (udc->driver != NULL)
2370 return -EBUSY;
2371
2372 /* alloc resources */
2373 udc->qh_pool = dma_pool_create("ci13xxx_qh", &udc->gadget.dev,
2374 sizeof(struct ci13xxx_qh),
2375 64, PAGE_SIZE);
2376 if (udc->qh_pool == NULL)
2377 return -ENOMEM;
2378
2379 udc->td_pool = dma_pool_create("ci13xxx_td", &udc->gadget.dev,
2380 sizeof(struct ci13xxx_td),
2381 64, PAGE_SIZE);
2382 if (udc->td_pool == NULL) {
2383 dma_pool_destroy(udc->qh_pool);
2384 udc->qh_pool = NULL;
2385 return -ENOMEM;
2386 }
2387
2388 spin_lock_irqsave(udc->lock, flags);
2389
2390 info("hw_ep_max = %d", hw_ep_max);
2391
2392 udc->driver = driver;
2393 udc->gadget.ops = NULL;
2394 udc->gadget.dev.driver = NULL;
2395
2396 retval = 0;
2397 for (i = 0; i < hw_ep_max; i++) {
2398 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
2399
2400 scnprintf(mEp->name, sizeof(mEp->name), "ep%i", (int)i);
2401
2402 mEp->lock = udc->lock;
2403 mEp->device = &udc->gadget.dev;
2404 mEp->td_pool = udc->td_pool;
2405
2406 mEp->ep.name = mEp->name;
2407 mEp->ep.ops = &usb_ep_ops;
2408 mEp->ep.maxpacket = CTRL_PAYLOAD_MAX;
2409
2410 /* this allocation cannot be random */
2411 for (k = RX; k <= TX; k++) {
2412 INIT_LIST_HEAD(&mEp->qh[k].queue);
2413 mEp->qh[k].ptr = dma_pool_alloc(udc->qh_pool,
2414 GFP_KERNEL,
2415 &mEp->qh[k].dma);
2416 if (mEp->qh[k].ptr == NULL)
2417 retval = -ENOMEM;
2418 else
2419 memset(mEp->qh[k].ptr, 0,
2420 sizeof(*mEp->qh[k].ptr));
2421 }
2422 if (i == 0)
2423 udc->gadget.ep0 = &mEp->ep;
2424 else
2425 list_add_tail(&mEp->ep.ep_list, &udc->gadget.ep_list);
2426 }
2427 if (retval)
2428 goto done;
2429
2430 /* bind gadget */
2431 driver->driver.bus = NULL;
2432 udc->gadget.ops = &usb_gadget_ops;
2433 udc->gadget.dev.driver = &driver->driver;
2434
2435 spin_unlock_irqrestore(udc->lock, flags);
2436 retval = bind(&udc->gadget); /* MAY SLEEP */
2437 spin_lock_irqsave(udc->lock, flags);
2438
2439 if (retval) {
2440 udc->gadget.ops = NULL;
2441 udc->gadget.dev.driver = NULL;
2442 goto done;
2443 }
2444
2445 retval = hw_device_state(udc->ci13xxx_ep[0].qh[RX].dma);
2446
2447 done:
2448 spin_unlock_irqrestore(udc->lock, flags);
2449 if (retval)
2450 usb_gadget_unregister_driver(driver);
2451 return retval;
2452 }
2453 EXPORT_SYMBOL(usb_gadget_probe_driver);
2454
2455 /**
2456 * usb_gadget_unregister_driver: unregister a gadget driver
2457 *
2458 * Check usb_gadget_unregister_driver() at "usb_gadget.h" for details
2459 */
2460 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
2461 {
2462 struct ci13xxx *udc = _udc;
2463 unsigned long i, k, flags;
2464
2465 trace("%p", driver);
2466
2467 if (driver == NULL ||
2468 driver->unbind == NULL ||
2469 driver->setup == NULL ||
2470 driver->disconnect == NULL ||
2471 driver->suspend == NULL ||
2472 driver->resume == NULL ||
2473 driver != udc->driver)
2474 return -EINVAL;
2475
2476 spin_lock_irqsave(udc->lock, flags);
2477
2478 hw_device_state(0);
2479
2480 /* unbind gadget */
2481 if (udc->gadget.ops != NULL) {
2482 _gadget_stop_activity(&udc->gadget);
2483
2484 spin_unlock_irqrestore(udc->lock, flags);
2485 driver->unbind(&udc->gadget); /* MAY SLEEP */
2486 spin_lock_irqsave(udc->lock, flags);
2487
2488 udc->gadget.ops = NULL;
2489 udc->gadget.dev.driver = NULL;
2490 }
2491
2492 /* free resources */
2493 for (i = 0; i < hw_ep_max; i++) {
2494 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
2495
2496 if (i == 0)
2497 udc->gadget.ep0 = NULL;
2498 else if (!list_empty(&mEp->ep.ep_list))
2499 list_del_init(&mEp->ep.ep_list);
2500
2501 for (k = RX; k <= TX; k++)
2502 if (mEp->qh[k].ptr != NULL)
2503 dma_pool_free(udc->qh_pool,
2504 mEp->qh[k].ptr, mEp->qh[k].dma);
2505 }
2506
2507 udc->driver = NULL;
2508
2509 spin_unlock_irqrestore(udc->lock, flags);
2510
2511 if (udc->td_pool != NULL) {
2512 dma_pool_destroy(udc->td_pool);
2513 udc->td_pool = NULL;
2514 }
2515 if (udc->qh_pool != NULL) {
2516 dma_pool_destroy(udc->qh_pool);
2517 udc->qh_pool = NULL;
2518 }
2519
2520 return 0;
2521 }
2522 EXPORT_SYMBOL(usb_gadget_unregister_driver);
2523
2524 /******************************************************************************
2525 * BUS block
2526 *****************************************************************************/
2527 /**
2528 * udc_irq: global interrupt handler
2529 *
2530 * This function returns IRQ_HANDLED if the IRQ has been handled
2531 * It locks access to registers
2532 */
2533 static irqreturn_t udc_irq(void)
2534 {
2535 struct ci13xxx *udc = _udc;
2536 irqreturn_t retval;
2537 u32 intr;
2538
2539 trace();
2540
2541 if (udc == NULL) {
2542 err("ENODEV");
2543 return IRQ_HANDLED;
2544 }
2545
2546 spin_lock(udc->lock);
2547 intr = hw_test_and_clear_intr_active();
2548 if (intr) {
2549 isr_statistics.hndl.buf[isr_statistics.hndl.idx++] = intr;
2550 isr_statistics.hndl.idx &= ISR_MASK;
2551 isr_statistics.hndl.cnt++;
2552
2553 /* order defines priority - do NOT change it */
2554 if (USBi_URI & intr) {
2555 isr_statistics.uri++;
2556 isr_reset_handler(udc);
2557 }
2558 if (USBi_PCI & intr) {
2559 isr_statistics.pci++;
2560 udc->gadget.speed = hw_port_is_high_speed() ?
2561 USB_SPEED_HIGH : USB_SPEED_FULL;
2562 }
2563 if (USBi_UEI & intr)
2564 isr_statistics.uei++;
2565 if (USBi_UI & intr) {
2566 isr_statistics.ui++;
2567 isr_tr_complete_handler(udc);
2568 }
2569 if (USBi_SLI & intr)
2570 isr_statistics.sli++;
2571 retval = IRQ_HANDLED;
2572 } else {
2573 isr_statistics.none++;
2574 retval = IRQ_NONE;
2575 }
2576 spin_unlock(udc->lock);
2577
2578 return retval;
2579 }
2580
2581 /**
2582 * udc_release: driver release function
2583 * @dev: device
2584 *
2585 * Currently does nothing
2586 */
2587 static void udc_release(struct device *dev)
2588 {
2589 trace("%p", dev);
2590
2591 if (dev == NULL)
2592 err("EINVAL");
2593 }
2594
2595 /**
2596 * udc_probe: parent probe must call this to initialize UDC
2597 * @dev: parent device
2598 * @regs: registers base address
2599 * @name: driver name
2600 *
2601 * This function returns an error code
2602 * No interrupts active, the IRQ has not been requested yet
2603 * Kernel assumes 32-bit DMA operations by default, no need to dma_set_mask
2604 */
2605 static int udc_probe(struct device *dev, void __iomem *regs, const char *name)
2606 {
2607 struct ci13xxx *udc;
2608 int retval = 0;
2609
2610 trace("%p, %p, %p", dev, regs, name);
2611
2612 if (dev == NULL || regs == NULL || name == NULL)
2613 return -EINVAL;
2614
2615 udc = kzalloc(sizeof(struct ci13xxx), GFP_KERNEL);
2616 if (udc == NULL)
2617 return -ENOMEM;
2618
2619 udc->lock = &udc_lock;
2620
2621 retval = hw_device_reset(regs);
2622 if (retval)
2623 goto done;
2624
2625 udc->gadget.ops = NULL;
2626 udc->gadget.speed = USB_SPEED_UNKNOWN;
2627 udc->gadget.is_dualspeed = 1;
2628 udc->gadget.is_otg = 0;
2629 udc->gadget.name = name;
2630
2631 INIT_LIST_HEAD(&udc->gadget.ep_list);
2632 udc->gadget.ep0 = NULL;
2633
2634 dev_set_name(&udc->gadget.dev, "gadget");
2635 udc->gadget.dev.dma_mask = dev->dma_mask;
2636 udc->gadget.dev.parent = dev;
2637 udc->gadget.dev.release = udc_release;
2638
2639 retval = device_register(&udc->gadget.dev);
2640 if (retval)
2641 goto done;
2642
2643 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
2644 retval = dbg_create_files(&udc->gadget.dev);
2645 #endif
2646 if (retval) {
2647 device_unregister(&udc->gadget.dev);
2648 goto done;
2649 }
2650
2651 _udc = udc;
2652 return retval;
2653
2654 done:
2655 err("error = %i", retval);
2656 kfree(udc);
2657 _udc = NULL;
2658 return retval;
2659 }
2660
2661 /**
2662 * udc_remove: parent remove must call this to remove UDC
2663 *
2664 * No interrupts active, the IRQ has been released
2665 */
2666 static void udc_remove(void)
2667 {
2668 struct ci13xxx *udc = _udc;
2669
2670 if (udc == NULL) {
2671 err("EINVAL");
2672 return;
2673 }
2674
2675 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
2676 dbg_remove_files(&udc->gadget.dev);
2677 #endif
2678 device_unregister(&udc->gadget.dev);
2679
2680 kfree(udc);
2681 _udc = NULL;
2682 }
2683
2684 /******************************************************************************
2685 * PCI block
2686 *****************************************************************************/
2687 /**
2688 * ci13xxx_pci_irq: interrut handler
2689 * @irq: irq number
2690 * @pdev: USB Device Controller interrupt source
2691 *
2692 * This function returns IRQ_HANDLED if the IRQ has been handled
2693 * This is an ISR don't trace, use attribute interface instead
2694 */
2695 static irqreturn_t ci13xxx_pci_irq(int irq, void *pdev)
2696 {
2697 if (irq == 0) {
2698 dev_err(&((struct pci_dev *)pdev)->dev, "Invalid IRQ0 usage!");
2699 return IRQ_HANDLED;
2700 }
2701 return udc_irq();
2702 }
2703
2704 /**
2705 * ci13xxx_pci_probe: PCI probe
2706 * @pdev: USB device controller being probed
2707 * @id: PCI hotplug ID connecting controller to UDC framework
2708 *
2709 * This function returns an error code
2710 * Allocates basic PCI resources for this USB device controller, and then
2711 * invokes the udc_probe() method to start the UDC associated with it
2712 */
2713 static int __devinit ci13xxx_pci_probe(struct pci_dev *pdev,
2714 const struct pci_device_id *id)
2715 {
2716 void __iomem *regs = NULL;
2717 int retval = 0;
2718
2719 if (id == NULL)
2720 return -EINVAL;
2721
2722 retval = pci_enable_device(pdev);
2723 if (retval)
2724 goto done;
2725
2726 if (!pdev->irq) {
2727 dev_err(&pdev->dev, "No IRQ, check BIOS/PCI setup!");
2728 retval = -ENODEV;
2729 goto disable_device;
2730 }
2731
2732 retval = pci_request_regions(pdev, UDC_DRIVER_NAME);
2733 if (retval)
2734 goto disable_device;
2735
2736 /* BAR 0 holds all the registers */
2737 regs = pci_iomap(pdev, 0, 0);
2738 if (!regs) {
2739 dev_err(&pdev->dev, "Error mapping memory!");
2740 retval = -EFAULT;
2741 goto release_regions;
2742 }
2743 pci_set_drvdata(pdev, (__force void *)regs);
2744
2745 pci_set_master(pdev);
2746 pci_try_set_mwi(pdev);
2747
2748 retval = udc_probe(&pdev->dev, regs, UDC_DRIVER_NAME);
2749 if (retval)
2750 goto iounmap;
2751
2752 /* our device does not have MSI capability */
2753
2754 retval = request_irq(pdev->irq, ci13xxx_pci_irq, IRQF_SHARED,
2755 UDC_DRIVER_NAME, pdev);
2756 if (retval)
2757 goto gadget_remove;
2758
2759 return 0;
2760
2761 gadget_remove:
2762 udc_remove();
2763 iounmap:
2764 pci_iounmap(pdev, regs);
2765 release_regions:
2766 pci_release_regions(pdev);
2767 disable_device:
2768 pci_disable_device(pdev);
2769 done:
2770 return retval;
2771 }
2772
2773 /**
2774 * ci13xxx_pci_remove: PCI remove
2775 * @pdev: USB Device Controller being removed
2776 *
2777 * Reverses the effect of ci13xxx_pci_probe(),
2778 * first invoking the udc_remove() and then releases
2779 * all PCI resources allocated for this USB device controller
2780 */
2781 static void __devexit ci13xxx_pci_remove(struct pci_dev *pdev)
2782 {
2783 free_irq(pdev->irq, pdev);
2784 udc_remove();
2785 pci_iounmap(pdev, (__force void __iomem *)pci_get_drvdata(pdev));
2786 pci_release_regions(pdev);
2787 pci_disable_device(pdev);
2788 }
2789
2790 /**
2791 * PCI device table
2792 * PCI device structure
2793 *
2794 * Check "pci.h" for details
2795 */
2796 static DEFINE_PCI_DEVICE_TABLE(ci13xxx_pci_id_table) = {
2797 { PCI_DEVICE(0x153F, 0x1004) },
2798 { PCI_DEVICE(0x153F, 0x1006) },
2799 { 0, 0, 0, 0, 0, 0, 0 /* end: all zeroes */ }
2800 };
2801 MODULE_DEVICE_TABLE(pci, ci13xxx_pci_id_table);
2802
2803 static struct pci_driver ci13xxx_pci_driver = {
2804 .name = UDC_DRIVER_NAME,
2805 .id_table = ci13xxx_pci_id_table,
2806 .probe = ci13xxx_pci_probe,
2807 .remove = __devexit_p(ci13xxx_pci_remove),
2808 };
2809
2810 /**
2811 * ci13xxx_pci_init: module init
2812 *
2813 * Driver load
2814 */
2815 static int __init ci13xxx_pci_init(void)
2816 {
2817 return pci_register_driver(&ci13xxx_pci_driver);
2818 }
2819 module_init(ci13xxx_pci_init);
2820
2821 /**
2822 * ci13xxx_pci_exit: module exit
2823 *
2824 * Driver unload
2825 */
2826 static void __exit ci13xxx_pci_exit(void)
2827 {
2828 pci_unregister_driver(&ci13xxx_pci_driver);
2829 }
2830 module_exit(ci13xxx_pci_exit);
2831
2832 MODULE_AUTHOR("MIPS - David Lopo <dlopo@chipidea.mips.com>");
2833 MODULE_DESCRIPTION("MIPS CI13XXX USB Peripheral Controller");
2834 MODULE_LICENSE("GPL");
2835 MODULE_VERSION("June 2008");
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree