include/drm/intel-gtt.h

   1 /* Common header for intel-gtt.ko and i915.ko */
   2
   3 #ifndef _DRM_INTEL_GTT_H
   4 #define _DRM_INTEL_GTT_H
   5
   6 struct intel_gtt {
   7         /* Size of memory reserved for graphics by the BIOS */
   8         unsigned int stolen_size;
   9         /* Total number of gtt entries. */
  10         unsigned int gtt_total_entries;
  11         /* Part of the gtt that is mappable by the cpu, for those chips where
  12          * this is not the full gtt. */
  13         unsigned int gtt_mappable_entries;
  14         /* Whether i915 needs to use the dmar apis or not. */
  15         unsigned int needs_dmar : 1;
  16         /* Whether we idle the gpu before mapping/unmapping */
  17         unsigned int do_idle_maps : 1;
  18         /* Share the scratch page dma with ppgtts. */
  19         dma_addr_t scratch_page_dma;
  20         struct page *scratch_page;
  21         /* for ppgtt PDE access */
  22         u32 __iomem *gtt;
  23         /* needed for ioremap in drm/i915 */
  24         phys_addr_t gma_bus_addr;
  25 } *intel_gtt_get(void);
  26
  27 int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
  28                      struct agp_bridge_data *bridge);
  29 void intel_gmch_remove(void);
  30
  31 bool intel_enable_gtt(void);
  32
  33 void intel_gtt_chipset_flush(void);
  34 void intel_gtt_insert_sg_entries(struct sg_table *st,
  35                                  unsigned int pg_start,
  36                                  unsigned int flags);
  37 void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries);
  38
  39 /* Special gtt memory types */
  40 #define AGP_DCACHE_MEMORY       1
  41 #define AGP_PHYS_MEMORY         2
  42
  43 /* flag for GFDT type */
  44 #define AGP_USER_CACHED_MEMORY_GFDT (1 << 3)
  45
  46 #ifdef CONFIG_INTEL_IOMMU
  47 extern int intel_iommu_gfx_mapped;
  48 #endif
  49
  50 #endif