vmxnet3: Fix inconsistent LRO state after initialization
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / include / asm-generic / bitops / lock.h
blob308a9e22c802192f2fd65d99eff34fe3216426e1
1 #ifndef _ASM_GENERIC_BITOPS_LOCK_H_
2 #define _ASM_GENERIC_BITOPS_LOCK_H_
4 /**
5 * test_and_set_bit_lock - Set a bit and return its old value, for lock
6 * @nr: Bit to set
7 * @addr: Address to count from
9 * This operation is atomic and provides acquire barrier semantics.
10 * It can be used to implement bit locks.
12 #define test_and_set_bit_lock(nr, addr) test_and_set_bit(nr, addr)
14 /**
15 * clear_bit_unlock - Clear a bit in memory, for unlock
16 * @nr: the bit to set
17 * @addr: the address to start counting from
19 * This operation is atomic and provides release barrier semantics.
21 #define clear_bit_unlock(nr, addr) \
22 do { \
23 smp_mb__before_clear_bit(); \
24 clear_bit(nr, addr); \
25 } while (0)
27 /**
28 * __clear_bit_unlock - Clear a bit in memory, for unlock
29 * @nr: the bit to set
30 * @addr: the address to start counting from
32 * This operation is like clear_bit_unlock, however it is not atomic.
33 * It does provide release barrier semantics so it can be used to unlock
34 * a bit lock, however it would only be used if no other CPU can modify
35 * any bits in the memory until the lock is released (a good example is
36 * if the bit lock itself protects access to the other bits in the word).
38 #define __clear_bit_unlock(nr, addr) \
39 do { \
40 smp_mb(); \
41 __clear_bit(nr, addr); \
42 } while (0)
44 #endif /* _ASM_GENERIC_BITOPS_LOCK_H_ */