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avr32: nmi_enter() without nmi_exit()
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / ata / pata_via.c
blob8fdb2ce73210b885393dc6ec066d5f3c69185646
1 /*
2 * pata_via.c - VIA PATA for new ATA layer
3 * (C) 2005-2006 Red Hat Inc
4 * Alan Cox <alan@redhat.com>
5 *
6 * Documentation
7 * Most chipset documentation available under NDA only
8 *
9 * VIA version guide
10 * VIA VT82C561 - early design, uses ata_generic currently
11 * VIA VT82C576 - MWDMA, 33Mhz
12 * VIA VT82C586 - MWDMA, 33Mhz
13 * VIA VT82C586a - Added UDMA to 33Mhz
14 * VIA VT82C586b - UDMA33
15 * VIA VT82C596a - Nonfunctional UDMA66
16 * VIA VT82C596b - Working UDMA66
17 * VIA VT82C686 - Nonfunctional UDMA66
18 * VIA VT82C686a - Working UDMA66
19 * VIA VT82C686b - Updated to UDMA100
20 * VIA VT8231 - UDMA100
21 * VIA VT8233 - UDMA100
22 * VIA VT8233a - UDMA133
23 * VIA VT8233c - UDMA100
24 * VIA VT8235 - UDMA133
25 * VIA VT8237 - UDMA133
26 * VIA VT8237S - UDMA133
27 * VIA VT8251 - UDMA133
28 *
29 * Most registers remain compatible across chips. Others start reserved
30 * and acquire sensible semantics if set to 1 (eg cable detect). A few
31 * exceptions exist, notably around the FIFO settings.
32 *
33 * One additional quirk of the VIA design is that like ALi they use few
34 * PCI IDs for a lot of chips.
35 *
36 * Based heavily on:
37 *
38 * Version 3.38
39 *
40 * VIA IDE driver for Linux. Supported southbridges:
41 *
42 * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
43 * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
44 * vt8235, vt8237
45 *
46 * Copyright (c) 2000-2002 Vojtech Pavlik
47 *
48 * Based on the work of:
49 * Michel Aubry
50 * Jeff Garzik
51 * Andre Hedrick
52
53 */
54
55 #include <linux/kernel.h>
56 #include <linux/module.h>
57 #include <linux/pci.h>
58 #include <linux/init.h>
59 #include <linux/blkdev.h>
60 #include <linux/delay.h>
61 #include <scsi/scsi_host.h>
62 #include <linux/libata.h>
63 #include <linux/dmi.h>
64
65 #define DRV_NAME "pata_via"
66 #define DRV_VERSION "0.3.3"
67
68 /*
69 * The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx
70 * driver.
71 */
72
73 enum {
74 VIA_UDMA = 0x007,
75 VIA_UDMA_NONE = 0x000,
76 VIA_UDMA_33 = 0x001,
77 VIA_UDMA_66 = 0x002,
78 VIA_UDMA_100 = 0x003,
79 VIA_UDMA_133 = 0x004,
80 VIA_BAD_PREQ = 0x010, /* Crashes if PREQ# till DDACK# set */
81 VIA_BAD_CLK66 = 0x020, /* 66 MHz clock doesn't work correctly */
82 VIA_SET_FIFO = 0x040, /* Needs to have FIFO split set */
83 VIA_NO_UNMASK = 0x080, /* Doesn't work with IRQ unmasking on */
84 VIA_BAD_ID = 0x100, /* Has wrong vendor ID (0x1107) */
85 VIA_BAD_AST = 0x200, /* Don't touch Address Setup Timing */
86 VIA_NO_ENABLES = 0x400, /* Has no enablebits */
87 VIA_SATA_PATA = 0x800, /* SATA/PATA combined configuration */
88 };
89
90 /*
91 * VIA SouthBridge chips.
92 */
93
94 static const struct via_isa_bridge {
95 const char *name;
96 u16 id;
97 u8 rev_min;
98 u8 rev_max;
99 u16 flags;
100 } via_isa_bridges[] = {
101 { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, VIA_UDMA_133 |
102 VIA_BAD_AST | VIA_SATA_PATA },
103 { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
104 { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
105 { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA },
106 { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES},
107 { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
108 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
109 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
110 { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
111 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 },
112 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 },
113 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 },
114 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 },
115 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 },
116 { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
117 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 },
118 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
119 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO },
120 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ },
121 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO },
122 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO },
123 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO },
124 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
125 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
126 { NULL }
127 };
128
129
130 /*
131 * Cable special cases
132 */
133
134 static const struct dmi_system_id cable_dmi_table[] = {
135 {
136 .ident = "Acer Ferrari 3400",
137 .matches = {
138 DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
139 DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
140 },
141 },
142 { }
143 };
144
145 static int via_cable_override(struct pci_dev *pdev)
146 {
147 /* Systems by DMI */
148 if (dmi_check_system(cable_dmi_table))
149 return 1;
150 /* Arima W730-K8/Targa Visionary 811/... */
151 if (pdev->subsystem_vendor == 0x161F && pdev->subsystem_device == 0x2032)
152 return 1;
153 return 0;
154 }
155
156
157 /**
158 * via_cable_detect - cable detection
159 * @ap: ATA port
160 *
161 * Perform cable detection. Actually for the VIA case the BIOS
162 * already did this for us. We read the values provided by the
163 * BIOS. If you are using an 8235 in a non-PC configuration you
164 * may need to update this code.
165 *
166 * Hotplug also impacts on this.
167 */
168
169 static int via_cable_detect(struct ata_port *ap) {
170 const struct via_isa_bridge *config = ap->host->private_data;
171 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
172 u32 ata66;
173
174 if (via_cable_override(pdev))
175 return ATA_CBL_PATA40_SHORT;
176
177 if ((config->flags & VIA_SATA_PATA) && ap->port_no == 0)
178 return ATA_CBL_SATA;
179
180 /* Early chips are 40 wire */
181 if ((config->flags & VIA_UDMA) < VIA_UDMA_66)
182 return ATA_CBL_PATA40;
183 /* UDMA 66 chips have only drive side logic */
184 else if ((config->flags & VIA_UDMA) < VIA_UDMA_100)
185 return ATA_CBL_PATA_UNK;
186 /* UDMA 100 or later */
187 pci_read_config_dword(pdev, 0x50, &ata66);
188 /* Check both the drive cable reporting bits, we might not have
189 two drives */
190 if (ata66 & (0x10100000 >> (16 * ap->port_no)))
191 return ATA_CBL_PATA80;
192 /* Check with ACPI so we can spot BIOS reported SATA bridges */
193 if (ata_acpi_init_gtm(ap) &&
194 ata_acpi_cbl_80wire(ap, ata_acpi_init_gtm(ap)))
195 return ATA_CBL_PATA80;
196 return ATA_CBL_PATA40;
197 }
198
199 static int via_pre_reset(struct ata_link *link, unsigned long deadline)
200 {
201 struct ata_port *ap = link->ap;
202 const struct via_isa_bridge *config = ap->host->private_data;
203
204 if (!(config->flags & VIA_NO_ENABLES)) {
205 static const struct pci_bits via_enable_bits[] = {
206 { 0x40, 1, 0x02, 0x02 },
207 { 0x40, 1, 0x01, 0x01 }
208 };
209 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
210 if (!pci_test_config_bits(pdev, &via_enable_bits[ap->port_no]))
211 return -ENOENT;
212 }
213
214 return ata_sff_prereset(link, deadline);
215 }
216
217
218 /**
219 * via_do_set_mode - set initial PIO mode data
220 * @ap: ATA interface
221 * @adev: ATA device
222 * @mode: ATA mode being programmed
223 * @tdiv: Clocks per PCI clock
224 * @set_ast: Set to program address setup
225 * @udma_type: UDMA mode/format of registers
226 *
227 * Program the VIA registers for DMA and PIO modes. Uses the ata timing
228 * support in order to compute modes.
229 *
230 * FIXME: Hotplug will require we serialize multiple mode changes
231 * on the two channels.
232 */
233
234 static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mode, int tdiv, int set_ast, int udma_type)
235 {
236 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
237 struct ata_device *peer = ata_dev_pair(adev);
238 struct ata_timing t, p;
239 static int via_clock = 33333; /* Bus clock in kHZ - ought to be tunable one day */
240 unsigned long T = 1000000000 / via_clock;
241 unsigned long UT = T/tdiv;
242 int ut;
243 int offset = 3 - (2*ap->port_no) - adev->devno;
244
245 /* Calculate the timing values we require */
246 ata_timing_compute(adev, mode, &t, T, UT);
247
248 /* We share 8bit timing so we must merge the constraints */
249 if (peer) {
250 if (peer->pio_mode) {
251 ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
252 ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
253 }
254 }
255
256 /* Address setup is programmable but breaks on UDMA133 setups */
257 if (set_ast) {
258 u8 setup; /* 2 bits per drive */
259 int shift = 2 * offset;
260
261 pci_read_config_byte(pdev, 0x4C, &setup);
262 setup &= ~(3 << shift);
263 setup |= clamp_val(t.setup, 1, 4) << shift; /* 1,4 or 1,4 - 1 FIXME */
264 pci_write_config_byte(pdev, 0x4C, setup);
265 }
266
267 /* Load the PIO mode bits */
268 pci_write_config_byte(pdev, 0x4F - ap->port_no,
269 ((clamp_val(t.act8b, 1, 16) - 1) << 4) | (clamp_val(t.rec8b, 1, 16) - 1));
270 pci_write_config_byte(pdev, 0x48 + offset,
271 ((clamp_val(t.active, 1, 16) - 1) << 4) | (clamp_val(t.recover, 1, 16) - 1));
272
273 /* Load the UDMA bits according to type */
274 switch(udma_type) {
275 default:
276 /* BUG() ? */
277 /* fall through */
278 case 33:
279 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03;
280 break;
281 case 66:
282 ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f;
283 break;
284 case 100:
285 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
286 break;
287 case 133:
288 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
289 break;
290 }
291
292 /* Set UDMA unless device is not UDMA capable */
293 if (udma_type && t.udma) {
294 u8 cable80_status;
295
296 /* Get 80-wire cable detection bit */
297 pci_read_config_byte(pdev, 0x50 + offset, &cable80_status);
298 cable80_status &= 0x10;
299
300 pci_write_config_byte(pdev, 0x50 + offset, ut | cable80_status);
301 }
302 }
303
304 static void via_set_piomode(struct ata_port *ap, struct ata_device *adev)
305 {
306 const struct via_isa_bridge *config = ap->host->private_data;
307 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
308 int mode = config->flags & VIA_UDMA;
309 static u8 tclock[5] = { 1, 1, 2, 3, 4 };
310 static u8 udma[5] = { 0, 33, 66, 100, 133 };
311
312 via_do_set_mode(ap, adev, adev->pio_mode, tclock[mode], set_ast, udma[mode]);
313 }
314
315 static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev)
316 {
317 const struct via_isa_bridge *config = ap->host->private_data;
318 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
319 int mode = config->flags & VIA_UDMA;
320 static u8 tclock[5] = { 1, 1, 2, 3, 4 };
321 static u8 udma[5] = { 0, 33, 66, 100, 133 };
322
323 via_do_set_mode(ap, adev, adev->dma_mode, tclock[mode], set_ast, udma[mode]);
324 }
325
326 /**
327 * via_tf_load - send taskfile registers to host controller
328 * @ap: Port to which output is sent
329 * @tf: ATA taskfile register set
330 *
331 * Outputs ATA taskfile to standard ATA host controller.
332 *
333 * Note: This is to fix the internal bug of via chipsets, which
334 * will reset the device register after changing the IEN bit on
335 * ctl register
336 */
337 static void via_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
338 {
339 struct ata_taskfile tmp_tf;
340
341 if (ap->ctl != ap->last_ctl && !(tf->flags & ATA_TFLAG_DEVICE)) {
342 tmp_tf = *tf;
343 tmp_tf.flags |= ATA_TFLAG_DEVICE;
344 tf = &tmp_tf;
345 }
346 ata_sff_tf_load(ap, tf);
347 }
348
349 static struct scsi_host_template via_sht = {
350 ATA_BMDMA_SHT(DRV_NAME),
351 };
352
353 static struct ata_port_operations via_port_ops = {
354 .inherits = &ata_bmdma_port_ops,
355 .cable_detect = via_cable_detect,
356 .set_piomode = via_set_piomode,
357 .set_dmamode = via_set_dmamode,
358 .prereset = via_pre_reset,
359 .sff_tf_load = via_tf_load,
360 };
361
362 static struct ata_port_operations via_port_ops_noirq = {
363 .inherits = &via_port_ops,
364 .sff_data_xfer = ata_sff_data_xfer_noirq,
365 };
366
367 /**
368 * via_config_fifo - set up the FIFO
369 * @pdev: PCI device
370 * @flags: configuration flags
371 *
372 * Set the FIFO properties for this device if necessary. Used both on
373 * set up and on and the resume path
374 */
375
376 static void via_config_fifo(struct pci_dev *pdev, unsigned int flags)
377 {
378 u8 enable;
379
380 /* 0x40 low bits indicate enabled channels */
381 pci_read_config_byte(pdev, 0x40 , &enable);
382 enable &= 3;
383
384 if (flags & VIA_SET_FIFO) {
385 static const u8 fifo_setting[4] = {0x00, 0x60, 0x00, 0x20};
386 u8 fifo;
387
388 pci_read_config_byte(pdev, 0x43, &fifo);
389
390 /* Clear PREQ# until DDACK# for errata */
391 if (flags & VIA_BAD_PREQ)
392 fifo &= 0x7F;
393 else
394 fifo &= 0x9f;
395 /* Turn on FIFO for enabled channels */
396 fifo |= fifo_setting[enable];
397 pci_write_config_byte(pdev, 0x43, fifo);
398 }
399 }
400
401 /**
402 * via_init_one - discovery callback
403 * @pdev: PCI device
404 * @id: PCI table info
405 *
406 * A VIA IDE interface has been discovered. Figure out what revision
407 * and perform configuration work before handing it to the ATA layer
408 */
409
410 static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
411 {
412 /* Early VIA without UDMA support */
413 static const struct ata_port_info via_mwdma_info = {
414 .flags = ATA_FLAG_SLAVE_POSS,
415 .pio_mask = 0x1f,
416 .mwdma_mask = 0x07,
417 .port_ops = &via_port_ops
418 };
419 /* Ditto with IRQ masking required */
420 static const struct ata_port_info via_mwdma_info_borked = {
421 .flags = ATA_FLAG_SLAVE_POSS,
422 .pio_mask = 0x1f,
423 .mwdma_mask = 0x07,
424 .port_ops = &via_port_ops_noirq,
425 };
426 /* VIA UDMA 33 devices (and borked 66) */
427 static const struct ata_port_info via_udma33_info = {
428 .flags = ATA_FLAG_SLAVE_POSS,
429 .pio_mask = 0x1f,
430 .mwdma_mask = 0x07,
431 .udma_mask = ATA_UDMA2,
432 .port_ops = &via_port_ops
433 };
434 /* VIA UDMA 66 devices */
435 static const struct ata_port_info via_udma66_info = {
436 .flags = ATA_FLAG_SLAVE_POSS,
437 .pio_mask = 0x1f,
438 .mwdma_mask = 0x07,
439 .udma_mask = ATA_UDMA4,
440 .port_ops = &via_port_ops
441 };
442 /* VIA UDMA 100 devices */
443 static const struct ata_port_info via_udma100_info = {
444 .flags = ATA_FLAG_SLAVE_POSS,
445 .pio_mask = 0x1f,
446 .mwdma_mask = 0x07,
447 .udma_mask = ATA_UDMA5,
448 .port_ops = &via_port_ops
449 };
450 /* UDMA133 with bad AST (All current 133) */
451 static const struct ata_port_info via_udma133_info = {
452 .flags = ATA_FLAG_SLAVE_POSS,
453 .pio_mask = 0x1f,
454 .mwdma_mask = 0x07,
455 .udma_mask = ATA_UDMA6, /* FIXME: should check north bridge */
456 .port_ops = &via_port_ops
457 };
458 const struct ata_port_info *ppi[] = { NULL, NULL };
459 struct pci_dev *isa = NULL;
460 const struct via_isa_bridge *config;
461 static int printed_version;
462 u8 enable;
463 u32 timing;
464 int rc;
465
466 if (!printed_version++)
467 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
468
469 rc = pcim_enable_device(pdev);
470 if (rc)
471 return rc;
472
473 /* To find out how the IDE will behave and what features we
474 actually have to look at the bridge not the IDE controller */
475 for (config = via_isa_bridges; config->id; config++)
476 if ((isa = pci_get_device(PCI_VENDOR_ID_VIA +
477 !!(config->flags & VIA_BAD_ID),
478 config->id, NULL))) {
479
480 if (isa->revision >= config->rev_min &&
481 isa->revision <= config->rev_max)
482 break;
483 pci_dev_put(isa);
484 }
485
486 if (!config->id) {
487 printk(KERN_WARNING "via: Unknown VIA SouthBridge, disabling.\n");
488 return -ENODEV;
489 }
490 pci_dev_put(isa);
491
492 if (!(config->flags & VIA_NO_ENABLES)) {
493 /* 0x40 low bits indicate enabled channels */
494 pci_read_config_byte(pdev, 0x40 , &enable);
495 enable &= 3;
496 if (enable == 0)
497 return -ENODEV;
498 }
499
500 /* Initialise the FIFO for the enabled channels. */
501 via_config_fifo(pdev, config->flags);
502
503 /* Clock set up */
504 switch(config->flags & VIA_UDMA) {
505 case VIA_UDMA_NONE:
506 if (config->flags & VIA_NO_UNMASK)
507 ppi[0] = &via_mwdma_info_borked;
508 else
509 ppi[0] = &via_mwdma_info;
510 break;
511 case VIA_UDMA_33:
512 ppi[0] = &via_udma33_info;
513 break;
514 case VIA_UDMA_66:
515 ppi[0] = &via_udma66_info;
516 /* The 66 MHz devices require we enable the clock */
517 pci_read_config_dword(pdev, 0x50, &timing);
518 timing |= 0x80008;
519 pci_write_config_dword(pdev, 0x50, timing);
520 break;
521 case VIA_UDMA_100:
522 ppi[0] = &via_udma100_info;
523 break;
524 case VIA_UDMA_133:
525 ppi[0] = &via_udma133_info;
526 break;
527 default:
528 WARN_ON(1);
529 return -ENODEV;
530 }
531
532 if (config->flags & VIA_BAD_CLK66) {
533 /* Disable the 66MHz clock on problem devices */
534 pci_read_config_dword(pdev, 0x50, &timing);
535 timing &= ~0x80008;
536 pci_write_config_dword(pdev, 0x50, timing);
537 }
538
539 /* We have established the device type, now fire it up */
540 return ata_pci_sff_init_one(pdev, ppi, &via_sht, (void *)config);
541 }
542
543 #ifdef CONFIG_PM
544 /**
545 * via_reinit_one - reinit after resume
546 * @pdev; PCI device
547 *
548 * Called when the VIA PATA device is resumed. We must then
549 * reconfigure the fifo and other setup we may have altered. In
550 * addition the kernel needs to have the resume methods on PCI
551 * quirk supported.
552 */
553
554 static int via_reinit_one(struct pci_dev *pdev)
555 {
556 u32 timing;
557 struct ata_host *host = dev_get_drvdata(&pdev->dev);
558 const struct via_isa_bridge *config = host->private_data;
559 int rc;
560
561 rc = ata_pci_device_do_resume(pdev);
562 if (rc)
563 return rc;
564
565 via_config_fifo(pdev, config->flags);
566
567 if ((config->flags & VIA_UDMA) == VIA_UDMA_66) {
568 /* The 66 MHz devices require we enable the clock */
569 pci_read_config_dword(pdev, 0x50, &timing);
570 timing |= 0x80008;
571 pci_write_config_dword(pdev, 0x50, timing);
572 }
573 if (config->flags & VIA_BAD_CLK66) {
574 /* Disable the 66MHz clock on problem devices */
575 pci_read_config_dword(pdev, 0x50, &timing);
576 timing &= ~0x80008;
577 pci_write_config_dword(pdev, 0x50, timing);
578 }
579
580 ata_host_resume(host);
581 return 0;
582 }
583 #endif
584
585 static const struct pci_device_id via[] = {
586 { PCI_VDEVICE(VIA, 0x0571), },
587 { PCI_VDEVICE(VIA, 0x0581), },
588 { PCI_VDEVICE(VIA, 0x1571), },
589 { PCI_VDEVICE(VIA, 0x3164), },
590 { PCI_VDEVICE(VIA, 0x5324), },
591
592 { },
593 };
594
595 static struct pci_driver via_pci_driver = {
596 .name = DRV_NAME,
597 .id_table = via,
598 .probe = via_init_one,
599 .remove = ata_pci_remove_one,
600 #ifdef CONFIG_PM
601 .suspend = ata_pci_device_suspend,
602 .resume = via_reinit_one,
603 #endif
604 };
605
606 static int __init via_init(void)
607 {
608 return pci_register_driver(&via_pci_driver);
609 }
610
611 static void __exit via_exit(void)
612 {
613 pci_unregister_driver(&via_pci_driver);
614 }
615
616 MODULE_AUTHOR("Alan Cox");
617 MODULE_DESCRIPTION("low-level driver for VIA PATA");
618 MODULE_LICENSE("GPL");
619 MODULE_DEVICE_TABLE(pci, via);
620 MODULE_VERSION(DRV_VERSION);
621
622 module_init(via_init);
623 module_exit(via_exit);
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree