2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affilates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <trace/events/kvm.h>
48 #define CREATE_TRACE_POINTS
51 #include <asm/debugreg.h>
58 #include <asm/pvclock.h>
59 #include <asm/div64.h>
61 #define MAX_IO_MSRS 256
62 #define CR0_RESERVED_BITS \
63 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
64 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
65 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
66 #define CR4_RESERVED_BITS \
67 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
68 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
69 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
71 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
73 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
75 #define KVM_MAX_MCE_BANKS 32
76 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
79 * - enable syscall per default because its emulated by KVM
80 * - enable LME and LMA per default on 64 bit KVM
83 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffafeULL
;
85 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffffeULL
;
88 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
89 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
91 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
92 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
93 struct kvm_cpuid_entry2 __user
*entries
);
95 struct kvm_x86_ops
*kvm_x86_ops
;
96 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
99 module_param_named(ignore_msrs
, ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
101 #define KVM_NR_SHARED_MSRS 16
103 struct kvm_shared_msrs_global
{
105 u32 msrs
[KVM_NR_SHARED_MSRS
];
108 struct kvm_shared_msrs
{
109 struct user_return_notifier urn
;
111 struct kvm_shared_msr_values
{
114 } values
[KVM_NR_SHARED_MSRS
];
117 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
118 static DEFINE_PER_CPU(struct kvm_shared_msrs
, shared_msrs
);
120 struct kvm_stats_debugfs_item debugfs_entries
[] = {
121 { "pf_fixed", VCPU_STAT(pf_fixed
) },
122 { "pf_guest", VCPU_STAT(pf_guest
) },
123 { "tlb_flush", VCPU_STAT(tlb_flush
) },
124 { "invlpg", VCPU_STAT(invlpg
) },
125 { "exits", VCPU_STAT(exits
) },
126 { "io_exits", VCPU_STAT(io_exits
) },
127 { "mmio_exits", VCPU_STAT(mmio_exits
) },
128 { "signal_exits", VCPU_STAT(signal_exits
) },
129 { "irq_window", VCPU_STAT(irq_window_exits
) },
130 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
131 { "halt_exits", VCPU_STAT(halt_exits
) },
132 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
133 { "hypercalls", VCPU_STAT(hypercalls
) },
134 { "request_irq", VCPU_STAT(request_irq_exits
) },
135 { "irq_exits", VCPU_STAT(irq_exits
) },
136 { "host_state_reload", VCPU_STAT(host_state_reload
) },
137 { "efer_reload", VCPU_STAT(efer_reload
) },
138 { "fpu_reload", VCPU_STAT(fpu_reload
) },
139 { "insn_emulation", VCPU_STAT(insn_emulation
) },
140 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
141 { "irq_injections", VCPU_STAT(irq_injections
) },
142 { "nmi_injections", VCPU_STAT(nmi_injections
) },
143 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
144 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
145 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
146 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
147 { "mmu_flooded", VM_STAT(mmu_flooded
) },
148 { "mmu_recycled", VM_STAT(mmu_recycled
) },
149 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
150 { "mmu_unsync", VM_STAT(mmu_unsync
) },
151 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
152 { "largepages", VM_STAT(lpages
) },
156 u64 __read_mostly host_xcr0
;
158 static inline u32
bit(int bitno
)
160 return 1 << (bitno
& 31);
163 static void kvm_on_user_return(struct user_return_notifier
*urn
)
166 struct kvm_shared_msrs
*locals
167 = container_of(urn
, struct kvm_shared_msrs
, urn
);
168 struct kvm_shared_msr_values
*values
;
170 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
171 values
= &locals
->values
[slot
];
172 if (values
->host
!= values
->curr
) {
173 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
174 values
->curr
= values
->host
;
177 locals
->registered
= false;
178 user_return_notifier_unregister(urn
);
181 static void shared_msr_update(unsigned slot
, u32 msr
)
183 struct kvm_shared_msrs
*smsr
;
186 smsr
= &__get_cpu_var(shared_msrs
);
187 /* only read, and nobody should modify it at this time,
188 * so don't need lock */
189 if (slot
>= shared_msrs_global
.nr
) {
190 printk(KERN_ERR
"kvm: invalid MSR slot!");
193 rdmsrl_safe(msr
, &value
);
194 smsr
->values
[slot
].host
= value
;
195 smsr
->values
[slot
].curr
= value
;
198 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
200 if (slot
>= shared_msrs_global
.nr
)
201 shared_msrs_global
.nr
= slot
+ 1;
202 shared_msrs_global
.msrs
[slot
] = msr
;
203 /* we need ensured the shared_msr_global have been updated */
206 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
208 static void kvm_shared_msr_cpu_online(void)
212 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
213 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
216 void kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
218 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
220 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
222 smsr
->values
[slot
].curr
= value
;
223 wrmsrl(shared_msrs_global
.msrs
[slot
], value
);
224 if (!smsr
->registered
) {
225 smsr
->urn
.on_user_return
= kvm_on_user_return
;
226 user_return_notifier_register(&smsr
->urn
);
227 smsr
->registered
= true;
230 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
232 static void drop_user_return_notifiers(void *ignore
)
234 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
236 if (smsr
->registered
)
237 kvm_on_user_return(&smsr
->urn
);
240 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
242 if (irqchip_in_kernel(vcpu
->kvm
))
243 return vcpu
->arch
.apic_base
;
245 return vcpu
->arch
.apic_base
;
247 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
249 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
251 /* TODO: reserve bits check */
252 if (irqchip_in_kernel(vcpu
->kvm
))
253 kvm_lapic_set_base(vcpu
, data
);
255 vcpu
->arch
.apic_base
= data
;
257 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
259 #define EXCPT_BENIGN 0
260 #define EXCPT_CONTRIBUTORY 1
263 static int exception_class(int vector
)
273 return EXCPT_CONTRIBUTORY
;
280 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
281 unsigned nr
, bool has_error
, u32 error_code
,
287 if (!vcpu
->arch
.exception
.pending
) {
289 vcpu
->arch
.exception
.pending
= true;
290 vcpu
->arch
.exception
.has_error_code
= has_error
;
291 vcpu
->arch
.exception
.nr
= nr
;
292 vcpu
->arch
.exception
.error_code
= error_code
;
293 vcpu
->arch
.exception
.reinject
= reinject
;
297 /* to check exception */
298 prev_nr
= vcpu
->arch
.exception
.nr
;
299 if (prev_nr
== DF_VECTOR
) {
300 /* triple fault -> shutdown */
301 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
304 class1
= exception_class(prev_nr
);
305 class2
= exception_class(nr
);
306 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
307 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
308 /* generate double fault per SDM Table 5-5 */
309 vcpu
->arch
.exception
.pending
= true;
310 vcpu
->arch
.exception
.has_error_code
= true;
311 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
312 vcpu
->arch
.exception
.error_code
= 0;
314 /* replace previous exception with a new one in a hope
315 that instruction re-execution will regenerate lost
320 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
322 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
324 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
326 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
328 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
330 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
332 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
)
334 unsigned error_code
= vcpu
->arch
.fault
.error_code
;
336 ++vcpu
->stat
.pf_guest
;
337 vcpu
->arch
.cr2
= vcpu
->arch
.fault
.address
;
338 kvm_queue_exception_e(vcpu
, PF_VECTOR
, error_code
);
341 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
343 vcpu
->arch
.nmi_pending
= 1;
345 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
347 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
349 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
351 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
353 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
355 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
357 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
360 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
361 * a #GP and return false.
363 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
365 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
367 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
370 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
373 * This function will be used to read from the physical memory of the currently
374 * running guest. The difference to kvm_read_guest_page is that this function
375 * can read from guest physical or from the guest's guest physical memory.
377 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
378 gfn_t ngfn
, void *data
, int offset
, int len
,
384 ngpa
= gfn_to_gpa(ngfn
);
385 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
);
386 if (real_gfn
== UNMAPPED_GVA
)
389 real_gfn
= gpa_to_gfn(real_gfn
);
391 return kvm_read_guest_page(vcpu
->kvm
, real_gfn
, data
, offset
, len
);
393 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
395 int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
396 void *data
, int offset
, int len
, u32 access
)
398 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
399 data
, offset
, len
, access
);
403 * Load the pae pdptrs. Return true is they are all valid.
405 int load_pdptrs(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
407 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
408 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
411 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
413 ret
= kvm_read_nested_guest_page(vcpu
, pdpt_gfn
, pdpte
,
414 offset
* sizeof(u64
), sizeof(pdpte
),
415 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
420 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
421 if (is_present_gpte(pdpte
[i
]) &&
422 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
429 memcpy(vcpu
->arch
.pdptrs
, pdpte
, sizeof(vcpu
->arch
.pdptrs
));
430 __set_bit(VCPU_EXREG_PDPTR
,
431 (unsigned long *)&vcpu
->arch
.regs_avail
);
432 __set_bit(VCPU_EXREG_PDPTR
,
433 (unsigned long *)&vcpu
->arch
.regs_dirty
);
438 EXPORT_SYMBOL_GPL(load_pdptrs
);
440 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
442 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
448 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
451 if (!test_bit(VCPU_EXREG_PDPTR
,
452 (unsigned long *)&vcpu
->arch
.regs_avail
))
455 gfn
= (vcpu
->arch
.cr3
& ~31u) >> PAGE_SHIFT
;
456 offset
= (vcpu
->arch
.cr3
& ~31u) & (PAGE_SIZE
- 1);
457 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
458 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
461 changed
= memcmp(pdpte
, vcpu
->arch
.pdptrs
, sizeof(pdpte
)) != 0;
467 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
469 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
470 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
|
471 X86_CR0_CD
| X86_CR0_NW
;
476 if (cr0
& 0xffffffff00000000UL
)
480 cr0
&= ~CR0_RESERVED_BITS
;
482 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
485 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
488 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
490 if ((vcpu
->arch
.efer
& EFER_LME
)) {
495 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
500 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
))
504 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
506 if ((cr0
^ old_cr0
) & update_bits
)
507 kvm_mmu_reset_context(vcpu
);
510 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
512 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
514 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
516 EXPORT_SYMBOL_GPL(kvm_lmsw
);
518 int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
522 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
523 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
526 if (kvm_x86_ops
->get_cpl(vcpu
) != 0)
528 if (!(xcr0
& XSTATE_FP
))
530 if ((xcr0
& XSTATE_YMM
) && !(xcr0
& XSTATE_SSE
))
532 if (xcr0
& ~host_xcr0
)
534 vcpu
->arch
.xcr0
= xcr0
;
535 vcpu
->guest_xcr0_loaded
= 0;
539 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
541 if (__kvm_set_xcr(vcpu
, index
, xcr
)) {
542 kvm_inject_gp(vcpu
, 0);
547 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
549 static bool guest_cpuid_has_xsave(struct kvm_vcpu
*vcpu
)
551 struct kvm_cpuid_entry2
*best
;
553 best
= kvm_find_cpuid_entry(vcpu
, 1, 0);
554 return best
&& (best
->ecx
& bit(X86_FEATURE_XSAVE
));
557 static void update_cpuid(struct kvm_vcpu
*vcpu
)
559 struct kvm_cpuid_entry2
*best
;
561 best
= kvm_find_cpuid_entry(vcpu
, 1, 0);
565 /* Update OSXSAVE bit */
566 if (cpu_has_xsave
&& best
->function
== 0x1) {
567 best
->ecx
&= ~(bit(X86_FEATURE_OSXSAVE
));
568 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
))
569 best
->ecx
|= bit(X86_FEATURE_OSXSAVE
);
573 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
575 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
576 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
;
578 if (cr4
& CR4_RESERVED_BITS
)
581 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
584 if (is_long_mode(vcpu
)) {
585 if (!(cr4
& X86_CR4_PAE
))
587 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
588 && ((cr4
^ old_cr4
) & pdptr_bits
)
589 && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
))
592 if (cr4
& X86_CR4_VMXE
)
595 kvm_x86_ops
->set_cr4(vcpu
, cr4
);
597 if ((cr4
^ old_cr4
) & pdptr_bits
)
598 kvm_mmu_reset_context(vcpu
);
600 if ((cr4
^ old_cr4
) & X86_CR4_OSXSAVE
)
605 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
607 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
609 if (cr3
== vcpu
->arch
.cr3
&& !pdptrs_changed(vcpu
)) {
610 kvm_mmu_sync_roots(vcpu
);
611 kvm_mmu_flush_tlb(vcpu
);
615 if (is_long_mode(vcpu
)) {
616 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
620 if (cr3
& CR3_PAE_RESERVED_BITS
)
622 if (is_paging(vcpu
) && !load_pdptrs(vcpu
, cr3
))
626 * We don't check reserved bits in nonpae mode, because
627 * this isn't enforced, and VMware depends on this.
632 * Does the new cr3 value map to physical memory? (Note, we
633 * catch an invalid cr3 even in real-mode, because it would
634 * cause trouble later on when we turn on paging anyway.)
636 * A real CPU would silently accept an invalid cr3 and would
637 * attempt to use it - with largely undefined (and often hard
638 * to debug) behavior on the guest side.
640 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
642 vcpu
->arch
.cr3
= cr3
;
643 vcpu
->arch
.mmu
.new_cr3(vcpu
);
646 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
648 int __kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
650 if (cr8
& CR8_RESERVED_BITS
)
652 if (irqchip_in_kernel(vcpu
->kvm
))
653 kvm_lapic_set_tpr(vcpu
, cr8
);
655 vcpu
->arch
.cr8
= cr8
;
659 void kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
661 if (__kvm_set_cr8(vcpu
, cr8
))
662 kvm_inject_gp(vcpu
, 0);
664 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
666 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
668 if (irqchip_in_kernel(vcpu
->kvm
))
669 return kvm_lapic_get_cr8(vcpu
);
671 return vcpu
->arch
.cr8
;
673 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
675 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
679 vcpu
->arch
.db
[dr
] = val
;
680 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
681 vcpu
->arch
.eff_db
[dr
] = val
;
684 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
688 if (val
& 0xffffffff00000000ULL
)
690 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | DR6_FIXED_1
;
693 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
697 if (val
& 0xffffffff00000000ULL
)
699 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
700 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
701 kvm_x86_ops
->set_dr7(vcpu
, vcpu
->arch
.dr7
);
702 vcpu
->arch
.switch_db_regs
= (val
& DR7_BP_EN_MASK
);
710 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
714 res
= __kvm_set_dr(vcpu
, dr
, val
);
716 kvm_queue_exception(vcpu
, UD_VECTOR
);
718 kvm_inject_gp(vcpu
, 0);
722 EXPORT_SYMBOL_GPL(kvm_set_dr
);
724 static int _kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
728 *val
= vcpu
->arch
.db
[dr
];
731 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
735 *val
= vcpu
->arch
.dr6
;
738 if (kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
742 *val
= vcpu
->arch
.dr7
;
749 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
751 if (_kvm_get_dr(vcpu
, dr
, val
)) {
752 kvm_queue_exception(vcpu
, UD_VECTOR
);
757 EXPORT_SYMBOL_GPL(kvm_get_dr
);
760 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
761 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
763 * This list is modified at module load time to reflect the
764 * capabilities of the host cpu. This capabilities test skips MSRs that are
765 * kvm-specific. Those are put in the beginning of the list.
768 #define KVM_SAVE_MSRS_BEGIN 7
769 static u32 msrs_to_save
[] = {
770 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
771 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
772 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
773 HV_X64_MSR_APIC_ASSIST_PAGE
,
774 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
777 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
779 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
782 static unsigned num_msrs_to_save
;
784 static u32 emulated_msrs
[] = {
785 MSR_IA32_MISC_ENABLE
,
790 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
792 u64 old_efer
= vcpu
->arch
.efer
;
794 if (efer
& efer_reserved_bits
)
798 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
801 if (efer
& EFER_FFXSR
) {
802 struct kvm_cpuid_entry2
*feat
;
804 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
805 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
809 if (efer
& EFER_SVME
) {
810 struct kvm_cpuid_entry2
*feat
;
812 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
813 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
818 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
820 kvm_x86_ops
->set_efer(vcpu
, efer
);
822 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
823 kvm_mmu_reset_context(vcpu
);
825 /* Update reserved bits */
826 if ((efer
^ old_efer
) & EFER_NX
)
827 kvm_mmu_reset_context(vcpu
);
832 void kvm_enable_efer_bits(u64 mask
)
834 efer_reserved_bits
&= ~mask
;
836 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
840 * Writes msr value into into the appropriate "register".
841 * Returns 0 on success, non-0 otherwise.
842 * Assumes vcpu_load() was already called.
844 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
846 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
850 * Adapt set_msr() to msr_io()'s calling convention
852 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
854 return kvm_set_msr(vcpu
, index
, *data
);
857 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
861 struct pvclock_wall_clock wc
;
862 struct timespec boot
;
867 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
872 ++version
; /* first time write, random junk */
876 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
879 * The guest calculates current wall clock time by adding
880 * system time (updated by kvm_write_guest_time below) to the
881 * wall clock specified here. guest system time equals host
882 * system time for us, thus we must fill in host boot time here.
886 wc
.sec
= boot
.tv_sec
;
887 wc
.nsec
= boot
.tv_nsec
;
888 wc
.version
= version
;
890 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
893 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
896 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
898 uint32_t quotient
, remainder
;
900 /* Don't try to replace with do_div(), this one calculates
901 * "(dividend << 32) / divisor" */
903 : "=a" (quotient
), "=d" (remainder
)
904 : "0" (0), "1" (dividend
), "r" (divisor
) );
908 static void kvm_set_time_scale(uint32_t tsc_khz
, struct pvclock_vcpu_time_info
*hv_clock
)
910 uint64_t nsecs
= 1000000000LL;
915 tps64
= tsc_khz
* 1000LL;
916 while (tps64
> nsecs
*2) {
921 tps32
= (uint32_t)tps64
;
922 while (tps32
<= (uint32_t)nsecs
) {
927 hv_clock
->tsc_shift
= shift
;
928 hv_clock
->tsc_to_system_mul
= div_frac(nsecs
, tps32
);
930 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
931 __func__
, tsc_khz
, hv_clock
->tsc_shift
,
932 hv_clock
->tsc_to_system_mul
);
935 static inline u64
get_kernel_ns(void)
939 WARN_ON(preemptible());
941 monotonic_to_bootbased(&ts
);
942 return timespec_to_ns(&ts
);
945 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
947 static inline int kvm_tsc_changes_freq(void)
950 int ret
= !boot_cpu_has(X86_FEATURE_CONSTANT_TSC
) &&
951 cpufreq_quick_get(cpu
) != 0;
956 static inline u64
nsec_to_cycles(u64 nsec
)
960 WARN_ON(preemptible());
961 if (kvm_tsc_changes_freq())
962 printk_once(KERN_WARNING
963 "kvm: unreliable cycle conversion on adjustable rate TSC\n");
964 ret
= nsec
* __get_cpu_var(cpu_tsc_khz
);
965 do_div(ret
, USEC_PER_SEC
);
969 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
971 struct kvm
*kvm
= vcpu
->kvm
;
972 u64 offset
, ns
, elapsed
;
976 spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
977 offset
= data
- native_read_tsc();
978 ns
= get_kernel_ns();
979 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
980 sdiff
= data
- kvm
->arch
.last_tsc_write
;
985 * Special case: close write to TSC within 5 seconds of
986 * another CPU is interpreted as an attempt to synchronize
987 * The 5 seconds is to accomodate host load / swapping as
988 * well as any reset of TSC during the boot process.
990 * In that case, for a reliable TSC, we can match TSC offsets,
991 * or make a best guest using elapsed value.
993 if (sdiff
< nsec_to_cycles(5ULL * NSEC_PER_SEC
) &&
994 elapsed
< 5ULL * NSEC_PER_SEC
) {
995 if (!check_tsc_unstable()) {
996 offset
= kvm
->arch
.last_tsc_offset
;
997 pr_debug("kvm: matched tsc offset for %llu\n", data
);
999 u64 delta
= nsec_to_cycles(elapsed
);
1001 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1003 ns
= kvm
->arch
.last_tsc_nsec
;
1005 kvm
->arch
.last_tsc_nsec
= ns
;
1006 kvm
->arch
.last_tsc_write
= data
;
1007 kvm
->arch
.last_tsc_offset
= offset
;
1008 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1009 spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1011 /* Reset of TSC must disable overshoot protection below */
1012 vcpu
->arch
.hv_clock
.tsc_timestamp
= 0;
1014 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1016 static int kvm_write_guest_time(struct kvm_vcpu
*v
)
1018 unsigned long flags
;
1019 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1021 unsigned long this_tsc_khz
;
1022 s64 kernel_ns
, max_kernel_ns
;
1025 if ((!vcpu
->time_page
))
1028 /* Keep irq disabled to prevent changes to the clock */
1029 local_irq_save(flags
);
1030 kvm_get_msr(v
, MSR_IA32_TSC
, &tsc_timestamp
);
1031 kernel_ns
= get_kernel_ns();
1032 this_tsc_khz
= __get_cpu_var(cpu_tsc_khz
);
1033 local_irq_restore(flags
);
1035 if (unlikely(this_tsc_khz
== 0)) {
1036 kvm_make_request(KVM_REQ_KVMCLOCK_UPDATE
, v
);
1041 * Time as measured by the TSC may go backwards when resetting the base
1042 * tsc_timestamp. The reason for this is that the TSC resolution is
1043 * higher than the resolution of the other clock scales. Thus, many
1044 * possible measurments of the TSC correspond to one measurement of any
1045 * other clock, and so a spread of values is possible. This is not a
1046 * problem for the computation of the nanosecond clock; with TSC rates
1047 * around 1GHZ, there can only be a few cycles which correspond to one
1048 * nanosecond value, and any path through this code will inevitably
1049 * take longer than that. However, with the kernel_ns value itself,
1050 * the precision may be much lower, down to HZ granularity. If the
1051 * first sampling of TSC against kernel_ns ends in the low part of the
1052 * range, and the second in the high end of the range, we can get:
1054 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1056 * As the sampling errors potentially range in the thousands of cycles,
1057 * it is possible such a time value has already been observed by the
1058 * guest. To protect against this, we must compute the system time as
1059 * observed by the guest and ensure the new system time is greater.
1062 if (vcpu
->hv_clock
.tsc_timestamp
&& vcpu
->last_guest_tsc
) {
1063 max_kernel_ns
= vcpu
->last_guest_tsc
-
1064 vcpu
->hv_clock
.tsc_timestamp
;
1065 max_kernel_ns
= pvclock_scale_delta(max_kernel_ns
,
1066 vcpu
->hv_clock
.tsc_to_system_mul
,
1067 vcpu
->hv_clock
.tsc_shift
);
1068 max_kernel_ns
+= vcpu
->last_kernel_ns
;
1071 if (unlikely(vcpu
->hw_tsc_khz
!= this_tsc_khz
)) {
1072 kvm_set_time_scale(this_tsc_khz
, &vcpu
->hv_clock
);
1073 vcpu
->hw_tsc_khz
= this_tsc_khz
;
1076 if (max_kernel_ns
> kernel_ns
)
1077 kernel_ns
= max_kernel_ns
;
1079 /* With all the info we got, fill in the values */
1080 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1081 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1082 vcpu
->last_kernel_ns
= kernel_ns
;
1083 vcpu
->hv_clock
.flags
= 0;
1086 * The interface expects us to write an even number signaling that the
1087 * update is finished. Since the guest won't see the intermediate
1088 * state, we just increase by 2 at the end.
1090 vcpu
->hv_clock
.version
+= 2;
1092 shared_kaddr
= kmap_atomic(vcpu
->time_page
, KM_USER0
);
1094 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
1095 sizeof(vcpu
->hv_clock
));
1097 kunmap_atomic(shared_kaddr
, KM_USER0
);
1099 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
1103 static int kvm_request_guest_time_update(struct kvm_vcpu
*v
)
1105 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1107 if (!vcpu
->time_page
)
1109 kvm_make_request(KVM_REQ_KVMCLOCK_UPDATE
, v
);
1113 static bool msr_mtrr_valid(unsigned msr
)
1116 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
1117 case MSR_MTRRfix64K_00000
:
1118 case MSR_MTRRfix16K_80000
:
1119 case MSR_MTRRfix16K_A0000
:
1120 case MSR_MTRRfix4K_C0000
:
1121 case MSR_MTRRfix4K_C8000
:
1122 case MSR_MTRRfix4K_D0000
:
1123 case MSR_MTRRfix4K_D8000
:
1124 case MSR_MTRRfix4K_E0000
:
1125 case MSR_MTRRfix4K_E8000
:
1126 case MSR_MTRRfix4K_F0000
:
1127 case MSR_MTRRfix4K_F8000
:
1128 case MSR_MTRRdefType
:
1129 case MSR_IA32_CR_PAT
:
1137 static bool valid_pat_type(unsigned t
)
1139 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1142 static bool valid_mtrr_type(unsigned t
)
1144 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
1147 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1151 if (!msr_mtrr_valid(msr
))
1154 if (msr
== MSR_IA32_CR_PAT
) {
1155 for (i
= 0; i
< 8; i
++)
1156 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
1159 } else if (msr
== MSR_MTRRdefType
) {
1162 return valid_mtrr_type(data
& 0xff);
1163 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
1164 for (i
= 0; i
< 8 ; i
++)
1165 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
1170 /* variable MTRRs */
1171 return valid_mtrr_type(data
& 0xff);
1174 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1176 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1178 if (!mtrr_valid(vcpu
, msr
, data
))
1181 if (msr
== MSR_MTRRdefType
) {
1182 vcpu
->arch
.mtrr_state
.def_type
= data
;
1183 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
1184 } else if (msr
== MSR_MTRRfix64K_00000
)
1186 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1187 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
1188 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1189 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
1190 else if (msr
== MSR_IA32_CR_PAT
)
1191 vcpu
->arch
.pat
= data
;
1192 else { /* Variable MTRRs */
1193 int idx
, is_mtrr_mask
;
1196 idx
= (msr
- 0x200) / 2;
1197 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1200 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1203 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1207 kvm_mmu_reset_context(vcpu
);
1211 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1213 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1214 unsigned bank_num
= mcg_cap
& 0xff;
1217 case MSR_IA32_MCG_STATUS
:
1218 vcpu
->arch
.mcg_status
= data
;
1220 case MSR_IA32_MCG_CTL
:
1221 if (!(mcg_cap
& MCG_CTL_P
))
1223 if (data
!= 0 && data
!= ~(u64
)0)
1225 vcpu
->arch
.mcg_ctl
= data
;
1228 if (msr
>= MSR_IA32_MC0_CTL
&&
1229 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1230 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1231 /* only 0 or all 1s can be written to IA32_MCi_CTL
1232 * some Linux kernels though clear bit 10 in bank 4 to
1233 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1234 * this to avoid an uncatched #GP in the guest
1236 if ((offset
& 0x3) == 0 &&
1237 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1239 vcpu
->arch
.mce_banks
[offset
] = data
;
1247 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
1249 struct kvm
*kvm
= vcpu
->kvm
;
1250 int lm
= is_long_mode(vcpu
);
1251 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
1252 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
1253 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
1254 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
1255 u32 page_num
= data
& ~PAGE_MASK
;
1256 u64 page_addr
= data
& PAGE_MASK
;
1261 if (page_num
>= blob_size
)
1264 page
= kzalloc(PAGE_SIZE
, GFP_KERNEL
);
1268 if (copy_from_user(page
, blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
))
1270 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
1279 static bool kvm_hv_hypercall_enabled(struct kvm
*kvm
)
1281 return kvm
->arch
.hv_hypercall
& HV_X64_MSR_HYPERCALL_ENABLE
;
1284 static bool kvm_hv_msr_partition_wide(u32 msr
)
1288 case HV_X64_MSR_GUEST_OS_ID
:
1289 case HV_X64_MSR_HYPERCALL
:
1297 static int set_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1299 struct kvm
*kvm
= vcpu
->kvm
;
1302 case HV_X64_MSR_GUEST_OS_ID
:
1303 kvm
->arch
.hv_guest_os_id
= data
;
1304 /* setting guest os id to zero disables hypercall page */
1305 if (!kvm
->arch
.hv_guest_os_id
)
1306 kvm
->arch
.hv_hypercall
&= ~HV_X64_MSR_HYPERCALL_ENABLE
;
1308 case HV_X64_MSR_HYPERCALL
: {
1313 /* if guest os id is not set hypercall should remain disabled */
1314 if (!kvm
->arch
.hv_guest_os_id
)
1316 if (!(data
& HV_X64_MSR_HYPERCALL_ENABLE
)) {
1317 kvm
->arch
.hv_hypercall
= data
;
1320 gfn
= data
>> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT
;
1321 addr
= gfn_to_hva(kvm
, gfn
);
1322 if (kvm_is_error_hva(addr
))
1324 kvm_x86_ops
->patch_hypercall(vcpu
, instructions
);
1325 ((unsigned char *)instructions
)[3] = 0xc3; /* ret */
1326 if (copy_to_user((void __user
*)addr
, instructions
, 4))
1328 kvm
->arch
.hv_hypercall
= data
;
1332 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1333 "data 0x%llx\n", msr
, data
);
1339 static int set_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1342 case HV_X64_MSR_APIC_ASSIST_PAGE
: {
1345 if (!(data
& HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE
)) {
1346 vcpu
->arch
.hv_vapic
= data
;
1349 addr
= gfn_to_hva(vcpu
->kvm
, data
>>
1350 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT
);
1351 if (kvm_is_error_hva(addr
))
1353 if (clear_user((void __user
*)addr
, PAGE_SIZE
))
1355 vcpu
->arch
.hv_vapic
= data
;
1358 case HV_X64_MSR_EOI
:
1359 return kvm_hv_vapic_msr_write(vcpu
, APIC_EOI
, data
);
1360 case HV_X64_MSR_ICR
:
1361 return kvm_hv_vapic_msr_write(vcpu
, APIC_ICR
, data
);
1362 case HV_X64_MSR_TPR
:
1363 return kvm_hv_vapic_msr_write(vcpu
, APIC_TASKPRI
, data
);
1365 pr_unimpl(vcpu
, "HYPER-V unimplemented wrmsr: 0x%x "
1366 "data 0x%llx\n", msr
, data
);
1373 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1377 return set_efer(vcpu
, data
);
1379 data
&= ~(u64
)0x40; /* ignore flush filter disable */
1380 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
1382 pr_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
1387 case MSR_FAM10H_MMIO_CONF_BASE
:
1389 pr_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
1394 case MSR_AMD64_NB_CFG
:
1396 case MSR_IA32_DEBUGCTLMSR
:
1398 /* We support the non-activated case already */
1400 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
1401 /* Values other than LBR and BTF are vendor-specific,
1402 thus reserved and should throw a #GP */
1405 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1408 case MSR_IA32_UCODE_REV
:
1409 case MSR_IA32_UCODE_WRITE
:
1410 case MSR_VM_HSAVE_PA
:
1411 case MSR_AMD64_PATCH_LOADER
:
1413 case 0x200 ... 0x2ff:
1414 return set_msr_mtrr(vcpu
, msr
, data
);
1415 case MSR_IA32_APICBASE
:
1416 kvm_set_apic_base(vcpu
, data
);
1418 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1419 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
1420 case MSR_IA32_MISC_ENABLE
:
1421 vcpu
->arch
.ia32_misc_enable_msr
= data
;
1423 case MSR_KVM_WALL_CLOCK_NEW
:
1424 case MSR_KVM_WALL_CLOCK
:
1425 vcpu
->kvm
->arch
.wall_clock
= data
;
1426 kvm_write_wall_clock(vcpu
->kvm
, data
);
1428 case MSR_KVM_SYSTEM_TIME_NEW
:
1429 case MSR_KVM_SYSTEM_TIME
: {
1430 if (vcpu
->arch
.time_page
) {
1431 kvm_release_page_dirty(vcpu
->arch
.time_page
);
1432 vcpu
->arch
.time_page
= NULL
;
1435 vcpu
->arch
.time
= data
;
1437 /* we verify if the enable bit is set... */
1441 /* ...but clean it before doing the actual write */
1442 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
1444 vcpu
->arch
.time_page
=
1445 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
1447 if (is_error_page(vcpu
->arch
.time_page
)) {
1448 kvm_release_page_clean(vcpu
->arch
.time_page
);
1449 vcpu
->arch
.time_page
= NULL
;
1452 kvm_request_guest_time_update(vcpu
);
1455 case MSR_IA32_MCG_CTL
:
1456 case MSR_IA32_MCG_STATUS
:
1457 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1458 return set_msr_mce(vcpu
, msr
, data
);
1460 /* Performance counters are not protected by a CPUID bit,
1461 * so we should check all of them in the generic path for the sake of
1462 * cross vendor migration.
1463 * Writing a zero into the event select MSRs disables them,
1464 * which we perfectly emulate ;-). Any other value should be at least
1465 * reported, some guests depend on them.
1467 case MSR_P6_EVNTSEL0
:
1468 case MSR_P6_EVNTSEL1
:
1469 case MSR_K7_EVNTSEL0
:
1470 case MSR_K7_EVNTSEL1
:
1471 case MSR_K7_EVNTSEL2
:
1472 case MSR_K7_EVNTSEL3
:
1474 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1475 "0x%x data 0x%llx\n", msr
, data
);
1477 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1478 * so we ignore writes to make it happy.
1480 case MSR_P6_PERFCTR0
:
1481 case MSR_P6_PERFCTR1
:
1482 case MSR_K7_PERFCTR0
:
1483 case MSR_K7_PERFCTR1
:
1484 case MSR_K7_PERFCTR2
:
1485 case MSR_K7_PERFCTR3
:
1486 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1487 "0x%x data 0x%llx\n", msr
, data
);
1489 case MSR_K7_CLK_CTL
:
1491 * Ignore all writes to this no longer documented MSR.
1492 * Writes are only relevant for old K7 processors,
1493 * all pre-dating SVM, but a recommended workaround from
1494 * AMD for these chips. It is possible to speicify the
1495 * affected processor models on the command line, hence
1496 * the need to ignore the workaround.
1499 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1500 if (kvm_hv_msr_partition_wide(msr
)) {
1502 mutex_lock(&vcpu
->kvm
->lock
);
1503 r
= set_msr_hyperv_pw(vcpu
, msr
, data
);
1504 mutex_unlock(&vcpu
->kvm
->lock
);
1507 return set_msr_hyperv(vcpu
, msr
, data
);
1510 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
1511 return xen_hvm_config(vcpu
, data
);
1513 pr_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
1517 pr_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
1524 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
1528 * Reads an msr value (of 'msr_index') into 'pdata'.
1529 * Returns 0 on success, non-0 otherwise.
1530 * Assumes vcpu_load() was already called.
1532 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
1534 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
1537 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1539 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1541 if (!msr_mtrr_valid(msr
))
1544 if (msr
== MSR_MTRRdefType
)
1545 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
1546 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
1547 else if (msr
== MSR_MTRRfix64K_00000
)
1549 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1550 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
1551 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1552 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
1553 else if (msr
== MSR_IA32_CR_PAT
)
1554 *pdata
= vcpu
->arch
.pat
;
1555 else { /* Variable MTRRs */
1556 int idx
, is_mtrr_mask
;
1559 idx
= (msr
- 0x200) / 2;
1560 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1563 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1566 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1573 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1576 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1577 unsigned bank_num
= mcg_cap
& 0xff;
1580 case MSR_IA32_P5_MC_ADDR
:
1581 case MSR_IA32_P5_MC_TYPE
:
1584 case MSR_IA32_MCG_CAP
:
1585 data
= vcpu
->arch
.mcg_cap
;
1587 case MSR_IA32_MCG_CTL
:
1588 if (!(mcg_cap
& MCG_CTL_P
))
1590 data
= vcpu
->arch
.mcg_ctl
;
1592 case MSR_IA32_MCG_STATUS
:
1593 data
= vcpu
->arch
.mcg_status
;
1596 if (msr
>= MSR_IA32_MC0_CTL
&&
1597 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1598 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1599 data
= vcpu
->arch
.mce_banks
[offset
];
1608 static int get_msr_hyperv_pw(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1611 struct kvm
*kvm
= vcpu
->kvm
;
1614 case HV_X64_MSR_GUEST_OS_ID
:
1615 data
= kvm
->arch
.hv_guest_os_id
;
1617 case HV_X64_MSR_HYPERCALL
:
1618 data
= kvm
->arch
.hv_hypercall
;
1621 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1629 static int get_msr_hyperv(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1634 case HV_X64_MSR_VP_INDEX
: {
1637 kvm_for_each_vcpu(r
, v
, vcpu
->kvm
)
1642 case HV_X64_MSR_EOI
:
1643 return kvm_hv_vapic_msr_read(vcpu
, APIC_EOI
, pdata
);
1644 case HV_X64_MSR_ICR
:
1645 return kvm_hv_vapic_msr_read(vcpu
, APIC_ICR
, pdata
);
1646 case HV_X64_MSR_TPR
:
1647 return kvm_hv_vapic_msr_read(vcpu
, APIC_TASKPRI
, pdata
);
1649 pr_unimpl(vcpu
, "Hyper-V unhandled rdmsr: 0x%x\n", msr
);
1656 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1661 case MSR_IA32_PLATFORM_ID
:
1662 case MSR_IA32_UCODE_REV
:
1663 case MSR_IA32_EBL_CR_POWERON
:
1664 case MSR_IA32_DEBUGCTLMSR
:
1665 case MSR_IA32_LASTBRANCHFROMIP
:
1666 case MSR_IA32_LASTBRANCHTOIP
:
1667 case MSR_IA32_LASTINTFROMIP
:
1668 case MSR_IA32_LASTINTTOIP
:
1671 case MSR_VM_HSAVE_PA
:
1672 case MSR_P6_PERFCTR0
:
1673 case MSR_P6_PERFCTR1
:
1674 case MSR_P6_EVNTSEL0
:
1675 case MSR_P6_EVNTSEL1
:
1676 case MSR_K7_EVNTSEL0
:
1677 case MSR_K7_PERFCTR0
:
1678 case MSR_K8_INT_PENDING_MSG
:
1679 case MSR_AMD64_NB_CFG
:
1680 case MSR_FAM10H_MMIO_CONF_BASE
:
1684 data
= 0x500 | KVM_NR_VAR_MTRR
;
1686 case 0x200 ... 0x2ff:
1687 return get_msr_mtrr(vcpu
, msr
, pdata
);
1688 case 0xcd: /* fsb frequency */
1692 * MSR_EBC_FREQUENCY_ID
1693 * Conservative value valid for even the basic CPU models.
1694 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1695 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1696 * and 266MHz for model 3, or 4. Set Core Clock
1697 * Frequency to System Bus Frequency Ratio to 1 (bits
1698 * 31:24) even though these are only valid for CPU
1699 * models > 2, however guests may end up dividing or
1700 * multiplying by zero otherwise.
1702 case MSR_EBC_FREQUENCY_ID
:
1705 case MSR_IA32_APICBASE
:
1706 data
= kvm_get_apic_base(vcpu
);
1708 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1709 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
1711 case MSR_IA32_MISC_ENABLE
:
1712 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1714 case MSR_IA32_PERF_STATUS
:
1715 /* TSC increment by tick */
1717 /* CPU multiplier */
1718 data
|= (((uint64_t)4ULL) << 40);
1721 data
= vcpu
->arch
.efer
;
1723 case MSR_KVM_WALL_CLOCK
:
1724 case MSR_KVM_WALL_CLOCK_NEW
:
1725 data
= vcpu
->kvm
->arch
.wall_clock
;
1727 case MSR_KVM_SYSTEM_TIME
:
1728 case MSR_KVM_SYSTEM_TIME_NEW
:
1729 data
= vcpu
->arch
.time
;
1731 case MSR_IA32_P5_MC_ADDR
:
1732 case MSR_IA32_P5_MC_TYPE
:
1733 case MSR_IA32_MCG_CAP
:
1734 case MSR_IA32_MCG_CTL
:
1735 case MSR_IA32_MCG_STATUS
:
1736 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1737 return get_msr_mce(vcpu
, msr
, pdata
);
1738 case MSR_K7_CLK_CTL
:
1740 * Provide expected ramp-up count for K7. All other
1741 * are set to zero, indicating minimum divisors for
1744 * This prevents guest kernels on AMD host with CPU
1745 * type 6, model 8 and higher from exploding due to
1746 * the rdmsr failing.
1750 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
1751 if (kvm_hv_msr_partition_wide(msr
)) {
1753 mutex_lock(&vcpu
->kvm
->lock
);
1754 r
= get_msr_hyperv_pw(vcpu
, msr
, pdata
);
1755 mutex_unlock(&vcpu
->kvm
->lock
);
1758 return get_msr_hyperv(vcpu
, msr
, pdata
);
1762 pr_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
1765 pr_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
1773 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
1776 * Read or write a bunch of msrs. All parameters are kernel addresses.
1778 * @return number of msrs set successfully.
1780 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
1781 struct kvm_msr_entry
*entries
,
1782 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1783 unsigned index
, u64
*data
))
1787 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
1788 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
1789 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
1791 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
1797 * Read or write a bunch of msrs. Parameters are user addresses.
1799 * @return number of msrs set successfully.
1801 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
1802 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1803 unsigned index
, u64
*data
),
1806 struct kvm_msrs msrs
;
1807 struct kvm_msr_entry
*entries
;
1812 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
1816 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
1820 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
1821 entries
= kmalloc(size
, GFP_KERNEL
);
1826 if (copy_from_user(entries
, user_msrs
->entries
, size
))
1829 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
1834 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
1845 int kvm_dev_ioctl_check_extension(long ext
)
1850 case KVM_CAP_IRQCHIP
:
1852 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
1853 case KVM_CAP_SET_TSS_ADDR
:
1854 case KVM_CAP_EXT_CPUID
:
1855 case KVM_CAP_CLOCKSOURCE
:
1857 case KVM_CAP_NOP_IO_DELAY
:
1858 case KVM_CAP_MP_STATE
:
1859 case KVM_CAP_SYNC_MMU
:
1860 case KVM_CAP_REINJECT_CONTROL
:
1861 case KVM_CAP_IRQ_INJECT_STATUS
:
1862 case KVM_CAP_ASSIGN_DEV_IRQ
:
1864 case KVM_CAP_IOEVENTFD
:
1866 case KVM_CAP_PIT_STATE2
:
1867 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
1868 case KVM_CAP_XEN_HVM
:
1869 case KVM_CAP_ADJUST_CLOCK
:
1870 case KVM_CAP_VCPU_EVENTS
:
1871 case KVM_CAP_HYPERV
:
1872 case KVM_CAP_HYPERV_VAPIC
:
1873 case KVM_CAP_HYPERV_SPIN
:
1874 case KVM_CAP_PCI_SEGMENT
:
1875 case KVM_CAP_DEBUGREGS
:
1876 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
1880 case KVM_CAP_COALESCED_MMIO
:
1881 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
1884 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
1886 case KVM_CAP_NR_VCPUS
:
1889 case KVM_CAP_NR_MEMSLOTS
:
1890 r
= KVM_MEMORY_SLOTS
;
1892 case KVM_CAP_PV_MMU
: /* obsolete */
1899 r
= KVM_MAX_MCE_BANKS
;
1912 long kvm_arch_dev_ioctl(struct file
*filp
,
1913 unsigned int ioctl
, unsigned long arg
)
1915 void __user
*argp
= (void __user
*)arg
;
1919 case KVM_GET_MSR_INDEX_LIST
: {
1920 struct kvm_msr_list __user
*user_msr_list
= argp
;
1921 struct kvm_msr_list msr_list
;
1925 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
1928 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
1929 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
1932 if (n
< msr_list
.nmsrs
)
1935 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
1936 num_msrs_to_save
* sizeof(u32
)))
1938 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
1940 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
1945 case KVM_GET_SUPPORTED_CPUID
: {
1946 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1947 struct kvm_cpuid2 cpuid
;
1950 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1952 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
1953 cpuid_arg
->entries
);
1958 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
1963 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
1966 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
1968 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
1980 static void wbinvd_ipi(void *garbage
)
1985 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
1987 return vcpu
->kvm
->arch
.iommu_domain
&&
1988 !(vcpu
->kvm
->arch
.iommu_flags
& KVM_IOMMU_CACHE_COHERENCY
);
1991 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
1993 /* Address WBINVD may be executed by guest */
1994 if (need_emulate_wbinvd(vcpu
)) {
1995 if (kvm_x86_ops
->has_wbinvd_exit())
1996 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
1997 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
1998 smp_call_function_single(vcpu
->cpu
,
1999 wbinvd_ipi
, NULL
, 1);
2002 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2003 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2004 /* Make sure TSC doesn't go backwards */
2005 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2006 native_read_tsc() - vcpu
->arch
.last_host_tsc
;
2008 mark_tsc_unstable("KVM discovered backwards TSC");
2009 if (check_tsc_unstable())
2010 kvm_x86_ops
->adjust_tsc_offset(vcpu
, -tsc_delta
);
2011 kvm_migrate_timers(vcpu
);
2016 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2018 kvm_x86_ops
->vcpu_put(vcpu
);
2019 kvm_put_guest_fpu(vcpu
);
2020 vcpu
->arch
.last_host_tsc
= native_read_tsc();
2023 static int is_efer_nx(void)
2025 unsigned long long efer
= 0;
2027 rdmsrl_safe(MSR_EFER
, &efer
);
2028 return efer
& EFER_NX
;
2031 static void cpuid_fix_nx_cap(struct kvm_vcpu
*vcpu
)
2034 struct kvm_cpuid_entry2
*e
, *entry
;
2037 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
2038 e
= &vcpu
->arch
.cpuid_entries
[i
];
2039 if (e
->function
== 0x80000001) {
2044 if (entry
&& (entry
->edx
& (1 << 20)) && !is_efer_nx()) {
2045 entry
->edx
&= ~(1 << 20);
2046 printk(KERN_INFO
"kvm: guest NX capability removed\n");
2050 /* when an old userspace process fills a new kernel module */
2051 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu
*vcpu
,
2052 struct kvm_cpuid
*cpuid
,
2053 struct kvm_cpuid_entry __user
*entries
)
2056 struct kvm_cpuid_entry
*cpuid_entries
;
2059 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2062 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry
) * cpuid
->nent
);
2066 if (copy_from_user(cpuid_entries
, entries
,
2067 cpuid
->nent
* sizeof(struct kvm_cpuid_entry
)))
2069 for (i
= 0; i
< cpuid
->nent
; i
++) {
2070 vcpu
->arch
.cpuid_entries
[i
].function
= cpuid_entries
[i
].function
;
2071 vcpu
->arch
.cpuid_entries
[i
].eax
= cpuid_entries
[i
].eax
;
2072 vcpu
->arch
.cpuid_entries
[i
].ebx
= cpuid_entries
[i
].ebx
;
2073 vcpu
->arch
.cpuid_entries
[i
].ecx
= cpuid_entries
[i
].ecx
;
2074 vcpu
->arch
.cpuid_entries
[i
].edx
= cpuid_entries
[i
].edx
;
2075 vcpu
->arch
.cpuid_entries
[i
].index
= 0;
2076 vcpu
->arch
.cpuid_entries
[i
].flags
= 0;
2077 vcpu
->arch
.cpuid_entries
[i
].padding
[0] = 0;
2078 vcpu
->arch
.cpuid_entries
[i
].padding
[1] = 0;
2079 vcpu
->arch
.cpuid_entries
[i
].padding
[2] = 0;
2081 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
2082 cpuid_fix_nx_cap(vcpu
);
2084 kvm_apic_set_version(vcpu
);
2085 kvm_x86_ops
->cpuid_update(vcpu
);
2089 vfree(cpuid_entries
);
2094 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu
*vcpu
,
2095 struct kvm_cpuid2
*cpuid
,
2096 struct kvm_cpuid_entry2 __user
*entries
)
2101 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2104 if (copy_from_user(&vcpu
->arch
.cpuid_entries
, entries
,
2105 cpuid
->nent
* sizeof(struct kvm_cpuid_entry2
)))
2107 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
2108 kvm_apic_set_version(vcpu
);
2109 kvm_x86_ops
->cpuid_update(vcpu
);
2117 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu
*vcpu
,
2118 struct kvm_cpuid2
*cpuid
,
2119 struct kvm_cpuid_entry2 __user
*entries
)
2124 if (cpuid
->nent
< vcpu
->arch
.cpuid_nent
)
2127 if (copy_to_user(entries
, &vcpu
->arch
.cpuid_entries
,
2128 vcpu
->arch
.cpuid_nent
* sizeof(struct kvm_cpuid_entry2
)))
2133 cpuid
->nent
= vcpu
->arch
.cpuid_nent
;
2137 static void do_cpuid_1_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
2140 entry
->function
= function
;
2141 entry
->index
= index
;
2142 cpuid_count(entry
->function
, entry
->index
,
2143 &entry
->eax
, &entry
->ebx
, &entry
->ecx
, &entry
->edx
);
2147 #define F(x) bit(X86_FEATURE_##x)
2149 static void do_cpuid_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
2150 u32 index
, int *nent
, int maxnent
)
2152 unsigned f_nx
= is_efer_nx() ? F(NX
) : 0;
2153 #ifdef CONFIG_X86_64
2154 unsigned f_gbpages
= (kvm_x86_ops
->get_lpage_level() == PT_PDPE_LEVEL
)
2156 unsigned f_lm
= F(LM
);
2158 unsigned f_gbpages
= 0;
2161 unsigned f_rdtscp
= kvm_x86_ops
->rdtscp_supported() ? F(RDTSCP
) : 0;
2164 const u32 kvm_supported_word0_x86_features
=
2165 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
2166 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
2167 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SEP
) |
2168 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
2169 F(PAT
) | F(PSE36
) | 0 /* PSN */ | F(CLFLSH
) |
2170 0 /* Reserved, DS, ACPI */ | F(MMX
) |
2171 F(FXSR
) | F(XMM
) | F(XMM2
) | F(SELFSNOOP
) |
2172 0 /* HTT, TM, Reserved, PBE */;
2173 /* cpuid 0x80000001.edx */
2174 const u32 kvm_supported_word1_x86_features
=
2175 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
2176 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
2177 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SYSCALL
) |
2178 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
2179 F(PAT
) | F(PSE36
) | 0 /* Reserved */ |
2180 f_nx
| 0 /* Reserved */ | F(MMXEXT
) | F(MMX
) |
2181 F(FXSR
) | F(FXSR_OPT
) | f_gbpages
| f_rdtscp
|
2182 0 /* Reserved */ | f_lm
| F(3DNOWEXT
) | F(3DNOW
);
2184 const u32 kvm_supported_word4_x86_features
=
2185 F(XMM3
) | F(PCLMULQDQ
) | 0 /* DTES64, MONITOR */ |
2186 0 /* DS-CPL, VMX, SMX, EST */ |
2187 0 /* TM2 */ | F(SSSE3
) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2188 0 /* Reserved */ | F(CX16
) | 0 /* xTPR Update, PDCM */ |
2189 0 /* Reserved, DCA */ | F(XMM4_1
) |
2190 F(XMM4_2
) | F(X2APIC
) | F(MOVBE
) | F(POPCNT
) |
2191 0 /* Reserved, AES */ | F(XSAVE
) | 0 /* OSXSAVE */ | F(AVX
);
2192 /* cpuid 0x80000001.ecx */
2193 const u32 kvm_supported_word6_x86_features
=
2194 F(LAHF_LM
) | F(CMP_LEGACY
) | F(SVM
) | 0 /* ExtApicSpace */ |
2195 F(CR8_LEGACY
) | F(ABM
) | F(SSE4A
) | F(MISALIGNSSE
) |
2196 F(3DNOWPREFETCH
) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5
) |
2197 0 /* SKINIT */ | 0 /* WDT */;
2199 /* all calls to cpuid_count() should be made on the same cpu */
2201 do_cpuid_1_ent(entry
, function
, index
);
2206 entry
->eax
= min(entry
->eax
, (u32
)0xd);
2209 entry
->edx
&= kvm_supported_word0_x86_features
;
2210 entry
->ecx
&= kvm_supported_word4_x86_features
;
2211 /* we support x2apic emulation even if host does not support
2212 * it since we emulate x2apic in software */
2213 entry
->ecx
|= F(X2APIC
);
2215 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2216 * may return different values. This forces us to get_cpu() before
2217 * issuing the first command, and also to emulate this annoying behavior
2218 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2220 int t
, times
= entry
->eax
& 0xff;
2222 entry
->flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
2223 entry
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
2224 for (t
= 1; t
< times
&& *nent
< maxnent
; ++t
) {
2225 do_cpuid_1_ent(&entry
[t
], function
, 0);
2226 entry
[t
].flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
2231 /* function 4 and 0xb have additional index. */
2235 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2236 /* read more entries until cache_type is zero */
2237 for (i
= 1; *nent
< maxnent
; ++i
) {
2238 cache_type
= entry
[i
- 1].eax
& 0x1f;
2241 do_cpuid_1_ent(&entry
[i
], function
, i
);
2243 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2251 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2252 /* read more entries until level_type is zero */
2253 for (i
= 1; *nent
< maxnent
; ++i
) {
2254 level_type
= entry
[i
- 1].ecx
& 0xff00;
2257 do_cpuid_1_ent(&entry
[i
], function
, i
);
2259 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2267 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2268 for (i
= 1; *nent
< maxnent
; ++i
) {
2269 if (entry
[i
- 1].eax
== 0 && i
!= 2)
2271 do_cpuid_1_ent(&entry
[i
], function
, i
);
2273 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
2278 case KVM_CPUID_SIGNATURE
: {
2279 char signature
[12] = "KVMKVMKVM\0\0";
2280 u32
*sigptr
= (u32
*)signature
;
2282 entry
->ebx
= sigptr
[0];
2283 entry
->ecx
= sigptr
[1];
2284 entry
->edx
= sigptr
[2];
2287 case KVM_CPUID_FEATURES
:
2288 entry
->eax
= (1 << KVM_FEATURE_CLOCKSOURCE
) |
2289 (1 << KVM_FEATURE_NOP_IO_DELAY
) |
2290 (1 << KVM_FEATURE_CLOCKSOURCE2
) |
2291 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT
);
2297 entry
->eax
= min(entry
->eax
, 0x8000001a);
2300 entry
->edx
&= kvm_supported_word1_x86_features
;
2301 entry
->ecx
&= kvm_supported_word6_x86_features
;
2305 kvm_x86_ops
->set_supported_cpuid(function
, entry
);
2312 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
2313 struct kvm_cpuid_entry2 __user
*entries
)
2315 struct kvm_cpuid_entry2
*cpuid_entries
;
2316 int limit
, nent
= 0, r
= -E2BIG
;
2319 if (cpuid
->nent
< 1)
2321 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
2322 cpuid
->nent
= KVM_MAX_CPUID_ENTRIES
;
2324 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry2
) * cpuid
->nent
);
2328 do_cpuid_ent(&cpuid_entries
[0], 0, 0, &nent
, cpuid
->nent
);
2329 limit
= cpuid_entries
[0].eax
;
2330 for (func
= 1; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
2331 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
2332 &nent
, cpuid
->nent
);
2334 if (nent
>= cpuid
->nent
)
2337 do_cpuid_ent(&cpuid_entries
[nent
], 0x80000000, 0, &nent
, cpuid
->nent
);
2338 limit
= cpuid_entries
[nent
- 1].eax
;
2339 for (func
= 0x80000001; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
2340 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
2341 &nent
, cpuid
->nent
);
2346 if (nent
>= cpuid
->nent
)
2349 do_cpuid_ent(&cpuid_entries
[nent
], KVM_CPUID_SIGNATURE
, 0, &nent
,
2353 if (nent
>= cpuid
->nent
)
2356 do_cpuid_ent(&cpuid_entries
[nent
], KVM_CPUID_FEATURES
, 0, &nent
,
2360 if (nent
>= cpuid
->nent
)
2364 if (copy_to_user(entries
, cpuid_entries
,
2365 nent
* sizeof(struct kvm_cpuid_entry2
)))
2371 vfree(cpuid_entries
);
2376 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2377 struct kvm_lapic_state
*s
)
2379 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
2384 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2385 struct kvm_lapic_state
*s
)
2387 memcpy(vcpu
->arch
.apic
->regs
, s
->regs
, sizeof *s
);
2388 kvm_apic_post_state_restore(vcpu
);
2389 update_cr8_intercept(vcpu
);
2394 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2395 struct kvm_interrupt
*irq
)
2397 if (irq
->irq
< 0 || irq
->irq
>= 256)
2399 if (irqchip_in_kernel(vcpu
->kvm
))
2402 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2407 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2409 kvm_inject_nmi(vcpu
);
2414 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2415 struct kvm_tpr_access_ctl
*tac
)
2419 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2423 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2427 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2430 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2432 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
2435 vcpu
->arch
.mcg_cap
= mcg_cap
;
2436 /* Init IA32_MCG_CTL to all 1s */
2437 if (mcg_cap
& MCG_CTL_P
)
2438 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2439 /* Init IA32_MCi_CTL to all 1s */
2440 for (bank
= 0; bank
< bank_num
; bank
++)
2441 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2446 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2447 struct kvm_x86_mce
*mce
)
2449 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2450 unsigned bank_num
= mcg_cap
& 0xff;
2451 u64
*banks
= vcpu
->arch
.mce_banks
;
2453 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2456 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2457 * reporting is disabled
2459 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
2460 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
2462 banks
+= 4 * mce
->bank
;
2464 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2465 * reporting is disabled for the bank
2467 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
2469 if (mce
->status
& MCI_STATUS_UC
) {
2470 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
2471 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
2472 printk(KERN_DEBUG
"kvm: set_mce: "
2473 "injects mce exception while "
2474 "previous one is in progress!\n");
2475 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
2478 if (banks
[1] & MCI_STATUS_VAL
)
2479 mce
->status
|= MCI_STATUS_OVER
;
2480 banks
[2] = mce
->addr
;
2481 banks
[3] = mce
->misc
;
2482 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
2483 banks
[1] = mce
->status
;
2484 kvm_queue_exception(vcpu
, MC_VECTOR
);
2485 } else if (!(banks
[1] & MCI_STATUS_VAL
)
2486 || !(banks
[1] & MCI_STATUS_UC
)) {
2487 if (banks
[1] & MCI_STATUS_VAL
)
2488 mce
->status
|= MCI_STATUS_OVER
;
2489 banks
[2] = mce
->addr
;
2490 banks
[3] = mce
->misc
;
2491 banks
[1] = mce
->status
;
2493 banks
[1] |= MCI_STATUS_OVER
;
2497 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
2498 struct kvm_vcpu_events
*events
)
2500 events
->exception
.injected
=
2501 vcpu
->arch
.exception
.pending
&&
2502 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
2503 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
2504 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
2505 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
2507 events
->interrupt
.injected
=
2508 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
2509 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
2510 events
->interrupt
.soft
= 0;
2511 events
->interrupt
.shadow
=
2512 kvm_x86_ops
->get_interrupt_shadow(vcpu
,
2513 KVM_X86_SHADOW_INT_MOV_SS
| KVM_X86_SHADOW_INT_STI
);
2515 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
2516 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
;
2517 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
2519 events
->sipi_vector
= vcpu
->arch
.sipi_vector
;
2521 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
2522 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2523 | KVM_VCPUEVENT_VALID_SHADOW
);
2526 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
2527 struct kvm_vcpu_events
*events
)
2529 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2530 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2531 | KVM_VCPUEVENT_VALID_SHADOW
))
2534 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
2535 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
2536 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
2537 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
2539 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
2540 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
2541 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
2542 if (vcpu
->arch
.interrupt
.pending
&& irqchip_in_kernel(vcpu
->kvm
))
2543 kvm_pic_clear_isr_ack(vcpu
->kvm
);
2544 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
2545 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
2546 events
->interrupt
.shadow
);
2548 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
2549 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
2550 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
2551 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
2553 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
)
2554 vcpu
->arch
.sipi_vector
= events
->sipi_vector
;
2559 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
2560 struct kvm_debugregs
*dbgregs
)
2562 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
2563 dbgregs
->dr6
= vcpu
->arch
.dr6
;
2564 dbgregs
->dr7
= vcpu
->arch
.dr7
;
2568 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
2569 struct kvm_debugregs
*dbgregs
)
2574 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
2575 vcpu
->arch
.dr6
= dbgregs
->dr6
;
2576 vcpu
->arch
.dr7
= dbgregs
->dr7
;
2581 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
2582 struct kvm_xsave
*guest_xsave
)
2585 memcpy(guest_xsave
->region
,
2586 &vcpu
->arch
.guest_fpu
.state
->xsave
,
2589 memcpy(guest_xsave
->region
,
2590 &vcpu
->arch
.guest_fpu
.state
->fxsave
,
2591 sizeof(struct i387_fxsave_struct
));
2592 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
2597 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
2598 struct kvm_xsave
*guest_xsave
)
2601 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
2604 memcpy(&vcpu
->arch
.guest_fpu
.state
->xsave
,
2605 guest_xsave
->region
, xstate_size
);
2607 if (xstate_bv
& ~XSTATE_FPSSE
)
2609 memcpy(&vcpu
->arch
.guest_fpu
.state
->fxsave
,
2610 guest_xsave
->region
, sizeof(struct i387_fxsave_struct
));
2615 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
2616 struct kvm_xcrs
*guest_xcrs
)
2618 if (!cpu_has_xsave
) {
2619 guest_xcrs
->nr_xcrs
= 0;
2623 guest_xcrs
->nr_xcrs
= 1;
2624 guest_xcrs
->flags
= 0;
2625 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
2626 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
2629 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
2630 struct kvm_xcrs
*guest_xcrs
)
2637 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
2640 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
2641 /* Only support XCR0 currently */
2642 if (guest_xcrs
->xcrs
[0].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
2643 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
2644 guest_xcrs
->xcrs
[0].value
);
2652 long kvm_arch_vcpu_ioctl(struct file
*filp
,
2653 unsigned int ioctl
, unsigned long arg
)
2655 struct kvm_vcpu
*vcpu
= filp
->private_data
;
2656 void __user
*argp
= (void __user
*)arg
;
2659 struct kvm_lapic_state
*lapic
;
2660 struct kvm_xsave
*xsave
;
2661 struct kvm_xcrs
*xcrs
;
2667 case KVM_GET_LAPIC
: {
2669 if (!vcpu
->arch
.apic
)
2671 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2676 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
2680 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
2685 case KVM_SET_LAPIC
: {
2687 if (!vcpu
->arch
.apic
)
2689 u
.lapic
= kmalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
2694 if (copy_from_user(u
.lapic
, argp
, sizeof(struct kvm_lapic_state
)))
2696 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
2702 case KVM_INTERRUPT
: {
2703 struct kvm_interrupt irq
;
2706 if (copy_from_user(&irq
, argp
, sizeof irq
))
2708 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
2715 r
= kvm_vcpu_ioctl_nmi(vcpu
);
2721 case KVM_SET_CPUID
: {
2722 struct kvm_cpuid __user
*cpuid_arg
= argp
;
2723 struct kvm_cpuid cpuid
;
2726 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2728 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
2733 case KVM_SET_CPUID2
: {
2734 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2735 struct kvm_cpuid2 cpuid
;
2738 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2740 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
2741 cpuid_arg
->entries
);
2746 case KVM_GET_CPUID2
: {
2747 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2748 struct kvm_cpuid2 cpuid
;
2751 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2753 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
2754 cpuid_arg
->entries
);
2758 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2764 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
2767 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
2769 case KVM_TPR_ACCESS_REPORTING
: {
2770 struct kvm_tpr_access_ctl tac
;
2773 if (copy_from_user(&tac
, argp
, sizeof tac
))
2775 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
2779 if (copy_to_user(argp
, &tac
, sizeof tac
))
2784 case KVM_SET_VAPIC_ADDR
: {
2785 struct kvm_vapic_addr va
;
2788 if (!irqchip_in_kernel(vcpu
->kvm
))
2791 if (copy_from_user(&va
, argp
, sizeof va
))
2794 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
2797 case KVM_X86_SETUP_MCE
: {
2801 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
2803 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
2806 case KVM_X86_SET_MCE
: {
2807 struct kvm_x86_mce mce
;
2810 if (copy_from_user(&mce
, argp
, sizeof mce
))
2812 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
2815 case KVM_GET_VCPU_EVENTS
: {
2816 struct kvm_vcpu_events events
;
2818 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
2821 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
2826 case KVM_SET_VCPU_EVENTS
: {
2827 struct kvm_vcpu_events events
;
2830 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
2833 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
2836 case KVM_GET_DEBUGREGS
: {
2837 struct kvm_debugregs dbgregs
;
2839 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
2842 if (copy_to_user(argp
, &dbgregs
,
2843 sizeof(struct kvm_debugregs
)))
2848 case KVM_SET_DEBUGREGS
: {
2849 struct kvm_debugregs dbgregs
;
2852 if (copy_from_user(&dbgregs
, argp
,
2853 sizeof(struct kvm_debugregs
)))
2856 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
2859 case KVM_GET_XSAVE
: {
2860 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
2865 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
2868 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
2873 case KVM_SET_XSAVE
: {
2874 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
2880 if (copy_from_user(u
.xsave
, argp
, sizeof(struct kvm_xsave
)))
2883 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
2886 case KVM_GET_XCRS
: {
2887 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
2892 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
2895 if (copy_to_user(argp
, u
.xcrs
,
2896 sizeof(struct kvm_xcrs
)))
2901 case KVM_SET_XCRS
: {
2902 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
2908 if (copy_from_user(u
.xcrs
, argp
,
2909 sizeof(struct kvm_xcrs
)))
2912 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
2923 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
2927 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
2929 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
2933 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
2936 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
2940 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
2941 u32 kvm_nr_mmu_pages
)
2943 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
2946 mutex_lock(&kvm
->slots_lock
);
2947 spin_lock(&kvm
->mmu_lock
);
2949 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
2950 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
2952 spin_unlock(&kvm
->mmu_lock
);
2953 mutex_unlock(&kvm
->slots_lock
);
2957 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
2959 return kvm
->arch
.n_max_mmu_pages
;
2962 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2967 switch (chip
->chip_id
) {
2968 case KVM_IRQCHIP_PIC_MASTER
:
2969 memcpy(&chip
->chip
.pic
,
2970 &pic_irqchip(kvm
)->pics
[0],
2971 sizeof(struct kvm_pic_state
));
2973 case KVM_IRQCHIP_PIC_SLAVE
:
2974 memcpy(&chip
->chip
.pic
,
2975 &pic_irqchip(kvm
)->pics
[1],
2976 sizeof(struct kvm_pic_state
));
2978 case KVM_IRQCHIP_IOAPIC
:
2979 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
2988 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2993 switch (chip
->chip_id
) {
2994 case KVM_IRQCHIP_PIC_MASTER
:
2995 raw_spin_lock(&pic_irqchip(kvm
)->lock
);
2996 memcpy(&pic_irqchip(kvm
)->pics
[0],
2998 sizeof(struct kvm_pic_state
));
2999 raw_spin_unlock(&pic_irqchip(kvm
)->lock
);
3001 case KVM_IRQCHIP_PIC_SLAVE
:
3002 raw_spin_lock(&pic_irqchip(kvm
)->lock
);
3003 memcpy(&pic_irqchip(kvm
)->pics
[1],
3005 sizeof(struct kvm_pic_state
));
3006 raw_spin_unlock(&pic_irqchip(kvm
)->lock
);
3008 case KVM_IRQCHIP_IOAPIC
:
3009 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3015 kvm_pic_update_irq(pic_irqchip(kvm
));
3019 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3023 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3024 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
3025 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3029 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3033 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3034 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
3035 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
3036 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3040 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3044 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3045 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3046 sizeof(ps
->channels
));
3047 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3048 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3052 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3054 int r
= 0, start
= 0;
3055 u32 prev_legacy
, cur_legacy
;
3056 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3057 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3058 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3059 if (!prev_legacy
&& cur_legacy
)
3061 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
3062 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
3063 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
3064 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
3065 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3069 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3070 struct kvm_reinject_control
*control
)
3072 if (!kvm
->arch
.vpit
)
3074 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3075 kvm
->arch
.vpit
->pit_state
.pit_timer
.reinject
= control
->pit_reinject
;
3076 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3081 * Get (and clear) the dirty memory log for a memory slot.
3083 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
,
3084 struct kvm_dirty_log
*log
)
3087 struct kvm_memory_slot
*memslot
;
3089 unsigned long is_dirty
= 0;
3091 mutex_lock(&kvm
->slots_lock
);
3094 if (log
->slot
>= KVM_MEMORY_SLOTS
)
3097 memslot
= &kvm
->memslots
->memslots
[log
->slot
];
3099 if (!memslot
->dirty_bitmap
)
3102 n
= kvm_dirty_bitmap_bytes(memslot
);
3104 for (i
= 0; !is_dirty
&& i
< n
/sizeof(long); i
++)
3105 is_dirty
= memslot
->dirty_bitmap
[i
];
3107 /* If nothing is dirty, don't bother messing with page tables. */
3109 struct kvm_memslots
*slots
, *old_slots
;
3110 unsigned long *dirty_bitmap
;
3112 spin_lock(&kvm
->mmu_lock
);
3113 kvm_mmu_slot_remove_write_access(kvm
, log
->slot
);
3114 spin_unlock(&kvm
->mmu_lock
);
3117 dirty_bitmap
= vmalloc(n
);
3120 memset(dirty_bitmap
, 0, n
);
3123 slots
= kzalloc(sizeof(struct kvm_memslots
), GFP_KERNEL
);
3125 vfree(dirty_bitmap
);
3128 memcpy(slots
, kvm
->memslots
, sizeof(struct kvm_memslots
));
3129 slots
->memslots
[log
->slot
].dirty_bitmap
= dirty_bitmap
;
3131 old_slots
= kvm
->memslots
;
3132 rcu_assign_pointer(kvm
->memslots
, slots
);
3133 synchronize_srcu_expedited(&kvm
->srcu
);
3134 dirty_bitmap
= old_slots
->memslots
[log
->slot
].dirty_bitmap
;
3138 if (copy_to_user(log
->dirty_bitmap
, dirty_bitmap
, n
)) {
3139 vfree(dirty_bitmap
);
3142 vfree(dirty_bitmap
);
3145 if (clear_user(log
->dirty_bitmap
, n
))
3151 mutex_unlock(&kvm
->slots_lock
);
3155 long kvm_arch_vm_ioctl(struct file
*filp
,
3156 unsigned int ioctl
, unsigned long arg
)
3158 struct kvm
*kvm
= filp
->private_data
;
3159 void __user
*argp
= (void __user
*)arg
;
3162 * This union makes it completely explicit to gcc-3.x
3163 * that these two variables' stack usage should be
3164 * combined, not added together.
3167 struct kvm_pit_state ps
;
3168 struct kvm_pit_state2 ps2
;
3169 struct kvm_pit_config pit_config
;
3173 case KVM_SET_TSS_ADDR
:
3174 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3178 case KVM_SET_IDENTITY_MAP_ADDR
: {
3182 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3184 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3189 case KVM_SET_NR_MMU_PAGES
:
3190 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3194 case KVM_GET_NR_MMU_PAGES
:
3195 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3197 case KVM_CREATE_IRQCHIP
: {
3198 struct kvm_pic
*vpic
;
3200 mutex_lock(&kvm
->lock
);
3203 goto create_irqchip_unlock
;
3205 vpic
= kvm_create_pic(kvm
);
3207 r
= kvm_ioapic_init(kvm
);
3209 kvm_io_bus_unregister_dev(kvm
, KVM_PIO_BUS
,
3212 goto create_irqchip_unlock
;
3215 goto create_irqchip_unlock
;
3217 kvm
->arch
.vpic
= vpic
;
3219 r
= kvm_setup_default_irq_routing(kvm
);
3221 mutex_lock(&kvm
->irq_lock
);
3222 kvm_ioapic_destroy(kvm
);
3223 kvm_destroy_pic(kvm
);
3224 mutex_unlock(&kvm
->irq_lock
);
3226 create_irqchip_unlock
:
3227 mutex_unlock(&kvm
->lock
);
3230 case KVM_CREATE_PIT
:
3231 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
3233 case KVM_CREATE_PIT2
:
3235 if (copy_from_user(&u
.pit_config
, argp
,
3236 sizeof(struct kvm_pit_config
)))
3239 mutex_lock(&kvm
->slots_lock
);
3242 goto create_pit_unlock
;
3244 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
3248 mutex_unlock(&kvm
->slots_lock
);
3250 case KVM_IRQ_LINE_STATUS
:
3251 case KVM_IRQ_LINE
: {
3252 struct kvm_irq_level irq_event
;
3255 if (copy_from_user(&irq_event
, argp
, sizeof irq_event
))
3258 if (irqchip_in_kernel(kvm
)) {
3260 status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3261 irq_event
.irq
, irq_event
.level
);
3262 if (ioctl
== KVM_IRQ_LINE_STATUS
) {
3264 irq_event
.status
= status
;
3265 if (copy_to_user(argp
, &irq_event
,
3273 case KVM_GET_IRQCHIP
: {
3274 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3275 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
3281 if (copy_from_user(chip
, argp
, sizeof *chip
))
3282 goto get_irqchip_out
;
3284 if (!irqchip_in_kernel(kvm
))
3285 goto get_irqchip_out
;
3286 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
3288 goto get_irqchip_out
;
3290 if (copy_to_user(argp
, chip
, sizeof *chip
))
3291 goto get_irqchip_out
;
3299 case KVM_SET_IRQCHIP
: {
3300 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3301 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
3307 if (copy_from_user(chip
, argp
, sizeof *chip
))
3308 goto set_irqchip_out
;
3310 if (!irqchip_in_kernel(kvm
))
3311 goto set_irqchip_out
;
3312 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
3314 goto set_irqchip_out
;
3324 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
3327 if (!kvm
->arch
.vpit
)
3329 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
3333 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
3340 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
3343 if (!kvm
->arch
.vpit
)
3345 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
3351 case KVM_GET_PIT2
: {
3353 if (!kvm
->arch
.vpit
)
3355 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
3359 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
3364 case KVM_SET_PIT2
: {
3366 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
3369 if (!kvm
->arch
.vpit
)
3371 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
3377 case KVM_REINJECT_CONTROL
: {
3378 struct kvm_reinject_control control
;
3380 if (copy_from_user(&control
, argp
, sizeof(control
)))
3382 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
3388 case KVM_XEN_HVM_CONFIG
: {
3390 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
3391 sizeof(struct kvm_xen_hvm_config
)))
3394 if (kvm
->arch
.xen_hvm_config
.flags
)
3399 case KVM_SET_CLOCK
: {
3400 struct kvm_clock_data user_ns
;
3405 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
3413 now_ns
= get_kernel_ns();
3414 delta
= user_ns
.clock
- now_ns
;
3415 kvm
->arch
.kvmclock_offset
= delta
;
3418 case KVM_GET_CLOCK
: {
3419 struct kvm_clock_data user_ns
;
3422 now_ns
= get_kernel_ns();
3423 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
3427 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
3440 static void kvm_init_msr_list(void)
3445 /* skip the first msrs in the list. KVM-specific */
3446 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
3447 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
3450 msrs_to_save
[j
] = msrs_to_save
[i
];
3453 num_msrs_to_save
= j
;
3456 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
3459 if (vcpu
->arch
.apic
&&
3460 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
3463 return kvm_io_bus_write(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, len
, v
);
3466 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
3468 if (vcpu
->arch
.apic
&&
3469 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
3472 return kvm_io_bus_read(vcpu
->kvm
, KVM_MMIO_BUS
, addr
, len
, v
);
3475 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3476 struct kvm_segment
*var
, int seg
)
3478 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3481 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3482 struct kvm_segment
*var
, int seg
)
3484 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3487 static gpa_t
translate_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
)
3492 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3494 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3495 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, error
);
3498 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3500 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3501 access
|= PFERR_FETCH_MASK
;
3502 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, error
);
3505 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3507 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3508 access
|= PFERR_WRITE_MASK
;
3509 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, error
);
3512 /* uses this to access any guest's mapped memory without checking CPL */
3513 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
, u32
*error
)
3515 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, error
);
3518 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
3519 struct kvm_vcpu
*vcpu
, u32 access
,
3523 int r
= X86EMUL_CONTINUE
;
3526 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
3528 unsigned offset
= addr
& (PAGE_SIZE
-1);
3529 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3532 if (gpa
== UNMAPPED_GVA
) {
3533 r
= X86EMUL_PROPAGATE_FAULT
;
3536 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
3538 r
= X86EMUL_IO_NEEDED
;
3550 /* used for instruction fetching */
3551 static int kvm_fetch_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
3552 struct kvm_vcpu
*vcpu
, u32
*error
)
3554 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3555 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
,
3556 access
| PFERR_FETCH_MASK
, error
);
3559 static int kvm_read_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
3560 struct kvm_vcpu
*vcpu
, u32
*error
)
3562 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
3563 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
3567 static int kvm_read_guest_virt_system(gva_t addr
, void *val
, unsigned int bytes
,
3568 struct kvm_vcpu
*vcpu
, u32
*error
)
3570 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, error
);
3573 static int kvm_write_guest_virt_system(gva_t addr
, void *val
,
3575 struct kvm_vcpu
*vcpu
,
3579 int r
= X86EMUL_CONTINUE
;
3582 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
3585 unsigned offset
= addr
& (PAGE_SIZE
-1);
3586 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
3589 if (gpa
== UNMAPPED_GVA
) {
3590 r
= X86EMUL_PROPAGATE_FAULT
;
3593 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
3595 r
= X86EMUL_IO_NEEDED
;
3607 static int emulator_read_emulated(unsigned long addr
,
3610 unsigned int *error_code
,
3611 struct kvm_vcpu
*vcpu
)
3615 if (vcpu
->mmio_read_completed
) {
3616 memcpy(val
, vcpu
->mmio_data
, bytes
);
3617 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
3618 vcpu
->mmio_phys_addr
, *(u64
*)val
);
3619 vcpu
->mmio_read_completed
= 0;
3620 return X86EMUL_CONTINUE
;
3623 gpa
= kvm_mmu_gva_to_gpa_read(vcpu
, addr
, error_code
);
3625 if (gpa
== UNMAPPED_GVA
)
3626 return X86EMUL_PROPAGATE_FAULT
;
3628 /* For APIC access vmexit */
3629 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3632 if (kvm_read_guest_virt(addr
, val
, bytes
, vcpu
, NULL
)
3633 == X86EMUL_CONTINUE
)
3634 return X86EMUL_CONTINUE
;
3638 * Is this MMIO handled locally?
3640 if (!vcpu_mmio_read(vcpu
, gpa
, bytes
, val
)) {
3641 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
, gpa
, *(u64
*)val
);
3642 return X86EMUL_CONTINUE
;
3645 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
3647 vcpu
->mmio_needed
= 1;
3648 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
3649 vcpu
->run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
= gpa
;
3650 vcpu
->run
->mmio
.len
= vcpu
->mmio_size
= bytes
;
3651 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= 0;
3653 return X86EMUL_IO_NEEDED
;
3656 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
3657 const void *val
, int bytes
)
3661 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
3664 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
, 1);
3668 static int emulator_write_emulated_onepage(unsigned long addr
,
3671 unsigned int *error_code
,
3672 struct kvm_vcpu
*vcpu
)
3676 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, error_code
);
3678 if (gpa
== UNMAPPED_GVA
)
3679 return X86EMUL_PROPAGATE_FAULT
;
3681 /* For APIC access vmexit */
3682 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3685 if (emulator_write_phys(vcpu
, gpa
, val
, bytes
))
3686 return X86EMUL_CONTINUE
;
3689 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
3691 * Is this MMIO handled locally?
3693 if (!vcpu_mmio_write(vcpu
, gpa
, bytes
, val
))
3694 return X86EMUL_CONTINUE
;
3696 vcpu
->mmio_needed
= 1;
3697 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
3698 vcpu
->run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
= gpa
;
3699 vcpu
->run
->mmio
.len
= vcpu
->mmio_size
= bytes
;
3700 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= 1;
3701 memcpy(vcpu
->run
->mmio
.data
, val
, bytes
);
3703 return X86EMUL_CONTINUE
;
3706 int emulator_write_emulated(unsigned long addr
,
3709 unsigned int *error_code
,
3710 struct kvm_vcpu
*vcpu
)
3712 /* Crossing a page boundary? */
3713 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
3716 now
= -addr
& ~PAGE_MASK
;
3717 rc
= emulator_write_emulated_onepage(addr
, val
, now
, error_code
,
3719 if (rc
!= X86EMUL_CONTINUE
)
3725 return emulator_write_emulated_onepage(addr
, val
, bytes
, error_code
,
3729 #define CMPXCHG_TYPE(t, ptr, old, new) \
3730 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3732 #ifdef CONFIG_X86_64
3733 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3735 # define CMPXCHG64(ptr, old, new) \
3736 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3739 static int emulator_cmpxchg_emulated(unsigned long addr
,
3743 unsigned int *error_code
,
3744 struct kvm_vcpu
*vcpu
)
3751 /* guests cmpxchg8b have to be emulated atomically */
3752 if (bytes
> 8 || (bytes
& (bytes
- 1)))
3755 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
3757 if (gpa
== UNMAPPED_GVA
||
3758 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
3761 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
3764 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
3765 if (is_error_page(page
)) {
3766 kvm_release_page_clean(page
);
3770 kaddr
= kmap_atomic(page
, KM_USER0
);
3771 kaddr
+= offset_in_page(gpa
);
3774 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
3777 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
3780 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
3783 exchanged
= CMPXCHG64(kaddr
, old
, new);
3788 kunmap_atomic(kaddr
, KM_USER0
);
3789 kvm_release_page_dirty(page
);
3792 return X86EMUL_CMPXCHG_FAILED
;
3794 kvm_mmu_pte_write(vcpu
, gpa
, new, bytes
, 1);
3796 return X86EMUL_CONTINUE
;
3799 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
3801 return emulator_write_emulated(addr
, new, bytes
, error_code
, vcpu
);
3804 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
3806 /* TODO: String I/O for in kernel device */
3809 if (vcpu
->arch
.pio
.in
)
3810 r
= kvm_io_bus_read(vcpu
->kvm
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
3811 vcpu
->arch
.pio
.size
, pd
);
3813 r
= kvm_io_bus_write(vcpu
->kvm
, KVM_PIO_BUS
,
3814 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
3820 static int emulator_pio_in_emulated(int size
, unsigned short port
, void *val
,
3821 unsigned int count
, struct kvm_vcpu
*vcpu
)
3823 if (vcpu
->arch
.pio
.count
)
3826 trace_kvm_pio(0, port
, size
, 1);
3828 vcpu
->arch
.pio
.port
= port
;
3829 vcpu
->arch
.pio
.in
= 1;
3830 vcpu
->arch
.pio
.count
= count
;
3831 vcpu
->arch
.pio
.size
= size
;
3833 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
3835 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
3836 vcpu
->arch
.pio
.count
= 0;
3840 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3841 vcpu
->run
->io
.direction
= KVM_EXIT_IO_IN
;
3842 vcpu
->run
->io
.size
= size
;
3843 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3844 vcpu
->run
->io
.count
= count
;
3845 vcpu
->run
->io
.port
= port
;
3850 static int emulator_pio_out_emulated(int size
, unsigned short port
,
3851 const void *val
, unsigned int count
,
3852 struct kvm_vcpu
*vcpu
)
3854 trace_kvm_pio(1, port
, size
, 1);
3856 vcpu
->arch
.pio
.port
= port
;
3857 vcpu
->arch
.pio
.in
= 0;
3858 vcpu
->arch
.pio
.count
= count
;
3859 vcpu
->arch
.pio
.size
= size
;
3861 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
3863 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
3864 vcpu
->arch
.pio
.count
= 0;
3868 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3869 vcpu
->run
->io
.direction
= KVM_EXIT_IO_OUT
;
3870 vcpu
->run
->io
.size
= size
;
3871 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3872 vcpu
->run
->io
.count
= count
;
3873 vcpu
->run
->io
.port
= port
;
3878 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
3880 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
3883 int emulate_invlpg(struct kvm_vcpu
*vcpu
, gva_t address
)
3885 kvm_mmu_invlpg(vcpu
, address
);
3886 return X86EMUL_CONTINUE
;
3889 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
3891 if (!need_emulate_wbinvd(vcpu
))
3892 return X86EMUL_CONTINUE
;
3894 if (kvm_x86_ops
->has_wbinvd_exit()) {
3895 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
3896 wbinvd_ipi
, NULL
, 1);
3897 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
3900 return X86EMUL_CONTINUE
;
3902 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
3904 int emulate_clts(struct kvm_vcpu
*vcpu
)
3906 kvm_x86_ops
->set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~X86_CR0_TS
));
3907 kvm_x86_ops
->fpu_activate(vcpu
);
3908 return X86EMUL_CONTINUE
;
3911 int emulator_get_dr(int dr
, unsigned long *dest
, struct kvm_vcpu
*vcpu
)
3913 return _kvm_get_dr(vcpu
, dr
, dest
);
3916 int emulator_set_dr(int dr
, unsigned long value
, struct kvm_vcpu
*vcpu
)
3919 return __kvm_set_dr(vcpu
, dr
, value
);
3922 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
3924 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
3927 static unsigned long emulator_get_cr(int cr
, struct kvm_vcpu
*vcpu
)
3929 unsigned long value
;
3933 value
= kvm_read_cr0(vcpu
);
3936 value
= vcpu
->arch
.cr2
;
3939 value
= vcpu
->arch
.cr3
;
3942 value
= kvm_read_cr4(vcpu
);
3945 value
= kvm_get_cr8(vcpu
);
3948 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3955 static int emulator_set_cr(int cr
, unsigned long val
, struct kvm_vcpu
*vcpu
)
3961 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
3964 vcpu
->arch
.cr2
= val
;
3967 res
= kvm_set_cr3(vcpu
, val
);
3970 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
3973 res
= __kvm_set_cr8(vcpu
, val
& 0xfUL
);
3976 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3983 static int emulator_get_cpl(struct kvm_vcpu
*vcpu
)
3985 return kvm_x86_ops
->get_cpl(vcpu
);
3988 static void emulator_get_gdt(struct desc_ptr
*dt
, struct kvm_vcpu
*vcpu
)
3990 kvm_x86_ops
->get_gdt(vcpu
, dt
);
3993 static void emulator_get_idt(struct desc_ptr
*dt
, struct kvm_vcpu
*vcpu
)
3995 kvm_x86_ops
->get_idt(vcpu
, dt
);
3998 static unsigned long emulator_get_cached_segment_base(int seg
,
3999 struct kvm_vcpu
*vcpu
)
4001 return get_segment_base(vcpu
, seg
);
4004 static bool emulator_get_cached_descriptor(struct desc_struct
*desc
, int seg
,
4005 struct kvm_vcpu
*vcpu
)
4007 struct kvm_segment var
;
4009 kvm_get_segment(vcpu
, &var
, seg
);
4016 set_desc_limit(desc
, var
.limit
);
4017 set_desc_base(desc
, (unsigned long)var
.base
);
4018 desc
->type
= var
.type
;
4020 desc
->dpl
= var
.dpl
;
4021 desc
->p
= var
.present
;
4022 desc
->avl
= var
.avl
;
4030 static void emulator_set_cached_descriptor(struct desc_struct
*desc
, int seg
,
4031 struct kvm_vcpu
*vcpu
)
4033 struct kvm_segment var
;
4035 /* needed to preserve selector */
4036 kvm_get_segment(vcpu
, &var
, seg
);
4038 var
.base
= get_desc_base(desc
);
4039 var
.limit
= get_desc_limit(desc
);
4041 var
.limit
= (var
.limit
<< 12) | 0xfff;
4042 var
.type
= desc
->type
;
4043 var
.present
= desc
->p
;
4044 var
.dpl
= desc
->dpl
;
4049 var
.avl
= desc
->avl
;
4050 var
.present
= desc
->p
;
4051 var
.unusable
= !var
.present
;
4054 kvm_set_segment(vcpu
, &var
, seg
);
4058 static u16
emulator_get_segment_selector(int seg
, struct kvm_vcpu
*vcpu
)
4060 struct kvm_segment kvm_seg
;
4062 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4063 return kvm_seg
.selector
;
4066 static void emulator_set_segment_selector(u16 sel
, int seg
,
4067 struct kvm_vcpu
*vcpu
)
4069 struct kvm_segment kvm_seg
;
4071 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4072 kvm_seg
.selector
= sel
;
4073 kvm_set_segment(vcpu
, &kvm_seg
, seg
);
4076 static struct x86_emulate_ops emulate_ops
= {
4077 .read_std
= kvm_read_guest_virt_system
,
4078 .write_std
= kvm_write_guest_virt_system
,
4079 .fetch
= kvm_fetch_guest_virt
,
4080 .read_emulated
= emulator_read_emulated
,
4081 .write_emulated
= emulator_write_emulated
,
4082 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
4083 .pio_in_emulated
= emulator_pio_in_emulated
,
4084 .pio_out_emulated
= emulator_pio_out_emulated
,
4085 .get_cached_descriptor
= emulator_get_cached_descriptor
,
4086 .set_cached_descriptor
= emulator_set_cached_descriptor
,
4087 .get_segment_selector
= emulator_get_segment_selector
,
4088 .set_segment_selector
= emulator_set_segment_selector
,
4089 .get_cached_segment_base
= emulator_get_cached_segment_base
,
4090 .get_gdt
= emulator_get_gdt
,
4091 .get_idt
= emulator_get_idt
,
4092 .get_cr
= emulator_get_cr
,
4093 .set_cr
= emulator_set_cr
,
4094 .cpl
= emulator_get_cpl
,
4095 .get_dr
= emulator_get_dr
,
4096 .set_dr
= emulator_set_dr
,
4097 .set_msr
= kvm_set_msr
,
4098 .get_msr
= kvm_get_msr
,
4101 static void cache_all_regs(struct kvm_vcpu
*vcpu
)
4103 kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4104 kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4105 kvm_register_read(vcpu
, VCPU_REGS_RIP
);
4106 vcpu
->arch
.regs_dirty
= ~0;
4109 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
4111 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
, mask
);
4113 * an sti; sti; sequence only disable interrupts for the first
4114 * instruction. So, if the last instruction, be it emulated or
4115 * not, left the system with the INT_STI flag enabled, it
4116 * means that the last instruction is an sti. We should not
4117 * leave the flag on in this case. The same goes for mov ss
4119 if (!(int_shadow
& mask
))
4120 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
4123 static void inject_emulated_exception(struct kvm_vcpu
*vcpu
)
4125 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4126 if (ctxt
->exception
== PF_VECTOR
)
4127 kvm_inject_page_fault(vcpu
);
4128 else if (ctxt
->error_code_valid
)
4129 kvm_queue_exception_e(vcpu
, ctxt
->exception
, ctxt
->error_code
);
4131 kvm_queue_exception(vcpu
, ctxt
->exception
);
4134 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
4136 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
4139 cache_all_regs(vcpu
);
4141 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4143 vcpu
->arch
.emulate_ctxt
.vcpu
= vcpu
;
4144 vcpu
->arch
.emulate_ctxt
.eflags
= kvm_x86_ops
->get_rflags(vcpu
);
4145 vcpu
->arch
.emulate_ctxt
.eip
= kvm_rip_read(vcpu
);
4146 vcpu
->arch
.emulate_ctxt
.mode
=
4147 (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
4148 (vcpu
->arch
.emulate_ctxt
.eflags
& X86_EFLAGS_VM
)
4149 ? X86EMUL_MODE_VM86
: cs_l
4150 ? X86EMUL_MODE_PROT64
: cs_db
4151 ? X86EMUL_MODE_PROT32
: X86EMUL_MODE_PROT16
;
4152 memset(c
, 0, sizeof(struct decode_cache
));
4153 memcpy(c
->regs
, vcpu
->arch
.regs
, sizeof c
->regs
);
4156 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
4158 ++vcpu
->stat
.insn_emulation_fail
;
4159 trace_kvm_emulate_insn_failed(vcpu
);
4160 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
4161 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
4162 vcpu
->run
->internal
.ndata
= 0;
4163 kvm_queue_exception(vcpu
, UD_VECTOR
);
4164 return EMULATE_FAIL
;
4167 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t gva
)
4175 * if emulation was due to access to shadowed page table
4176 * and it failed try to unshadow page and re-entetr the
4177 * guest to let CPU execute the instruction.
4179 if (kvm_mmu_unprotect_page_virt(vcpu
, gva
))
4182 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, gva
, NULL
);
4184 if (gpa
== UNMAPPED_GVA
)
4185 return true; /* let cpu generate fault */
4187 if (!kvm_is_error_hva(gfn_to_hva(vcpu
->kvm
, gpa
>> PAGE_SHIFT
)))
4193 int emulate_instruction(struct kvm_vcpu
*vcpu
,
4199 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
4201 kvm_clear_exception_queue(vcpu
);
4202 vcpu
->arch
.mmio_fault_cr2
= cr2
;
4204 * TODO: fix emulate.c to use guest_read/write_register
4205 * instead of direct ->regs accesses, can save hundred cycles
4206 * on Intel for instructions that don't read/change RSP, for
4209 cache_all_regs(vcpu
);
4211 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
4212 init_emulate_ctxt(vcpu
);
4213 vcpu
->arch
.emulate_ctxt
.interruptibility
= 0;
4214 vcpu
->arch
.emulate_ctxt
.exception
= -1;
4215 vcpu
->arch
.emulate_ctxt
.perm_ok
= false;
4217 r
= x86_decode_insn(&vcpu
->arch
.emulate_ctxt
);
4218 trace_kvm_emulate_insn_start(vcpu
);
4220 /* Only allow emulation of specific instructions on #UD
4221 * (namely VMMCALL, sysenter, sysexit, syscall)*/
4222 if (emulation_type
& EMULTYPE_TRAP_UD
) {
4224 return EMULATE_FAIL
;
4226 case 0x01: /* VMMCALL */
4227 if (c
->modrm_mod
!= 3 || c
->modrm_rm
!= 1)
4228 return EMULATE_FAIL
;
4230 case 0x34: /* sysenter */
4231 case 0x35: /* sysexit */
4232 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
4233 return EMULATE_FAIL
;
4235 case 0x05: /* syscall */
4236 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
4237 return EMULATE_FAIL
;
4240 return EMULATE_FAIL
;
4243 if (!(c
->modrm_reg
== 0 || c
->modrm_reg
== 3))
4244 return EMULATE_FAIL
;
4247 ++vcpu
->stat
.insn_emulation
;
4249 if (reexecute_instruction(vcpu
, cr2
))
4250 return EMULATE_DONE
;
4251 if (emulation_type
& EMULTYPE_SKIP
)
4252 return EMULATE_FAIL
;
4253 return handle_emulation_failure(vcpu
);
4257 if (emulation_type
& EMULTYPE_SKIP
) {
4258 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.decode
.eip
);
4259 return EMULATE_DONE
;
4262 /* this is needed for vmware backdor interface to work since it
4263 changes registers values during IO operation */
4264 memcpy(c
->regs
, vcpu
->arch
.regs
, sizeof c
->regs
);
4267 r
= x86_emulate_insn(&vcpu
->arch
.emulate_ctxt
);
4269 if (r
== EMULATION_FAILED
) {
4270 if (reexecute_instruction(vcpu
, cr2
))
4271 return EMULATE_DONE
;
4273 return handle_emulation_failure(vcpu
);
4276 if (vcpu
->arch
.emulate_ctxt
.exception
>= 0) {
4277 inject_emulated_exception(vcpu
);
4279 } else if (vcpu
->arch
.pio
.count
) {
4280 if (!vcpu
->arch
.pio
.in
)
4281 vcpu
->arch
.pio
.count
= 0;
4282 r
= EMULATE_DO_MMIO
;
4283 } else if (vcpu
->mmio_needed
) {
4284 if (vcpu
->mmio_is_write
)
4285 vcpu
->mmio_needed
= 0;
4286 r
= EMULATE_DO_MMIO
;
4287 } else if (r
== EMULATION_RESTART
)
4292 toggle_interruptibility(vcpu
, vcpu
->arch
.emulate_ctxt
.interruptibility
);
4293 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
4294 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
4295 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.eip
);
4299 EXPORT_SYMBOL_GPL(emulate_instruction
);
4301 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
4303 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4304 int ret
= emulator_pio_out_emulated(size
, port
, &val
, 1, vcpu
);
4305 /* do not return to emulator after return from userspace */
4306 vcpu
->arch
.pio
.count
= 0;
4309 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
4311 static void tsc_bad(void *info
)
4313 __get_cpu_var(cpu_tsc_khz
) = 0;
4316 static void tsc_khz_changed(void *data
)
4318 struct cpufreq_freqs
*freq
= data
;
4319 unsigned long khz
= 0;
4323 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4324 khz
= cpufreq_quick_get(raw_smp_processor_id());
4327 __get_cpu_var(cpu_tsc_khz
) = khz
;
4330 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
4333 struct cpufreq_freqs
*freq
= data
;
4335 struct kvm_vcpu
*vcpu
;
4336 int i
, send_ipi
= 0;
4339 * We allow guests to temporarily run on slowing clocks,
4340 * provided we notify them after, or to run on accelerating
4341 * clocks, provided we notify them before. Thus time never
4344 * However, we have a problem. We can't atomically update
4345 * the frequency of a given CPU from this function; it is
4346 * merely a notifier, which can be called from any CPU.
4347 * Changing the TSC frequency at arbitrary points in time
4348 * requires a recomputation of local variables related to
4349 * the TSC for each VCPU. We must flag these local variables
4350 * to be updated and be sure the update takes place with the
4351 * new frequency before any guests proceed.
4353 * Unfortunately, the combination of hotplug CPU and frequency
4354 * change creates an intractable locking scenario; the order
4355 * of when these callouts happen is undefined with respect to
4356 * CPU hotplug, and they can race with each other. As such,
4357 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4358 * undefined; you can actually have a CPU frequency change take
4359 * place in between the computation of X and the setting of the
4360 * variable. To protect against this problem, all updates of
4361 * the per_cpu tsc_khz variable are done in an interrupt
4362 * protected IPI, and all callers wishing to update the value
4363 * must wait for a synchronous IPI to complete (which is trivial
4364 * if the caller is on the CPU already). This establishes the
4365 * necessary total order on variable updates.
4367 * Note that because a guest time update may take place
4368 * anytime after the setting of the VCPU's request bit, the
4369 * correct TSC value must be set before the request. However,
4370 * to ensure the update actually makes it to any guest which
4371 * starts running in hardware virtualization between the set
4372 * and the acquisition of the spinlock, we must also ping the
4373 * CPU after setting the request bit.
4377 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
4379 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
4382 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4384 spin_lock(&kvm_lock
);
4385 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
4386 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
4387 if (vcpu
->cpu
!= freq
->cpu
)
4389 if (!kvm_request_guest_time_update(vcpu
))
4391 if (vcpu
->cpu
!= smp_processor_id())
4395 spin_unlock(&kvm_lock
);
4397 if (freq
->old
< freq
->new && send_ipi
) {
4399 * We upscale the frequency. Must make the guest
4400 * doesn't see old kvmclock values while running with
4401 * the new frequency, otherwise we risk the guest sees
4402 * time go backwards.
4404 * In case we update the frequency for another cpu
4405 * (which might be in guest context) send an interrupt
4406 * to kick the cpu out of guest context. Next time
4407 * guest context is entered kvmclock will be updated,
4408 * so the guest will not see stale values.
4410 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
4415 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
4416 .notifier_call
= kvmclock_cpufreq_notifier
4419 static int kvmclock_cpu_notifier(struct notifier_block
*nfb
,
4420 unsigned long action
, void *hcpu
)
4422 unsigned int cpu
= (unsigned long)hcpu
;
4426 case CPU_DOWN_FAILED
:
4427 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4429 case CPU_DOWN_PREPARE
:
4430 smp_call_function_single(cpu
, tsc_bad
, NULL
, 1);
4436 static struct notifier_block kvmclock_cpu_notifier_block
= {
4437 .notifier_call
= kvmclock_cpu_notifier
,
4438 .priority
= -INT_MAX
4441 static void kvm_timer_init(void)
4445 register_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4446 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
4447 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
4448 CPUFREQ_TRANSITION_NOTIFIER
);
4450 for_each_online_cpu(cpu
)
4451 smp_call_function_single(cpu
, tsc_khz_changed
, NULL
, 1);
4454 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
4456 static int kvm_is_in_guest(void)
4458 return percpu_read(current_vcpu
) != NULL
;
4461 static int kvm_is_user_mode(void)
4465 if (percpu_read(current_vcpu
))
4466 user_mode
= kvm_x86_ops
->get_cpl(percpu_read(current_vcpu
));
4468 return user_mode
!= 0;
4471 static unsigned long kvm_get_guest_ip(void)
4473 unsigned long ip
= 0;
4475 if (percpu_read(current_vcpu
))
4476 ip
= kvm_rip_read(percpu_read(current_vcpu
));
4481 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
4482 .is_in_guest
= kvm_is_in_guest
,
4483 .is_user_mode
= kvm_is_user_mode
,
4484 .get_guest_ip
= kvm_get_guest_ip
,
4487 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
4489 percpu_write(current_vcpu
, vcpu
);
4491 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
4493 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
4495 percpu_write(current_vcpu
, NULL
);
4497 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
4499 int kvm_arch_init(void *opaque
)
4502 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
4505 printk(KERN_ERR
"kvm: already loaded the other module\n");
4510 if (!ops
->cpu_has_kvm_support()) {
4511 printk(KERN_ERR
"kvm: no hardware support\n");
4515 if (ops
->disabled_by_bios()) {
4516 printk(KERN_ERR
"kvm: disabled by bios\n");
4521 r
= kvm_mmu_module_init();
4525 kvm_init_msr_list();
4528 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4529 kvm_mmu_set_base_ptes(PT_PRESENT_MASK
);
4530 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
4531 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
4535 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
4538 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
4546 void kvm_arch_exit(void)
4548 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
4550 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
4551 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
4552 CPUFREQ_TRANSITION_NOTIFIER
);
4553 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block
);
4555 kvm_mmu_module_exit();
4558 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
4560 ++vcpu
->stat
.halt_exits
;
4561 if (irqchip_in_kernel(vcpu
->kvm
)) {
4562 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
4565 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
4569 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
4571 static inline gpa_t
hc_gpa(struct kvm_vcpu
*vcpu
, unsigned long a0
,
4574 if (is_long_mode(vcpu
))
4577 return a0
| ((gpa_t
)a1
<< 32);
4580 int kvm_hv_hypercall(struct kvm_vcpu
*vcpu
)
4582 u64 param
, ingpa
, outgpa
, ret
;
4583 uint16_t code
, rep_idx
, rep_cnt
, res
= HV_STATUS_SUCCESS
, rep_done
= 0;
4584 bool fast
, longmode
;
4588 * hypercall generates UD from non zero cpl and real mode
4591 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 || !is_protmode(vcpu
)) {
4592 kvm_queue_exception(vcpu
, UD_VECTOR
);
4596 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
4597 longmode
= is_long_mode(vcpu
) && cs_l
== 1;
4600 param
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDX
) << 32) |
4601 (kvm_register_read(vcpu
, VCPU_REGS_RAX
) & 0xffffffff);
4602 ingpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RBX
) << 32) |
4603 (kvm_register_read(vcpu
, VCPU_REGS_RCX
) & 0xffffffff);
4604 outgpa
= ((u64
)kvm_register_read(vcpu
, VCPU_REGS_RDI
) << 32) |
4605 (kvm_register_read(vcpu
, VCPU_REGS_RSI
) & 0xffffffff);
4607 #ifdef CONFIG_X86_64
4609 param
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4610 ingpa
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4611 outgpa
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
4615 code
= param
& 0xffff;
4616 fast
= (param
>> 16) & 0x1;
4617 rep_cnt
= (param
>> 32) & 0xfff;
4618 rep_idx
= (param
>> 48) & 0xfff;
4620 trace_kvm_hv_hypercall(code
, fast
, rep_cnt
, rep_idx
, ingpa
, outgpa
);
4623 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
:
4624 kvm_vcpu_on_spin(vcpu
);
4627 res
= HV_STATUS_INVALID_HYPERCALL_CODE
;
4631 ret
= res
| (((u64
)rep_done
& 0xfff) << 32);
4633 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
4635 kvm_register_write(vcpu
, VCPU_REGS_RDX
, ret
>> 32);
4636 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
& 0xffffffff);
4642 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
4644 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
4647 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
4648 return kvm_hv_hypercall(vcpu
);
4650 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4651 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4652 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4653 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4654 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4656 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
4658 if (!is_long_mode(vcpu
)) {
4666 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
4672 case KVM_HC_VAPIC_POLL_IRQ
:
4676 r
= kvm_pv_mmu_op(vcpu
, a0
, hc_gpa(vcpu
, a1
, a2
), &ret
);
4683 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
4684 ++vcpu
->stat
.hypercalls
;
4687 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
4689 int kvm_fix_hypercall(struct kvm_vcpu
*vcpu
)
4691 char instruction
[3];
4692 unsigned long rip
= kvm_rip_read(vcpu
);
4695 * Blow out the MMU to ensure that no other VCPU has an active mapping
4696 * to ensure that the updated hypercall appears atomically across all
4699 kvm_mmu_zap_all(vcpu
->kvm
);
4701 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
4703 return emulator_write_emulated(rip
, instruction
, 3, NULL
, vcpu
);
4706 void realmode_lgdt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
4708 struct desc_ptr dt
= { limit
, base
};
4710 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
4713 void realmode_lidt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
4715 struct desc_ptr dt
= { limit
, base
};
4717 kvm_x86_ops
->set_idt(vcpu
, &dt
);
4720 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu
*vcpu
, int i
)
4722 struct kvm_cpuid_entry2
*e
= &vcpu
->arch
.cpuid_entries
[i
];
4723 int j
, nent
= vcpu
->arch
.cpuid_nent
;
4725 e
->flags
&= ~KVM_CPUID_FLAG_STATE_READ_NEXT
;
4726 /* when no next entry is found, the current entry[i] is reselected */
4727 for (j
= i
+ 1; ; j
= (j
+ 1) % nent
) {
4728 struct kvm_cpuid_entry2
*ej
= &vcpu
->arch
.cpuid_entries
[j
];
4729 if (ej
->function
== e
->function
) {
4730 ej
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
4734 return 0; /* silence gcc, even though control never reaches here */
4737 /* find an entry with matching function, matching index (if needed), and that
4738 * should be read next (if it's stateful) */
4739 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2
*e
,
4740 u32 function
, u32 index
)
4742 if (e
->function
!= function
)
4744 if ((e
->flags
& KVM_CPUID_FLAG_SIGNIFCANT_INDEX
) && e
->index
!= index
)
4746 if ((e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
) &&
4747 !(e
->flags
& KVM_CPUID_FLAG_STATE_READ_NEXT
))
4752 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
4753 u32 function
, u32 index
)
4756 struct kvm_cpuid_entry2
*best
= NULL
;
4758 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
4759 struct kvm_cpuid_entry2
*e
;
4761 e
= &vcpu
->arch
.cpuid_entries
[i
];
4762 if (is_matching_cpuid_entry(e
, function
, index
)) {
4763 if (e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
)
4764 move_to_next_stateful_cpuid_entry(vcpu
, i
);
4769 * Both basic or both extended?
4771 if (((e
->function
^ function
) & 0x80000000) == 0)
4772 if (!best
|| e
->function
> best
->function
)
4777 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry
);
4779 int cpuid_maxphyaddr(struct kvm_vcpu
*vcpu
)
4781 struct kvm_cpuid_entry2
*best
;
4783 best
= kvm_find_cpuid_entry(vcpu
, 0x80000000, 0);
4784 if (!best
|| best
->eax
< 0x80000008)
4786 best
= kvm_find_cpuid_entry(vcpu
, 0x80000008, 0);
4788 return best
->eax
& 0xff;
4793 void kvm_emulate_cpuid(struct kvm_vcpu
*vcpu
)
4795 u32 function
, index
;
4796 struct kvm_cpuid_entry2
*best
;
4798 function
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4799 index
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4800 kvm_register_write(vcpu
, VCPU_REGS_RAX
, 0);
4801 kvm_register_write(vcpu
, VCPU_REGS_RBX
, 0);
4802 kvm_register_write(vcpu
, VCPU_REGS_RCX
, 0);
4803 kvm_register_write(vcpu
, VCPU_REGS_RDX
, 0);
4804 best
= kvm_find_cpuid_entry(vcpu
, function
, index
);
4806 kvm_register_write(vcpu
, VCPU_REGS_RAX
, best
->eax
);
4807 kvm_register_write(vcpu
, VCPU_REGS_RBX
, best
->ebx
);
4808 kvm_register_write(vcpu
, VCPU_REGS_RCX
, best
->ecx
);
4809 kvm_register_write(vcpu
, VCPU_REGS_RDX
, best
->edx
);
4811 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
4812 trace_kvm_cpuid(function
,
4813 kvm_register_read(vcpu
, VCPU_REGS_RAX
),
4814 kvm_register_read(vcpu
, VCPU_REGS_RBX
),
4815 kvm_register_read(vcpu
, VCPU_REGS_RCX
),
4816 kvm_register_read(vcpu
, VCPU_REGS_RDX
));
4818 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid
);
4821 * Check if userspace requested an interrupt window, and that the
4822 * interrupt window is open.
4824 * No need to exit to userspace if we already have an interrupt queued.
4826 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
4828 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
4829 vcpu
->run
->request_interrupt_window
&&
4830 kvm_arch_interrupt_allowed(vcpu
));
4833 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
4835 struct kvm_run
*kvm_run
= vcpu
->run
;
4837 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
4838 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
4839 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
4840 if (irqchip_in_kernel(vcpu
->kvm
))
4841 kvm_run
->ready_for_interrupt_injection
= 1;
4843 kvm_run
->ready_for_interrupt_injection
=
4844 kvm_arch_interrupt_allowed(vcpu
) &&
4845 !kvm_cpu_has_interrupt(vcpu
) &&
4846 !kvm_event_needs_reinjection(vcpu
);
4849 static void vapic_enter(struct kvm_vcpu
*vcpu
)
4851 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
4854 if (!apic
|| !apic
->vapic_addr
)
4857 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
4859 vcpu
->arch
.apic
->vapic_page
= page
;
4862 static void vapic_exit(struct kvm_vcpu
*vcpu
)
4864 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
4867 if (!apic
|| !apic
->vapic_addr
)
4870 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4871 kvm_release_page_dirty(apic
->vapic_page
);
4872 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
4873 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4876 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
4880 if (!kvm_x86_ops
->update_cr8_intercept
)
4883 if (!vcpu
->arch
.apic
)
4886 if (!vcpu
->arch
.apic
->vapic_addr
)
4887 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
4894 tpr
= kvm_lapic_get_cr8(vcpu
);
4896 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
4899 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
4901 /* try to reinject previous events if any */
4902 if (vcpu
->arch
.exception
.pending
) {
4903 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
4904 vcpu
->arch
.exception
.has_error_code
,
4905 vcpu
->arch
.exception
.error_code
);
4906 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
4907 vcpu
->arch
.exception
.has_error_code
,
4908 vcpu
->arch
.exception
.error_code
,
4909 vcpu
->arch
.exception
.reinject
);
4913 if (vcpu
->arch
.nmi_injected
) {
4914 kvm_x86_ops
->set_nmi(vcpu
);
4918 if (vcpu
->arch
.interrupt
.pending
) {
4919 kvm_x86_ops
->set_irq(vcpu
);
4923 /* try to inject new event if pending */
4924 if (vcpu
->arch
.nmi_pending
) {
4925 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
4926 vcpu
->arch
.nmi_pending
= false;
4927 vcpu
->arch
.nmi_injected
= true;
4928 kvm_x86_ops
->set_nmi(vcpu
);
4930 } else if (kvm_cpu_has_interrupt(vcpu
)) {
4931 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
4932 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
4934 kvm_x86_ops
->set_irq(vcpu
);
4939 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
4941 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
4942 !vcpu
->guest_xcr0_loaded
) {
4943 /* kvm_set_xcr() also depends on this */
4944 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
4945 vcpu
->guest_xcr0_loaded
= 1;
4949 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
4951 if (vcpu
->guest_xcr0_loaded
) {
4952 if (vcpu
->arch
.xcr0
!= host_xcr0
)
4953 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
4954 vcpu
->guest_xcr0_loaded
= 0;
4958 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
4961 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
4962 vcpu
->run
->request_interrupt_window
;
4964 if (vcpu
->requests
) {
4965 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
4966 kvm_mmu_unload(vcpu
);
4967 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
4968 __kvm_migrate_timers(vcpu
);
4969 if (kvm_check_request(KVM_REQ_KVMCLOCK_UPDATE
, vcpu
)) {
4970 r
= kvm_write_guest_time(vcpu
);
4974 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
4975 kvm_mmu_sync_roots(vcpu
);
4976 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
4977 kvm_x86_ops
->tlb_flush(vcpu
);
4978 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
4979 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
4983 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
4984 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
4988 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
4989 vcpu
->fpu_active
= 0;
4990 kvm_x86_ops
->fpu_deactivate(vcpu
);
4994 r
= kvm_mmu_reload(vcpu
);
5000 kvm_x86_ops
->prepare_guest_switch(vcpu
);
5001 if (vcpu
->fpu_active
)
5002 kvm_load_guest_fpu(vcpu
);
5003 kvm_load_guest_xcr0(vcpu
);
5005 atomic_set(&vcpu
->guest_mode
, 1);
5008 local_irq_disable();
5010 if (!atomic_read(&vcpu
->guest_mode
) || vcpu
->requests
5011 || need_resched() || signal_pending(current
)) {
5012 atomic_set(&vcpu
->guest_mode
, 0);
5020 inject_pending_event(vcpu
);
5022 /* enable NMI/IRQ window open exits if needed */
5023 if (vcpu
->arch
.nmi_pending
)
5024 kvm_x86_ops
->enable_nmi_window(vcpu
);
5025 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
5026 kvm_x86_ops
->enable_irq_window(vcpu
);
5028 if (kvm_lapic_enabled(vcpu
)) {
5029 update_cr8_intercept(vcpu
);
5030 kvm_lapic_sync_to_vapic(vcpu
);
5033 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5037 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
5039 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
5040 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
5041 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
5042 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
5045 trace_kvm_entry(vcpu
->vcpu_id
);
5046 kvm_x86_ops
->run(vcpu
);
5049 * If the guest has used debug registers, at least dr7
5050 * will be disabled while returning to the host.
5051 * If we don't have active breakpoints in the host, we don't
5052 * care about the messed up debug address registers. But if
5053 * we have some of them active, restore the old state.
5055 if (hw_breakpoint_active())
5056 hw_breakpoint_restore();
5058 kvm_get_msr(vcpu
, MSR_IA32_TSC
, &vcpu
->arch
.last_guest_tsc
);
5060 atomic_set(&vcpu
->guest_mode
, 0);
5067 * We must have an instruction between local_irq_enable() and
5068 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5069 * the interrupt shadow. The stat.exits increment will do nicely.
5070 * But we need to prevent reordering, hence this barrier():
5078 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5081 * Profile KVM exit RIPs:
5083 if (unlikely(prof_on
== KVM_PROFILING
)) {
5084 unsigned long rip
= kvm_rip_read(vcpu
);
5085 profile_hit(KVM_PROFILING
, (void *)rip
);
5089 kvm_lapic_sync_from_vapic(vcpu
);
5091 r
= kvm_x86_ops
->handle_exit(vcpu
);
5097 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
5100 struct kvm
*kvm
= vcpu
->kvm
;
5102 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
5103 pr_debug("vcpu %d received sipi with vector # %x\n",
5104 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
5105 kvm_lapic_reset(vcpu
);
5106 r
= kvm_arch_vcpu_reset(vcpu
);
5109 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5112 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5117 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
)
5118 r
= vcpu_enter_guest(vcpu
);
5120 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5121 kvm_vcpu_block(vcpu
);
5122 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5123 if (kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
5125 switch(vcpu
->arch
.mp_state
) {
5126 case KVM_MP_STATE_HALTED
:
5127 vcpu
->arch
.mp_state
=
5128 KVM_MP_STATE_RUNNABLE
;
5129 case KVM_MP_STATE_RUNNABLE
:
5131 case KVM_MP_STATE_SIPI_RECEIVED
:
5142 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
5143 if (kvm_cpu_has_pending_timer(vcpu
))
5144 kvm_inject_pending_timer_irqs(vcpu
);
5146 if (dm_request_for_irq_injection(vcpu
)) {
5148 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5149 ++vcpu
->stat
.request_irq_exits
;
5151 if (signal_pending(current
)) {
5153 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
5154 ++vcpu
->stat
.signal_exits
;
5156 if (need_resched()) {
5157 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5159 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
5163 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
5170 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
5175 if (vcpu
->sigset_active
)
5176 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
5178 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
5179 kvm_vcpu_block(vcpu
);
5180 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
5185 /* re-sync apic's tpr */
5186 if (!irqchip_in_kernel(vcpu
->kvm
))
5187 kvm_set_cr8(vcpu
, kvm_run
->cr8
);
5189 if (vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
) {
5190 if (vcpu
->mmio_needed
) {
5191 memcpy(vcpu
->mmio_data
, kvm_run
->mmio
.data
, 8);
5192 vcpu
->mmio_read_completed
= 1;
5193 vcpu
->mmio_needed
= 0;
5195 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5196 r
= emulate_instruction(vcpu
, 0, 0, EMULTYPE_NO_DECODE
);
5197 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
5198 if (r
!= EMULATE_DONE
) {
5203 if (kvm_run
->exit_reason
== KVM_EXIT_HYPERCALL
)
5204 kvm_register_write(vcpu
, VCPU_REGS_RAX
,
5205 kvm_run
->hypercall
.ret
);
5207 r
= __vcpu_run(vcpu
);
5210 post_kvm_run_save(vcpu
);
5211 if (vcpu
->sigset_active
)
5212 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
5217 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5219 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5220 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
5221 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
5222 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
5223 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
5224 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
5225 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
5226 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
5227 #ifdef CONFIG_X86_64
5228 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
5229 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
5230 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
5231 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
5232 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
5233 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
5234 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
5235 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
5238 regs
->rip
= kvm_rip_read(vcpu
);
5239 regs
->rflags
= kvm_get_rflags(vcpu
);
5244 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
5246 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
5247 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
5248 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
5249 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
5250 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
5251 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
5252 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
5253 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
5254 #ifdef CONFIG_X86_64
5255 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
5256 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
5257 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
5258 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
5259 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
5260 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
5261 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
5262 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
5265 kvm_rip_write(vcpu
, regs
->rip
);
5266 kvm_set_rflags(vcpu
, regs
->rflags
);
5268 vcpu
->arch
.exception
.pending
= false;
5273 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
5275 struct kvm_segment cs
;
5277 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
5281 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
5283 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
5284 struct kvm_sregs
*sregs
)
5288 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5289 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5290 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5291 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5292 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5293 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5295 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5296 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5298 kvm_x86_ops
->get_idt(vcpu
, &dt
);
5299 sregs
->idt
.limit
= dt
.size
;
5300 sregs
->idt
.base
= dt
.address
;
5301 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
5302 sregs
->gdt
.limit
= dt
.size
;
5303 sregs
->gdt
.base
= dt
.address
;
5305 sregs
->cr0
= kvm_read_cr0(vcpu
);
5306 sregs
->cr2
= vcpu
->arch
.cr2
;
5307 sregs
->cr3
= vcpu
->arch
.cr3
;
5308 sregs
->cr4
= kvm_read_cr4(vcpu
);
5309 sregs
->cr8
= kvm_get_cr8(vcpu
);
5310 sregs
->efer
= vcpu
->arch
.efer
;
5311 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
5313 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
5315 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
5316 set_bit(vcpu
->arch
.interrupt
.nr
,
5317 (unsigned long *)sregs
->interrupt_bitmap
);
5322 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
5323 struct kvm_mp_state
*mp_state
)
5325 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
5329 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
5330 struct kvm_mp_state
*mp_state
)
5332 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
5336 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int reason
,
5337 bool has_error_code
, u32 error_code
)
5339 struct decode_cache
*c
= &vcpu
->arch
.emulate_ctxt
.decode
;
5342 init_emulate_ctxt(vcpu
);
5344 ret
= emulator_task_switch(&vcpu
->arch
.emulate_ctxt
,
5345 tss_selector
, reason
, has_error_code
,
5349 return EMULATE_FAIL
;
5351 memcpy(vcpu
->arch
.regs
, c
->regs
, sizeof c
->regs
);
5352 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.eip
);
5353 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
5354 return EMULATE_DONE
;
5356 EXPORT_SYMBOL_GPL(kvm_task_switch
);
5358 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
5359 struct kvm_sregs
*sregs
)
5361 int mmu_reset_needed
= 0;
5362 int pending_vec
, max_bits
;
5365 dt
.size
= sregs
->idt
.limit
;
5366 dt
.address
= sregs
->idt
.base
;
5367 kvm_x86_ops
->set_idt(vcpu
, &dt
);
5368 dt
.size
= sregs
->gdt
.limit
;
5369 dt
.address
= sregs
->gdt
.base
;
5370 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
5372 vcpu
->arch
.cr2
= sregs
->cr2
;
5373 mmu_reset_needed
|= vcpu
->arch
.cr3
!= sregs
->cr3
;
5374 vcpu
->arch
.cr3
= sregs
->cr3
;
5376 kvm_set_cr8(vcpu
, sregs
->cr8
);
5378 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
5379 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
5380 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
5382 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
5383 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
5384 vcpu
->arch
.cr0
= sregs
->cr0
;
5386 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
5387 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
5388 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
5389 load_pdptrs(vcpu
, vcpu
->arch
.cr3
);
5390 mmu_reset_needed
= 1;
5393 if (mmu_reset_needed
)
5394 kvm_mmu_reset_context(vcpu
);
5396 max_bits
= (sizeof sregs
->interrupt_bitmap
) << 3;
5397 pending_vec
= find_first_bit(
5398 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
5399 if (pending_vec
< max_bits
) {
5400 kvm_queue_interrupt(vcpu
, pending_vec
, false);
5401 pr_debug("Set back pending irq %d\n", pending_vec
);
5402 if (irqchip_in_kernel(vcpu
->kvm
))
5403 kvm_pic_clear_isr_ack(vcpu
->kvm
);
5406 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
5407 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
5408 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
5409 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
5410 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
5411 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
5413 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
5414 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
5416 update_cr8_intercept(vcpu
);
5418 /* Older userspace won't unhalt the vcpu on reset. */
5419 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
5420 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
5422 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5427 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
5428 struct kvm_guest_debug
*dbg
)
5430 unsigned long rflags
;
5433 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
5435 if (vcpu
->arch
.exception
.pending
)
5437 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
5438 kvm_queue_exception(vcpu
, DB_VECTOR
);
5440 kvm_queue_exception(vcpu
, BP_VECTOR
);
5444 * Read rflags as long as potentially injected trace flags are still
5447 rflags
= kvm_get_rflags(vcpu
);
5449 vcpu
->guest_debug
= dbg
->control
;
5450 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
5451 vcpu
->guest_debug
= 0;
5453 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
5454 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
5455 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
5456 vcpu
->arch
.switch_db_regs
=
5457 (dbg
->arch
.debugreg
[7] & DR7_BP_EN_MASK
);
5459 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
5460 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
5461 vcpu
->arch
.switch_db_regs
= (vcpu
->arch
.dr7
& DR7_BP_EN_MASK
);
5464 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
5465 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
5466 get_segment_base(vcpu
, VCPU_SREG_CS
);
5469 * Trigger an rflags update that will inject or remove the trace
5472 kvm_set_rflags(vcpu
, rflags
);
5474 kvm_x86_ops
->set_guest_debug(vcpu
, dbg
);
5484 * Translate a guest virtual address to a guest physical address.
5486 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
5487 struct kvm_translation
*tr
)
5489 unsigned long vaddr
= tr
->linear_address
;
5493 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5494 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
5495 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5496 tr
->physical_address
= gpa
;
5497 tr
->valid
= gpa
!= UNMAPPED_GVA
;
5504 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5506 struct i387_fxsave_struct
*fxsave
=
5507 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
5509 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
5510 fpu
->fcw
= fxsave
->cwd
;
5511 fpu
->fsw
= fxsave
->swd
;
5512 fpu
->ftwx
= fxsave
->twd
;
5513 fpu
->last_opcode
= fxsave
->fop
;
5514 fpu
->last_ip
= fxsave
->rip
;
5515 fpu
->last_dp
= fxsave
->rdp
;
5516 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
5521 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
5523 struct i387_fxsave_struct
*fxsave
=
5524 &vcpu
->arch
.guest_fpu
.state
->fxsave
;
5526 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
5527 fxsave
->cwd
= fpu
->fcw
;
5528 fxsave
->swd
= fpu
->fsw
;
5529 fxsave
->twd
= fpu
->ftwx
;
5530 fxsave
->fop
= fpu
->last_opcode
;
5531 fxsave
->rip
= fpu
->last_ip
;
5532 fxsave
->rdp
= fpu
->last_dp
;
5533 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
5538 int fx_init(struct kvm_vcpu
*vcpu
)
5542 err
= fpu_alloc(&vcpu
->arch
.guest_fpu
);
5546 fpu_finit(&vcpu
->arch
.guest_fpu
);
5549 * Ensure guest xcr0 is valid for loading
5551 vcpu
->arch
.xcr0
= XSTATE_FP
;
5553 vcpu
->arch
.cr0
|= X86_CR0_ET
;
5557 EXPORT_SYMBOL_GPL(fx_init
);
5559 static void fx_free(struct kvm_vcpu
*vcpu
)
5561 fpu_free(&vcpu
->arch
.guest_fpu
);
5564 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
5566 if (vcpu
->guest_fpu_loaded
)
5570 * Restore all possible states in the guest,
5571 * and assume host would use all available bits.
5572 * Guest xcr0 would be loaded later.
5574 kvm_put_guest_xcr0(vcpu
);
5575 vcpu
->guest_fpu_loaded
= 1;
5576 unlazy_fpu(current
);
5577 fpu_restore_checking(&vcpu
->arch
.guest_fpu
);
5581 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
5583 kvm_put_guest_xcr0(vcpu
);
5585 if (!vcpu
->guest_fpu_loaded
)
5588 vcpu
->guest_fpu_loaded
= 0;
5589 fpu_save_init(&vcpu
->arch
.guest_fpu
);
5590 ++vcpu
->stat
.fpu_reload
;
5591 kvm_make_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
);
5595 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
5597 if (vcpu
->arch
.time_page
) {
5598 kvm_release_page_dirty(vcpu
->arch
.time_page
);
5599 vcpu
->arch
.time_page
= NULL
;
5602 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
5604 kvm_x86_ops
->vcpu_free(vcpu
);
5607 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
5610 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
5611 printk_once(KERN_WARNING
5612 "kvm: SMP vm created on host with unstable TSC; "
5613 "guest TSC will not be reliable\n");
5614 return kvm_x86_ops
->vcpu_create(kvm
, id
);
5617 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
5621 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
5623 r
= kvm_arch_vcpu_reset(vcpu
);
5625 r
= kvm_mmu_setup(vcpu
);
5632 kvm_x86_ops
->vcpu_free(vcpu
);
5636 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
5639 kvm_mmu_unload(vcpu
);
5643 kvm_x86_ops
->vcpu_free(vcpu
);
5646 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
5648 vcpu
->arch
.nmi_pending
= false;
5649 vcpu
->arch
.nmi_injected
= false;
5651 vcpu
->arch
.switch_db_regs
= 0;
5652 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
5653 vcpu
->arch
.dr6
= DR6_FIXED_1
;
5654 vcpu
->arch
.dr7
= DR7_FIXED_1
;
5656 return kvm_x86_ops
->vcpu_reset(vcpu
);
5659 int kvm_arch_hardware_enable(void *garbage
)
5662 struct kvm_vcpu
*vcpu
;
5665 kvm_shared_msr_cpu_online();
5666 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5667 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5668 if (vcpu
->cpu
== smp_processor_id())
5669 kvm_request_guest_time_update(vcpu
);
5670 return kvm_x86_ops
->hardware_enable(garbage
);
5673 void kvm_arch_hardware_disable(void *garbage
)
5675 kvm_x86_ops
->hardware_disable(garbage
);
5676 drop_user_return_notifiers(garbage
);
5679 int kvm_arch_hardware_setup(void)
5681 return kvm_x86_ops
->hardware_setup();
5684 void kvm_arch_hardware_unsetup(void)
5686 kvm_x86_ops
->hardware_unsetup();
5689 void kvm_arch_check_processor_compat(void *rtn
)
5691 kvm_x86_ops
->check_processor_compatibility(rtn
);
5694 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
5700 BUG_ON(vcpu
->kvm
== NULL
);
5703 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
5704 vcpu
->arch
.walk_mmu
= &vcpu
->arch
.mmu
;
5705 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
5706 vcpu
->arch
.mmu
.translate_gpa
= translate_gpa
;
5707 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
5708 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
5710 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
5712 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
5717 vcpu
->arch
.pio_data
= page_address(page
);
5719 r
= kvm_mmu_create(vcpu
);
5721 goto fail_free_pio_data
;
5723 if (irqchip_in_kernel(kvm
)) {
5724 r
= kvm_create_lapic(vcpu
);
5726 goto fail_mmu_destroy
;
5729 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
5731 if (!vcpu
->arch
.mce_banks
) {
5733 goto fail_free_lapic
;
5735 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
5737 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
))
5738 goto fail_free_mce_banks
;
5741 fail_free_mce_banks
:
5742 kfree(vcpu
->arch
.mce_banks
);
5744 kvm_free_lapic(vcpu
);
5746 kvm_mmu_destroy(vcpu
);
5748 free_page((unsigned long)vcpu
->arch
.pio_data
);
5753 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
5757 kfree(vcpu
->arch
.mce_banks
);
5758 kvm_free_lapic(vcpu
);
5759 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5760 kvm_mmu_destroy(vcpu
);
5761 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5762 free_page((unsigned long)vcpu
->arch
.pio_data
);
5765 struct kvm
*kvm_arch_create_vm(void)
5767 struct kvm
*kvm
= kzalloc(sizeof(struct kvm
), GFP_KERNEL
);
5770 return ERR_PTR(-ENOMEM
);
5772 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
5773 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
5775 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5776 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
5778 spin_lock_init(&kvm
->arch
.tsc_write_lock
);
5783 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
5786 kvm_mmu_unload(vcpu
);
5790 static void kvm_free_vcpus(struct kvm
*kvm
)
5793 struct kvm_vcpu
*vcpu
;
5796 * Unpin any mmu pages first.
5798 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5799 kvm_unload_vcpu_mmu(vcpu
);
5800 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5801 kvm_arch_vcpu_free(vcpu
);
5803 mutex_lock(&kvm
->lock
);
5804 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
5805 kvm
->vcpus
[i
] = NULL
;
5807 atomic_set(&kvm
->online_vcpus
, 0);
5808 mutex_unlock(&kvm
->lock
);
5811 void kvm_arch_sync_events(struct kvm
*kvm
)
5813 kvm_free_all_assigned_devices(kvm
);
5817 void kvm_arch_destroy_vm(struct kvm
*kvm
)
5819 kvm_iommu_unmap_guest(kvm
);
5820 kfree(kvm
->arch
.vpic
);
5821 kfree(kvm
->arch
.vioapic
);
5822 kvm_free_vcpus(kvm
);
5823 kvm_free_physmem(kvm
);
5824 if (kvm
->arch
.apic_access_page
)
5825 put_page(kvm
->arch
.apic_access_page
);
5826 if (kvm
->arch
.ept_identity_pagetable
)
5827 put_page(kvm
->arch
.ept_identity_pagetable
);
5828 cleanup_srcu_struct(&kvm
->srcu
);
5832 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
5833 struct kvm_memory_slot
*memslot
,
5834 struct kvm_memory_slot old
,
5835 struct kvm_userspace_memory_region
*mem
,
5838 int npages
= memslot
->npages
;
5839 int map_flags
= MAP_PRIVATE
| MAP_ANONYMOUS
;
5841 /* Prevent internal slot pages from being moved by fork()/COW. */
5842 if (memslot
->id
>= KVM_MEMORY_SLOTS
)
5843 map_flags
= MAP_SHARED
| MAP_ANONYMOUS
;
5845 /*To keep backward compatibility with older userspace,
5846 *x86 needs to hanlde !user_alloc case.
5849 if (npages
&& !old
.rmap
) {
5850 unsigned long userspace_addr
;
5852 down_write(¤t
->mm
->mmap_sem
);
5853 userspace_addr
= do_mmap(NULL
, 0,
5855 PROT_READ
| PROT_WRITE
,
5858 up_write(¤t
->mm
->mmap_sem
);
5860 if (IS_ERR((void *)userspace_addr
))
5861 return PTR_ERR((void *)userspace_addr
);
5863 memslot
->userspace_addr
= userspace_addr
;
5871 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
5872 struct kvm_userspace_memory_region
*mem
,
5873 struct kvm_memory_slot old
,
5877 int npages
= mem
->memory_size
>> PAGE_SHIFT
;
5879 if (!user_alloc
&& !old
.user_alloc
&& old
.rmap
&& !npages
) {
5882 down_write(¤t
->mm
->mmap_sem
);
5883 ret
= do_munmap(current
->mm
, old
.userspace_addr
,
5884 old
.npages
* PAGE_SIZE
);
5885 up_write(¤t
->mm
->mmap_sem
);
5888 "kvm_vm_ioctl_set_memory_region: "
5889 "failed to munmap memory\n");
5892 spin_lock(&kvm
->mmu_lock
);
5893 if (!kvm
->arch
.n_requested_mmu_pages
) {
5894 unsigned int nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
5895 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
5898 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
5899 spin_unlock(&kvm
->mmu_lock
);
5902 void kvm_arch_flush_shadow(struct kvm
*kvm
)
5904 kvm_mmu_zap_all(kvm
);
5905 kvm_reload_remote_mmus(kvm
);
5908 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
5910 return vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
5911 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
5912 || vcpu
->arch
.nmi_pending
||
5913 (kvm_arch_interrupt_allowed(vcpu
) &&
5914 kvm_cpu_has_interrupt(vcpu
));
5917 void kvm_vcpu_kick(struct kvm_vcpu
*vcpu
)
5920 int cpu
= vcpu
->cpu
;
5922 if (waitqueue_active(&vcpu
->wq
)) {
5923 wake_up_interruptible(&vcpu
->wq
);
5924 ++vcpu
->stat
.halt_wakeup
;
5928 if (cpu
!= me
&& (unsigned)cpu
< nr_cpu_ids
&& cpu_online(cpu
))
5929 if (atomic_xchg(&vcpu
->guest_mode
, 0))
5930 smp_send_reschedule(cpu
);
5934 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
5936 return kvm_x86_ops
->interrupt_allowed(vcpu
);
5939 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
5941 unsigned long current_rip
= kvm_rip_read(vcpu
) +
5942 get_segment_base(vcpu
, VCPU_SREG_CS
);
5944 return current_rip
== linear_rip
;
5946 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
5948 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
5950 unsigned long rflags
;
5952 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5953 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
5954 rflags
&= ~X86_EFLAGS_TF
;
5957 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
5959 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
5961 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
5962 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
5963 rflags
|= X86_EFLAGS_TF
;
5964 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
5966 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
5968 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
5969 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
5970 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
5971 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
5972 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
5973 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
5974 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
5975 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
5976 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
5977 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
5978 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
5979 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);