2 * Driver for the Atmel USBA high speed USB device controller
4 * Copyright (C) 2005-2007 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/clk.h>
11 #include <linux/module.h>
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
15 #include <linux/device.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/list.h>
18 #include <linux/platform_device.h>
19 #include <linux/usb/ch9.h>
20 #include <linux/usb/gadget.h>
21 #include <linux/delay.h>
24 #include <asm/arch/board.h>
26 #include "atmel_usba_udc.h"
29 static struct usba_udc the_udc
;
31 #ifdef CONFIG_USB_GADGET_DEBUG_FS
32 #include <linux/debugfs.h>
33 #include <linux/uaccess.h>
35 static int queue_dbg_open(struct inode
*inode
, struct file
*file
)
37 struct usba_ep
*ep
= inode
->i_private
;
38 struct usba_request
*req
, *req_copy
;
39 struct list_head
*queue_data
;
41 queue_data
= kmalloc(sizeof(*queue_data
), GFP_KERNEL
);
44 INIT_LIST_HEAD(queue_data
);
46 spin_lock_irq(&ep
->udc
->lock
);
47 list_for_each_entry(req
, &ep
->queue
, queue
) {
48 req_copy
= kmalloc(sizeof(*req_copy
), GFP_ATOMIC
);
51 memcpy(req_copy
, req
, sizeof(*req_copy
));
52 list_add_tail(&req_copy
->queue
, queue_data
);
54 spin_unlock_irq(&ep
->udc
->lock
);
56 file
->private_data
= queue_data
;
60 spin_unlock_irq(&ep
->udc
->lock
);
61 list_for_each_entry_safe(req
, req_copy
, queue_data
, queue
) {
62 list_del(&req
->queue
);
70 * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
74 * I/i: interrupt/no interrupt
76 * S/s: short ok/short not ok
79 * F/f: submitted/not submitted to FIFO
80 * D/d: using/not using DMA
81 * L/l: last transaction/not last transaction
83 static ssize_t
queue_dbg_read(struct file
*file
, char __user
*buf
,
84 size_t nbytes
, loff_t
*ppos
)
86 struct list_head
*queue
= file
->private_data
;
87 struct usba_request
*req
, *tmp_req
;
88 size_t len
, remaining
, actual
= 0;
91 if (!access_ok(VERIFY_WRITE
, buf
, nbytes
))
94 mutex_lock(&file
->f_dentry
->d_inode
->i_mutex
);
95 list_for_each_entry_safe(req
, tmp_req
, queue
, queue
) {
96 len
= snprintf(tmpbuf
, sizeof(tmpbuf
),
97 "%8p %08x %c%c%c %5d %c%c%c\n",
98 req
->req
.buf
, req
->req
.length
,
99 req
->req
.no_interrupt
? 'i' : 'I',
100 req
->req
.zero
? 'Z' : 'z',
101 req
->req
.short_not_ok
? 's' : 'S',
103 req
->submitted
? 'F' : 'f',
104 req
->using_dma
? 'D' : 'd',
105 req
->last_transaction
? 'L' : 'l');
106 len
= min(len
, sizeof(tmpbuf
));
110 list_del(&req
->queue
);
113 remaining
= __copy_to_user(buf
, tmpbuf
, len
);
114 actual
+= len
- remaining
;
121 mutex_unlock(&file
->f_dentry
->d_inode
->i_mutex
);
126 static int queue_dbg_release(struct inode
*inode
, struct file
*file
)
128 struct list_head
*queue_data
= file
->private_data
;
129 struct usba_request
*req
, *tmp_req
;
131 list_for_each_entry_safe(req
, tmp_req
, queue_data
, queue
) {
132 list_del(&req
->queue
);
139 static int regs_dbg_open(struct inode
*inode
, struct file
*file
)
141 struct usba_udc
*udc
;
146 mutex_lock(&inode
->i_mutex
);
147 udc
= inode
->i_private
;
148 data
= kmalloc(inode
->i_size
, GFP_KERNEL
);
152 spin_lock_irq(&udc
->lock
);
153 for (i
= 0; i
< inode
->i_size
/ 4; i
++)
154 data
[i
] = __raw_readl(udc
->regs
+ i
* 4);
155 spin_unlock_irq(&udc
->lock
);
157 file
->private_data
= data
;
161 mutex_unlock(&inode
->i_mutex
);
166 static ssize_t
regs_dbg_read(struct file
*file
, char __user
*buf
,
167 size_t nbytes
, loff_t
*ppos
)
169 struct inode
*inode
= file
->f_dentry
->d_inode
;
172 mutex_lock(&inode
->i_mutex
);
173 ret
= simple_read_from_buffer(buf
, nbytes
, ppos
,
175 file
->f_dentry
->d_inode
->i_size
);
176 mutex_unlock(&inode
->i_mutex
);
181 static int regs_dbg_release(struct inode
*inode
, struct file
*file
)
183 kfree(file
->private_data
);
187 const struct file_operations queue_dbg_fops
= {
188 .owner
= THIS_MODULE
,
189 .open
= queue_dbg_open
,
191 .read
= queue_dbg_read
,
192 .release
= queue_dbg_release
,
195 const struct file_operations regs_dbg_fops
= {
196 .owner
= THIS_MODULE
,
197 .open
= regs_dbg_open
,
198 .llseek
= generic_file_llseek
,
199 .read
= regs_dbg_read
,
200 .release
= regs_dbg_release
,
203 static void usba_ep_init_debugfs(struct usba_udc
*udc
,
206 struct dentry
*ep_root
;
208 ep_root
= debugfs_create_dir(ep
->ep
.name
, udc
->debugfs_root
);
211 ep
->debugfs_dir
= ep_root
;
213 ep
->debugfs_queue
= debugfs_create_file("queue", 0400, ep_root
,
214 ep
, &queue_dbg_fops
);
215 if (!ep
->debugfs_queue
)
219 ep
->debugfs_dma_status
220 = debugfs_create_u32("dma_status", 0400, ep_root
,
221 &ep
->last_dma_status
);
222 if (!ep
->debugfs_dma_status
)
225 if (ep_is_control(ep
)) {
227 = debugfs_create_u32("state", 0400, ep_root
,
229 if (!ep
->debugfs_state
)
237 debugfs_remove(ep
->debugfs_dma_status
);
239 debugfs_remove(ep
->debugfs_queue
);
241 debugfs_remove(ep_root
);
243 dev_err(&ep
->udc
->pdev
->dev
,
244 "failed to create debugfs directory for %s\n", ep
->ep
.name
);
247 static void usba_ep_cleanup_debugfs(struct usba_ep
*ep
)
249 debugfs_remove(ep
->debugfs_queue
);
250 debugfs_remove(ep
->debugfs_dma_status
);
251 debugfs_remove(ep
->debugfs_state
);
252 debugfs_remove(ep
->debugfs_dir
);
253 ep
->debugfs_dma_status
= NULL
;
254 ep
->debugfs_dir
= NULL
;
257 static void usba_init_debugfs(struct usba_udc
*udc
)
259 struct dentry
*root
, *regs
;
260 struct resource
*regs_resource
;
262 root
= debugfs_create_dir(udc
->gadget
.name
, NULL
);
263 if (IS_ERR(root
) || !root
)
265 udc
->debugfs_root
= root
;
267 regs
= debugfs_create_file("regs", 0400, root
, udc
, ®s_dbg_fops
);
271 regs_resource
= platform_get_resource(udc
->pdev
, IORESOURCE_MEM
,
273 regs
->d_inode
->i_size
= regs_resource
->end
- regs_resource
->start
+ 1;
274 udc
->debugfs_regs
= regs
;
276 usba_ep_init_debugfs(udc
, to_usba_ep(udc
->gadget
.ep0
));
281 debugfs_remove(root
);
283 udc
->debugfs_root
= NULL
;
284 dev_err(&udc
->pdev
->dev
, "debugfs is not available\n");
287 static void usba_cleanup_debugfs(struct usba_udc
*udc
)
289 usba_ep_cleanup_debugfs(to_usba_ep(udc
->gadget
.ep0
));
290 debugfs_remove(udc
->debugfs_regs
);
291 debugfs_remove(udc
->debugfs_root
);
292 udc
->debugfs_regs
= NULL
;
293 udc
->debugfs_root
= NULL
;
296 static inline void usba_ep_init_debugfs(struct usba_udc
*udc
,
302 static inline void usba_ep_cleanup_debugfs(struct usba_ep
*ep
)
307 static inline void usba_init_debugfs(struct usba_udc
*udc
)
312 static inline void usba_cleanup_debugfs(struct usba_udc
*udc
)
318 static int vbus_is_present(struct usba_udc
*udc
)
320 if (udc
->vbus_pin
!= -1)
321 return gpio_get_value(udc
->vbus_pin
);
323 /* No Vbus detection: Assume always present */
327 static void copy_to_fifo(void __iomem
*fifo
, const void *buf
, int len
)
331 DBG(DBG_FIFO
, "copy to FIFO (len %d):\n", len
);
332 for (; len
> 0; len
-= 4, buf
+= 4, fifo
+= 4) {
333 tmp
= *(unsigned long *)buf
;
335 DBG(DBG_FIFO
, " -> %08lx\n", tmp
);
336 __raw_writel(tmp
, fifo
);
339 DBG(DBG_FIFO
, " -> %02lx\n", tmp
>> 24);
340 __raw_writeb(tmp
>> 24, fifo
);
349 static void copy_from_fifo(void *buf
, void __iomem
*fifo
, int len
)
357 DBG(DBG_FIFO
, "copy from FIFO (len %d):\n", len
);
358 for (p
.w
= buf
; len
> 0; len
-= 4, p
.w
++, fifo
+= 4) {
360 tmp
= __raw_readl(fifo
);
362 DBG(DBG_FIFO
, " -> %08lx\n", tmp
);
365 tmp
= __raw_readb(fifo
);
367 DBG(DBG_FIFO
, " -> %02lx\n", tmp
);
374 static void next_fifo_transaction(struct usba_ep
*ep
, struct usba_request
*req
)
376 unsigned int transaction_len
;
378 transaction_len
= req
->req
.length
- req
->req
.actual
;
379 req
->last_transaction
= 1;
380 if (transaction_len
> ep
->ep
.maxpacket
) {
381 transaction_len
= ep
->ep
.maxpacket
;
382 req
->last_transaction
= 0;
383 } else if (transaction_len
== ep
->ep
.maxpacket
&& req
->req
.zero
)
384 req
->last_transaction
= 0;
386 DBG(DBG_QUEUE
, "%s: submit_transaction, req %p (length %d)%s\n",
387 ep
->ep
.name
, req
, transaction_len
,
388 req
->last_transaction
? ", done" : "");
390 copy_to_fifo(ep
->fifo
, req
->req
.buf
+ req
->req
.actual
, transaction_len
);
391 usba_ep_writel(ep
, SET_STA
, USBA_TX_PK_RDY
);
392 req
->req
.actual
+= transaction_len
;
395 static void submit_request(struct usba_ep
*ep
, struct usba_request
*req
)
397 DBG(DBG_QUEUE
, "%s: submit_request: req %p (length %d)\n",
398 ep
->ep
.name
, req
, req
->req
.length
);
403 if (req
->using_dma
) {
404 if (req
->req
.length
== 0) {
405 usba_ep_writel(ep
, CTL_ENB
, USBA_TX_PK_RDY
);
410 usba_ep_writel(ep
, CTL_ENB
, USBA_SHORT_PACKET
);
412 usba_ep_writel(ep
, CTL_DIS
, USBA_SHORT_PACKET
);
414 usba_dma_writel(ep
, ADDRESS
, req
->req
.dma
);
415 usba_dma_writel(ep
, CONTROL
, req
->ctrl
);
417 next_fifo_transaction(ep
, req
);
418 if (req
->last_transaction
) {
419 usba_ep_writel(ep
, CTL_DIS
, USBA_TX_PK_RDY
);
420 usba_ep_writel(ep
, CTL_ENB
, USBA_TX_COMPLETE
);
422 usba_ep_writel(ep
, CTL_DIS
, USBA_TX_COMPLETE
);
423 usba_ep_writel(ep
, CTL_ENB
, USBA_TX_PK_RDY
);
428 static void submit_next_request(struct usba_ep
*ep
)
430 struct usba_request
*req
;
432 if (list_empty(&ep
->queue
)) {
433 usba_ep_writel(ep
, CTL_DIS
, USBA_TX_PK_RDY
| USBA_RX_BK_RDY
);
437 req
= list_entry(ep
->queue
.next
, struct usba_request
, queue
);
439 submit_request(ep
, req
);
442 static void send_status(struct usba_udc
*udc
, struct usba_ep
*ep
)
444 ep
->state
= STATUS_STAGE_IN
;
445 usba_ep_writel(ep
, SET_STA
, USBA_TX_PK_RDY
);
446 usba_ep_writel(ep
, CTL_ENB
, USBA_TX_COMPLETE
);
449 static void receive_data(struct usba_ep
*ep
)
451 struct usba_udc
*udc
= ep
->udc
;
452 struct usba_request
*req
;
453 unsigned long status
;
454 unsigned int bytecount
, nr_busy
;
457 status
= usba_ep_readl(ep
, STA
);
458 nr_busy
= USBA_BFEXT(BUSY_BANKS
, status
);
460 DBG(DBG_QUEUE
, "receive data: nr_busy=%u\n", nr_busy
);
462 while (nr_busy
> 0) {
463 if (list_empty(&ep
->queue
)) {
464 usba_ep_writel(ep
, CTL_DIS
, USBA_RX_BK_RDY
);
467 req
= list_entry(ep
->queue
.next
,
468 struct usba_request
, queue
);
470 bytecount
= USBA_BFEXT(BYTE_COUNT
, status
);
472 if (status
& (1 << 31))
474 if (req
->req
.actual
+ bytecount
>= req
->req
.length
) {
476 bytecount
= req
->req
.length
- req
->req
.actual
;
479 copy_from_fifo(req
->req
.buf
+ req
->req
.actual
,
480 ep
->fifo
, bytecount
);
481 req
->req
.actual
+= bytecount
;
483 usba_ep_writel(ep
, CLR_STA
, USBA_RX_BK_RDY
);
486 DBG(DBG_QUEUE
, "%s: request done\n", ep
->ep
.name
);
488 list_del_init(&req
->queue
);
489 usba_ep_writel(ep
, CTL_DIS
, USBA_RX_BK_RDY
);
490 spin_unlock(&udc
->lock
);
491 req
->req
.complete(&ep
->ep
, &req
->req
);
492 spin_lock(&udc
->lock
);
495 status
= usba_ep_readl(ep
, STA
);
496 nr_busy
= USBA_BFEXT(BUSY_BANKS
, status
);
498 if (is_complete
&& ep_is_control(ep
)) {
499 send_status(udc
, ep
);
506 request_complete(struct usba_ep
*ep
, struct usba_request
*req
, int status
)
508 struct usba_udc
*udc
= ep
->udc
;
510 WARN_ON(!list_empty(&req
->queue
));
512 if (req
->req
.status
== -EINPROGRESS
)
513 req
->req
.status
= status
;
517 &udc
->pdev
->dev
, req
->req
.dma
, req
->req
.length
,
518 ep
->is_in
? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
519 req
->req
.dma
= DMA_ADDR_INVALID
;
523 DBG(DBG_GADGET
| DBG_REQ
,
524 "%s: req %p complete: status %d, actual %u\n",
525 ep
->ep
.name
, req
, req
->req
.status
, req
->req
.actual
);
527 spin_unlock(&udc
->lock
);
528 req
->req
.complete(&ep
->ep
, &req
->req
);
529 spin_lock(&udc
->lock
);
533 request_complete_list(struct usba_ep
*ep
, struct list_head
*list
, int status
)
535 struct usba_request
*req
, *tmp_req
;
537 list_for_each_entry_safe(req
, tmp_req
, list
, queue
) {
538 list_del_init(&req
->queue
);
539 request_complete(ep
, req
, status
);
544 usba_ep_enable(struct usb_ep
*_ep
, const struct usb_endpoint_descriptor
*desc
)
546 struct usba_ep
*ep
= to_usba_ep(_ep
);
547 struct usba_udc
*udc
= ep
->udc
;
548 unsigned long flags
, ept_cfg
, maxpacket
;
549 unsigned int nr_trans
;
551 DBG(DBG_GADGET
, "%s: ep_enable: desc=%p\n", ep
->ep
.name
, desc
);
553 maxpacket
= le16_to_cpu(desc
->wMaxPacketSize
) & 0x7ff;
555 if (((desc
->bEndpointAddress
& USB_ENDPOINT_NUMBER_MASK
) != ep
->index
)
557 || desc
->bDescriptorType
!= USB_DT_ENDPOINT
559 || maxpacket
> ep
->fifo_size
) {
560 DBG(DBG_ERR
, "ep_enable: Invalid argument");
568 ept_cfg
= USBA_BF(EPT_SIZE
, USBA_EPT_SIZE_8
);
570 /* LSB is bit 1, not 0 */
571 ept_cfg
= USBA_BF(EPT_SIZE
, fls(maxpacket
- 1) - 3);
573 DBG(DBG_HW
, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n",
574 ep
->ep
.name
, ept_cfg
, maxpacket
);
576 if ((desc
->bEndpointAddress
& USB_ENDPOINT_DIR_MASK
) == USB_DIR_IN
) {
578 ept_cfg
|= USBA_EPT_DIR_IN
;
581 switch (desc
->bmAttributes
& USB_ENDPOINT_XFERTYPE_MASK
) {
582 case USB_ENDPOINT_XFER_CONTROL
:
583 ept_cfg
|= USBA_BF(EPT_TYPE
, USBA_EPT_TYPE_CONTROL
);
584 ept_cfg
|= USBA_BF(BK_NUMBER
, USBA_BK_NUMBER_ONE
);
586 case USB_ENDPOINT_XFER_ISOC
:
588 DBG(DBG_ERR
, "ep_enable: %s is not isoc capable\n",
594 * Bits 11:12 specify number of _additional_
595 * transactions per microframe.
597 nr_trans
= ((le16_to_cpu(desc
->wMaxPacketSize
) >> 11) & 3) + 1;
602 ept_cfg
|= USBA_BF(EPT_TYPE
, USBA_EPT_TYPE_ISO
);
605 * Do triple-buffering on high-bandwidth iso endpoints.
607 if (nr_trans
> 1 && ep
->nr_banks
== 3)
608 ept_cfg
|= USBA_BF(BK_NUMBER
, USBA_BK_NUMBER_TRIPLE
);
610 ept_cfg
|= USBA_BF(BK_NUMBER
, USBA_BK_NUMBER_DOUBLE
);
611 ept_cfg
|= USBA_BF(NB_TRANS
, nr_trans
);
613 case USB_ENDPOINT_XFER_BULK
:
614 ept_cfg
|= USBA_BF(EPT_TYPE
, USBA_EPT_TYPE_BULK
);
615 ept_cfg
|= USBA_BF(BK_NUMBER
, USBA_BK_NUMBER_DOUBLE
);
617 case USB_ENDPOINT_XFER_INT
:
618 ept_cfg
|= USBA_BF(EPT_TYPE
, USBA_EPT_TYPE_INT
);
619 ept_cfg
|= USBA_BF(BK_NUMBER
, USBA_BK_NUMBER_DOUBLE
);
623 spin_lock_irqsave(&ep
->udc
->lock
, flags
);
626 spin_unlock_irqrestore(&ep
->udc
->lock
, flags
);
627 DBG(DBG_ERR
, "ep%d already enabled\n", ep
->index
);
632 ep
->ep
.maxpacket
= maxpacket
;
634 usba_ep_writel(ep
, CFG
, ept_cfg
);
635 usba_ep_writel(ep
, CTL_ENB
, USBA_EPT_ENABLE
);
640 usba_writel(udc
, INT_ENB
,
641 (usba_readl(udc
, INT_ENB
)
642 | USBA_BF(EPT_INT
, 1 << ep
->index
)
643 | USBA_BF(DMA_INT
, 1 << ep
->index
)));
644 ctrl
= USBA_AUTO_VALID
| USBA_INTDIS_DMA
;
645 usba_ep_writel(ep
, CTL_ENB
, ctrl
);
647 usba_writel(udc
, INT_ENB
,
648 (usba_readl(udc
, INT_ENB
)
649 | USBA_BF(EPT_INT
, 1 << ep
->index
)));
652 spin_unlock_irqrestore(&udc
->lock
, flags
);
654 DBG(DBG_HW
, "EPT_CFG%d after init: %#08lx\n", ep
->index
,
655 (unsigned long)usba_ep_readl(ep
, CFG
));
656 DBG(DBG_HW
, "INT_ENB after init: %#08lx\n",
657 (unsigned long)usba_readl(udc
, INT_ENB
));
662 static int usba_ep_disable(struct usb_ep
*_ep
)
664 struct usba_ep
*ep
= to_usba_ep(_ep
);
665 struct usba_udc
*udc
= ep
->udc
;
669 DBG(DBG_GADGET
, "ep_disable: %s\n", ep
->ep
.name
);
671 spin_lock_irqsave(&udc
->lock
, flags
);
674 spin_unlock_irqrestore(&udc
->lock
, flags
);
675 DBG(DBG_ERR
, "ep_disable: %s not enabled\n", ep
->ep
.name
);
680 list_splice_init(&ep
->queue
, &req_list
);
682 usba_dma_writel(ep
, CONTROL
, 0);
683 usba_dma_writel(ep
, ADDRESS
, 0);
684 usba_dma_readl(ep
, STATUS
);
686 usba_ep_writel(ep
, CTL_DIS
, USBA_EPT_ENABLE
);
687 usba_writel(udc
, INT_ENB
,
688 usba_readl(udc
, INT_ENB
)
689 & ~USBA_BF(EPT_INT
, 1 << ep
->index
));
691 request_complete_list(ep
, &req_list
, -ESHUTDOWN
);
693 spin_unlock_irqrestore(&udc
->lock
, flags
);
698 static struct usb_request
*
699 usba_ep_alloc_request(struct usb_ep
*_ep
, gfp_t gfp_flags
)
701 struct usba_request
*req
;
703 DBG(DBG_GADGET
, "ep_alloc_request: %p, 0x%x\n", _ep
, gfp_flags
);
705 req
= kzalloc(sizeof(*req
), gfp_flags
);
709 INIT_LIST_HEAD(&req
->queue
);
710 req
->req
.dma
= DMA_ADDR_INVALID
;
716 usba_ep_free_request(struct usb_ep
*_ep
, struct usb_request
*_req
)
718 struct usba_request
*req
= to_usba_req(_req
);
720 DBG(DBG_GADGET
, "ep_free_request: %p, %p\n", _ep
, _req
);
725 static int queue_dma(struct usba_udc
*udc
, struct usba_ep
*ep
,
726 struct usba_request
*req
, gfp_t gfp_flags
)
731 DBG(DBG_DMA
, "%s: req l/%u d/%08x %c%c%c\n",
732 ep
->ep
.name
, req
->req
.length
, req
->req
.dma
,
733 req
->req
.zero
? 'Z' : 'z',
734 req
->req
.short_not_ok
? 'S' : 's',
735 req
->req
.no_interrupt
? 'I' : 'i');
737 if (req
->req
.length
> 0x10000) {
738 /* Lengths from 0 to 65536 (inclusive) are supported */
739 DBG(DBG_ERR
, "invalid request length %u\n", req
->req
.length
);
745 if (req
->req
.dma
== DMA_ADDR_INVALID
) {
746 req
->req
.dma
= dma_map_single(
747 &udc
->pdev
->dev
, req
->req
.buf
, req
->req
.length
,
748 ep
->is_in
? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
751 dma_sync_single_for_device(
752 &udc
->pdev
->dev
, req
->req
.dma
, req
->req
.length
,
753 ep
->is_in
? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
757 req
->ctrl
= USBA_BF(DMA_BUF_LEN
, req
->req
.length
)
758 | USBA_DMA_CH_EN
| USBA_DMA_END_BUF_IE
759 | USBA_DMA_END_TR_EN
| USBA_DMA_END_TR_IE
;
762 req
->ctrl
|= USBA_DMA_END_BUF_EN
;
765 * Add this request to the queue and submit for DMA if
766 * possible. Check if we're still alive first -- we may have
767 * received a reset since last time we checked.
770 spin_lock_irqsave(&udc
->lock
, flags
);
772 if (list_empty(&ep
->queue
))
773 submit_request(ep
, req
);
775 list_add_tail(&req
->queue
, &ep
->queue
);
778 spin_unlock_irqrestore(&udc
->lock
, flags
);
784 usba_ep_queue(struct usb_ep
*_ep
, struct usb_request
*_req
, gfp_t gfp_flags
)
786 struct usba_request
*req
= to_usba_req(_req
);
787 struct usba_ep
*ep
= to_usba_ep(_ep
);
788 struct usba_udc
*udc
= ep
->udc
;
792 DBG(DBG_GADGET
| DBG_QUEUE
| DBG_REQ
, "%s: queue req %p, len %u\n",
793 ep
->ep
.name
, req
, _req
->length
);
795 if (!udc
->driver
|| udc
->gadget
.speed
== USB_SPEED_UNKNOWN
|| !ep
->desc
)
800 req
->last_transaction
= 0;
802 _req
->status
= -EINPROGRESS
;
806 return queue_dma(udc
, ep
, req
, gfp_flags
);
808 /* May have received a reset since last time we checked */
810 spin_lock_irqsave(&udc
->lock
, flags
);
812 list_add_tail(&req
->queue
, &ep
->queue
);
814 if (ep
->is_in
|| (ep_is_control(ep
)
815 && (ep
->state
== DATA_STAGE_IN
816 || ep
->state
== STATUS_STAGE_IN
)))
817 usba_ep_writel(ep
, CTL_ENB
, USBA_TX_PK_RDY
);
819 usba_ep_writel(ep
, CTL_ENB
, USBA_RX_BK_RDY
);
822 spin_unlock_irqrestore(&udc
->lock
, flags
);
828 usba_update_req(struct usba_ep
*ep
, struct usba_request
*req
, u32 status
)
830 req
->req
.actual
= req
->req
.length
- USBA_BFEXT(DMA_BUF_LEN
, status
);
833 static int stop_dma(struct usba_ep
*ep
, u32
*pstatus
)
835 unsigned int timeout
;
839 * Stop the DMA controller. When writing both CH_EN
840 * and LINK to 0, the other bits are not affected.
842 usba_dma_writel(ep
, CONTROL
, 0);
844 /* Wait for the FIFO to empty */
845 for (timeout
= 40; timeout
; --timeout
) {
846 status
= usba_dma_readl(ep
, STATUS
);
847 if (!(status
& USBA_DMA_CH_EN
))
856 dev_err(&ep
->udc
->pdev
->dev
,
857 "%s: timed out waiting for DMA FIFO to empty\n",
865 static int usba_ep_dequeue(struct usb_ep
*_ep
, struct usb_request
*_req
)
867 struct usba_ep
*ep
= to_usba_ep(_ep
);
868 struct usba_udc
*udc
= ep
->udc
;
869 struct usba_request
*req
= to_usba_req(_req
);
873 DBG(DBG_GADGET
| DBG_QUEUE
, "ep_dequeue: %s, req %p\n",
876 spin_lock_irqsave(&udc
->lock
, flags
);
878 if (req
->using_dma
) {
880 * If this request is currently being transferred,
881 * stop the DMA controller and reset the FIFO.
883 if (ep
->queue
.next
== &req
->queue
) {
884 status
= usba_dma_readl(ep
, STATUS
);
885 if (status
& USBA_DMA_CH_EN
)
886 stop_dma(ep
, &status
);
888 #ifdef CONFIG_USB_GADGET_DEBUG_FS
889 ep
->last_dma_status
= status
;
892 usba_writel(udc
, EPT_RST
, 1 << ep
->index
);
894 usba_update_req(ep
, req
, status
);
899 * Errors should stop the queue from advancing until the
900 * completion function returns.
902 list_del_init(&req
->queue
);
904 request_complete(ep
, req
, -ECONNRESET
);
906 /* Process the next request if any */
907 submit_next_request(ep
);
908 spin_unlock_irqrestore(&udc
->lock
, flags
);
913 static int usba_ep_set_halt(struct usb_ep
*_ep
, int value
)
915 struct usba_ep
*ep
= to_usba_ep(_ep
);
916 struct usba_udc
*udc
= ep
->udc
;
920 DBG(DBG_GADGET
, "endpoint %s: %s HALT\n", ep
->ep
.name
,
921 value
? "set" : "clear");
924 DBG(DBG_ERR
, "Attempted to halt uninitialized ep %s\n",
929 DBG(DBG_ERR
, "Attempted to halt isochronous ep %s\n",
934 spin_lock_irqsave(&udc
->lock
, flags
);
937 * We can't halt IN endpoints while there are still data to be
940 if (!list_empty(&ep
->queue
)
941 || ((value
&& ep
->is_in
&& (usba_ep_readl(ep
, STA
)
942 & USBA_BF(BUSY_BANKS
, -1L))))) {
946 usba_ep_writel(ep
, SET_STA
, USBA_FORCE_STALL
);
948 usba_ep_writel(ep
, CLR_STA
,
949 USBA_FORCE_STALL
| USBA_TOGGLE_CLR
);
950 usba_ep_readl(ep
, STA
);
953 spin_unlock_irqrestore(&udc
->lock
, flags
);
958 static int usba_ep_fifo_status(struct usb_ep
*_ep
)
960 struct usba_ep
*ep
= to_usba_ep(_ep
);
962 return USBA_BFEXT(BYTE_COUNT
, usba_ep_readl(ep
, STA
));
965 static void usba_ep_fifo_flush(struct usb_ep
*_ep
)
967 struct usba_ep
*ep
= to_usba_ep(_ep
);
968 struct usba_udc
*udc
= ep
->udc
;
970 usba_writel(udc
, EPT_RST
, 1 << ep
->index
);
973 static const struct usb_ep_ops usba_ep_ops
= {
974 .enable
= usba_ep_enable
,
975 .disable
= usba_ep_disable
,
976 .alloc_request
= usba_ep_alloc_request
,
977 .free_request
= usba_ep_free_request
,
978 .queue
= usba_ep_queue
,
979 .dequeue
= usba_ep_dequeue
,
980 .set_halt
= usba_ep_set_halt
,
981 .fifo_status
= usba_ep_fifo_status
,
982 .fifo_flush
= usba_ep_fifo_flush
,
985 static int usba_udc_get_frame(struct usb_gadget
*gadget
)
987 struct usba_udc
*udc
= to_usba_udc(gadget
);
989 return USBA_BFEXT(FRAME_NUMBER
, usba_readl(udc
, FNUM
));
992 static int usba_udc_wakeup(struct usb_gadget
*gadget
)
994 struct usba_udc
*udc
= to_usba_udc(gadget
);
999 spin_lock_irqsave(&udc
->lock
, flags
);
1000 if (udc
->devstatus
& (1 << USB_DEVICE_REMOTE_WAKEUP
)) {
1001 ctrl
= usba_readl(udc
, CTRL
);
1002 usba_writel(udc
, CTRL
, ctrl
| USBA_REMOTE_WAKE_UP
);
1005 spin_unlock_irqrestore(&udc
->lock
, flags
);
1011 usba_udc_set_selfpowered(struct usb_gadget
*gadget
, int is_selfpowered
)
1013 struct usba_udc
*udc
= to_usba_udc(gadget
);
1014 unsigned long flags
;
1016 spin_lock_irqsave(&udc
->lock
, flags
);
1018 udc
->devstatus
|= 1 << USB_DEVICE_SELF_POWERED
;
1020 udc
->devstatus
&= ~(1 << USB_DEVICE_SELF_POWERED
);
1021 spin_unlock_irqrestore(&udc
->lock
, flags
);
1026 static const struct usb_gadget_ops usba_udc_ops
= {
1027 .get_frame
= usba_udc_get_frame
,
1028 .wakeup
= usba_udc_wakeup
,
1029 .set_selfpowered
= usba_udc_set_selfpowered
,
1032 #define EP(nam, idx, maxpkt, maxbk, dma, isoc) \
1035 .ops = &usba_ep_ops, \
1037 .maxpacket = maxpkt, \
1040 .queue = LIST_HEAD_INIT(usba_ep[idx].queue), \
1041 .fifo_size = maxpkt, \
1042 .nr_banks = maxbk, \
1048 static struct usba_ep usba_ep
[] = {
1049 EP("ep0", 0, 64, 1, 0, 0),
1050 EP("ep1in-bulk", 1, 512, 2, 1, 1),
1051 EP("ep2out-bulk", 2, 512, 2, 1, 1),
1052 EP("ep3in-int", 3, 64, 3, 1, 0),
1053 EP("ep4out-int", 4, 64, 3, 1, 0),
1054 EP("ep5in-iso", 5, 1024, 3, 1, 1),
1055 EP("ep6out-iso", 6, 1024, 3, 1, 1),
1059 static struct usb_endpoint_descriptor usba_ep0_desc
= {
1060 .bLength
= USB_DT_ENDPOINT_SIZE
,
1061 .bDescriptorType
= USB_DT_ENDPOINT
,
1062 .bEndpointAddress
= 0,
1063 .bmAttributes
= USB_ENDPOINT_XFER_CONTROL
,
1064 .wMaxPacketSize
= __constant_cpu_to_le16(64),
1065 /* FIXME: I have no idea what to put here */
1069 static void nop_release(struct device
*dev
)
1074 static struct usba_udc the_udc
= {
1076 .ops
= &usba_udc_ops
,
1077 .ep0
= &usba_ep
[0].ep
,
1078 .ep_list
= LIST_HEAD_INIT(the_udc
.gadget
.ep_list
),
1080 .name
= "atmel_usba_udc",
1083 .release
= nop_release
,
1087 .lock
= SPIN_LOCK_UNLOCKED
,
1091 * Called with interrupts disabled and udc->lock held.
1093 static void reset_all_endpoints(struct usba_udc
*udc
)
1096 struct usba_request
*req
, *tmp_req
;
1098 usba_writel(udc
, EPT_RST
, ~0UL);
1100 ep
= to_usba_ep(udc
->gadget
.ep0
);
1101 list_for_each_entry_safe(req
, tmp_req
, &ep
->queue
, queue
) {
1102 list_del_init(&req
->queue
);
1103 request_complete(ep
, req
, -ECONNRESET
);
1106 list_for_each_entry(ep
, &udc
->gadget
.ep_list
, ep
.ep_list
) {
1108 spin_unlock(&udc
->lock
);
1109 usba_ep_disable(&ep
->ep
);
1110 spin_lock(&udc
->lock
);
1115 static struct usba_ep
*get_ep_by_addr(struct usba_udc
*udc
, u16 wIndex
)
1119 if ((wIndex
& USB_ENDPOINT_NUMBER_MASK
) == 0)
1120 return to_usba_ep(udc
->gadget
.ep0
);
1122 list_for_each_entry (ep
, &udc
->gadget
.ep_list
, ep
.ep_list
) {
1123 u8 bEndpointAddress
;
1127 bEndpointAddress
= ep
->desc
->bEndpointAddress
;
1128 if ((wIndex
^ bEndpointAddress
) & USB_DIR_IN
)
1130 if ((bEndpointAddress
& USB_ENDPOINT_NUMBER_MASK
)
1131 == (wIndex
& USB_ENDPOINT_NUMBER_MASK
))
1138 /* Called with interrupts disabled and udc->lock held */
1139 static inline void set_protocol_stall(struct usba_udc
*udc
, struct usba_ep
*ep
)
1141 usba_ep_writel(ep
, SET_STA
, USBA_FORCE_STALL
);
1142 ep
->state
= WAIT_FOR_SETUP
;
1145 static inline int is_stalled(struct usba_udc
*udc
, struct usba_ep
*ep
)
1147 if (usba_ep_readl(ep
, STA
) & USBA_FORCE_STALL
)
1152 static inline void set_address(struct usba_udc
*udc
, unsigned int addr
)
1156 DBG(DBG_BUS
, "setting address %u...\n", addr
);
1157 regval
= usba_readl(udc
, CTRL
);
1158 regval
= USBA_BFINS(DEV_ADDR
, addr
, regval
);
1159 usba_writel(udc
, CTRL
, regval
);
1162 static int do_test_mode(struct usba_udc
*udc
)
1164 static const char test_packet_buffer
[] = {
1166 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1168 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
1170 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
1171 /* JJJJJJJKKKKKKK * 8 */
1172 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1173 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1175 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
1176 /* {JKKKKKKK * 10}, JK */
1177 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
1180 struct device
*dev
= &udc
->pdev
->dev
;
1183 test_mode
= udc
->test_mode
;
1185 /* Start from a clean slate */
1186 reset_all_endpoints(udc
);
1188 switch (test_mode
) {
1191 usba_writel(udc
, TST
, USBA_TST_J_MODE
);
1192 dev_info(dev
, "Entering Test_J mode...\n");
1196 usba_writel(udc
, TST
, USBA_TST_K_MODE
);
1197 dev_info(dev
, "Entering Test_K mode...\n");
1201 * Test_SE0_NAK: Force high-speed mode and set up ep0
1202 * for Bulk IN transfers
1205 usba_writel(udc
, TST
,
1206 USBA_BF(SPEED_CFG
, USBA_SPEED_CFG_FORCE_HIGH
));
1207 usba_ep_writel(ep
, CFG
,
1208 USBA_BF(EPT_SIZE
, USBA_EPT_SIZE_64
)
1210 | USBA_BF(EPT_TYPE
, USBA_EPT_TYPE_BULK
)
1211 | USBA_BF(BK_NUMBER
, 1));
1212 if (!(usba_ep_readl(ep
, CFG
) & USBA_EPT_MAPPED
)) {
1213 set_protocol_stall(udc
, ep
);
1214 dev_err(dev
, "Test_SE0_NAK: ep0 not mapped\n");
1216 usba_ep_writel(ep
, CTL_ENB
, USBA_EPT_ENABLE
);
1217 dev_info(dev
, "Entering Test_SE0_NAK mode...\n");
1223 usba_ep_writel(ep
, CFG
,
1224 USBA_BF(EPT_SIZE
, USBA_EPT_SIZE_64
)
1226 | USBA_BF(EPT_TYPE
, USBA_EPT_TYPE_BULK
)
1227 | USBA_BF(BK_NUMBER
, 1));
1228 if (!(usba_ep_readl(ep
, CFG
) & USBA_EPT_MAPPED
)) {
1229 set_protocol_stall(udc
, ep
);
1230 dev_err(dev
, "Test_Packet: ep0 not mapped\n");
1232 usba_ep_writel(ep
, CTL_ENB
, USBA_EPT_ENABLE
);
1233 usba_writel(udc
, TST
, USBA_TST_PKT_MODE
);
1234 copy_to_fifo(ep
->fifo
, test_packet_buffer
,
1235 sizeof(test_packet_buffer
));
1236 usba_ep_writel(ep
, SET_STA
, USBA_TX_PK_RDY
);
1237 dev_info(dev
, "Entering Test_Packet mode...\n");
1241 dev_err(dev
, "Invalid test mode: 0x%04x\n", test_mode
);
1248 /* Avoid overly long expressions */
1249 static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest
*crq
)
1251 if (crq
->wValue
== __constant_cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP
))
1256 static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest
*crq
)
1258 if (crq
->wValue
== __constant_cpu_to_le16(USB_DEVICE_TEST_MODE
))
1263 static inline bool feature_is_ep_halt(struct usb_ctrlrequest
*crq
)
1265 if (crq
->wValue
== __constant_cpu_to_le16(USB_ENDPOINT_HALT
))
1270 static int handle_ep0_setup(struct usba_udc
*udc
, struct usba_ep
*ep
,
1271 struct usb_ctrlrequest
*crq
)
1275 switch (crq
->bRequest
) {
1276 case USB_REQ_GET_STATUS
: {
1279 if (crq
->bRequestType
== (USB_DIR_IN
| USB_RECIP_DEVICE
)) {
1280 status
= cpu_to_le16(udc
->devstatus
);
1281 } else if (crq
->bRequestType
1282 == (USB_DIR_IN
| USB_RECIP_INTERFACE
)) {
1283 status
= __constant_cpu_to_le16(0);
1284 } else if (crq
->bRequestType
1285 == (USB_DIR_IN
| USB_RECIP_ENDPOINT
)) {
1286 struct usba_ep
*target
;
1288 target
= get_ep_by_addr(udc
, le16_to_cpu(crq
->wIndex
));
1293 if (is_stalled(udc
, target
))
1294 status
|= __constant_cpu_to_le16(1);
1298 /* Write directly to the FIFO. No queueing is done. */
1299 if (crq
->wLength
!= __constant_cpu_to_le16(sizeof(status
)))
1301 ep
->state
= DATA_STAGE_IN
;
1302 __raw_writew(status
, ep
->fifo
);
1303 usba_ep_writel(ep
, SET_STA
, USBA_TX_PK_RDY
);
1307 case USB_REQ_CLEAR_FEATURE
: {
1308 if (crq
->bRequestType
== USB_RECIP_DEVICE
) {
1309 if (feature_is_dev_remote_wakeup(crq
))
1311 &= ~(1 << USB_DEVICE_REMOTE_WAKEUP
);
1313 /* Can't CLEAR_FEATURE TEST_MODE */
1315 } else if (crq
->bRequestType
== USB_RECIP_ENDPOINT
) {
1316 struct usba_ep
*target
;
1318 if (crq
->wLength
!= __constant_cpu_to_le16(0)
1319 || !feature_is_ep_halt(crq
))
1321 target
= get_ep_by_addr(udc
, le16_to_cpu(crq
->wIndex
));
1325 usba_ep_writel(target
, CLR_STA
, USBA_FORCE_STALL
);
1326 if (target
->index
!= 0)
1327 usba_ep_writel(target
, CLR_STA
,
1333 send_status(udc
, ep
);
1337 case USB_REQ_SET_FEATURE
: {
1338 if (crq
->bRequestType
== USB_RECIP_DEVICE
) {
1339 if (feature_is_dev_test_mode(crq
)) {
1340 send_status(udc
, ep
);
1341 ep
->state
= STATUS_STAGE_TEST
;
1342 udc
->test_mode
= le16_to_cpu(crq
->wIndex
);
1344 } else if (feature_is_dev_remote_wakeup(crq
)) {
1345 udc
->devstatus
|= 1 << USB_DEVICE_REMOTE_WAKEUP
;
1349 } else if (crq
->bRequestType
== USB_RECIP_ENDPOINT
) {
1350 struct usba_ep
*target
;
1352 if (crq
->wLength
!= __constant_cpu_to_le16(0)
1353 || !feature_is_ep_halt(crq
))
1356 target
= get_ep_by_addr(udc
, le16_to_cpu(crq
->wIndex
));
1360 usba_ep_writel(target
, SET_STA
, USBA_FORCE_STALL
);
1364 send_status(udc
, ep
);
1368 case USB_REQ_SET_ADDRESS
:
1369 if (crq
->bRequestType
!= (USB_DIR_OUT
| USB_RECIP_DEVICE
))
1372 set_address(udc
, le16_to_cpu(crq
->wValue
));
1373 send_status(udc
, ep
);
1374 ep
->state
= STATUS_STAGE_ADDR
;
1379 spin_unlock(&udc
->lock
);
1380 retval
= udc
->driver
->setup(&udc
->gadget
, crq
);
1381 spin_lock(&udc
->lock
);
1388 "udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
1389 "halting endpoint...\n",
1390 ep
->ep
.name
, crq
->bRequestType
, crq
->bRequest
,
1391 le16_to_cpu(crq
->wValue
), le16_to_cpu(crq
->wIndex
),
1392 le16_to_cpu(crq
->wLength
));
1393 set_protocol_stall(udc
, ep
);
1397 static void usba_control_irq(struct usba_udc
*udc
, struct usba_ep
*ep
)
1399 struct usba_request
*req
;
1404 epstatus
= usba_ep_readl(ep
, STA
);
1405 epctrl
= usba_ep_readl(ep
, CTL
);
1407 DBG(DBG_INT
, "%s [%d]: s/%08x c/%08x\n",
1408 ep
->ep
.name
, ep
->state
, epstatus
, epctrl
);
1411 if (!list_empty(&ep
->queue
))
1412 req
= list_entry(ep
->queue
.next
,
1413 struct usba_request
, queue
);
1415 if ((epctrl
& USBA_TX_PK_RDY
) && !(epstatus
& USBA_TX_PK_RDY
)) {
1417 next_fifo_transaction(ep
, req
);
1419 submit_request(ep
, req
);
1421 if (req
->last_transaction
) {
1422 usba_ep_writel(ep
, CTL_DIS
, USBA_TX_PK_RDY
);
1423 usba_ep_writel(ep
, CTL_ENB
, USBA_TX_COMPLETE
);
1427 if ((epstatus
& epctrl
) & USBA_TX_COMPLETE
) {
1428 usba_ep_writel(ep
, CLR_STA
, USBA_TX_COMPLETE
);
1430 switch (ep
->state
) {
1432 usba_ep_writel(ep
, CTL_ENB
, USBA_RX_BK_RDY
);
1433 usba_ep_writel(ep
, CTL_DIS
, USBA_TX_COMPLETE
);
1434 ep
->state
= STATUS_STAGE_OUT
;
1436 case STATUS_STAGE_ADDR
:
1437 /* Activate our new address */
1438 usba_writel(udc
, CTRL
, (usba_readl(udc
, CTRL
)
1440 usba_ep_writel(ep
, CTL_DIS
, USBA_TX_COMPLETE
);
1441 ep
->state
= WAIT_FOR_SETUP
;
1443 case STATUS_STAGE_IN
:
1445 list_del_init(&req
->queue
);
1446 request_complete(ep
, req
, 0);
1447 submit_next_request(ep
);
1449 usba_ep_writel(ep
, CTL_DIS
, USBA_TX_COMPLETE
);
1450 ep
->state
= WAIT_FOR_SETUP
;
1452 case STATUS_STAGE_TEST
:
1453 usba_ep_writel(ep
, CTL_DIS
, USBA_TX_COMPLETE
);
1454 ep
->state
= WAIT_FOR_SETUP
;
1455 if (do_test_mode(udc
))
1456 set_protocol_stall(udc
, ep
);
1460 "udc: %s: TXCOMP: Invalid endpoint state %d, "
1461 "halting endpoint...\n",
1462 ep
->ep
.name
, ep
->state
);
1463 set_protocol_stall(udc
, ep
);
1469 if ((epstatus
& epctrl
) & USBA_RX_BK_RDY
) {
1470 switch (ep
->state
) {
1471 case STATUS_STAGE_OUT
:
1472 usba_ep_writel(ep
, CLR_STA
, USBA_RX_BK_RDY
);
1473 usba_ep_writel(ep
, CTL_DIS
, USBA_RX_BK_RDY
);
1476 list_del_init(&req
->queue
);
1477 request_complete(ep
, req
, 0);
1479 ep
->state
= WAIT_FOR_SETUP
;
1482 case DATA_STAGE_OUT
:
1487 usba_ep_writel(ep
, CLR_STA
, USBA_RX_BK_RDY
);
1488 usba_ep_writel(ep
, CTL_DIS
, USBA_RX_BK_RDY
);
1490 "udc: %s: RXRDY: Invalid endpoint state %d, "
1491 "halting endpoint...\n",
1492 ep
->ep
.name
, ep
->state
);
1493 set_protocol_stall(udc
, ep
);
1499 if (epstatus
& USBA_RX_SETUP
) {
1501 struct usb_ctrlrequest crq
;
1502 unsigned long data
[2];
1504 unsigned int pkt_len
;
1507 if (ep
->state
!= WAIT_FOR_SETUP
) {
1509 * Didn't expect a SETUP packet at this
1510 * point. Clean up any pending requests (which
1511 * may be successful).
1513 int status
= -EPROTO
;
1516 * RXRDY and TXCOMP are dropped when SETUP
1517 * packets arrive. Just pretend we received
1518 * the status packet.
1520 if (ep
->state
== STATUS_STAGE_OUT
1521 || ep
->state
== STATUS_STAGE_IN
) {
1522 usba_ep_writel(ep
, CTL_DIS
, USBA_RX_BK_RDY
);
1527 list_del_init(&req
->queue
);
1528 request_complete(ep
, req
, status
);
1532 pkt_len
= USBA_BFEXT(BYTE_COUNT
, usba_ep_readl(ep
, STA
));
1533 DBG(DBG_HW
, "Packet length: %u\n", pkt_len
);
1534 if (pkt_len
!= sizeof(crq
)) {
1535 printk(KERN_WARNING
"udc: Invalid packet length %u "
1536 "(expected %lu)\n", pkt_len
, sizeof(crq
));
1537 set_protocol_stall(udc
, ep
);
1541 DBG(DBG_FIFO
, "Copying ctrl request from 0x%p:\n", ep
->fifo
);
1542 copy_from_fifo(crq
.data
, ep
->fifo
, sizeof(crq
));
1544 /* Free up one bank in the FIFO so that we can
1545 * generate or receive a reply right away. */
1546 usba_ep_writel(ep
, CLR_STA
, USBA_RX_SETUP
);
1548 /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
1549 ep->state, crq.crq.bRequestType,
1550 crq.crq.bRequest); */
1552 if (crq
.crq
.bRequestType
& USB_DIR_IN
) {
1554 * The USB 2.0 spec states that "if wLength is
1555 * zero, there is no data transfer phase."
1556 * However, testusb #14 seems to actually
1557 * expect a data phase even if wLength = 0...
1559 ep
->state
= DATA_STAGE_IN
;
1561 if (crq
.crq
.wLength
!= __constant_cpu_to_le16(0))
1562 ep
->state
= DATA_STAGE_OUT
;
1564 ep
->state
= STATUS_STAGE_IN
;
1569 ret
= handle_ep0_setup(udc
, ep
, &crq
.crq
);
1571 spin_unlock(&udc
->lock
);
1572 ret
= udc
->driver
->setup(&udc
->gadget
, &crq
.crq
);
1573 spin_lock(&udc
->lock
);
1576 DBG(DBG_BUS
, "req %02x.%02x, length %d, state %d, ret %d\n",
1577 crq
.crq
.bRequestType
, crq
.crq
.bRequest
,
1578 le16_to_cpu(crq
.crq
.wLength
), ep
->state
, ret
);
1581 /* Let the host know that we failed */
1582 set_protocol_stall(udc
, ep
);
1587 static void usba_ep_irq(struct usba_udc
*udc
, struct usba_ep
*ep
)
1589 struct usba_request
*req
;
1593 epstatus
= usba_ep_readl(ep
, STA
);
1594 epctrl
= usba_ep_readl(ep
, CTL
);
1596 DBG(DBG_INT
, "%s: interrupt, status: 0x%08x\n", ep
->ep
.name
, epstatus
);
1598 while ((epctrl
& USBA_TX_PK_RDY
) && !(epstatus
& USBA_TX_PK_RDY
)) {
1599 DBG(DBG_BUS
, "%s: TX PK ready\n", ep
->ep
.name
);
1601 if (list_empty(&ep
->queue
)) {
1602 dev_warn(&udc
->pdev
->dev
, "ep_irq: queue empty\n");
1603 usba_ep_writel(ep
, CTL_DIS
, USBA_TX_PK_RDY
);
1607 req
= list_entry(ep
->queue
.next
, struct usba_request
, queue
);
1609 if (req
->using_dma
) {
1610 /* Send a zero-length packet */
1611 usba_ep_writel(ep
, SET_STA
,
1613 usba_ep_writel(ep
, CTL_DIS
,
1615 list_del_init(&req
->queue
);
1616 submit_next_request(ep
);
1617 request_complete(ep
, req
, 0);
1620 next_fifo_transaction(ep
, req
);
1622 submit_request(ep
, req
);
1624 if (req
->last_transaction
) {
1625 list_del_init(&req
->queue
);
1626 submit_next_request(ep
);
1627 request_complete(ep
, req
, 0);
1631 epstatus
= usba_ep_readl(ep
, STA
);
1632 epctrl
= usba_ep_readl(ep
, CTL
);
1634 if ((epstatus
& epctrl
) & USBA_RX_BK_RDY
) {
1635 DBG(DBG_BUS
, "%s: RX data ready\n", ep
->ep
.name
);
1637 usba_ep_writel(ep
, CLR_STA
, USBA_RX_BK_RDY
);
1641 static void usba_dma_irq(struct usba_udc
*udc
, struct usba_ep
*ep
)
1643 struct usba_request
*req
;
1644 u32 status
, control
, pending
;
1646 status
= usba_dma_readl(ep
, STATUS
);
1647 control
= usba_dma_readl(ep
, CONTROL
);
1648 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1649 ep
->last_dma_status
= status
;
1651 pending
= status
& control
;
1652 DBG(DBG_INT
| DBG_DMA
, "dma irq, s/%#08x, c/%#08x\n", status
, control
);
1654 if (status
& USBA_DMA_CH_EN
) {
1655 dev_err(&udc
->pdev
->dev
,
1656 "DMA_CH_EN is set after transfer is finished!\n");
1657 dev_err(&udc
->pdev
->dev
,
1658 "status=%#08x, pending=%#08x, control=%#08x\n",
1659 status
, pending
, control
);
1662 * try to pretend nothing happened. We might have to
1663 * do something here...
1667 if (list_empty(&ep
->queue
))
1668 /* Might happen if a reset comes along at the right moment */
1671 if (pending
& (USBA_DMA_END_TR_ST
| USBA_DMA_END_BUF_ST
)) {
1672 req
= list_entry(ep
->queue
.next
, struct usba_request
, queue
);
1673 usba_update_req(ep
, req
, status
);
1675 list_del_init(&req
->queue
);
1676 submit_next_request(ep
);
1677 request_complete(ep
, req
, 0);
1681 static irqreturn_t
usba_udc_irq(int irq
, void *devid
)
1683 struct usba_udc
*udc
= devid
;
1688 spin_lock(&udc
->lock
);
1690 status
= usba_readl(udc
, INT_STA
);
1691 DBG(DBG_INT
, "irq, status=%#08x\n", status
);
1693 if (status
& USBA_DET_SUSPEND
) {
1694 usba_writel(udc
, INT_CLR
, USBA_DET_SUSPEND
);
1695 DBG(DBG_BUS
, "Suspend detected\n");
1696 if (udc
->gadget
.speed
!= USB_SPEED_UNKNOWN
1697 && udc
->driver
&& udc
->driver
->suspend
) {
1698 spin_unlock(&udc
->lock
);
1699 udc
->driver
->suspend(&udc
->gadget
);
1700 spin_lock(&udc
->lock
);
1704 if (status
& USBA_WAKE_UP
) {
1705 usba_writel(udc
, INT_CLR
, USBA_WAKE_UP
);
1706 DBG(DBG_BUS
, "Wake Up CPU detected\n");
1709 if (status
& USBA_END_OF_RESUME
) {
1710 usba_writel(udc
, INT_CLR
, USBA_END_OF_RESUME
);
1711 DBG(DBG_BUS
, "Resume detected\n");
1712 if (udc
->gadget
.speed
!= USB_SPEED_UNKNOWN
1713 && udc
->driver
&& udc
->driver
->resume
) {
1714 spin_unlock(&udc
->lock
);
1715 udc
->driver
->resume(&udc
->gadget
);
1716 spin_lock(&udc
->lock
);
1720 dma_status
= USBA_BFEXT(DMA_INT
, status
);
1724 for (i
= 1; i
< USBA_NR_ENDPOINTS
; i
++)
1725 if (dma_status
& (1 << i
))
1726 usba_dma_irq(udc
, &usba_ep
[i
]);
1729 ep_status
= USBA_BFEXT(EPT_INT
, status
);
1733 for (i
= 0; i
< USBA_NR_ENDPOINTS
; i
++)
1734 if (ep_status
& (1 << i
)) {
1735 if (ep_is_control(&usba_ep
[i
]))
1736 usba_control_irq(udc
, &usba_ep
[i
]);
1738 usba_ep_irq(udc
, &usba_ep
[i
]);
1742 if (status
& USBA_END_OF_RESET
) {
1743 struct usba_ep
*ep0
;
1745 usba_writel(udc
, INT_CLR
, USBA_END_OF_RESET
);
1746 reset_all_endpoints(udc
);
1748 if (status
& USBA_HIGH_SPEED
) {
1749 DBG(DBG_BUS
, "High-speed bus reset detected\n");
1750 udc
->gadget
.speed
= USB_SPEED_HIGH
;
1752 DBG(DBG_BUS
, "Full-speed bus reset detected\n");
1753 udc
->gadget
.speed
= USB_SPEED_FULL
;
1757 ep0
->desc
= &usba_ep0_desc
;
1758 ep0
->state
= WAIT_FOR_SETUP
;
1759 usba_ep_writel(ep0
, CFG
,
1760 (USBA_BF(EPT_SIZE
, EP0_EPT_SIZE
)
1761 | USBA_BF(EPT_TYPE
, USBA_EPT_TYPE_CONTROL
)
1762 | USBA_BF(BK_NUMBER
, USBA_BK_NUMBER_ONE
)));
1763 usba_ep_writel(ep0
, CTL_ENB
,
1764 USBA_EPT_ENABLE
| USBA_RX_SETUP
);
1765 usba_writel(udc
, INT_ENB
,
1766 (usba_readl(udc
, INT_ENB
)
1767 | USBA_BF(EPT_INT
, 1)
1769 | USBA_END_OF_RESUME
));
1771 if (!(usba_ep_readl(ep0
, CFG
) & USBA_EPT_MAPPED
))
1772 dev_warn(&udc
->pdev
->dev
,
1773 "WARNING: EP0 configuration is invalid!\n");
1776 spin_unlock(&udc
->lock
);
1781 static irqreturn_t
usba_vbus_irq(int irq
, void *devid
)
1783 struct usba_udc
*udc
= devid
;
1789 spin_lock(&udc
->lock
);
1791 /* May happen if Vbus pin toggles during probe() */
1795 vbus
= gpio_get_value(udc
->vbus_pin
);
1796 if (vbus
!= udc
->vbus_prev
) {
1798 usba_writel(udc
, CTRL
, USBA_EN_USBA
);
1799 usba_writel(udc
, INT_ENB
, USBA_END_OF_RESET
);
1801 udc
->gadget
.speed
= USB_SPEED_UNKNOWN
;
1802 reset_all_endpoints(udc
);
1803 usba_writel(udc
, CTRL
, 0);
1804 spin_unlock(&udc
->lock
);
1805 udc
->driver
->disconnect(&udc
->gadget
);
1806 spin_lock(&udc
->lock
);
1808 udc
->vbus_prev
= vbus
;
1812 spin_unlock(&udc
->lock
);
1817 int usb_gadget_register_driver(struct usb_gadget_driver
*driver
)
1819 struct usba_udc
*udc
= &the_udc
;
1820 unsigned long flags
;
1826 spin_lock_irqsave(&udc
->lock
, flags
);
1828 spin_unlock_irqrestore(&udc
->lock
, flags
);
1832 udc
->devstatus
= 1 << USB_DEVICE_SELF_POWERED
;
1833 udc
->driver
= driver
;
1834 udc
->gadget
.dev
.driver
= &driver
->driver
;
1835 spin_unlock_irqrestore(&udc
->lock
, flags
);
1837 clk_enable(udc
->pclk
);
1838 clk_enable(udc
->hclk
);
1840 ret
= driver
->bind(&udc
->gadget
);
1842 DBG(DBG_ERR
, "Could not bind to driver %s: error %d\n",
1843 driver
->driver
.name
, ret
);
1844 goto err_driver_bind
;
1847 DBG(DBG_GADGET
, "registered driver `%s'\n", driver
->driver
.name
);
1850 if (udc
->vbus_pin
!= -1)
1851 enable_irq(gpio_to_irq(udc
->vbus_pin
));
1853 /* If Vbus is present, enable the controller and wait for reset */
1854 spin_lock_irqsave(&udc
->lock
, flags
);
1855 if (vbus_is_present(udc
) && udc
->vbus_prev
== 0) {
1856 usba_writel(udc
, CTRL
, USBA_EN_USBA
);
1857 usba_writel(udc
, INT_ENB
, USBA_END_OF_RESET
);
1859 spin_unlock_irqrestore(&udc
->lock
, flags
);
1865 udc
->gadget
.dev
.driver
= NULL
;
1868 EXPORT_SYMBOL(usb_gadget_register_driver
);
1870 int usb_gadget_unregister_driver(struct usb_gadget_driver
*driver
)
1872 struct usba_udc
*udc
= &the_udc
;
1873 unsigned long flags
;
1877 if (driver
!= udc
->driver
)
1880 if (udc
->vbus_pin
!= -1)
1881 disable_irq(gpio_to_irq(udc
->vbus_pin
));
1883 spin_lock_irqsave(&udc
->lock
, flags
);
1884 udc
->gadget
.speed
= USB_SPEED_UNKNOWN
;
1885 reset_all_endpoints(udc
);
1886 spin_unlock_irqrestore(&udc
->lock
, flags
);
1888 /* This will also disable the DP pullup */
1889 usba_writel(udc
, CTRL
, 0);
1891 driver
->unbind(&udc
->gadget
);
1892 udc
->gadget
.dev
.driver
= NULL
;
1895 clk_disable(udc
->hclk
);
1896 clk_disable(udc
->pclk
);
1898 DBG(DBG_GADGET
, "unregistered driver `%s'\n", driver
->driver
.name
);
1902 EXPORT_SYMBOL(usb_gadget_unregister_driver
);
1904 static int __init
usba_udc_probe(struct platform_device
*pdev
)
1906 struct usba_platform_data
*pdata
= pdev
->dev
.platform_data
;
1907 struct resource
*regs
, *fifo
;
1908 struct clk
*pclk
, *hclk
;
1909 struct usba_udc
*udc
= &the_udc
;
1912 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, CTRL_IOMEM_ID
);
1913 fifo
= platform_get_resource(pdev
, IORESOURCE_MEM
, FIFO_IOMEM_ID
);
1917 irq
= platform_get_irq(pdev
, 0);
1921 pclk
= clk_get(&pdev
->dev
, "pclk");
1923 return PTR_ERR(pclk
);
1924 hclk
= clk_get(&pdev
->dev
, "hclk");
1926 ret
= PTR_ERR(hclk
);
1936 udc
->regs
= ioremap(regs
->start
, regs
->end
- regs
->start
+ 1);
1938 dev_err(&pdev
->dev
, "Unable to map I/O memory, aborting.\n");
1941 dev_info(&pdev
->dev
, "MMIO registers at 0x%08lx mapped at %p\n",
1942 (unsigned long)regs
->start
, udc
->regs
);
1943 udc
->fifo
= ioremap(fifo
->start
, fifo
->end
- fifo
->start
+ 1);
1945 dev_err(&pdev
->dev
, "Unable to map FIFO, aborting.\n");
1948 dev_info(&pdev
->dev
, "FIFO at 0x%08lx mapped at %p\n",
1949 (unsigned long)fifo
->start
, udc
->fifo
);
1951 device_initialize(&udc
->gadget
.dev
);
1952 udc
->gadget
.dev
.parent
= &pdev
->dev
;
1953 udc
->gadget
.dev
.dma_mask
= pdev
->dev
.dma_mask
;
1955 platform_set_drvdata(pdev
, udc
);
1957 /* Make sure we start from a clean slate */
1959 usba_writel(udc
, CTRL
, 0);
1962 INIT_LIST_HEAD(&usba_ep
[0].ep
.ep_list
);
1963 usba_ep
[0].ep_regs
= udc
->regs
+ USBA_EPT_BASE(0);
1964 usba_ep
[0].dma_regs
= udc
->regs
+ USBA_DMA_BASE(0);
1965 usba_ep
[0].fifo
= udc
->fifo
+ USBA_FIFO_BASE(0);
1966 for (i
= 1; i
< ARRAY_SIZE(usba_ep
); i
++) {
1967 struct usba_ep
*ep
= &usba_ep
[i
];
1969 ep
->ep_regs
= udc
->regs
+ USBA_EPT_BASE(i
);
1970 ep
->dma_regs
= udc
->regs
+ USBA_DMA_BASE(i
);
1971 ep
->fifo
= udc
->fifo
+ USBA_FIFO_BASE(i
);
1973 list_add_tail(&ep
->ep
.ep_list
, &udc
->gadget
.ep_list
);
1976 ret
= request_irq(irq
, usba_udc_irq
, 0, "atmel_usba_udc", udc
);
1978 dev_err(&pdev
->dev
, "Cannot request irq %d (error %d)\n",
1980 goto err_request_irq
;
1984 ret
= device_add(&udc
->gadget
.dev
);
1986 dev_dbg(&pdev
->dev
, "Could not add gadget: %d\n", ret
);
1987 goto err_device_add
;
1990 if (pdata
&& pdata
->vbus_pin
!= GPIO_PIN_NONE
) {
1991 if (!gpio_request(pdata
->vbus_pin
, "atmel_usba_udc")) {
1992 udc
->vbus_pin
= pdata
->vbus_pin
;
1994 ret
= request_irq(gpio_to_irq(udc
->vbus_pin
),
1996 "atmel_usba_udc", udc
);
1998 gpio_free(udc
->vbus_pin
);
2000 dev_warn(&udc
->pdev
->dev
,
2001 "failed to request vbus irq; "
2002 "assuming always on\n");
2004 disable_irq(gpio_to_irq(udc
->vbus_pin
));
2009 usba_init_debugfs(udc
);
2010 for (i
= 1; i
< ARRAY_SIZE(usba_ep
); i
++)
2011 usba_ep_init_debugfs(udc
, &usba_ep
[i
]);
2026 platform_set_drvdata(pdev
, NULL
);
2031 static int __exit
usba_udc_remove(struct platform_device
*pdev
)
2033 struct usba_udc
*udc
;
2036 udc
= platform_get_drvdata(pdev
);
2038 for (i
= 1; i
< ARRAY_SIZE(usba_ep
); i
++)
2039 usba_ep_cleanup_debugfs(&usba_ep
[i
]);
2040 usba_cleanup_debugfs(udc
);
2042 if (udc
->vbus_pin
!= -1)
2043 gpio_free(udc
->vbus_pin
);
2045 free_irq(udc
->irq
, udc
);
2051 device_unregister(&udc
->gadget
.dev
);
2056 static struct platform_driver udc_driver
= {
2057 .remove
= __exit_p(usba_udc_remove
),
2059 .name
= "atmel_usba_udc",
2063 static int __init
udc_init(void)
2065 return platform_driver_probe(&udc_driver
, usba_udc_probe
);
2067 module_init(udc_init
);
2069 static void __exit
udc_exit(void)
2071 platform_driver_unregister(&udc_driver
);
2073 module_exit(udc_exit
);
2075 MODULE_DESCRIPTION("Atmel USBA UDC driver");
2076 MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
2077 MODULE_LICENSE("GPL");