davinci: DA8XX/OMAP-L1XX: It's SYSCFG not BOOT_CFG
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / arch / arm / mach-davinci / devices-da8xx.c
bloba54aa4edc1b01c72ba7ba25450d5485ab4972b20
1 /*
2 * DA8XX/OMAP L1XX platform device data
4 * Copyright (c) 2007-2009, MontaVista Software, Inc. <source@mvista.com>
5 * Derived from code that was:
6 * Copyright (C) 2006 Komal Shah <komal_shah802003@yahoo.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/platform_device.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/serial_8250.h>
20 #include <mach/cputype.h>
21 #include <mach/common.h>
22 #include <mach/time.h>
23 #include <mach/da8xx.h>
24 #include <video/da8xx-fb.h>
26 #include "clock.h"
28 #define DA8XX_TPCC_BASE 0x01c00000
29 #define DA8XX_TPTC0_BASE 0x01c08000
30 #define DA8XX_TPTC1_BASE 0x01c08400
31 #define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */
32 #define DA8XX_I2C0_BASE 0x01c22000
33 #define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000
34 #define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000
35 #define DA8XX_EMAC_CPGMAC_BASE 0x01e23000
36 #define DA8XX_EMAC_MDIO_BASE 0x01e24000
37 #define DA8XX_GPIO_BASE 0x01e26000
38 #define DA8XX_I2C1_BASE 0x01e28000
40 #define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000
41 #define DA8XX_EMAC_MOD_REG_OFFSET 0x2000
42 #define DA8XX_EMAC_RAM_OFFSET 0x0000
43 #define DA8XX_MDIO_REG_OFFSET 0x4000
44 #define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K
46 static struct plat_serial8250_port da8xx_serial_pdata[] = {
48 .mapbase = DA8XX_UART0_BASE,
49 .irq = IRQ_DA8XX_UARTINT0,
50 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
51 UPF_IOREMAP,
52 .iotype = UPIO_MEM,
53 .regshift = 2,
56 .mapbase = DA8XX_UART1_BASE,
57 .irq = IRQ_DA8XX_UARTINT1,
58 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
59 UPF_IOREMAP,
60 .iotype = UPIO_MEM,
61 .regshift = 2,
64 .mapbase = DA8XX_UART2_BASE,
65 .irq = IRQ_DA8XX_UARTINT2,
66 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
67 UPF_IOREMAP,
68 .iotype = UPIO_MEM,
69 .regshift = 2,
72 .flags = 0,
76 struct platform_device da8xx_serial_device = {
77 .name = "serial8250",
78 .id = PLAT8250_DEV_PLATFORM,
79 .dev = {
80 .platform_data = da8xx_serial_pdata,
84 static const s8 da8xx_dma_chan_no_event[] = {
85 20, 21,
89 static const s8 da8xx_queue_tc_mapping[][2] = {
90 /* {event queue no, TC no} */
91 {0, 0},
92 {1, 1},
93 {-1, -1}
96 static const s8 da8xx_queue_priority_mapping[][2] = {
97 /* {event queue no, Priority} */
98 {0, 3},
99 {1, 7},
100 {-1, -1}
103 static struct edma_soc_info da8xx_edma_info[] = {
105 .n_channel = 32,
106 .n_region = 4,
107 .n_slot = 128,
108 .n_tc = 2,
109 .n_cc = 1,
110 .noevent = da8xx_dma_chan_no_event,
111 .queue_tc_mapping = da8xx_queue_tc_mapping,
112 .queue_priority_mapping = da8xx_queue_priority_mapping,
116 static struct resource da8xx_edma_resources[] = {
118 .name = "edma_cc0",
119 .start = DA8XX_TPCC_BASE,
120 .end = DA8XX_TPCC_BASE + SZ_32K - 1,
121 .flags = IORESOURCE_MEM,
124 .name = "edma_tc0",
125 .start = DA8XX_TPTC0_BASE,
126 .end = DA8XX_TPTC0_BASE + SZ_1K - 1,
127 .flags = IORESOURCE_MEM,
130 .name = "edma_tc1",
131 .start = DA8XX_TPTC1_BASE,
132 .end = DA8XX_TPTC1_BASE + SZ_1K - 1,
133 .flags = IORESOURCE_MEM,
136 .name = "edma0",
137 .start = IRQ_DA8XX_CCINT0,
138 .flags = IORESOURCE_IRQ,
141 .name = "edma0_err",
142 .start = IRQ_DA8XX_CCERRINT,
143 .flags = IORESOURCE_IRQ,
147 static struct platform_device da8xx_edma_device = {
148 .name = "edma",
149 .id = -1,
150 .dev = {
151 .platform_data = da8xx_edma_info,
153 .num_resources = ARRAY_SIZE(da8xx_edma_resources),
154 .resource = da8xx_edma_resources,
157 int __init da8xx_register_edma(void)
159 return platform_device_register(&da8xx_edma_device);
162 static struct resource da8xx_i2c_resources0[] = {
164 .start = DA8XX_I2C0_BASE,
165 .end = DA8XX_I2C0_BASE + SZ_4K - 1,
166 .flags = IORESOURCE_MEM,
169 .start = IRQ_DA8XX_I2CINT0,
170 .end = IRQ_DA8XX_I2CINT0,
171 .flags = IORESOURCE_IRQ,
175 static struct platform_device da8xx_i2c_device0 = {
176 .name = "i2c_davinci",
177 .id = 1,
178 .num_resources = ARRAY_SIZE(da8xx_i2c_resources0),
179 .resource = da8xx_i2c_resources0,
182 static struct resource da8xx_i2c_resources1[] = {
184 .start = DA8XX_I2C1_BASE,
185 .end = DA8XX_I2C1_BASE + SZ_4K - 1,
186 .flags = IORESOURCE_MEM,
189 .start = IRQ_DA8XX_I2CINT1,
190 .end = IRQ_DA8XX_I2CINT1,
191 .flags = IORESOURCE_IRQ,
195 static struct platform_device da8xx_i2c_device1 = {
196 .name = "i2c_davinci",
197 .id = 2,
198 .num_resources = ARRAY_SIZE(da8xx_i2c_resources1),
199 .resource = da8xx_i2c_resources1,
202 int __init da8xx_register_i2c(int instance,
203 struct davinci_i2c_platform_data *pdata)
205 struct platform_device *pdev;
207 if (instance == 0)
208 pdev = &da8xx_i2c_device0;
209 else if (instance == 1)
210 pdev = &da8xx_i2c_device1;
211 else
212 return -EINVAL;
214 pdev->dev.platform_data = pdata;
215 return platform_device_register(pdev);
218 static struct resource da8xx_watchdog_resources[] = {
220 .start = DA8XX_WDOG_BASE,
221 .end = DA8XX_WDOG_BASE + SZ_4K - 1,
222 .flags = IORESOURCE_MEM,
226 struct platform_device davinci_wdt_device = {
227 .name = "watchdog",
228 .id = -1,
229 .num_resources = ARRAY_SIZE(da8xx_watchdog_resources),
230 .resource = da8xx_watchdog_resources,
233 int __init da8xx_register_watchdog(void)
235 return platform_device_register(&davinci_wdt_device);
238 static struct resource da8xx_emac_resources[] = {
240 .start = DA8XX_EMAC_CPPI_PORT_BASE,
241 .end = DA8XX_EMAC_CPPI_PORT_BASE + 0x5000 - 1,
242 .flags = IORESOURCE_MEM,
245 .start = IRQ_DA8XX_C0_RX_THRESH_PULSE,
246 .end = IRQ_DA8XX_C0_RX_THRESH_PULSE,
247 .flags = IORESOURCE_IRQ,
250 .start = IRQ_DA8XX_C0_RX_PULSE,
251 .end = IRQ_DA8XX_C0_RX_PULSE,
252 .flags = IORESOURCE_IRQ,
255 .start = IRQ_DA8XX_C0_TX_PULSE,
256 .end = IRQ_DA8XX_C0_TX_PULSE,
257 .flags = IORESOURCE_IRQ,
260 .start = IRQ_DA8XX_C0_MISC_PULSE,
261 .end = IRQ_DA8XX_C0_MISC_PULSE,
262 .flags = IORESOURCE_IRQ,
266 struct emac_platform_data da8xx_emac_pdata = {
267 .ctrl_reg_offset = DA8XX_EMAC_CTRL_REG_OFFSET,
268 .ctrl_mod_reg_offset = DA8XX_EMAC_MOD_REG_OFFSET,
269 .ctrl_ram_offset = DA8XX_EMAC_RAM_OFFSET,
270 .mdio_reg_offset = DA8XX_MDIO_REG_OFFSET,
271 .ctrl_ram_size = DA8XX_EMAC_CTRL_RAM_SIZE,
272 .version = EMAC_VERSION_2,
275 static struct platform_device da8xx_emac_device = {
276 .name = "davinci_emac",
277 .id = 1,
278 .dev = {
279 .platform_data = &da8xx_emac_pdata,
281 .num_resources = ARRAY_SIZE(da8xx_emac_resources),
282 .resource = da8xx_emac_resources,
285 int __init da8xx_register_emac(void)
287 return platform_device_register(&da8xx_emac_device);
290 static struct resource da830_mcasp1_resources[] = {
292 .name = "mcasp1",
293 .start = DAVINCI_DA830_MCASP1_REG_BASE,
294 .end = DAVINCI_DA830_MCASP1_REG_BASE + (SZ_1K * 12) - 1,
295 .flags = IORESOURCE_MEM,
297 /* TX event */
299 .start = DAVINCI_DA830_DMA_MCASP1_AXEVT,
300 .end = DAVINCI_DA830_DMA_MCASP1_AXEVT,
301 .flags = IORESOURCE_DMA,
303 /* RX event */
305 .start = DAVINCI_DA830_DMA_MCASP1_AREVT,
306 .end = DAVINCI_DA830_DMA_MCASP1_AREVT,
307 .flags = IORESOURCE_DMA,
311 static struct platform_device da830_mcasp1_device = {
312 .name = "davinci-mcasp",
313 .id = 1,
314 .num_resources = ARRAY_SIZE(da830_mcasp1_resources),
315 .resource = da830_mcasp1_resources,
318 static struct resource da850_mcasp_resources[] = {
320 .name = "mcasp",
321 .start = DAVINCI_DA8XX_MCASP0_REG_BASE,
322 .end = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1,
323 .flags = IORESOURCE_MEM,
325 /* TX event */
327 .start = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
328 .end = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
329 .flags = IORESOURCE_DMA,
331 /* RX event */
333 .start = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
334 .end = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
335 .flags = IORESOURCE_DMA,
339 static struct platform_device da850_mcasp_device = {
340 .name = "davinci-mcasp",
341 .id = 0,
342 .num_resources = ARRAY_SIZE(da850_mcasp_resources),
343 .resource = da850_mcasp_resources,
346 void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata)
348 /* DA830/OMAP-L137 has 3 instances of McASP */
349 if (cpu_is_davinci_da830() && id == 1) {
350 da830_mcasp1_device.dev.platform_data = pdata;
351 platform_device_register(&da830_mcasp1_device);
352 } else if (cpu_is_davinci_da850()) {
353 da850_mcasp_device.dev.platform_data = pdata;
354 platform_device_register(&da850_mcasp_device);
358 static const struct display_panel disp_panel = {
359 QVGA,
362 COLOR_ACTIVE,
365 static struct lcd_ctrl_config lcd_cfg = {
366 &disp_panel,
367 .ac_bias = 255,
368 .ac_bias_intrpt = 0,
369 .dma_burst_sz = 16,
370 .bpp = 16,
371 .fdd = 255,
372 .tft_alt_mode = 0,
373 .stn_565_mode = 0,
374 .mono_8bit_mode = 0,
375 .invert_line_clock = 1,
376 .invert_frm_clock = 1,
377 .sync_edge = 0,
378 .sync_ctrl = 1,
379 .raster_order = 0,
382 static struct da8xx_lcdc_platform_data da850_evm_lcdc_pdata = {
383 .manu_name = "sharp",
384 .controller_data = &lcd_cfg,
385 .type = "Sharp_LK043T1DG01",
388 static struct resource da8xx_lcdc_resources[] = {
389 [0] = { /* registers */
390 .start = DA8XX_LCD_CNTRL_BASE,
391 .end = DA8XX_LCD_CNTRL_BASE + SZ_4K - 1,
392 .flags = IORESOURCE_MEM,
394 [1] = { /* interrupt */
395 .start = IRQ_DA8XX_LCDINT,
396 .end = IRQ_DA8XX_LCDINT,
397 .flags = IORESOURCE_IRQ,
401 static struct platform_device da850_lcdc_device = {
402 .name = "da8xx_lcdc",
403 .id = 0,
404 .num_resources = ARRAY_SIZE(da8xx_lcdc_resources),
405 .resource = da8xx_lcdc_resources,
406 .dev = {
407 .platform_data = &da850_evm_lcdc_pdata,
411 int __init da8xx_register_lcdc(void)
413 return platform_device_register(&da850_lcdc_device);
416 static struct resource da8xx_mmcsd0_resources[] = {
417 { /* registers */
418 .start = DA8XX_MMCSD0_BASE,
419 .end = DA8XX_MMCSD0_BASE + SZ_4K - 1,
420 .flags = IORESOURCE_MEM,
422 { /* interrupt */
423 .start = IRQ_DA8XX_MMCSDINT0,
424 .end = IRQ_DA8XX_MMCSDINT0,
425 .flags = IORESOURCE_IRQ,
427 { /* DMA RX */
428 .start = EDMA_CTLR_CHAN(0, 16),
429 .end = EDMA_CTLR_CHAN(0, 16),
430 .flags = IORESOURCE_DMA,
432 { /* DMA TX */
433 .start = EDMA_CTLR_CHAN(0, 17),
434 .end = EDMA_CTLR_CHAN(0, 17),
435 .flags = IORESOURCE_DMA,
439 static struct platform_device da8xx_mmcsd0_device = {
440 .name = "davinci_mmc",
441 .id = 0,
442 .num_resources = ARRAY_SIZE(da8xx_mmcsd0_resources),
443 .resource = da8xx_mmcsd0_resources,
446 int __init da8xx_register_mmcsd0(struct davinci_mmc_config *config)
448 da8xx_mmcsd0_device.dev.platform_data = config;
449 return platform_device_register(&da8xx_mmcsd0_device);