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drm/radeon/kms: fix use of vram scratch page on evergreen/ni
[linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git] / drivers / s390 / net / qeth_core_main.c
blob81534437373a3c1209c914db4fb2a32d45860e44
1 /*
2 * drivers/s390/net/qeth_core_main.c
3 *
4 * Copyright IBM Corp. 2007, 2009
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
11 #define KMSG_COMPONENT "qeth"
12 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
13
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/string.h>
17 #include <linux/errno.h>
18 #include <linux/kernel.h>
19 #include <linux/ip.h>
20 #include <linux/tcp.h>
21 #include <linux/mii.h>
22 #include <linux/kthread.h>
23 #include <linux/slab.h>
24 #include <net/iucv/af_iucv.h>
25
26 #include <asm/ebcdic.h>
27 #include <asm/io.h>
28 #include <asm/sysinfo.h>
29
30 #include "qeth_core.h"
31
32 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
33 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
34 /* N P A M L V H */
35 [QETH_DBF_SETUP] = {"qeth_setup",
36 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
37 [QETH_DBF_MSG] = {"qeth_msg",
38 8, 1, 128, 3, &debug_sprintf_view, NULL},
39 [QETH_DBF_CTRL] = {"qeth_control",
40 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
41 };
42 EXPORT_SYMBOL_GPL(qeth_dbf);
43
44 struct qeth_card_list_struct qeth_core_card_list;
45 EXPORT_SYMBOL_GPL(qeth_core_card_list);
46 struct kmem_cache *qeth_core_header_cache;
47 EXPORT_SYMBOL_GPL(qeth_core_header_cache);
48 static struct kmem_cache *qeth_qdio_outbuf_cache;
49
50 static struct device *qeth_core_root_dev;
51 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
52 static struct lock_class_key qdio_out_skb_queue_key;
53
54 static void qeth_send_control_data_cb(struct qeth_channel *,
55 struct qeth_cmd_buffer *);
56 static int qeth_issue_next_read(struct qeth_card *);
57 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
58 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
59 static void qeth_free_buffer_pool(struct qeth_card *);
60 static int qeth_qdio_establish(struct qeth_card *);
61 static void qeth_free_qdio_buffers(struct qeth_card *);
62 static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
63 struct qeth_qdio_out_buffer *buf,
64 enum iucv_tx_notify notification);
65 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
66 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
67 struct qeth_qdio_out_buffer *buf,
68 enum qeth_qdio_buffer_states newbufstate);
69
70
71 static inline const char *qeth_get_cardname(struct qeth_card *card)
72 {
73 if (card->info.guestlan) {
74 switch (card->info.type) {
75 case QETH_CARD_TYPE_OSD:
76 return " Guest LAN QDIO";
77 case QETH_CARD_TYPE_IQD:
78 return " Guest LAN Hiper";
79 case QETH_CARD_TYPE_OSM:
80 return " Guest LAN QDIO - OSM";
81 case QETH_CARD_TYPE_OSX:
82 return " Guest LAN QDIO - OSX";
83 default:
84 return " unknown";
85 }
86 } else {
87 switch (card->info.type) {
88 case QETH_CARD_TYPE_OSD:
89 return " OSD Express";
90 case QETH_CARD_TYPE_IQD:
91 return " HiperSockets";
92 case QETH_CARD_TYPE_OSN:
93 return " OSN QDIO";
94 case QETH_CARD_TYPE_OSM:
95 return " OSM QDIO";
96 case QETH_CARD_TYPE_OSX:
97 return " OSX QDIO";
98 default:
99 return " unknown";
100 }
101 }
102 return " n/a";
103 }
104
105 /* max length to be returned: 14 */
106 const char *qeth_get_cardname_short(struct qeth_card *card)
107 {
108 if (card->info.guestlan) {
109 switch (card->info.type) {
110 case QETH_CARD_TYPE_OSD:
111 return "GuestLAN QDIO";
112 case QETH_CARD_TYPE_IQD:
113 return "GuestLAN Hiper";
114 case QETH_CARD_TYPE_OSM:
115 return "GuestLAN OSM";
116 case QETH_CARD_TYPE_OSX:
117 return "GuestLAN OSX";
118 default:
119 return "unknown";
120 }
121 } else {
122 switch (card->info.type) {
123 case QETH_CARD_TYPE_OSD:
124 switch (card->info.link_type) {
125 case QETH_LINK_TYPE_FAST_ETH:
126 return "OSD_100";
127 case QETH_LINK_TYPE_HSTR:
128 return "HSTR";
129 case QETH_LINK_TYPE_GBIT_ETH:
130 return "OSD_1000";
131 case QETH_LINK_TYPE_10GBIT_ETH:
132 return "OSD_10GIG";
133 case QETH_LINK_TYPE_LANE_ETH100:
134 return "OSD_FE_LANE";
135 case QETH_LINK_TYPE_LANE_TR:
136 return "OSD_TR_LANE";
137 case QETH_LINK_TYPE_LANE_ETH1000:
138 return "OSD_GbE_LANE";
139 case QETH_LINK_TYPE_LANE:
140 return "OSD_ATM_LANE";
141 default:
142 return "OSD_Express";
143 }
144 case QETH_CARD_TYPE_IQD:
145 return "HiperSockets";
146 case QETH_CARD_TYPE_OSN:
147 return "OSN";
148 case QETH_CARD_TYPE_OSM:
149 return "OSM_1000";
150 case QETH_CARD_TYPE_OSX:
151 return "OSX_10GIG";
152 default:
153 return "unknown";
154 }
155 }
156 return "n/a";
157 }
158
159 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
160 int clear_start_mask)
161 {
162 unsigned long flags;
163
164 spin_lock_irqsave(&card->thread_mask_lock, flags);
165 card->thread_allowed_mask = threads;
166 if (clear_start_mask)
167 card->thread_start_mask &= threads;
168 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
169 wake_up(&card->wait_q);
170 }
171 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
172
173 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
174 {
175 unsigned long flags;
176 int rc = 0;
177
178 spin_lock_irqsave(&card->thread_mask_lock, flags);
179 rc = (card->thread_running_mask & threads);
180 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
181 return rc;
182 }
183 EXPORT_SYMBOL_GPL(qeth_threads_running);
184
185 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
186 {
187 return wait_event_interruptible(card->wait_q,
188 qeth_threads_running(card, threads) == 0);
189 }
190 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
191
192 void qeth_clear_working_pool_list(struct qeth_card *card)
193 {
194 struct qeth_buffer_pool_entry *pool_entry, *tmp;
195
196 QETH_CARD_TEXT(card, 5, "clwrklst");
197 list_for_each_entry_safe(pool_entry, tmp,
198 &card->qdio.in_buf_pool.entry_list, list){
199 list_del(&pool_entry->list);
200 }
201 }
202 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
203
204 static int qeth_alloc_buffer_pool(struct qeth_card *card)
205 {
206 struct qeth_buffer_pool_entry *pool_entry;
207 void *ptr;
208 int i, j;
209
210 QETH_CARD_TEXT(card, 5, "alocpool");
211 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
212 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
213 if (!pool_entry) {
214 qeth_free_buffer_pool(card);
215 return -ENOMEM;
216 }
217 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
218 ptr = (void *) __get_free_page(GFP_KERNEL);
219 if (!ptr) {
220 while (j > 0)
221 free_page((unsigned long)
222 pool_entry->elements[--j]);
223 kfree(pool_entry);
224 qeth_free_buffer_pool(card);
225 return -ENOMEM;
226 }
227 pool_entry->elements[j] = ptr;
228 }
229 list_add(&pool_entry->init_list,
230 &card->qdio.init_pool.entry_list);
231 }
232 return 0;
233 }
234
235 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
236 {
237 QETH_CARD_TEXT(card, 2, "realcbp");
238
239 if ((card->state != CARD_STATE_DOWN) &&
240 (card->state != CARD_STATE_RECOVER))
241 return -EPERM;
242
243 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
244 qeth_clear_working_pool_list(card);
245 qeth_free_buffer_pool(card);
246 card->qdio.in_buf_pool.buf_count = bufcnt;
247 card->qdio.init_pool.buf_count = bufcnt;
248 return qeth_alloc_buffer_pool(card);
249 }
250 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
251
252 static inline int qeth_cq_init(struct qeth_card *card)
253 {
254 int rc;
255
256 if (card->options.cq == QETH_CQ_ENABLED) {
257 QETH_DBF_TEXT(SETUP, 2, "cqinit");
258 memset(card->qdio.c_q->qdio_bufs, 0,
259 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
260 card->qdio.c_q->next_buf_to_init = 127;
261 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
262 card->qdio.no_in_queues - 1, 0,
263 127);
264 if (rc) {
265 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
266 goto out;
267 }
268 }
269 rc = 0;
270 out:
271 return rc;
272 }
273
274 static inline int qeth_alloc_cq(struct qeth_card *card)
275 {
276 int rc;
277
278 if (card->options.cq == QETH_CQ_ENABLED) {
279 int i;
280 struct qdio_outbuf_state *outbuf_states;
281
282 QETH_DBF_TEXT(SETUP, 2, "cqon");
283 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q),
284 GFP_KERNEL);
285 if (!card->qdio.c_q) {
286 rc = -1;
287 goto kmsg_out;
288 }
289 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *));
290
291 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
292 card->qdio.c_q->bufs[i].buffer =
293 &card->qdio.c_q->qdio_bufs[i];
294 }
295
296 card->qdio.no_in_queues = 2;
297
298 card->qdio.out_bufstates = (struct qdio_outbuf_state *)
299 kzalloc(card->qdio.no_out_queues *
300 QDIO_MAX_BUFFERS_PER_Q *
301 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
302 outbuf_states = card->qdio.out_bufstates;
303 if (outbuf_states == NULL) {
304 rc = -1;
305 goto free_cq_out;
306 }
307 for (i = 0; i < card->qdio.no_out_queues; ++i) {
308 card->qdio.out_qs[i]->bufstates = outbuf_states;
309 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
310 }
311 } else {
312 QETH_DBF_TEXT(SETUP, 2, "nocq");
313 card->qdio.c_q = NULL;
314 card->qdio.no_in_queues = 1;
315 }
316 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
317 rc = 0;
318 out:
319 return rc;
320 free_cq_out:
321 kfree(card->qdio.c_q);
322 card->qdio.c_q = NULL;
323 kmsg_out:
324 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
325 goto out;
326 }
327
328 static inline void qeth_free_cq(struct qeth_card *card)
329 {
330 if (card->qdio.c_q) {
331 --card->qdio.no_in_queues;
332 kfree(card->qdio.c_q);
333 card->qdio.c_q = NULL;
334 }
335 kfree(card->qdio.out_bufstates);
336 card->qdio.out_bufstates = NULL;
337 }
338
339 static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
340 int delayed) {
341 enum iucv_tx_notify n;
342
343 switch (sbalf15) {
344 case 0:
345 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
346 break;
347 case 4:
348 case 16:
349 case 17:
350 case 18:
351 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
352 TX_NOTIFY_UNREACHABLE;
353 break;
354 default:
355 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
356 TX_NOTIFY_GENERALERROR;
357 break;
358 }
359
360 return n;
361 }
362
363 static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
364 int bidx, int forced_cleanup)
365 {
366 if (q->bufs[bidx]->next_pending != NULL) {
367 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
368 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
369
370 while (c) {
371 if (forced_cleanup ||
372 atomic_read(&c->state) ==
373 QETH_QDIO_BUF_HANDLED_DELAYED) {
374 struct qeth_qdio_out_buffer *f = c;
375 QETH_CARD_TEXT(f->q->card, 5, "fp");
376 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
377 /* release here to avoid interleaving between
378 outbound tasklet and inbound tasklet
379 regarding notifications and lifecycle */
380 qeth_release_skbs(c);
381
382 c = f->next_pending;
383 BUG_ON(head->next_pending != f);
384 head->next_pending = c;
385 kmem_cache_free(qeth_qdio_outbuf_cache, f);
386 } else {
387 head = c;
388 c = c->next_pending;
389 }
390
391 }
392 }
393 }
394
395
396 static inline void qeth_qdio_handle_aob(struct qeth_card *card,
397 unsigned long phys_aob_addr) {
398 struct qaob *aob;
399 struct qeth_qdio_out_buffer *buffer;
400 enum iucv_tx_notify notification;
401
402 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
403 QETH_CARD_TEXT(card, 5, "haob");
404 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
405 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
406 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
407
408 BUG_ON(buffer == NULL);
409
410 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
411 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
412 notification = TX_NOTIFY_OK;
413 } else {
414 BUG_ON(atomic_read(&buffer->state) != QETH_QDIO_BUF_PENDING);
415
416 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
417 notification = TX_NOTIFY_DELAYED_OK;
418 }
419
420 if (aob->aorc != 0) {
421 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
422 notification = qeth_compute_cq_notification(aob->aorc, 1);
423 }
424 qeth_notify_skbs(buffer->q, buffer, notification);
425
426 buffer->aob = NULL;
427 qeth_clear_output_buffer(buffer->q, buffer,
428 QETH_QDIO_BUF_HANDLED_DELAYED);
429 /* from here on: do not touch buffer anymore */
430 qdio_release_aob(aob);
431 }
432
433 static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
434 {
435 return card->options.cq == QETH_CQ_ENABLED &&
436 card->qdio.c_q != NULL &&
437 queue != 0 &&
438 queue == card->qdio.no_in_queues - 1;
439 }
440
441
442 static int qeth_issue_next_read(struct qeth_card *card)
443 {
444 int rc;
445 struct qeth_cmd_buffer *iob;
446
447 QETH_CARD_TEXT(card, 5, "issnxrd");
448 if (card->read.state != CH_STATE_UP)
449 return -EIO;
450 iob = qeth_get_buffer(&card->read);
451 if (!iob) {
452 dev_warn(&card->gdev->dev, "The qeth device driver "
453 "failed to recover an error on the device\n");
454 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
455 "available\n", dev_name(&card->gdev->dev));
456 return -ENOMEM;
457 }
458 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
459 QETH_CARD_TEXT(card, 6, "noirqpnd");
460 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
461 (addr_t) iob, 0, 0);
462 if (rc) {
463 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
464 "rc=%i\n", dev_name(&card->gdev->dev), rc);
465 atomic_set(&card->read.irq_pending, 0);
466 card->read_or_write_problem = 1;
467 qeth_schedule_recovery(card);
468 wake_up(&card->wait_q);
469 }
470 return rc;
471 }
472
473 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
474 {
475 struct qeth_reply *reply;
476
477 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
478 if (reply) {
479 atomic_set(&reply->refcnt, 1);
480 atomic_set(&reply->received, 0);
481 reply->card = card;
482 };
483 return reply;
484 }
485
486 static void qeth_get_reply(struct qeth_reply *reply)
487 {
488 WARN_ON(atomic_read(&reply->refcnt) <= 0);
489 atomic_inc(&reply->refcnt);
490 }
491
492 static void qeth_put_reply(struct qeth_reply *reply)
493 {
494 WARN_ON(atomic_read(&reply->refcnt) <= 0);
495 if (atomic_dec_and_test(&reply->refcnt))
496 kfree(reply);
497 }
498
499 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
500 struct qeth_card *card)
501 {
502 char *ipa_name;
503 int com = cmd->hdr.command;
504 ipa_name = qeth_get_ipa_cmd_name(com);
505 if (rc)
506 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
507 "x%X \"%s\"\n",
508 ipa_name, com, dev_name(&card->gdev->dev),
509 QETH_CARD_IFNAME(card), rc,
510 qeth_get_ipa_msg(rc));
511 else
512 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
513 ipa_name, com, dev_name(&card->gdev->dev),
514 QETH_CARD_IFNAME(card));
515 }
516
517 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
518 struct qeth_cmd_buffer *iob)
519 {
520 struct qeth_ipa_cmd *cmd = NULL;
521
522 QETH_CARD_TEXT(card, 5, "chkipad");
523 if (IS_IPA(iob->data)) {
524 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
525 if (IS_IPA_REPLY(cmd)) {
526 if (cmd->hdr.command != IPA_CMD_SETCCID &&
527 cmd->hdr.command != IPA_CMD_DELCCID &&
528 cmd->hdr.command != IPA_CMD_MODCCID &&
529 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
530 qeth_issue_ipa_msg(cmd,
531 cmd->hdr.return_code, card);
532 return cmd;
533 } else {
534 switch (cmd->hdr.command) {
535 case IPA_CMD_STOPLAN:
536 dev_warn(&card->gdev->dev,
537 "The link for interface %s on CHPID"
538 " 0x%X failed\n",
539 QETH_CARD_IFNAME(card),
540 card->info.chpid);
541 card->lan_online = 0;
542 if (card->dev && netif_carrier_ok(card->dev))
543 netif_carrier_off(card->dev);
544 return NULL;
545 case IPA_CMD_STARTLAN:
546 dev_info(&card->gdev->dev,
547 "The link for %s on CHPID 0x%X has"
548 " been restored\n",
549 QETH_CARD_IFNAME(card),
550 card->info.chpid);
551 netif_carrier_on(card->dev);
552 card->lan_online = 1;
553 if (card->info.hwtrap)
554 card->info.hwtrap = 2;
555 qeth_schedule_recovery(card);
556 return NULL;
557 case IPA_CMD_MODCCID:
558 return cmd;
559 case IPA_CMD_REGISTER_LOCAL_ADDR:
560 QETH_CARD_TEXT(card, 3, "irla");
561 break;
562 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
563 QETH_CARD_TEXT(card, 3, "urla");
564 break;
565 default:
566 QETH_DBF_MESSAGE(2, "Received data is IPA "
567 "but not a reply!\n");
568 break;
569 }
570 }
571 }
572 return cmd;
573 }
574
575 void qeth_clear_ipacmd_list(struct qeth_card *card)
576 {
577 struct qeth_reply *reply, *r;
578 unsigned long flags;
579
580 QETH_CARD_TEXT(card, 4, "clipalst");
581
582 spin_lock_irqsave(&card->lock, flags);
583 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
584 qeth_get_reply(reply);
585 reply->rc = -EIO;
586 atomic_inc(&reply->received);
587 list_del_init(&reply->list);
588 wake_up(&reply->wait_q);
589 qeth_put_reply(reply);
590 }
591 spin_unlock_irqrestore(&card->lock, flags);
592 atomic_set(&card->write.irq_pending, 0);
593 }
594 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
595
596 static int qeth_check_idx_response(struct qeth_card *card,
597 unsigned char *buffer)
598 {
599 if (!buffer)
600 return 0;
601
602 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
603 if ((buffer[2] & 0xc0) == 0xc0) {
604 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
605 "with cause code 0x%02x%s\n",
606 buffer[4],
607 ((buffer[4] == 0x22) ?
608 " -- try another portname" : ""));
609 QETH_CARD_TEXT(card, 2, "ckidxres");
610 QETH_CARD_TEXT(card, 2, " idxterm");
611 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
612 if (buffer[4] == 0xf6) {
613 dev_err(&card->gdev->dev,
614 "The qeth device is not configured "
615 "for the OSI layer required by z/VM\n");
616 return -EPERM;
617 }
618 return -EIO;
619 }
620 return 0;
621 }
622
623 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
624 __u32 len)
625 {
626 struct qeth_card *card;
627
628 card = CARD_FROM_CDEV(channel->ccwdev);
629 QETH_CARD_TEXT(card, 4, "setupccw");
630 if (channel == &card->read)
631 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
632 else
633 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
634 channel->ccw.count = len;
635 channel->ccw.cda = (__u32) __pa(iob);
636 }
637
638 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
639 {
640 __u8 index;
641
642 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
643 index = channel->io_buf_no;
644 do {
645 if (channel->iob[index].state == BUF_STATE_FREE) {
646 channel->iob[index].state = BUF_STATE_LOCKED;
647 channel->io_buf_no = (channel->io_buf_no + 1) %
648 QETH_CMD_BUFFER_NO;
649 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
650 return channel->iob + index;
651 }
652 index = (index + 1) % QETH_CMD_BUFFER_NO;
653 } while (index != channel->io_buf_no);
654
655 return NULL;
656 }
657
658 void qeth_release_buffer(struct qeth_channel *channel,
659 struct qeth_cmd_buffer *iob)
660 {
661 unsigned long flags;
662
663 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
664 spin_lock_irqsave(&channel->iob_lock, flags);
665 memset(iob->data, 0, QETH_BUFSIZE);
666 iob->state = BUF_STATE_FREE;
667 iob->callback = qeth_send_control_data_cb;
668 iob->rc = 0;
669 spin_unlock_irqrestore(&channel->iob_lock, flags);
670 }
671 EXPORT_SYMBOL_GPL(qeth_release_buffer);
672
673 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
674 {
675 struct qeth_cmd_buffer *buffer = NULL;
676 unsigned long flags;
677
678 spin_lock_irqsave(&channel->iob_lock, flags);
679 buffer = __qeth_get_buffer(channel);
680 spin_unlock_irqrestore(&channel->iob_lock, flags);
681 return buffer;
682 }
683
684 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
685 {
686 struct qeth_cmd_buffer *buffer;
687 wait_event(channel->wait_q,
688 ((buffer = qeth_get_buffer(channel)) != NULL));
689 return buffer;
690 }
691 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
692
693 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
694 {
695 int cnt;
696
697 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
698 qeth_release_buffer(channel, &channel->iob[cnt]);
699 channel->buf_no = 0;
700 channel->io_buf_no = 0;
701 }
702 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
703
704 static void qeth_send_control_data_cb(struct qeth_channel *channel,
705 struct qeth_cmd_buffer *iob)
706 {
707 struct qeth_card *card;
708 struct qeth_reply *reply, *r;
709 struct qeth_ipa_cmd *cmd;
710 unsigned long flags;
711 int keep_reply;
712 int rc = 0;
713
714 card = CARD_FROM_CDEV(channel->ccwdev);
715 QETH_CARD_TEXT(card, 4, "sndctlcb");
716 rc = qeth_check_idx_response(card, iob->data);
717 switch (rc) {
718 case 0:
719 break;
720 case -EIO:
721 qeth_clear_ipacmd_list(card);
722 qeth_schedule_recovery(card);
723 /* fall through */
724 default:
725 goto out;
726 }
727
728 cmd = qeth_check_ipa_data(card, iob);
729 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
730 goto out;
731 /*in case of OSN : check if cmd is set */
732 if (card->info.type == QETH_CARD_TYPE_OSN &&
733 cmd &&
734 cmd->hdr.command != IPA_CMD_STARTLAN &&
735 card->osn_info.assist_cb != NULL) {
736 card->osn_info.assist_cb(card->dev, cmd);
737 goto out;
738 }
739
740 spin_lock_irqsave(&card->lock, flags);
741 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
742 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
743 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
744 qeth_get_reply(reply);
745 list_del_init(&reply->list);
746 spin_unlock_irqrestore(&card->lock, flags);
747 keep_reply = 0;
748 if (reply->callback != NULL) {
749 if (cmd) {
750 reply->offset = (__u16)((char *)cmd -
751 (char *)iob->data);
752 keep_reply = reply->callback(card,
753 reply,
754 (unsigned long)cmd);
755 } else
756 keep_reply = reply->callback(card,
757 reply,
758 (unsigned long)iob);
759 }
760 if (cmd)
761 reply->rc = (u16) cmd->hdr.return_code;
762 else if (iob->rc)
763 reply->rc = iob->rc;
764 if (keep_reply) {
765 spin_lock_irqsave(&card->lock, flags);
766 list_add_tail(&reply->list,
767 &card->cmd_waiter_list);
768 spin_unlock_irqrestore(&card->lock, flags);
769 } else {
770 atomic_inc(&reply->received);
771 wake_up(&reply->wait_q);
772 }
773 qeth_put_reply(reply);
774 goto out;
775 }
776 }
777 spin_unlock_irqrestore(&card->lock, flags);
778 out:
779 memcpy(&card->seqno.pdu_hdr_ack,
780 QETH_PDU_HEADER_SEQ_NO(iob->data),
781 QETH_SEQ_NO_LENGTH);
782 qeth_release_buffer(channel, iob);
783 }
784
785 static int qeth_setup_channel(struct qeth_channel *channel)
786 {
787 int cnt;
788
789 QETH_DBF_TEXT(SETUP, 2, "setupch");
790 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
791 channel->iob[cnt].data =
792 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
793 if (channel->iob[cnt].data == NULL)
794 break;
795 channel->iob[cnt].state = BUF_STATE_FREE;
796 channel->iob[cnt].channel = channel;
797 channel->iob[cnt].callback = qeth_send_control_data_cb;
798 channel->iob[cnt].rc = 0;
799 }
800 if (cnt < QETH_CMD_BUFFER_NO) {
801 while (cnt-- > 0)
802 kfree(channel->iob[cnt].data);
803 return -ENOMEM;
804 }
805 channel->buf_no = 0;
806 channel->io_buf_no = 0;
807 atomic_set(&channel->irq_pending, 0);
808 spin_lock_init(&channel->iob_lock);
809
810 init_waitqueue_head(&channel->wait_q);
811 return 0;
812 }
813
814 static int qeth_set_thread_start_bit(struct qeth_card *card,
815 unsigned long thread)
816 {
817 unsigned long flags;
818
819 spin_lock_irqsave(&card->thread_mask_lock, flags);
820 if (!(card->thread_allowed_mask & thread) ||
821 (card->thread_start_mask & thread)) {
822 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
823 return -EPERM;
824 }
825 card->thread_start_mask |= thread;
826 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
827 return 0;
828 }
829
830 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
831 {
832 unsigned long flags;
833
834 spin_lock_irqsave(&card->thread_mask_lock, flags);
835 card->thread_start_mask &= ~thread;
836 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
837 wake_up(&card->wait_q);
838 }
839 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
840
841 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
842 {
843 unsigned long flags;
844
845 spin_lock_irqsave(&card->thread_mask_lock, flags);
846 card->thread_running_mask &= ~thread;
847 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
848 wake_up(&card->wait_q);
849 }
850 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
851
852 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
853 {
854 unsigned long flags;
855 int rc = 0;
856
857 spin_lock_irqsave(&card->thread_mask_lock, flags);
858 if (card->thread_start_mask & thread) {
859 if ((card->thread_allowed_mask & thread) &&
860 !(card->thread_running_mask & thread)) {
861 rc = 1;
862 card->thread_start_mask &= ~thread;
863 card->thread_running_mask |= thread;
864 } else
865 rc = -EPERM;
866 }
867 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
868 return rc;
869 }
870
871 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
872 {
873 int rc = 0;
874
875 wait_event(card->wait_q,
876 (rc = __qeth_do_run_thread(card, thread)) >= 0);
877 return rc;
878 }
879 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
880
881 void qeth_schedule_recovery(struct qeth_card *card)
882 {
883 QETH_CARD_TEXT(card, 2, "startrec");
884 WARN_ON(1);
885 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
886 schedule_work(&card->kernel_thread_starter);
887 }
888 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
889
890 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
891 {
892 int dstat, cstat;
893 char *sense;
894 struct qeth_card *card;
895
896 sense = (char *) irb->ecw;
897 cstat = irb->scsw.cmd.cstat;
898 dstat = irb->scsw.cmd.dstat;
899 card = CARD_FROM_CDEV(cdev);
900
901 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
902 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
903 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
904 QETH_CARD_TEXT(card, 2, "CGENCHK");
905 dev_warn(&cdev->dev, "The qeth device driver "
906 "failed to recover an error on the device\n");
907 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
908 dev_name(&cdev->dev), dstat, cstat);
909 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
910 16, 1, irb, 64, 1);
911 return 1;
912 }
913
914 if (dstat & DEV_STAT_UNIT_CHECK) {
915 if (sense[SENSE_RESETTING_EVENT_BYTE] &
916 SENSE_RESETTING_EVENT_FLAG) {
917 QETH_CARD_TEXT(card, 2, "REVIND");
918 return 1;
919 }
920 if (sense[SENSE_COMMAND_REJECT_BYTE] &
921 SENSE_COMMAND_REJECT_FLAG) {
922 QETH_CARD_TEXT(card, 2, "CMDREJi");
923 return 1;
924 }
925 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
926 QETH_CARD_TEXT(card, 2, "AFFE");
927 return 1;
928 }
929 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
930 QETH_CARD_TEXT(card, 2, "ZEROSEN");
931 return 0;
932 }
933 QETH_CARD_TEXT(card, 2, "DGENCHK");
934 return 1;
935 }
936 return 0;
937 }
938
939 static long __qeth_check_irb_error(struct ccw_device *cdev,
940 unsigned long intparm, struct irb *irb)
941 {
942 struct qeth_card *card;
943
944 card = CARD_FROM_CDEV(cdev);
945
946 if (!IS_ERR(irb))
947 return 0;
948
949 switch (PTR_ERR(irb)) {
950 case -EIO:
951 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
952 dev_name(&cdev->dev));
953 QETH_CARD_TEXT(card, 2, "ckirberr");
954 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
955 break;
956 case -ETIMEDOUT:
957 dev_warn(&cdev->dev, "A hardware operation timed out"
958 " on the device\n");
959 QETH_CARD_TEXT(card, 2, "ckirberr");
960 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
961 if (intparm == QETH_RCD_PARM) {
962 if (card && (card->data.ccwdev == cdev)) {
963 card->data.state = CH_STATE_DOWN;
964 wake_up(&card->wait_q);
965 }
966 }
967 break;
968 default:
969 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
970 dev_name(&cdev->dev), PTR_ERR(irb));
971 QETH_CARD_TEXT(card, 2, "ckirberr");
972 QETH_CARD_TEXT(card, 2, " rc???");
973 }
974 return PTR_ERR(irb);
975 }
976
977 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
978 struct irb *irb)
979 {
980 int rc;
981 int cstat, dstat;
982 struct qeth_cmd_buffer *buffer;
983 struct qeth_channel *channel;
984 struct qeth_card *card;
985 struct qeth_cmd_buffer *iob;
986 __u8 index;
987
988 if (__qeth_check_irb_error(cdev, intparm, irb))
989 return;
990 cstat = irb->scsw.cmd.cstat;
991 dstat = irb->scsw.cmd.dstat;
992
993 card = CARD_FROM_CDEV(cdev);
994 if (!card)
995 return;
996
997 QETH_CARD_TEXT(card, 5, "irq");
998
999 if (card->read.ccwdev == cdev) {
1000 channel = &card->read;
1001 QETH_CARD_TEXT(card, 5, "read");
1002 } else if (card->write.ccwdev == cdev) {
1003 channel = &card->write;
1004 QETH_CARD_TEXT(card, 5, "write");
1005 } else {
1006 channel = &card->data;
1007 QETH_CARD_TEXT(card, 5, "data");
1008 }
1009 atomic_set(&channel->irq_pending, 0);
1010
1011 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
1012 channel->state = CH_STATE_STOPPED;
1013
1014 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
1015 channel->state = CH_STATE_HALTED;
1016
1017 /*let's wake up immediately on data channel*/
1018 if ((channel == &card->data) && (intparm != 0) &&
1019 (intparm != QETH_RCD_PARM))
1020 goto out;
1021
1022 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
1023 QETH_CARD_TEXT(card, 6, "clrchpar");
1024 /* we don't have to handle this further */
1025 intparm = 0;
1026 }
1027 if (intparm == QETH_HALT_CHANNEL_PARM) {
1028 QETH_CARD_TEXT(card, 6, "hltchpar");
1029 /* we don't have to handle this further */
1030 intparm = 0;
1031 }
1032 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1033 (dstat & DEV_STAT_UNIT_CHECK) ||
1034 (cstat)) {
1035 if (irb->esw.esw0.erw.cons) {
1036 dev_warn(&channel->ccwdev->dev,
1037 "The qeth device driver failed to recover "
1038 "an error on the device\n");
1039 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1040 "0x%X dstat 0x%X\n",
1041 dev_name(&channel->ccwdev->dev), cstat, dstat);
1042 print_hex_dump(KERN_WARNING, "qeth: irb ",
1043 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1044 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1045 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1046 }
1047 if (intparm == QETH_RCD_PARM) {
1048 channel->state = CH_STATE_DOWN;
1049 goto out;
1050 }
1051 rc = qeth_get_problem(cdev, irb);
1052 if (rc) {
1053 qeth_clear_ipacmd_list(card);
1054 qeth_schedule_recovery(card);
1055 goto out;
1056 }
1057 }
1058
1059 if (intparm == QETH_RCD_PARM) {
1060 channel->state = CH_STATE_RCD_DONE;
1061 goto out;
1062 }
1063 if (intparm) {
1064 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1065 buffer->state = BUF_STATE_PROCESSED;
1066 }
1067 if (channel == &card->data)
1068 return;
1069 if (channel == &card->read &&
1070 channel->state == CH_STATE_UP)
1071 qeth_issue_next_read(card);
1072
1073 iob = channel->iob;
1074 index = channel->buf_no;
1075 while (iob[index].state == BUF_STATE_PROCESSED) {
1076 if (iob[index].callback != NULL)
1077 iob[index].callback(channel, iob + index);
1078
1079 index = (index + 1) % QETH_CMD_BUFFER_NO;
1080 }
1081 channel->buf_no = index;
1082 out:
1083 wake_up(&card->wait_q);
1084 return;
1085 }
1086
1087 static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
1088 struct qeth_qdio_out_buffer *buf,
1089 enum iucv_tx_notify notification)
1090 {
1091 struct sk_buff *skb;
1092
1093 if (skb_queue_empty(&buf->skb_list))
1094 goto out;
1095 skb = skb_peek(&buf->skb_list);
1096 while (skb) {
1097 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1098 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
1099 if (skb->protocol == ETH_P_AF_IUCV) {
1100 if (skb->sk) {
1101 struct iucv_sock *iucv = iucv_sk(skb->sk);
1102 iucv->sk_txnotify(skb, notification);
1103 }
1104 }
1105 if (skb_queue_is_last(&buf->skb_list, skb))
1106 skb = NULL;
1107 else
1108 skb = skb_queue_next(&buf->skb_list, skb);
1109 }
1110 out:
1111 return;
1112 }
1113
1114 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1115 {
1116 struct sk_buff *skb;
1117
1118 skb = skb_dequeue(&buf->skb_list);
1119 while (skb) {
1120 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1121 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
1122 atomic_dec(&skb->users);
1123 dev_kfree_skb_any(skb);
1124 skb = skb_dequeue(&buf->skb_list);
1125 }
1126 }
1127
1128 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1129 struct qeth_qdio_out_buffer *buf,
1130 enum qeth_qdio_buffer_states newbufstate)
1131 {
1132 int i;
1133
1134 /* is PCI flag set on buffer? */
1135 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1136 atomic_dec(&queue->set_pci_flags_count);
1137
1138 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1139 qeth_release_skbs(buf);
1140 }
1141 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
1142 if (buf->buffer->element[i].addr && buf->is_header[i])
1143 kmem_cache_free(qeth_core_header_cache,
1144 buf->buffer->element[i].addr);
1145 buf->is_header[i] = 0;
1146 buf->buffer->element[i].length = 0;
1147 buf->buffer->element[i].addr = NULL;
1148 buf->buffer->element[i].eflags = 0;
1149 buf->buffer->element[i].sflags = 0;
1150 }
1151 buf->buffer->element[15].eflags = 0;
1152 buf->buffer->element[15].sflags = 0;
1153 buf->next_element_to_fill = 0;
1154 atomic_set(&buf->state, newbufstate);
1155 }
1156
1157 static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1158 {
1159 int j;
1160
1161 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1162 if (!q->bufs[j])
1163 continue;
1164 qeth_cleanup_handled_pending(q, j, free);
1165 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1166 if (free) {
1167 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1168 q->bufs[j] = NULL;
1169 }
1170 }
1171 }
1172
1173 void qeth_clear_qdio_buffers(struct qeth_card *card)
1174 {
1175 int i;
1176
1177 QETH_CARD_TEXT(card, 2, "clearqdbf");
1178 /* clear outbound buffers to free skbs */
1179 for (i = 0; i < card->qdio.no_out_queues; ++i) {
1180 if (card->qdio.out_qs[i]) {
1181 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
1182 }
1183 }
1184 }
1185 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1186
1187 static void qeth_free_buffer_pool(struct qeth_card *card)
1188 {
1189 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1190 int i = 0;
1191 list_for_each_entry_safe(pool_entry, tmp,
1192 &card->qdio.init_pool.entry_list, init_list){
1193 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1194 free_page((unsigned long)pool_entry->elements[i]);
1195 list_del(&pool_entry->init_list);
1196 kfree(pool_entry);
1197 }
1198 }
1199
1200 static void qeth_free_qdio_buffers(struct qeth_card *card)
1201 {
1202 int i, j;
1203
1204 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
1205 QETH_QDIO_UNINITIALIZED)
1206 return;
1207
1208 qeth_free_cq(card);
1209 cancel_delayed_work_sync(&card->buffer_reclaim_work);
1210 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
1211 kfree_skb(card->qdio.in_q->bufs[j].rx_skb);
1212 kfree(card->qdio.in_q);
1213 card->qdio.in_q = NULL;
1214 /* inbound buffer pool */
1215 qeth_free_buffer_pool(card);
1216 /* free outbound qdio_qs */
1217 if (card->qdio.out_qs) {
1218 for (i = 0; i < card->qdio.no_out_queues; ++i) {
1219 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
1220 kfree(card->qdio.out_qs[i]);
1221 }
1222 kfree(card->qdio.out_qs);
1223 card->qdio.out_qs = NULL;
1224 }
1225 }
1226
1227 static void qeth_clean_channel(struct qeth_channel *channel)
1228 {
1229 int cnt;
1230
1231 QETH_DBF_TEXT(SETUP, 2, "freech");
1232 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1233 kfree(channel->iob[cnt].data);
1234 }
1235
1236 static void qeth_get_channel_path_desc(struct qeth_card *card)
1237 {
1238 struct ccw_device *ccwdev;
1239 struct channelPath_dsc {
1240 u8 flags;
1241 u8 lsn;
1242 u8 desc;
1243 u8 chpid;
1244 u8 swla;
1245 u8 zeroes;
1246 u8 chla;
1247 u8 chpp;
1248 } *chp_dsc;
1249
1250 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
1251
1252 ccwdev = card->data.ccwdev;
1253 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1254 if (chp_dsc != NULL) {
1255 if (card->info.type != QETH_CARD_TYPE_IQD) {
1256 /* CHPP field bit 6 == 1 -> single queue */
1257 if ((chp_dsc->chpp & 0x02) == 0x02) {
1258 if ((atomic_read(&card->qdio.state) !=
1259 QETH_QDIO_UNINITIALIZED) &&
1260 (card->qdio.no_out_queues == 4))
1261 /* change from 4 to 1 outbound queues */
1262 qeth_free_qdio_buffers(card);
1263 card->qdio.no_out_queues = 1;
1264 if (card->qdio.default_out_queue != 0)
1265 dev_info(&card->gdev->dev,
1266 "Priority Queueing not supported\n");
1267 card->qdio.default_out_queue = 0;
1268 } else {
1269 if ((atomic_read(&card->qdio.state) !=
1270 QETH_QDIO_UNINITIALIZED) &&
1271 (card->qdio.no_out_queues == 1)) {
1272 /* change from 1 to 4 outbound queues */
1273 qeth_free_qdio_buffers(card);
1274 card->qdio.default_out_queue = 2;
1275 }
1276 card->qdio.no_out_queues = 4;
1277 }
1278 }
1279 card->info.func_level = 0x4100 + chp_dsc->desc;
1280 kfree(chp_dsc);
1281 }
1282 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1283 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
1284 return;
1285 }
1286
1287 static void qeth_init_qdio_info(struct qeth_card *card)
1288 {
1289 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1290 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1291 /* inbound */
1292 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1293 if (card->info.type == QETH_CARD_TYPE_IQD)
1294 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1295 else
1296 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1297 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1298 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1299 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1300 }
1301
1302 static void qeth_set_intial_options(struct qeth_card *card)
1303 {
1304 card->options.route4.type = NO_ROUTER;
1305 card->options.route6.type = NO_ROUTER;
1306 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1307 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1308 card->options.fake_broadcast = 0;
1309 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1310 card->options.performance_stats = 0;
1311 card->options.rx_sg_cb = QETH_RX_SG_CB;
1312 card->options.isolation = ISOLATION_MODE_NONE;
1313 card->options.cq = QETH_CQ_DISABLED;
1314 }
1315
1316 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1317 {
1318 unsigned long flags;
1319 int rc = 0;
1320
1321 spin_lock_irqsave(&card->thread_mask_lock, flags);
1322 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
1323 (u8) card->thread_start_mask,
1324 (u8) card->thread_allowed_mask,
1325 (u8) card->thread_running_mask);
1326 rc = (card->thread_start_mask & thread);
1327 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1328 return rc;
1329 }
1330
1331 static void qeth_start_kernel_thread(struct work_struct *work)
1332 {
1333 struct qeth_card *card = container_of(work, struct qeth_card,
1334 kernel_thread_starter);
1335 QETH_CARD_TEXT(card , 2, "strthrd");
1336
1337 if (card->read.state != CH_STATE_UP &&
1338 card->write.state != CH_STATE_UP)
1339 return;
1340 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1341 kthread_run(card->discipline.recover, (void *) card,
1342 "qeth_recover");
1343 }
1344
1345 static int qeth_setup_card(struct qeth_card *card)
1346 {
1347
1348 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1349 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1350
1351 card->read.state = CH_STATE_DOWN;
1352 card->write.state = CH_STATE_DOWN;
1353 card->data.state = CH_STATE_DOWN;
1354 card->state = CARD_STATE_DOWN;
1355 card->lan_online = 0;
1356 card->read_or_write_problem = 0;
1357 card->dev = NULL;
1358 spin_lock_init(&card->vlanlock);
1359 spin_lock_init(&card->mclock);
1360 spin_lock_init(&card->lock);
1361 spin_lock_init(&card->ip_lock);
1362 spin_lock_init(&card->thread_mask_lock);
1363 mutex_init(&card->conf_mutex);
1364 mutex_init(&card->discipline_mutex);
1365 card->thread_start_mask = 0;
1366 card->thread_allowed_mask = 0;
1367 card->thread_running_mask = 0;
1368 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1369 INIT_LIST_HEAD(&card->ip_list);
1370 INIT_LIST_HEAD(card->ip_tbd_list);
1371 INIT_LIST_HEAD(&card->cmd_waiter_list);
1372 init_waitqueue_head(&card->wait_q);
1373 /* initial options */
1374 qeth_set_intial_options(card);
1375 /* IP address takeover */
1376 INIT_LIST_HEAD(&card->ipato.entries);
1377 card->ipato.enabled = 0;
1378 card->ipato.invert4 = 0;
1379 card->ipato.invert6 = 0;
1380 /* init QDIO stuff */
1381 qeth_init_qdio_info(card);
1382 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
1383 return 0;
1384 }
1385
1386 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1387 {
1388 struct qeth_card *card = container_of(slr, struct qeth_card,
1389 qeth_service_level);
1390 if (card->info.mcl_level[0])
1391 seq_printf(m, "qeth: %s firmware level %s\n",
1392 CARD_BUS_ID(card), card->info.mcl_level);
1393 }
1394
1395 static struct qeth_card *qeth_alloc_card(void)
1396 {
1397 struct qeth_card *card;
1398
1399 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1400 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1401 if (!card)
1402 goto out;
1403 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1404 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
1405 if (!card->ip_tbd_list) {
1406 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1407 goto out_card;
1408 }
1409 if (qeth_setup_channel(&card->read))
1410 goto out_ip;
1411 if (qeth_setup_channel(&card->write))
1412 goto out_channel;
1413 card->options.layer2 = -1;
1414 card->qeth_service_level.seq_print = qeth_core_sl_print;
1415 register_service_level(&card->qeth_service_level);
1416 return card;
1417
1418 out_channel:
1419 qeth_clean_channel(&card->read);
1420 out_ip:
1421 kfree(card->ip_tbd_list);
1422 out_card:
1423 kfree(card);
1424 out:
1425 return NULL;
1426 }
1427
1428 static int qeth_determine_card_type(struct qeth_card *card)
1429 {
1430 int i = 0;
1431
1432 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1433
1434 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1435 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1436 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1437 if ((CARD_RDEV(card)->id.dev_type ==
1438 known_devices[i][QETH_DEV_TYPE_IND]) &&
1439 (CARD_RDEV(card)->id.dev_model ==
1440 known_devices[i][QETH_DEV_MODEL_IND])) {
1441 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1442 card->qdio.no_out_queues =
1443 known_devices[i][QETH_QUEUE_NO_IND];
1444 card->qdio.no_in_queues = 1;
1445 card->info.is_multicast_different =
1446 known_devices[i][QETH_MULTICAST_IND];
1447 qeth_get_channel_path_desc(card);
1448 return 0;
1449 }
1450 i++;
1451 }
1452 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1453 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1454 "unknown type\n");
1455 return -ENOENT;
1456 }
1457
1458 static int qeth_clear_channel(struct qeth_channel *channel)
1459 {
1460 unsigned long flags;
1461 struct qeth_card *card;
1462 int rc;
1463
1464 card = CARD_FROM_CDEV(channel->ccwdev);
1465 QETH_CARD_TEXT(card, 3, "clearch");
1466 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1467 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1468 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1469
1470 if (rc)
1471 return rc;
1472 rc = wait_event_interruptible_timeout(card->wait_q,
1473 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1474 if (rc == -ERESTARTSYS)
1475 return rc;
1476 if (channel->state != CH_STATE_STOPPED)
1477 return -ETIME;
1478 channel->state = CH_STATE_DOWN;
1479 return 0;
1480 }
1481
1482 static int qeth_halt_channel(struct qeth_channel *channel)
1483 {
1484 unsigned long flags;
1485 struct qeth_card *card;
1486 int rc;
1487
1488 card = CARD_FROM_CDEV(channel->ccwdev);
1489 QETH_CARD_TEXT(card, 3, "haltch");
1490 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1491 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1492 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1493
1494 if (rc)
1495 return rc;
1496 rc = wait_event_interruptible_timeout(card->wait_q,
1497 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1498 if (rc == -ERESTARTSYS)
1499 return rc;
1500 if (channel->state != CH_STATE_HALTED)
1501 return -ETIME;
1502 return 0;
1503 }
1504
1505 static int qeth_halt_channels(struct qeth_card *card)
1506 {
1507 int rc1 = 0, rc2 = 0, rc3 = 0;
1508
1509 QETH_CARD_TEXT(card, 3, "haltchs");
1510 rc1 = qeth_halt_channel(&card->read);
1511 rc2 = qeth_halt_channel(&card->write);
1512 rc3 = qeth_halt_channel(&card->data);
1513 if (rc1)
1514 return rc1;
1515 if (rc2)
1516 return rc2;
1517 return rc3;
1518 }
1519
1520 static int qeth_clear_channels(struct qeth_card *card)
1521 {
1522 int rc1 = 0, rc2 = 0, rc3 = 0;
1523
1524 QETH_CARD_TEXT(card, 3, "clearchs");
1525 rc1 = qeth_clear_channel(&card->read);
1526 rc2 = qeth_clear_channel(&card->write);
1527 rc3 = qeth_clear_channel(&card->data);
1528 if (rc1)
1529 return rc1;
1530 if (rc2)
1531 return rc2;
1532 return rc3;
1533 }
1534
1535 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1536 {
1537 int rc = 0;
1538
1539 QETH_CARD_TEXT(card, 3, "clhacrd");
1540
1541 if (halt)
1542 rc = qeth_halt_channels(card);
1543 if (rc)
1544 return rc;
1545 return qeth_clear_channels(card);
1546 }
1547
1548 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1549 {
1550 int rc = 0;
1551
1552 QETH_CARD_TEXT(card, 3, "qdioclr");
1553 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1554 QETH_QDIO_CLEANING)) {
1555 case QETH_QDIO_ESTABLISHED:
1556 if (card->info.type == QETH_CARD_TYPE_IQD)
1557 rc = qdio_shutdown(CARD_DDEV(card),
1558 QDIO_FLAG_CLEANUP_USING_HALT);
1559 else
1560 rc = qdio_shutdown(CARD_DDEV(card),
1561 QDIO_FLAG_CLEANUP_USING_CLEAR);
1562 if (rc)
1563 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
1564 qdio_free(CARD_DDEV(card));
1565 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1566 break;
1567 case QETH_QDIO_CLEANING:
1568 return rc;
1569 default:
1570 break;
1571 }
1572 rc = qeth_clear_halt_card(card, use_halt);
1573 if (rc)
1574 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
1575 card->state = CARD_STATE_DOWN;
1576 return rc;
1577 }
1578 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1579
1580 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1581 int *length)
1582 {
1583 struct ciw *ciw;
1584 char *rcd_buf;
1585 int ret;
1586 struct qeth_channel *channel = &card->data;
1587 unsigned long flags;
1588
1589 /*
1590 * scan for RCD command in extended SenseID data
1591 */
1592 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1593 if (!ciw || ciw->cmd == 0)
1594 return -EOPNOTSUPP;
1595 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1596 if (!rcd_buf)
1597 return -ENOMEM;
1598
1599 channel->ccw.cmd_code = ciw->cmd;
1600 channel->ccw.cda = (__u32) __pa(rcd_buf);
1601 channel->ccw.count = ciw->count;
1602 channel->ccw.flags = CCW_FLAG_SLI;
1603 channel->state = CH_STATE_RCD;
1604 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1605 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1606 QETH_RCD_PARM, LPM_ANYPATH, 0,
1607 QETH_RCD_TIMEOUT);
1608 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1609 if (!ret)
1610 wait_event(card->wait_q,
1611 (channel->state == CH_STATE_RCD_DONE ||
1612 channel->state == CH_STATE_DOWN));
1613 if (channel->state == CH_STATE_DOWN)
1614 ret = -EIO;
1615 else
1616 channel->state = CH_STATE_DOWN;
1617 if (ret) {
1618 kfree(rcd_buf);
1619 *buffer = NULL;
1620 *length = 0;
1621 } else {
1622 *length = ciw->count;
1623 *buffer = rcd_buf;
1624 }
1625 return ret;
1626 }
1627
1628 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
1629 {
1630 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
1631 card->info.chpid = prcd[30];
1632 card->info.unit_addr2 = prcd[31];
1633 card->info.cula = prcd[63];
1634 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1635 (prcd[0x11] == _ascebc['M']));
1636 }
1637
1638 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1639 {
1640 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1641
1642 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && prcd[76] == 0xF5) {
1643 card->info.blkt.time_total = 250;
1644 card->info.blkt.inter_packet = 5;
1645 card->info.blkt.inter_packet_jumbo = 15;
1646 } else {
1647 card->info.blkt.time_total = 0;
1648 card->info.blkt.inter_packet = 0;
1649 card->info.blkt.inter_packet_jumbo = 0;
1650 }
1651 }
1652
1653 static void qeth_init_tokens(struct qeth_card *card)
1654 {
1655 card->token.issuer_rm_w = 0x00010103UL;
1656 card->token.cm_filter_w = 0x00010108UL;
1657 card->token.cm_connection_w = 0x0001010aUL;
1658 card->token.ulp_filter_w = 0x0001010bUL;
1659 card->token.ulp_connection_w = 0x0001010dUL;
1660 }
1661
1662 static void qeth_init_func_level(struct qeth_card *card)
1663 {
1664 switch (card->info.type) {
1665 case QETH_CARD_TYPE_IQD:
1666 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
1667 break;
1668 case QETH_CARD_TYPE_OSD:
1669 case QETH_CARD_TYPE_OSN:
1670 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1671 break;
1672 default:
1673 break;
1674 }
1675 }
1676
1677 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1678 void (*idx_reply_cb)(struct qeth_channel *,
1679 struct qeth_cmd_buffer *))
1680 {
1681 struct qeth_cmd_buffer *iob;
1682 unsigned long flags;
1683 int rc;
1684 struct qeth_card *card;
1685
1686 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1687 card = CARD_FROM_CDEV(channel->ccwdev);
1688 iob = qeth_get_buffer(channel);
1689 iob->callback = idx_reply_cb;
1690 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1691 channel->ccw.count = QETH_BUFSIZE;
1692 channel->ccw.cda = (__u32) __pa(iob->data);
1693
1694 wait_event(card->wait_q,
1695 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1696 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1697 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1698 rc = ccw_device_start(channel->ccwdev,
1699 &channel->ccw, (addr_t) iob, 0, 0);
1700 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1701
1702 if (rc) {
1703 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1704 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1705 atomic_set(&channel->irq_pending, 0);
1706 wake_up(&card->wait_q);
1707 return rc;
1708 }
1709 rc = wait_event_interruptible_timeout(card->wait_q,
1710 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1711 if (rc == -ERESTARTSYS)
1712 return rc;
1713 if (channel->state != CH_STATE_UP) {
1714 rc = -ETIME;
1715 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1716 qeth_clear_cmd_buffers(channel);
1717 } else
1718 rc = 0;
1719 return rc;
1720 }
1721
1722 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1723 void (*idx_reply_cb)(struct qeth_channel *,
1724 struct qeth_cmd_buffer *))
1725 {
1726 struct qeth_card *card;
1727 struct qeth_cmd_buffer *iob;
1728 unsigned long flags;
1729 __u16 temp;
1730 __u8 tmp;
1731 int rc;
1732 struct ccw_dev_id temp_devid;
1733
1734 card = CARD_FROM_CDEV(channel->ccwdev);
1735
1736 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1737
1738 iob = qeth_get_buffer(channel);
1739 iob->callback = idx_reply_cb;
1740 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1741 channel->ccw.count = IDX_ACTIVATE_SIZE;
1742 channel->ccw.cda = (__u32) __pa(iob->data);
1743 if (channel == &card->write) {
1744 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1745 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1746 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1747 card->seqno.trans_hdr++;
1748 } else {
1749 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1750 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1751 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1752 }
1753 tmp = ((__u8)card->info.portno) | 0x80;
1754 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1755 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1756 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1757 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1758 &card->info.func_level, sizeof(__u16));
1759 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1760 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1761 temp = (card->info.cula << 8) + card->info.unit_addr2;
1762 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1763
1764 wait_event(card->wait_q,
1765 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1766 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1767 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1768 rc = ccw_device_start(channel->ccwdev,
1769 &channel->ccw, (addr_t) iob, 0, 0);
1770 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1771
1772 if (rc) {
1773 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1774 rc);
1775 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1776 atomic_set(&channel->irq_pending, 0);
1777 wake_up(&card->wait_q);
1778 return rc;
1779 }
1780 rc = wait_event_interruptible_timeout(card->wait_q,
1781 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1782 if (rc == -ERESTARTSYS)
1783 return rc;
1784 if (channel->state != CH_STATE_ACTIVATING) {
1785 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1786 " failed to recover an error on the device\n");
1787 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1788 dev_name(&channel->ccwdev->dev));
1789 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1790 qeth_clear_cmd_buffers(channel);
1791 return -ETIME;
1792 }
1793 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1794 }
1795
1796 static int qeth_peer_func_level(int level)
1797 {
1798 if ((level & 0xff) == 8)
1799 return (level & 0xff) + 0x400;
1800 if (((level >> 8) & 3) == 1)
1801 return (level & 0xff) + 0x200;
1802 return level;
1803 }
1804
1805 static void qeth_idx_write_cb(struct qeth_channel *channel,
1806 struct qeth_cmd_buffer *iob)
1807 {
1808 struct qeth_card *card;
1809 __u16 temp;
1810
1811 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1812
1813 if (channel->state == CH_STATE_DOWN) {
1814 channel->state = CH_STATE_ACTIVATING;
1815 goto out;
1816 }
1817 card = CARD_FROM_CDEV(channel->ccwdev);
1818
1819 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1820 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
1821 dev_err(&card->write.ccwdev->dev,
1822 "The adapter is used exclusively by another "
1823 "host\n");
1824 else
1825 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1826 " negative reply\n",
1827 dev_name(&card->write.ccwdev->dev));
1828 goto out;
1829 }
1830 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1831 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1832 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1833 "function level mismatch (sent: 0x%x, received: "
1834 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1835 card->info.func_level, temp);
1836 goto out;
1837 }
1838 channel->state = CH_STATE_UP;
1839 out:
1840 qeth_release_buffer(channel, iob);
1841 }
1842
1843 static void qeth_idx_read_cb(struct qeth_channel *channel,
1844 struct qeth_cmd_buffer *iob)
1845 {
1846 struct qeth_card *card;
1847 __u16 temp;
1848
1849 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1850 if (channel->state == CH_STATE_DOWN) {
1851 channel->state = CH_STATE_ACTIVATING;
1852 goto out;
1853 }
1854
1855 card = CARD_FROM_CDEV(channel->ccwdev);
1856 if (qeth_check_idx_response(card, iob->data))
1857 goto out;
1858
1859 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1860 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1861 case QETH_IDX_ACT_ERR_EXCL:
1862 dev_err(&card->write.ccwdev->dev,
1863 "The adapter is used exclusively by another "
1864 "host\n");
1865 break;
1866 case QETH_IDX_ACT_ERR_AUTH:
1867 case QETH_IDX_ACT_ERR_AUTH_USER:
1868 dev_err(&card->read.ccwdev->dev,
1869 "Setting the device online failed because of "
1870 "insufficient authorization\n");
1871 break;
1872 default:
1873 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1874 " negative reply\n",
1875 dev_name(&card->read.ccwdev->dev));
1876 }
1877 QETH_CARD_TEXT_(card, 2, "idxread%c",
1878 QETH_IDX_ACT_CAUSE_CODE(iob->data));
1879 goto out;
1880 }
1881
1882 /**
1883 * * temporary fix for microcode bug
1884 * * to revert it,replace OR by AND
1885 * */
1886 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1887 (card->info.type == QETH_CARD_TYPE_OSD))
1888 card->info.portname_required = 1;
1889
1890 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1891 if (temp != qeth_peer_func_level(card->info.func_level)) {
1892 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1893 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1894 dev_name(&card->read.ccwdev->dev),
1895 card->info.func_level, temp);
1896 goto out;
1897 }
1898 memcpy(&card->token.issuer_rm_r,
1899 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1900 QETH_MPC_TOKEN_LENGTH);
1901 memcpy(&card->info.mcl_level[0],
1902 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1903 channel->state = CH_STATE_UP;
1904 out:
1905 qeth_release_buffer(channel, iob);
1906 }
1907
1908 void qeth_prepare_control_data(struct qeth_card *card, int len,
1909 struct qeth_cmd_buffer *iob)
1910 {
1911 qeth_setup_ccw(&card->write, iob->data, len);
1912 iob->callback = qeth_release_buffer;
1913
1914 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1915 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1916 card->seqno.trans_hdr++;
1917 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1918 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1919 card->seqno.pdu_hdr++;
1920 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1921 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1922 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1923 }
1924 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1925
1926 int qeth_send_control_data(struct qeth_card *card, int len,
1927 struct qeth_cmd_buffer *iob,
1928 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1929 unsigned long),
1930 void *reply_param)
1931 {
1932 int rc;
1933 unsigned long flags;
1934 struct qeth_reply *reply = NULL;
1935 unsigned long timeout, event_timeout;
1936 struct qeth_ipa_cmd *cmd;
1937
1938 QETH_CARD_TEXT(card, 2, "sendctl");
1939
1940 if (card->read_or_write_problem) {
1941 qeth_release_buffer(iob->channel, iob);
1942 return -EIO;
1943 }
1944 reply = qeth_alloc_reply(card);
1945 if (!reply) {
1946 return -ENOMEM;
1947 }
1948 reply->callback = reply_cb;
1949 reply->param = reply_param;
1950 if (card->state == CARD_STATE_DOWN)
1951 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1952 else
1953 reply->seqno = card->seqno.ipa++;
1954 init_waitqueue_head(&reply->wait_q);
1955 spin_lock_irqsave(&card->lock, flags);
1956 list_add_tail(&reply->list, &card->cmd_waiter_list);
1957 spin_unlock_irqrestore(&card->lock, flags);
1958 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1959
1960 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1961 qeth_prepare_control_data(card, len, iob);
1962
1963 if (IS_IPA(iob->data))
1964 event_timeout = QETH_IPA_TIMEOUT;
1965 else
1966 event_timeout = QETH_TIMEOUT;
1967 timeout = jiffies + event_timeout;
1968
1969 QETH_CARD_TEXT(card, 6, "noirqpnd");
1970 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1971 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1972 (addr_t) iob, 0, 0);
1973 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1974 if (rc) {
1975 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
1976 "ccw_device_start rc = %i\n",
1977 dev_name(&card->write.ccwdev->dev), rc);
1978 QETH_CARD_TEXT_(card, 2, " err%d", rc);
1979 spin_lock_irqsave(&card->lock, flags);
1980 list_del_init(&reply->list);
1981 qeth_put_reply(reply);
1982 spin_unlock_irqrestore(&card->lock, flags);
1983 qeth_release_buffer(iob->channel, iob);
1984 atomic_set(&card->write.irq_pending, 0);
1985 wake_up(&card->wait_q);
1986 return rc;
1987 }
1988
1989 /* we have only one long running ipassist, since we can ensure
1990 process context of this command we can sleep */
1991 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
1992 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
1993 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
1994 if (!wait_event_timeout(reply->wait_q,
1995 atomic_read(&reply->received), event_timeout))
1996 goto time_err;
1997 } else {
1998 while (!atomic_read(&reply->received)) {
1999 if (time_after(jiffies, timeout))
2000 goto time_err;
2001 cpu_relax();
2002 };
2003 }
2004
2005 if (reply->rc == -EIO)
2006 goto error;
2007 rc = reply->rc;
2008 qeth_put_reply(reply);
2009 return rc;
2010
2011 time_err:
2012 reply->rc = -ETIME;
2013 spin_lock_irqsave(&reply->card->lock, flags);
2014 list_del_init(&reply->list);
2015 spin_unlock_irqrestore(&reply->card->lock, flags);
2016 atomic_inc(&reply->received);
2017 error:
2018 atomic_set(&card->write.irq_pending, 0);
2019 qeth_release_buffer(iob->channel, iob);
2020 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
2021 rc = reply->rc;
2022 qeth_put_reply(reply);
2023 return rc;
2024 }
2025 EXPORT_SYMBOL_GPL(qeth_send_control_data);
2026
2027 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2028 unsigned long data)
2029 {
2030 struct qeth_cmd_buffer *iob;
2031
2032 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
2033
2034 iob = (struct qeth_cmd_buffer *) data;
2035 memcpy(&card->token.cm_filter_r,
2036 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2037 QETH_MPC_TOKEN_LENGTH);
2038 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2039 return 0;
2040 }
2041
2042 static int qeth_cm_enable(struct qeth_card *card)
2043 {
2044 int rc;
2045 struct qeth_cmd_buffer *iob;
2046
2047 QETH_DBF_TEXT(SETUP, 2, "cmenable");
2048
2049 iob = qeth_wait_for_buffer(&card->write);
2050 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2051 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2052 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2053 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2054 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2055
2056 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2057 qeth_cm_enable_cb, NULL);
2058 return rc;
2059 }
2060
2061 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2062 unsigned long data)
2063 {
2064
2065 struct qeth_cmd_buffer *iob;
2066
2067 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
2068
2069 iob = (struct qeth_cmd_buffer *) data;
2070 memcpy(&card->token.cm_connection_r,
2071 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2072 QETH_MPC_TOKEN_LENGTH);
2073 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2074 return 0;
2075 }
2076
2077 static int qeth_cm_setup(struct qeth_card *card)
2078 {
2079 int rc;
2080 struct qeth_cmd_buffer *iob;
2081
2082 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
2083
2084 iob = qeth_wait_for_buffer(&card->write);
2085 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2086 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2087 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2088 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2089 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2090 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2091 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2092 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2093 qeth_cm_setup_cb, NULL);
2094 return rc;
2095
2096 }
2097
2098 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2099 {
2100 switch (card->info.type) {
2101 case QETH_CARD_TYPE_UNKNOWN:
2102 return 1500;
2103 case QETH_CARD_TYPE_IQD:
2104 return card->info.max_mtu;
2105 case QETH_CARD_TYPE_OSD:
2106 switch (card->info.link_type) {
2107 case QETH_LINK_TYPE_HSTR:
2108 case QETH_LINK_TYPE_LANE_TR:
2109 return 2000;
2110 default:
2111 return 1492;
2112 }
2113 case QETH_CARD_TYPE_OSM:
2114 case QETH_CARD_TYPE_OSX:
2115 return 1492;
2116 default:
2117 return 1500;
2118 }
2119 }
2120
2121 static inline int qeth_get_mtu_outof_framesize(int framesize)
2122 {
2123 switch (framesize) {
2124 case 0x4000:
2125 return 8192;
2126 case 0x6000:
2127 return 16384;
2128 case 0xa000:
2129 return 32768;
2130 case 0xffff:
2131 return 57344;
2132 default:
2133 return 0;
2134 }
2135 }
2136
2137 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2138 {
2139 switch (card->info.type) {
2140 case QETH_CARD_TYPE_OSD:
2141 case QETH_CARD_TYPE_OSM:
2142 case QETH_CARD_TYPE_OSX:
2143 case QETH_CARD_TYPE_IQD:
2144 return ((mtu >= 576) &&
2145 (mtu <= card->info.max_mtu));
2146 case QETH_CARD_TYPE_OSN:
2147 case QETH_CARD_TYPE_UNKNOWN:
2148 default:
2149 return 1;
2150 }
2151 }
2152
2153 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2154 unsigned long data)
2155 {
2156
2157 __u16 mtu, framesize;
2158 __u16 len;
2159 __u8 link_type;
2160 struct qeth_cmd_buffer *iob;
2161
2162 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
2163
2164 iob = (struct qeth_cmd_buffer *) data;
2165 memcpy(&card->token.ulp_filter_r,
2166 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2167 QETH_MPC_TOKEN_LENGTH);
2168 if (card->info.type == QETH_CARD_TYPE_IQD) {
2169 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2170 mtu = qeth_get_mtu_outof_framesize(framesize);
2171 if (!mtu) {
2172 iob->rc = -EINVAL;
2173 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2174 return 0;
2175 }
2176 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2177 /* frame size has changed */
2178 if (card->dev &&
2179 ((card->dev->mtu == card->info.initial_mtu) ||
2180 (card->dev->mtu > mtu)))
2181 card->dev->mtu = mtu;
2182 qeth_free_qdio_buffers(card);
2183 }
2184 card->info.initial_mtu = mtu;
2185 card->info.max_mtu = mtu;
2186 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2187 } else {
2188 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
2189 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2190 iob->data);
2191 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2192 }
2193
2194 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2195 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2196 memcpy(&link_type,
2197 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2198 card->info.link_type = link_type;
2199 } else
2200 card->info.link_type = 0;
2201 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
2202 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2203 return 0;
2204 }
2205
2206 static int qeth_ulp_enable(struct qeth_card *card)
2207 {
2208 int rc;
2209 char prot_type;
2210 struct qeth_cmd_buffer *iob;
2211
2212 /*FIXME: trace view callbacks*/
2213 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
2214
2215 iob = qeth_wait_for_buffer(&card->write);
2216 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2217
2218 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2219 (__u8) card->info.portno;
2220 if (card->options.layer2)
2221 if (card->info.type == QETH_CARD_TYPE_OSN)
2222 prot_type = QETH_PROT_OSN2;
2223 else
2224 prot_type = QETH_PROT_LAYER2;
2225 else
2226 prot_type = QETH_PROT_TCPIP;
2227
2228 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2229 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2230 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2231 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2232 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
2233 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
2234 card->info.portname, 9);
2235 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2236 qeth_ulp_enable_cb, NULL);
2237 return rc;
2238
2239 }
2240
2241 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2242 unsigned long data)
2243 {
2244 struct qeth_cmd_buffer *iob;
2245 int rc = 0;
2246
2247 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
2248
2249 iob = (struct qeth_cmd_buffer *) data;
2250 memcpy(&card->token.ulp_connection_r,
2251 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2252 QETH_MPC_TOKEN_LENGTH);
2253 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2254 3)) {
2255 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2256 dev_err(&card->gdev->dev, "A connection could not be "
2257 "established because of an OLM limit\n");
2258 iob->rc = -EMLINK;
2259 }
2260 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2261 return rc;
2262 }
2263
2264 static int qeth_ulp_setup(struct qeth_card *card)
2265 {
2266 int rc;
2267 __u16 temp;
2268 struct qeth_cmd_buffer *iob;
2269 struct ccw_dev_id dev_id;
2270
2271 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
2272
2273 iob = qeth_wait_for_buffer(&card->write);
2274 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2275
2276 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2277 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2278 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2279 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2280 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2281 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2282
2283 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2284 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2285 temp = (card->info.cula << 8) + card->info.unit_addr2;
2286 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2287 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2288 qeth_ulp_setup_cb, NULL);
2289 return rc;
2290 }
2291
2292 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2293 {
2294 int rc;
2295 struct qeth_qdio_out_buffer *newbuf;
2296
2297 rc = 0;
2298 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2299 if (!newbuf) {
2300 rc = -ENOMEM;
2301 goto out;
2302 }
2303 newbuf->buffer = &q->qdio_bufs[bidx];
2304 skb_queue_head_init(&newbuf->skb_list);
2305 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2306 newbuf->q = q;
2307 newbuf->aob = NULL;
2308 newbuf->next_pending = q->bufs[bidx];
2309 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2310 q->bufs[bidx] = newbuf;
2311 if (q->bufstates) {
2312 q->bufstates[bidx].user = newbuf;
2313 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2314 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2315 QETH_CARD_TEXT_(q->card, 2, "%lx",
2316 (long) newbuf->next_pending);
2317 }
2318 out:
2319 return rc;
2320 }
2321
2322
2323 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2324 {
2325 int i, j;
2326
2327 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2328
2329 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2330 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2331 return 0;
2332
2333 card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q),
2334 GFP_KERNEL);
2335 if (!card->qdio.in_q)
2336 goto out_nomem;
2337 QETH_DBF_TEXT(SETUP, 2, "inq");
2338 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
2339 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2340 /* give inbound qeth_qdio_buffers their qdio_buffers */
2341 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
2342 card->qdio.in_q->bufs[i].buffer =
2343 &card->qdio.in_q->qdio_bufs[i];
2344 card->qdio.in_q->bufs[i].rx_skb = NULL;
2345 }
2346 /* inbound buffer pool */
2347 if (qeth_alloc_buffer_pool(card))
2348 goto out_freeinq;
2349
2350 /* outbound */
2351 card->qdio.out_qs =
2352 kzalloc(card->qdio.no_out_queues *
2353 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2354 if (!card->qdio.out_qs)
2355 goto out_freepool;
2356 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2357 card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q),
2358 GFP_KERNEL);
2359 if (!card->qdio.out_qs[i])
2360 goto out_freeoutq;
2361 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2362 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2363 card->qdio.out_qs[i]->queue_no = i;
2364 /* give outbound qeth_qdio_buffers their qdio_buffers */
2365 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2366 BUG_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
2367 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2368 goto out_freeoutqbufs;
2369 }
2370 }
2371
2372 /* completion */
2373 if (qeth_alloc_cq(card))
2374 goto out_freeoutq;
2375
2376 return 0;
2377
2378 out_freeoutqbufs:
2379 while (j > 0) {
2380 --j;
2381 kmem_cache_free(qeth_qdio_outbuf_cache,
2382 card->qdio.out_qs[i]->bufs[j]);
2383 card->qdio.out_qs[i]->bufs[j] = NULL;
2384 }
2385 out_freeoutq:
2386 while (i > 0) {
2387 kfree(card->qdio.out_qs[--i]);
2388 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2389 }
2390 kfree(card->qdio.out_qs);
2391 card->qdio.out_qs = NULL;
2392 out_freepool:
2393 qeth_free_buffer_pool(card);
2394 out_freeinq:
2395 kfree(card->qdio.in_q);
2396 card->qdio.in_q = NULL;
2397 out_nomem:
2398 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2399 return -ENOMEM;
2400 }
2401
2402 static void qeth_create_qib_param_field(struct qeth_card *card,
2403 char *param_field)
2404 {
2405
2406 param_field[0] = _ascebc['P'];
2407 param_field[1] = _ascebc['C'];
2408 param_field[2] = _ascebc['I'];
2409 param_field[3] = _ascebc['T'];
2410 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2411 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2412 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2413 }
2414
2415 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2416 char *param_field)
2417 {
2418 param_field[16] = _ascebc['B'];
2419 param_field[17] = _ascebc['L'];
2420 param_field[18] = _ascebc['K'];
2421 param_field[19] = _ascebc['T'];
2422 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2423 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2424 *((unsigned int *) (&param_field[28])) =
2425 card->info.blkt.inter_packet_jumbo;
2426 }
2427
2428 static int qeth_qdio_activate(struct qeth_card *card)
2429 {
2430 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2431 return qdio_activate(CARD_DDEV(card));
2432 }
2433
2434 static int qeth_dm_act(struct qeth_card *card)
2435 {
2436 int rc;
2437 struct qeth_cmd_buffer *iob;
2438
2439 QETH_DBF_TEXT(SETUP, 2, "dmact");
2440
2441 iob = qeth_wait_for_buffer(&card->write);
2442 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2443
2444 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2445 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2446 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2447 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2448 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2449 return rc;
2450 }
2451
2452 static int qeth_mpc_initialize(struct qeth_card *card)
2453 {
2454 int rc;
2455
2456 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2457
2458 rc = qeth_issue_next_read(card);
2459 if (rc) {
2460 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2461 return rc;
2462 }
2463 rc = qeth_cm_enable(card);
2464 if (rc) {
2465 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2466 goto out_qdio;
2467 }
2468 rc = qeth_cm_setup(card);
2469 if (rc) {
2470 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2471 goto out_qdio;
2472 }
2473 rc = qeth_ulp_enable(card);
2474 if (rc) {
2475 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2476 goto out_qdio;
2477 }
2478 rc = qeth_ulp_setup(card);
2479 if (rc) {
2480 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2481 goto out_qdio;
2482 }
2483 rc = qeth_alloc_qdio_buffers(card);
2484 if (rc) {
2485 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2486 goto out_qdio;
2487 }
2488 rc = qeth_qdio_establish(card);
2489 if (rc) {
2490 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2491 qeth_free_qdio_buffers(card);
2492 goto out_qdio;
2493 }
2494 rc = qeth_qdio_activate(card);
2495 if (rc) {
2496 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2497 goto out_qdio;
2498 }
2499 rc = qeth_dm_act(card);
2500 if (rc) {
2501 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2502 goto out_qdio;
2503 }
2504
2505 return 0;
2506 out_qdio:
2507 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2508 return rc;
2509 }
2510
2511 static void qeth_print_status_with_portname(struct qeth_card *card)
2512 {
2513 char dbf_text[15];
2514 int i;
2515
2516 sprintf(dbf_text, "%s", card->info.portname + 1);
2517 for (i = 0; i < 8; i++)
2518 dbf_text[i] =
2519 (char) _ebcasc[(__u8) dbf_text[i]];
2520 dbf_text[8] = 0;
2521 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
2522 "with link type %s (portname: %s)\n",
2523 qeth_get_cardname(card),
2524 (card->info.mcl_level[0]) ? " (level: " : "",
2525 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2526 (card->info.mcl_level[0]) ? ")" : "",
2527 qeth_get_cardname_short(card),
2528 dbf_text);
2529
2530 }
2531
2532 static void qeth_print_status_no_portname(struct qeth_card *card)
2533 {
2534 if (card->info.portname[0])
2535 dev_info(&card->gdev->dev, "Device is a%s "
2536 "card%s%s%s\nwith link type %s "
2537 "(no portname needed by interface).\n",
2538 qeth_get_cardname(card),
2539 (card->info.mcl_level[0]) ? " (level: " : "",
2540 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2541 (card->info.mcl_level[0]) ? ")" : "",
2542 qeth_get_cardname_short(card));
2543 else
2544 dev_info(&card->gdev->dev, "Device is a%s "
2545 "card%s%s%s\nwith link type %s.\n",
2546 qeth_get_cardname(card),
2547 (card->info.mcl_level[0]) ? " (level: " : "",
2548 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2549 (card->info.mcl_level[0]) ? ")" : "",
2550 qeth_get_cardname_short(card));
2551 }
2552
2553 void qeth_print_status_message(struct qeth_card *card)
2554 {
2555 switch (card->info.type) {
2556 case QETH_CARD_TYPE_OSD:
2557 case QETH_CARD_TYPE_OSM:
2558 case QETH_CARD_TYPE_OSX:
2559 /* VM will use a non-zero first character
2560 * to indicate a HiperSockets like reporting
2561 * of the level OSA sets the first character to zero
2562 * */
2563 if (!card->info.mcl_level[0]) {
2564 sprintf(card->info.mcl_level, "%02x%02x",
2565 card->info.mcl_level[2],
2566 card->info.mcl_level[3]);
2567
2568 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2569 break;
2570 }
2571 /* fallthrough */
2572 case QETH_CARD_TYPE_IQD:
2573 if ((card->info.guestlan) ||
2574 (card->info.mcl_level[0] & 0x80)) {
2575 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2576 card->info.mcl_level[0]];
2577 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2578 card->info.mcl_level[1]];
2579 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2580 card->info.mcl_level[2]];
2581 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2582 card->info.mcl_level[3]];
2583 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2584 }
2585 break;
2586 default:
2587 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2588 }
2589 if (card->info.portname_required)
2590 qeth_print_status_with_portname(card);
2591 else
2592 qeth_print_status_no_portname(card);
2593 }
2594 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2595
2596 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2597 {
2598 struct qeth_buffer_pool_entry *entry;
2599
2600 QETH_CARD_TEXT(card, 5, "inwrklst");
2601
2602 list_for_each_entry(entry,
2603 &card->qdio.init_pool.entry_list, init_list) {
2604 qeth_put_buffer_pool_entry(card, entry);
2605 }
2606 }
2607
2608 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2609 struct qeth_card *card)
2610 {
2611 struct list_head *plh;
2612 struct qeth_buffer_pool_entry *entry;
2613 int i, free;
2614 struct page *page;
2615
2616 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2617 return NULL;
2618
2619 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2620 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2621 free = 1;
2622 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2623 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2624 free = 0;
2625 break;
2626 }
2627 }
2628 if (free) {
2629 list_del_init(&entry->list);
2630 return entry;
2631 }
2632 }
2633
2634 /* no free buffer in pool so take first one and swap pages */
2635 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2636 struct qeth_buffer_pool_entry, list);
2637 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2638 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2639 page = alloc_page(GFP_ATOMIC);
2640 if (!page) {
2641 return NULL;
2642 } else {
2643 free_page((unsigned long)entry->elements[i]);
2644 entry->elements[i] = page_address(page);
2645 if (card->options.performance_stats)
2646 card->perf_stats.sg_alloc_page_rx++;
2647 }
2648 }
2649 }
2650 list_del_init(&entry->list);
2651 return entry;
2652 }
2653
2654 static int qeth_init_input_buffer(struct qeth_card *card,
2655 struct qeth_qdio_buffer *buf)
2656 {
2657 struct qeth_buffer_pool_entry *pool_entry;
2658 int i;
2659
2660 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2661 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2662 if (!buf->rx_skb)
2663 return 1;
2664 }
2665
2666 pool_entry = qeth_find_free_buffer_pool_entry(card);
2667 if (!pool_entry)
2668 return 1;
2669
2670 /*
2671 * since the buffer is accessed only from the input_tasklet
2672 * there shouldn't be a need to synchronize; also, since we use
2673 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2674 * buffers
2675 */
2676
2677 buf->pool_entry = pool_entry;
2678 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2679 buf->buffer->element[i].length = PAGE_SIZE;
2680 buf->buffer->element[i].addr = pool_entry->elements[i];
2681 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2682 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
2683 else
2684 buf->buffer->element[i].eflags = 0;
2685 buf->buffer->element[i].sflags = 0;
2686 }
2687 return 0;
2688 }
2689
2690 int qeth_init_qdio_queues(struct qeth_card *card)
2691 {
2692 int i, j;
2693 int rc;
2694
2695 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2696
2697 /* inbound queue */
2698 memset(card->qdio.in_q->qdio_bufs, 0,
2699 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2700 qeth_initialize_working_pool_list(card);
2701 /*give only as many buffers to hardware as we have buffer pool entries*/
2702 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2703 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2704 card->qdio.in_q->next_buf_to_init =
2705 card->qdio.in_buf_pool.buf_count - 1;
2706 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2707 card->qdio.in_buf_pool.buf_count - 1);
2708 if (rc) {
2709 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2710 return rc;
2711 }
2712
2713 /* completion */
2714 rc = qeth_cq_init(card);
2715 if (rc) {
2716 return rc;
2717 }
2718
2719 /* outbound queue */
2720 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2721 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2722 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2723 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2724 qeth_clear_output_buffer(card->qdio.out_qs[i],
2725 card->qdio.out_qs[i]->bufs[j],
2726 QETH_QDIO_BUF_EMPTY);
2727 }
2728 card->qdio.out_qs[i]->card = card;
2729 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2730 card->qdio.out_qs[i]->do_pack = 0;
2731 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2732 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2733 atomic_set(&card->qdio.out_qs[i]->state,
2734 QETH_OUT_Q_UNLOCKED);
2735 }
2736 return 0;
2737 }
2738 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2739
2740 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2741 {
2742 switch (link_type) {
2743 case QETH_LINK_TYPE_HSTR:
2744 return 2;
2745 default:
2746 return 1;
2747 }
2748 }
2749
2750 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2751 struct qeth_ipa_cmd *cmd, __u8 command,
2752 enum qeth_prot_versions prot)
2753 {
2754 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2755 cmd->hdr.command = command;
2756 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2757 cmd->hdr.seqno = card->seqno.ipa;
2758 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2759 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2760 if (card->options.layer2)
2761 cmd->hdr.prim_version_no = 2;
2762 else
2763 cmd->hdr.prim_version_no = 1;
2764 cmd->hdr.param_count = 1;
2765 cmd->hdr.prot_version = prot;
2766 cmd->hdr.ipa_supported = 0;
2767 cmd->hdr.ipa_enabled = 0;
2768 }
2769
2770 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2771 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2772 {
2773 struct qeth_cmd_buffer *iob;
2774 struct qeth_ipa_cmd *cmd;
2775
2776 iob = qeth_wait_for_buffer(&card->write);
2777 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2778 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2779
2780 return iob;
2781 }
2782 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2783
2784 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2785 char prot_type)
2786 {
2787 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2788 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2789 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2790 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2791 }
2792 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2793
2794 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2795 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2796 unsigned long),
2797 void *reply_param)
2798 {
2799 int rc;
2800 char prot_type;
2801
2802 QETH_CARD_TEXT(card, 4, "sendipa");
2803
2804 if (card->options.layer2)
2805 if (card->info.type == QETH_CARD_TYPE_OSN)
2806 prot_type = QETH_PROT_OSN2;
2807 else
2808 prot_type = QETH_PROT_LAYER2;
2809 else
2810 prot_type = QETH_PROT_TCPIP;
2811 qeth_prepare_ipa_cmd(card, iob, prot_type);
2812 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2813 iob, reply_cb, reply_param);
2814 if (rc == -ETIME) {
2815 qeth_clear_ipacmd_list(card);
2816 qeth_schedule_recovery(card);
2817 }
2818 return rc;
2819 }
2820 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2821
2822 int qeth_send_startlan(struct qeth_card *card)
2823 {
2824 int rc;
2825 struct qeth_cmd_buffer *iob;
2826
2827 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2828
2829 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
2830 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2831 return rc;
2832 }
2833 EXPORT_SYMBOL_GPL(qeth_send_startlan);
2834
2835 int qeth_default_setadapterparms_cb(struct qeth_card *card,
2836 struct qeth_reply *reply, unsigned long data)
2837 {
2838 struct qeth_ipa_cmd *cmd;
2839
2840 QETH_CARD_TEXT(card, 4, "defadpcb");
2841
2842 cmd = (struct qeth_ipa_cmd *) data;
2843 if (cmd->hdr.return_code == 0)
2844 cmd->hdr.return_code =
2845 cmd->data.setadapterparms.hdr.return_code;
2846 return 0;
2847 }
2848 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2849
2850 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2851 struct qeth_reply *reply, unsigned long data)
2852 {
2853 struct qeth_ipa_cmd *cmd;
2854
2855 QETH_CARD_TEXT(card, 3, "quyadpcb");
2856
2857 cmd = (struct qeth_ipa_cmd *) data;
2858 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
2859 card->info.link_type =
2860 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2861 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2862 }
2863 card->options.adp.supported_funcs =
2864 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2865 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2866 }
2867
2868 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2869 __u32 command, __u32 cmdlen)
2870 {
2871 struct qeth_cmd_buffer *iob;
2872 struct qeth_ipa_cmd *cmd;
2873
2874 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2875 QETH_PROT_IPV4);
2876 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2877 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2878 cmd->data.setadapterparms.hdr.command_code = command;
2879 cmd->data.setadapterparms.hdr.used_total = 1;
2880 cmd->data.setadapterparms.hdr.seq_no = 1;
2881
2882 return iob;
2883 }
2884 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2885
2886 int qeth_query_setadapterparms(struct qeth_card *card)
2887 {
2888 int rc;
2889 struct qeth_cmd_buffer *iob;
2890
2891 QETH_CARD_TEXT(card, 3, "queryadp");
2892 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2893 sizeof(struct qeth_ipacmd_setadpparms));
2894 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2895 return rc;
2896 }
2897 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2898
2899 static int qeth_query_ipassists_cb(struct qeth_card *card,
2900 struct qeth_reply *reply, unsigned long data)
2901 {
2902 struct qeth_ipa_cmd *cmd;
2903
2904 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
2905
2906 cmd = (struct qeth_ipa_cmd *) data;
2907 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
2908 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
2909 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
2910 } else {
2911 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
2912 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
2913 }
2914 QETH_DBF_TEXT(SETUP, 2, "suppenbl");
2915 QETH_DBF_TEXT_(SETUP, 2, "%x", cmd->hdr.ipa_supported);
2916 QETH_DBF_TEXT_(SETUP, 2, "%x", cmd->hdr.ipa_enabled);
2917 return 0;
2918 }
2919
2920 int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
2921 {
2922 int rc;
2923 struct qeth_cmd_buffer *iob;
2924
2925 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
2926 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
2927 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
2928 return rc;
2929 }
2930 EXPORT_SYMBOL_GPL(qeth_query_ipassists);
2931
2932 static int qeth_query_setdiagass_cb(struct qeth_card *card,
2933 struct qeth_reply *reply, unsigned long data)
2934 {
2935 struct qeth_ipa_cmd *cmd;
2936 __u16 rc;
2937
2938 cmd = (struct qeth_ipa_cmd *)data;
2939 rc = cmd->hdr.return_code;
2940 if (rc)
2941 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
2942 else
2943 card->info.diagass_support = cmd->data.diagass.ext;
2944 return 0;
2945 }
2946
2947 static int qeth_query_setdiagass(struct qeth_card *card)
2948 {
2949 struct qeth_cmd_buffer *iob;
2950 struct qeth_ipa_cmd *cmd;
2951
2952 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
2953 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
2954 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2955 cmd->data.diagass.subcmd_len = 16;
2956 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
2957 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
2958 }
2959
2960 static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
2961 {
2962 unsigned long info = get_zeroed_page(GFP_KERNEL);
2963 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
2964 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
2965 struct ccw_dev_id ccwid;
2966 int level, rc;
2967
2968 tid->chpid = card->info.chpid;
2969 ccw_device_get_id(CARD_RDEV(card), &ccwid);
2970 tid->ssid = ccwid.ssid;
2971 tid->devno = ccwid.devno;
2972 if (!info)
2973 return;
2974
2975 rc = stsi(NULL, 0, 0, 0);
2976 if (rc == -ENOSYS)
2977 level = rc;
2978 else
2979 level = (((unsigned int) rc) >> 28);
2980
2981 if ((level >= 2) && (stsi(info222, 2, 2, 2) != -ENOSYS))
2982 tid->lparnr = info222->lpar_number;
2983
2984 if ((level >= 3) && (stsi(info322, 3, 2, 2) != -ENOSYS)) {
2985 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
2986 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
2987 }
2988 free_page(info);
2989 return;
2990 }
2991
2992 static int qeth_hw_trap_cb(struct qeth_card *card,
2993 struct qeth_reply *reply, unsigned long data)
2994 {
2995 struct qeth_ipa_cmd *cmd;
2996 __u16 rc;
2997
2998 cmd = (struct qeth_ipa_cmd *)data;
2999 rc = cmd->hdr.return_code;
3000 if (rc)
3001 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3002 return 0;
3003 }
3004
3005 int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3006 {
3007 struct qeth_cmd_buffer *iob;
3008 struct qeth_ipa_cmd *cmd;
3009
3010 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3011 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3012 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3013 cmd->data.diagass.subcmd_len = 80;
3014 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3015 cmd->data.diagass.type = 1;
3016 cmd->data.diagass.action = action;
3017 switch (action) {
3018 case QETH_DIAGS_TRAP_ARM:
3019 cmd->data.diagass.options = 0x0003;
3020 cmd->data.diagass.ext = 0x00010000 +
3021 sizeof(struct qeth_trap_id);
3022 qeth_get_trap_id(card,
3023 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3024 break;
3025 case QETH_DIAGS_TRAP_DISARM:
3026 cmd->data.diagass.options = 0x0001;
3027 break;
3028 case QETH_DIAGS_TRAP_CAPTURE:
3029 break;
3030 }
3031 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3032 }
3033 EXPORT_SYMBOL_GPL(qeth_hw_trap);
3034
3035 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
3036 unsigned int qdio_error, const char *dbftext)
3037 {
3038 if (qdio_error) {
3039 QETH_CARD_TEXT(card, 2, dbftext);
3040 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3041 buf->element[15].sflags);
3042 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3043 buf->element[14].sflags);
3044 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3045 if ((buf->element[15].sflags) == 0x12) {
3046 card->stats.rx_dropped++;
3047 return 0;
3048 } else
3049 return 1;
3050 }
3051 return 0;
3052 }
3053 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
3054
3055 void qeth_buffer_reclaim_work(struct work_struct *work)
3056 {
3057 struct qeth_card *card = container_of(work, struct qeth_card,
3058 buffer_reclaim_work.work);
3059
3060 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3061 qeth_queue_input_buffer(card, card->reclaim_index);
3062 }
3063
3064 void qeth_queue_input_buffer(struct qeth_card *card, int index)
3065 {
3066 struct qeth_qdio_q *queue = card->qdio.in_q;
3067 struct list_head *lh;
3068 int count;
3069 int i;
3070 int rc;
3071 int newcount = 0;
3072
3073 count = (index < queue->next_buf_to_init)?
3074 card->qdio.in_buf_pool.buf_count -
3075 (queue->next_buf_to_init - index) :
3076 card->qdio.in_buf_pool.buf_count -
3077 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3078 /* only requeue at a certain threshold to avoid SIGAs */
3079 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3080 for (i = queue->next_buf_to_init;
3081 i < queue->next_buf_to_init + count; ++i) {
3082 if (qeth_init_input_buffer(card,
3083 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3084 break;
3085 } else {
3086 newcount++;
3087 }
3088 }
3089
3090 if (newcount < count) {
3091 /* we are in memory shortage so we switch back to
3092 traditional skb allocation and drop packages */
3093 atomic_set(&card->force_alloc_skb, 3);
3094 count = newcount;
3095 } else {
3096 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3097 }
3098
3099 if (!count) {
3100 i = 0;
3101 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3102 i++;
3103 if (i == card->qdio.in_buf_pool.buf_count) {
3104 QETH_CARD_TEXT(card, 2, "qsarbw");
3105 card->reclaim_index = index;
3106 schedule_delayed_work(
3107 &card->buffer_reclaim_work,
3108 QETH_RECLAIM_WORK_TIME);
3109 }
3110 return;
3111 }
3112
3113 /*
3114 * according to old code it should be avoided to requeue all
3115 * 128 buffers in order to benefit from PCI avoidance.
3116 * this function keeps at least one buffer (the buffer at
3117 * 'index') un-requeued -> this buffer is the first buffer that
3118 * will be requeued the next time
3119 */
3120 if (card->options.performance_stats) {
3121 card->perf_stats.inbound_do_qdio_cnt++;
3122 card->perf_stats.inbound_do_qdio_start_time =
3123 qeth_get_micros();
3124 }
3125 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3126 queue->next_buf_to_init, count);
3127 if (card->options.performance_stats)
3128 card->perf_stats.inbound_do_qdio_time +=
3129 qeth_get_micros() -
3130 card->perf_stats.inbound_do_qdio_start_time;
3131 if (rc) {
3132 QETH_CARD_TEXT(card, 2, "qinberr");
3133 }
3134 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3135 QDIO_MAX_BUFFERS_PER_Q;
3136 }
3137 }
3138 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
3139
3140 static int qeth_handle_send_error(struct qeth_card *card,
3141 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
3142 {
3143 int sbalf15 = buffer->buffer->element[15].sflags;
3144
3145 QETH_CARD_TEXT(card, 6, "hdsnderr");
3146 if (card->info.type == QETH_CARD_TYPE_IQD) {
3147 if (sbalf15 == 0) {
3148 qdio_err = 0;
3149 } else {
3150 qdio_err = 1;
3151 }
3152 }
3153 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
3154
3155 if (!qdio_err)
3156 return QETH_SEND_ERROR_NONE;
3157
3158 if ((sbalf15 >= 15) && (sbalf15 <= 31))
3159 return QETH_SEND_ERROR_RETRY;
3160
3161 QETH_CARD_TEXT(card, 1, "lnkfail");
3162 QETH_CARD_TEXT_(card, 1, "%04x %02x",
3163 (u16)qdio_err, (u8)sbalf15);
3164 return QETH_SEND_ERROR_LINK_FAILURE;
3165 }
3166
3167 /*
3168 * Switched to packing state if the number of used buffers on a queue
3169 * reaches a certain limit.
3170 */
3171 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3172 {
3173 if (!queue->do_pack) {
3174 if (atomic_read(&queue->used_buffers)
3175 >= QETH_HIGH_WATERMARK_PACK){
3176 /* switch non-PACKING -> PACKING */
3177 QETH_CARD_TEXT(queue->card, 6, "np->pack");
3178 if (queue->card->options.performance_stats)
3179 queue->card->perf_stats.sc_dp_p++;
3180 queue->do_pack = 1;
3181 }
3182 }
3183 }
3184
3185 /*
3186 * Switches from packing to non-packing mode. If there is a packing
3187 * buffer on the queue this buffer will be prepared to be flushed.
3188 * In that case 1 is returned to inform the caller. If no buffer
3189 * has to be flushed, zero is returned.
3190 */
3191 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3192 {
3193 struct qeth_qdio_out_buffer *buffer;
3194 int flush_count = 0;
3195
3196 if (queue->do_pack) {
3197 if (atomic_read(&queue->used_buffers)
3198 <= QETH_LOW_WATERMARK_PACK) {
3199 /* switch PACKING -> non-PACKING */
3200 QETH_CARD_TEXT(queue->card, 6, "pack->np");
3201 if (queue->card->options.performance_stats)
3202 queue->card->perf_stats.sc_p_dp++;
3203 queue->do_pack = 0;
3204 /* flush packing buffers */
3205 buffer = queue->bufs[queue->next_buf_to_fill];
3206 if ((atomic_read(&buffer->state) ==
3207 QETH_QDIO_BUF_EMPTY) &&
3208 (buffer->next_element_to_fill > 0)) {
3209 atomic_set(&buffer->state,
3210 QETH_QDIO_BUF_PRIMED);
3211 flush_count++;
3212 queue->next_buf_to_fill =
3213 (queue->next_buf_to_fill + 1) %
3214 QDIO_MAX_BUFFERS_PER_Q;
3215 }
3216 }
3217 }
3218 return flush_count;
3219 }
3220
3221
3222 /*
3223 * Called to flush a packing buffer if no more pci flags are on the queue.
3224 * Checks if there is a packing buffer and prepares it to be flushed.
3225 * In that case returns 1, otherwise zero.
3226 */
3227 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
3228 {
3229 struct qeth_qdio_out_buffer *buffer;
3230
3231 buffer = queue->bufs[queue->next_buf_to_fill];
3232 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3233 (buffer->next_element_to_fill > 0)) {
3234 /* it's a packing buffer */
3235 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3236 queue->next_buf_to_fill =
3237 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3238 return 1;
3239 }
3240 return 0;
3241 }
3242
3243 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3244 int count)
3245 {
3246 struct qeth_qdio_out_buffer *buf;
3247 int rc;
3248 int i;
3249 unsigned int qdio_flags;
3250
3251 for (i = index; i < index + count; ++i) {
3252 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3253 buf = queue->bufs[bidx];
3254 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3255 SBAL_EFLAGS_LAST_ENTRY;
3256
3257 if (queue->bufstates)
3258 queue->bufstates[bidx].user = buf;
3259
3260 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3261 continue;
3262
3263 if (!queue->do_pack) {
3264 if ((atomic_read(&queue->used_buffers) >=
3265 (QETH_HIGH_WATERMARK_PACK -
3266 QETH_WATERMARK_PACK_FUZZ)) &&
3267 !atomic_read(&queue->set_pci_flags_count)) {
3268 /* it's likely that we'll go to packing
3269 * mode soon */
3270 atomic_inc(&queue->set_pci_flags_count);
3271 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
3272 }
3273 } else {
3274 if (!atomic_read(&queue->set_pci_flags_count)) {
3275 /*
3276 * there's no outstanding PCI any more, so we
3277 * have to request a PCI to be sure the the PCI
3278 * will wake at some time in the future then we
3279 * can flush packed buffers that might still be
3280 * hanging around, which can happen if no
3281 * further send was requested by the stack
3282 */
3283 atomic_inc(&queue->set_pci_flags_count);
3284 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
3285 }
3286 }
3287 }
3288
3289 queue->card->dev->trans_start = jiffies;
3290 if (queue->card->options.performance_stats) {
3291 queue->card->perf_stats.outbound_do_qdio_cnt++;
3292 queue->card->perf_stats.outbound_do_qdio_start_time =
3293 qeth_get_micros();
3294 }
3295 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
3296 if (atomic_read(&queue->set_pci_flags_count))
3297 qdio_flags |= QDIO_FLAG_PCI_OUT;
3298 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
3299 queue->queue_no, index, count);
3300 if (queue->card->options.performance_stats)
3301 queue->card->perf_stats.outbound_do_qdio_time +=
3302 qeth_get_micros() -
3303 queue->card->perf_stats.outbound_do_qdio_start_time;
3304 atomic_add(count, &queue->used_buffers);
3305 if (rc) {
3306 queue->card->stats.tx_errors += count;
3307 /* ignore temporary SIGA errors without busy condition */
3308 if (rc == QDIO_ERROR_SIGA_TARGET)
3309 return;
3310 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
3311 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3312 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3313 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
3314 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
3315
3316 /* this must not happen under normal circumstances. if it
3317 * happens something is really wrong -> recover */
3318 qeth_schedule_recovery(queue->card);
3319 return;
3320 }
3321 if (queue->card->options.performance_stats)
3322 queue->card->perf_stats.bufs_sent += count;
3323 }
3324
3325 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3326 {
3327 int index;
3328 int flush_cnt = 0;
3329 int q_was_packing = 0;
3330
3331 /*
3332 * check if weed have to switch to non-packing mode or if
3333 * we have to get a pci flag out on the queue
3334 */
3335 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3336 !atomic_read(&queue->set_pci_flags_count)) {
3337 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3338 QETH_OUT_Q_UNLOCKED) {
3339 /*
3340 * If we get in here, there was no action in
3341 * do_send_packet. So, we check if there is a
3342 * packing buffer to be flushed here.
3343 */
3344 netif_stop_queue(queue->card->dev);
3345 index = queue->next_buf_to_fill;
3346 q_was_packing = queue->do_pack;
3347 /* queue->do_pack may change */
3348 barrier();
3349 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3350 if (!flush_cnt &&
3351 !atomic_read(&queue->set_pci_flags_count))
3352 flush_cnt +=
3353 qeth_flush_buffers_on_no_pci(queue);
3354 if (queue->card->options.performance_stats &&
3355 q_was_packing)
3356 queue->card->perf_stats.bufs_sent_pack +=
3357 flush_cnt;
3358 if (flush_cnt)
3359 qeth_flush_buffers(queue, index, flush_cnt);
3360 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3361 }
3362 }
3363 }
3364
3365 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3366 unsigned long card_ptr)
3367 {
3368 struct qeth_card *card = (struct qeth_card *)card_ptr;
3369
3370 if (card->dev && (card->dev->flags & IFF_UP))
3371 napi_schedule(&card->napi);
3372 }
3373 EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3374
3375 int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3376 {
3377 int rc;
3378
3379 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3380 rc = -1;
3381 goto out;
3382 } else {
3383 if (card->options.cq == cq) {
3384 rc = 0;
3385 goto out;
3386 }
3387
3388 if (card->state != CARD_STATE_DOWN &&
3389 card->state != CARD_STATE_RECOVER) {
3390 rc = -1;
3391 goto out;
3392 }
3393
3394 qeth_free_qdio_buffers(card);
3395 card->options.cq = cq;
3396 rc = 0;
3397 }
3398 out:
3399 return rc;
3400
3401 }
3402 EXPORT_SYMBOL_GPL(qeth_configure_cq);
3403
3404
3405 static void qeth_qdio_cq_handler(struct qeth_card *card,
3406 unsigned int qdio_err,
3407 unsigned int queue, int first_element, int count) {
3408 struct qeth_qdio_q *cq = card->qdio.c_q;
3409 int i;
3410 int rc;
3411
3412 if (!qeth_is_cq(card, queue))
3413 goto out;
3414
3415 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3416 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3417 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3418
3419 if (qdio_err) {
3420 netif_stop_queue(card->dev);
3421 qeth_schedule_recovery(card);
3422 goto out;
3423 }
3424
3425 if (card->options.performance_stats) {
3426 card->perf_stats.cq_cnt++;
3427 card->perf_stats.cq_start_time = qeth_get_micros();
3428 }
3429
3430 for (i = first_element; i < first_element + count; ++i) {
3431 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3432 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx];
3433 int e;
3434
3435 e = 0;
3436 while (buffer->element[e].addr) {
3437 unsigned long phys_aob_addr;
3438
3439 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3440 qeth_qdio_handle_aob(card, phys_aob_addr);
3441 buffer->element[e].addr = NULL;
3442 buffer->element[e].eflags = 0;
3443 buffer->element[e].sflags = 0;
3444 buffer->element[e].length = 0;
3445
3446 ++e;
3447 }
3448
3449 buffer->element[15].eflags = 0;
3450 buffer->element[15].sflags = 0;
3451 }
3452 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3453 card->qdio.c_q->next_buf_to_init,
3454 count);
3455 if (rc) {
3456 dev_warn(&card->gdev->dev,
3457 "QDIO reported an error, rc=%i\n", rc);
3458 QETH_CARD_TEXT(card, 2, "qcqherr");
3459 }
3460 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3461 + count) % QDIO_MAX_BUFFERS_PER_Q;
3462
3463 netif_wake_queue(card->dev);
3464
3465 if (card->options.performance_stats) {
3466 int delta_t = qeth_get_micros();
3467 delta_t -= card->perf_stats.cq_start_time;
3468 card->perf_stats.cq_time += delta_t;
3469 }
3470 out:
3471 return;
3472 }
3473
3474 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
3475 unsigned int queue, int first_elem, int count,
3476 unsigned long card_ptr)
3477 {
3478 struct qeth_card *card = (struct qeth_card *)card_ptr;
3479
3480 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3481 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3482
3483 if (qeth_is_cq(card, queue))
3484 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3485 else if (qdio_err)
3486 qeth_schedule_recovery(card);
3487
3488
3489 }
3490 EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3491
3492 void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3493 unsigned int qdio_error, int __queue, int first_element,
3494 int count, unsigned long card_ptr)
3495 {
3496 struct qeth_card *card = (struct qeth_card *) card_ptr;
3497 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3498 struct qeth_qdio_out_buffer *buffer;
3499 int i;
3500
3501 QETH_CARD_TEXT(card, 6, "qdouhdl");
3502 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
3503 QETH_CARD_TEXT(card, 2, "achkcond");
3504 netif_stop_queue(card->dev);
3505 qeth_schedule_recovery(card);
3506 return;
3507 }
3508 if (card->options.performance_stats) {
3509 card->perf_stats.outbound_handler_cnt++;
3510 card->perf_stats.outbound_handler_start_time =
3511 qeth_get_micros();
3512 }
3513 for (i = first_element; i < (first_element + count); ++i) {
3514 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3515 buffer = queue->bufs[bidx];
3516 qeth_handle_send_error(card, buffer, qdio_error);
3517
3518 if (queue->bufstates &&
3519 (queue->bufstates[bidx].flags &
3520 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
3521 BUG_ON(card->options.cq != QETH_CQ_ENABLED);
3522
3523 if (atomic_cmpxchg(&buffer->state,
3524 QETH_QDIO_BUF_PRIMED,
3525 QETH_QDIO_BUF_PENDING) ==
3526 QETH_QDIO_BUF_PRIMED) {
3527 qeth_notify_skbs(queue, buffer,
3528 TX_NOTIFY_PENDING);
3529 }
3530 buffer->aob = queue->bufstates[bidx].aob;
3531 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
3532 QETH_CARD_TEXT(queue->card, 5, "aob");
3533 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3534 virt_to_phys(buffer->aob));
3535 BUG_ON(bidx < 0 || bidx >= QDIO_MAX_BUFFERS_PER_Q);
3536 if (qeth_init_qdio_out_buf(queue, bidx)) {
3537 QETH_CARD_TEXT(card, 2, "outofbuf");
3538 qeth_schedule_recovery(card);
3539 }
3540 } else {
3541 if (card->options.cq == QETH_CQ_ENABLED) {
3542 enum iucv_tx_notify n;
3543
3544 n = qeth_compute_cq_notification(
3545 buffer->buffer->element[15].sflags, 0);
3546 qeth_notify_skbs(queue, buffer, n);
3547 }
3548
3549 qeth_clear_output_buffer(queue, buffer,
3550 QETH_QDIO_BUF_EMPTY);
3551 }
3552 qeth_cleanup_handled_pending(queue, bidx, 0);
3553 }
3554 atomic_sub(count, &queue->used_buffers);
3555 /* check if we need to do something on this outbound queue */
3556 if (card->info.type != QETH_CARD_TYPE_IQD)
3557 qeth_check_outbound_queue(queue);
3558
3559 netif_wake_queue(queue->card->dev);
3560 if (card->options.performance_stats)
3561 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3562 card->perf_stats.outbound_handler_start_time;
3563 }
3564 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3565
3566 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3567 int ipv, int cast_type)
3568 {
3569 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
3570 card->info.type == QETH_CARD_TYPE_OSX))
3571 return card->qdio.default_out_queue;
3572 switch (card->qdio.no_out_queues) {
3573 case 4:
3574 if (cast_type && card->info.is_multicast_different)
3575 return card->info.is_multicast_different &
3576 (card->qdio.no_out_queues - 1);
3577 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3578 const u8 tos = ip_hdr(skb)->tos;
3579
3580 if (card->qdio.do_prio_queueing ==
3581 QETH_PRIO_Q_ING_TOS) {
3582 if (tos & IP_TOS_NOTIMPORTANT)
3583 return 3;
3584 if (tos & IP_TOS_HIGHRELIABILITY)
3585 return 2;
3586 if (tos & IP_TOS_HIGHTHROUGHPUT)
3587 return 1;
3588 if (tos & IP_TOS_LOWDELAY)
3589 return 0;
3590 }
3591 if (card->qdio.do_prio_queueing ==
3592 QETH_PRIO_Q_ING_PREC)
3593 return 3 - (tos >> 6);
3594 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3595 /* TODO: IPv6!!! */
3596 }
3597 return card->qdio.default_out_queue;
3598 case 1: /* fallthrough for single-out-queue 1920-device */
3599 default:
3600 return card->qdio.default_out_queue;
3601 }
3602 }
3603 EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3604
3605 int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3606 struct sk_buff *skb, int elems)
3607 {
3608 int dlen = skb->len - skb->data_len;
3609 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
3610 PFN_DOWN((unsigned long)skb->data);
3611
3612 elements_needed += skb_shinfo(skb)->nr_frags;
3613 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
3614 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
3615 "(Number=%d / Length=%d). Discarded.\n",
3616 (elements_needed+elems), skb->len);
3617 return 0;
3618 }
3619 return elements_needed;
3620 }
3621 EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3622
3623 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len)
3624 {
3625 int hroom, inpage, rest;
3626
3627 if (((unsigned long)skb->data & PAGE_MASK) !=
3628 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3629 hroom = skb_headroom(skb);
3630 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3631 rest = len - inpage;
3632 if (rest > hroom)
3633 return 1;
3634 memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3635 skb->data -= rest;
3636 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3637 }
3638 return 0;
3639 }
3640 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3641
3642 static inline void __qeth_fill_buffer(struct sk_buff *skb,
3643 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3644 int offset)
3645 {
3646 int length = skb->len - skb->data_len;
3647 int length_here;
3648 int element;
3649 char *data;
3650 int first_lap, cnt;
3651 struct skb_frag_struct *frag;
3652
3653 element = *next_element_to_fill;
3654 data = skb->data;
3655 first_lap = (is_tso == 0 ? 1 : 0);
3656
3657 if (offset >= 0) {
3658 data = skb->data + offset;
3659 length -= offset;
3660 first_lap = 0;
3661 }
3662
3663 while (length > 0) {
3664 /* length_here is the remaining amount of data in this page */
3665 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3666 if (length < length_here)
3667 length_here = length;
3668
3669 buffer->element[element].addr = data;
3670 buffer->element[element].length = length_here;
3671 length -= length_here;
3672 if (!length) {
3673 if (first_lap)
3674 if (skb_shinfo(skb)->nr_frags)
3675 buffer->element[element].eflags =
3676 SBAL_EFLAGS_FIRST_FRAG;
3677 else
3678 buffer->element[element].eflags = 0;
3679 else
3680 buffer->element[element].eflags =
3681 SBAL_EFLAGS_MIDDLE_FRAG;
3682 } else {
3683 if (first_lap)
3684 buffer->element[element].eflags =
3685 SBAL_EFLAGS_FIRST_FRAG;
3686 else
3687 buffer->element[element].eflags =
3688 SBAL_EFLAGS_MIDDLE_FRAG;
3689 }
3690 data += length_here;
3691 element++;
3692 first_lap = 0;
3693 }
3694
3695 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3696 frag = &skb_shinfo(skb)->frags[cnt];
3697 buffer->element[element].addr = (char *)
3698 page_to_phys(skb_frag_page(frag))
3699 + frag->page_offset;
3700 buffer->element[element].length = frag->size;
3701 buffer->element[element].eflags = SBAL_EFLAGS_MIDDLE_FRAG;
3702 element++;
3703 }
3704
3705 if (buffer->element[element - 1].eflags)
3706 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
3707 *next_element_to_fill = element;
3708 }
3709
3710 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3711 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3712 struct qeth_hdr *hdr, int offset, int hd_len)
3713 {
3714 struct qdio_buffer *buffer;
3715 int flush_cnt = 0, hdr_len, large_send = 0;
3716
3717 buffer = buf->buffer;
3718 atomic_inc(&skb->users);
3719 skb_queue_tail(&buf->skb_list, skb);
3720
3721 /*check first on TSO ....*/
3722 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3723 int element = buf->next_element_to_fill;
3724
3725 hdr_len = sizeof(struct qeth_hdr_tso) +
3726 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
3727 /*fill first buffer entry only with header information */
3728 buffer->element[element].addr = skb->data;
3729 buffer->element[element].length = hdr_len;
3730 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
3731 buf->next_element_to_fill++;
3732 skb->data += hdr_len;
3733 skb->len -= hdr_len;
3734 large_send = 1;
3735 }
3736
3737 if (offset >= 0) {
3738 int element = buf->next_element_to_fill;
3739 buffer->element[element].addr = hdr;
3740 buffer->element[element].length = sizeof(struct qeth_hdr) +
3741 hd_len;
3742 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
3743 buf->is_header[element] = 1;
3744 buf->next_element_to_fill++;
3745 }
3746
3747 __qeth_fill_buffer(skb, buffer, large_send,
3748 (int *)&buf->next_element_to_fill, offset);
3749
3750 if (!queue->do_pack) {
3751 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
3752 /* set state to PRIMED -> will be flushed */
3753 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3754 flush_cnt = 1;
3755 } else {
3756 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
3757 if (queue->card->options.performance_stats)
3758 queue->card->perf_stats.skbs_sent_pack++;
3759 if (buf->next_element_to_fill >=
3760 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3761 /*
3762 * packed buffer if full -> set state PRIMED
3763 * -> will be flushed
3764 */
3765 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3766 flush_cnt = 1;
3767 }
3768 }
3769 return flush_cnt;
3770 }
3771
3772 int qeth_do_send_packet_fast(struct qeth_card *card,
3773 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3774 struct qeth_hdr *hdr, int elements_needed,
3775 int offset, int hd_len)
3776 {
3777 struct qeth_qdio_out_buffer *buffer;
3778 int index;
3779
3780 /* spin until we get the queue ... */
3781 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3782 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3783 /* ... now we've got the queue */
3784 index = queue->next_buf_to_fill;
3785 buffer = queue->bufs[queue->next_buf_to_fill];
3786 /*
3787 * check if buffer is empty to make sure that we do not 'overtake'
3788 * ourselves and try to fill a buffer that is already primed
3789 */
3790 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3791 goto out;
3792 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3793 QDIO_MAX_BUFFERS_PER_Q;
3794 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3795 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3796 qeth_flush_buffers(queue, index, 1);
3797 return 0;
3798 out:
3799 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3800 return -EBUSY;
3801 }
3802 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3803
3804 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3805 struct sk_buff *skb, struct qeth_hdr *hdr,
3806 int elements_needed)
3807 {
3808 struct qeth_qdio_out_buffer *buffer;
3809 int start_index;
3810 int flush_count = 0;
3811 int do_pack = 0;
3812 int tmp;
3813 int rc = 0;
3814
3815 /* spin until we get the queue ... */
3816 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3817 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3818 start_index = queue->next_buf_to_fill;
3819 buffer = queue->bufs[queue->next_buf_to_fill];
3820 /*
3821 * check if buffer is empty to make sure that we do not 'overtake'
3822 * ourselves and try to fill a buffer that is already primed
3823 */
3824 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3825 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3826 return -EBUSY;
3827 }
3828 /* check if we need to switch packing state of this queue */
3829 qeth_switch_to_packing_if_needed(queue);
3830 if (queue->do_pack) {
3831 do_pack = 1;
3832 /* does packet fit in current buffer? */
3833 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3834 buffer->next_element_to_fill) < elements_needed) {
3835 /* ... no -> set state PRIMED */
3836 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3837 flush_count++;
3838 queue->next_buf_to_fill =
3839 (queue->next_buf_to_fill + 1) %
3840 QDIO_MAX_BUFFERS_PER_Q;
3841 buffer = queue->bufs[queue->next_buf_to_fill];
3842 /* we did a step forward, so check buffer state
3843 * again */
3844 if (atomic_read(&buffer->state) !=
3845 QETH_QDIO_BUF_EMPTY) {
3846 qeth_flush_buffers(queue, start_index,
3847 flush_count);
3848 atomic_set(&queue->state,
3849 QETH_OUT_Q_UNLOCKED);
3850 return -EBUSY;
3851 }
3852 }
3853 }
3854 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
3855 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3856 QDIO_MAX_BUFFERS_PER_Q;
3857 flush_count += tmp;
3858 if (flush_count)
3859 qeth_flush_buffers(queue, start_index, flush_count);
3860 else if (!atomic_read(&queue->set_pci_flags_count))
3861 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3862 /*
3863 * queue->state will go from LOCKED -> UNLOCKED or from
3864 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3865 * (switch packing state or flush buffer to get another pci flag out).
3866 * In that case we will enter this loop
3867 */
3868 while (atomic_dec_return(&queue->state)) {
3869 flush_count = 0;
3870 start_index = queue->next_buf_to_fill;
3871 /* check if we can go back to non-packing state */
3872 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3873 /*
3874 * check if we need to flush a packing buffer to get a pci
3875 * flag out on the queue
3876 */
3877 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3878 flush_count += qeth_flush_buffers_on_no_pci(queue);
3879 if (flush_count)
3880 qeth_flush_buffers(queue, start_index, flush_count);
3881 }
3882 /* at this point the queue is UNLOCKED again */
3883 if (queue->card->options.performance_stats && do_pack)
3884 queue->card->perf_stats.bufs_sent_pack += flush_count;
3885
3886 return rc;
3887 }
3888 EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3889
3890 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3891 struct qeth_reply *reply, unsigned long data)
3892 {
3893 struct qeth_ipa_cmd *cmd;
3894 struct qeth_ipacmd_setadpparms *setparms;
3895
3896 QETH_CARD_TEXT(card, 4, "prmadpcb");
3897
3898 cmd = (struct qeth_ipa_cmd *) data;
3899 setparms = &(cmd->data.setadapterparms);
3900
3901 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3902 if (cmd->hdr.return_code) {
3903 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
3904 setparms->data.mode = SET_PROMISC_MODE_OFF;
3905 }
3906 card->info.promisc_mode = setparms->data.mode;
3907 return 0;
3908 }
3909
3910 void qeth_setadp_promisc_mode(struct qeth_card *card)
3911 {
3912 enum qeth_ipa_promisc_modes mode;
3913 struct net_device *dev = card->dev;
3914 struct qeth_cmd_buffer *iob;
3915 struct qeth_ipa_cmd *cmd;
3916
3917 QETH_CARD_TEXT(card, 4, "setprom");
3918
3919 if (((dev->flags & IFF_PROMISC) &&
3920 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3921 (!(dev->flags & IFF_PROMISC) &&
3922 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3923 return;
3924 mode = SET_PROMISC_MODE_OFF;
3925 if (dev->flags & IFF_PROMISC)
3926 mode = SET_PROMISC_MODE_ON;
3927 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
3928
3929 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3930 sizeof(struct qeth_ipacmd_setadpparms));
3931 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3932 cmd->data.setadapterparms.data.mode = mode;
3933 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3934 }
3935 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3936
3937 int qeth_change_mtu(struct net_device *dev, int new_mtu)
3938 {
3939 struct qeth_card *card;
3940 char dbf_text[15];
3941
3942 card = dev->ml_priv;
3943
3944 QETH_CARD_TEXT(card, 4, "chgmtu");
3945 sprintf(dbf_text, "%8x", new_mtu);
3946 QETH_CARD_TEXT(card, 4, dbf_text);
3947
3948 if (new_mtu < 64)
3949 return -EINVAL;
3950 if (new_mtu > 65535)
3951 return -EINVAL;
3952 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3953 (!qeth_mtu_is_valid(card, new_mtu)))
3954 return -EINVAL;
3955 dev->mtu = new_mtu;
3956 return 0;
3957 }
3958 EXPORT_SYMBOL_GPL(qeth_change_mtu);
3959
3960 struct net_device_stats *qeth_get_stats(struct net_device *dev)
3961 {
3962 struct qeth_card *card;
3963
3964 card = dev->ml_priv;
3965
3966 QETH_CARD_TEXT(card, 5, "getstat");
3967
3968 return &card->stats;
3969 }
3970 EXPORT_SYMBOL_GPL(qeth_get_stats);
3971
3972 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3973 struct qeth_reply *reply, unsigned long data)
3974 {
3975 struct qeth_ipa_cmd *cmd;
3976
3977 QETH_CARD_TEXT(card, 4, "chgmaccb");
3978
3979 cmd = (struct qeth_ipa_cmd *) data;
3980 if (!card->options.layer2 ||
3981 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3982 memcpy(card->dev->dev_addr,
3983 &cmd->data.setadapterparms.data.change_addr.addr,
3984 OSA_ADDR_LEN);
3985 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3986 }
3987 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3988 return 0;
3989 }
3990
3991 int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3992 {
3993 int rc;
3994 struct qeth_cmd_buffer *iob;
3995 struct qeth_ipa_cmd *cmd;
3996
3997 QETH_CARD_TEXT(card, 4, "chgmac");
3998
3999 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
4000 sizeof(struct qeth_ipacmd_setadpparms));
4001 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4002 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4003 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4004 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4005 card->dev->dev_addr, OSA_ADDR_LEN);
4006 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4007 NULL);
4008 return rc;
4009 }
4010 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4011
4012 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4013 struct qeth_reply *reply, unsigned long data)
4014 {
4015 struct qeth_ipa_cmd *cmd;
4016 struct qeth_set_access_ctrl *access_ctrl_req;
4017
4018 QETH_CARD_TEXT(card, 4, "setaccb");
4019
4020 cmd = (struct qeth_ipa_cmd *) data;
4021 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4022 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4023 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4024 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4025 cmd->data.setadapterparms.hdr.return_code);
4026 switch (cmd->data.setadapterparms.hdr.return_code) {
4027 case SET_ACCESS_CTRL_RC_SUCCESS:
4028 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4029 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4030 {
4031 card->options.isolation = access_ctrl_req->subcmd_code;
4032 if (card->options.isolation == ISOLATION_MODE_NONE) {
4033 dev_info(&card->gdev->dev,
4034 "QDIO data connection isolation is deactivated\n");
4035 } else {
4036 dev_info(&card->gdev->dev,
4037 "QDIO data connection isolation is activated\n");
4038 }
4039 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
4040 card->gdev->dev.kobj.name,
4041 access_ctrl_req->subcmd_code,
4042 cmd->data.setadapterparms.hdr.return_code);
4043 break;
4044 }
4045 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
4046 {
4047 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4048 card->gdev->dev.kobj.name,
4049 access_ctrl_req->subcmd_code,
4050 cmd->data.setadapterparms.hdr.return_code);
4051 dev_err(&card->gdev->dev, "Adapter does not "
4052 "support QDIO data connection isolation\n");
4053
4054 /* ensure isolation mode is "none" */
4055 card->options.isolation = ISOLATION_MODE_NONE;
4056 break;
4057 }
4058 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
4059 {
4060 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4061 card->gdev->dev.kobj.name,
4062 access_ctrl_req->subcmd_code,
4063 cmd->data.setadapterparms.hdr.return_code);
4064 dev_err(&card->gdev->dev,
4065 "Adapter is dedicated. "
4066 "QDIO data connection isolation not supported\n");
4067
4068 /* ensure isolation mode is "none" */
4069 card->options.isolation = ISOLATION_MODE_NONE;
4070 break;
4071 }
4072 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
4073 {
4074 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4075 card->gdev->dev.kobj.name,
4076 access_ctrl_req->subcmd_code,
4077 cmd->data.setadapterparms.hdr.return_code);
4078 dev_err(&card->gdev->dev,
4079 "TSO does not permit QDIO data connection isolation\n");
4080
4081 /* ensure isolation mode is "none" */
4082 card->options.isolation = ISOLATION_MODE_NONE;
4083 break;
4084 }
4085 default:
4086 {
4087 /* this should never happen */
4088 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
4089 "==UNKNOWN\n",
4090 card->gdev->dev.kobj.name,
4091 access_ctrl_req->subcmd_code,
4092 cmd->data.setadapterparms.hdr.return_code);
4093
4094 /* ensure isolation mode is "none" */
4095 card->options.isolation = ISOLATION_MODE_NONE;
4096 break;
4097 }
4098 }
4099 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4100 return 0;
4101 }
4102
4103 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
4104 enum qeth_ipa_isolation_modes isolation)
4105 {
4106 int rc;
4107 struct qeth_cmd_buffer *iob;
4108 struct qeth_ipa_cmd *cmd;
4109 struct qeth_set_access_ctrl *access_ctrl_req;
4110
4111 QETH_CARD_TEXT(card, 4, "setacctl");
4112
4113 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4114 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4115
4116 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4117 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4118 sizeof(struct qeth_set_access_ctrl));
4119 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4120 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4121 access_ctrl_req->subcmd_code = isolation;
4122
4123 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
4124 NULL);
4125 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4126 return rc;
4127 }
4128
4129 int qeth_set_access_ctrl_online(struct qeth_card *card)
4130 {
4131 int rc = 0;
4132
4133 QETH_CARD_TEXT(card, 4, "setactlo");
4134
4135 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4136 card->info.type == QETH_CARD_TYPE_OSX) &&
4137 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
4138 rc = qeth_setadpparms_set_access_ctrl(card,
4139 card->options.isolation);
4140 if (rc) {
4141 QETH_DBF_MESSAGE(3,
4142 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
4143 card->gdev->dev.kobj.name,
4144 rc);
4145 }
4146 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4147 card->options.isolation = ISOLATION_MODE_NONE;
4148
4149 dev_err(&card->gdev->dev, "Adapter does not "
4150 "support QDIO data connection isolation\n");
4151 rc = -EOPNOTSUPP;
4152 }
4153 return rc;
4154 }
4155 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4156
4157 void qeth_tx_timeout(struct net_device *dev)
4158 {
4159 struct qeth_card *card;
4160
4161 card = dev->ml_priv;
4162 QETH_CARD_TEXT(card, 4, "txtimeo");
4163 card->stats.tx_errors++;
4164 qeth_schedule_recovery(card);
4165 }
4166 EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4167
4168 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4169 {
4170 struct qeth_card *card = dev->ml_priv;
4171 int rc = 0;
4172
4173 switch (regnum) {
4174 case MII_BMCR: /* Basic mode control register */
4175 rc = BMCR_FULLDPLX;
4176 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4177 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4178 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4179 rc |= BMCR_SPEED100;
4180 break;
4181 case MII_BMSR: /* Basic mode status register */
4182 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4183 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4184 BMSR_100BASE4;
4185 break;
4186 case MII_PHYSID1: /* PHYS ID 1 */
4187 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4188 dev->dev_addr[2];
4189 rc = (rc >> 5) & 0xFFFF;
4190 break;
4191 case MII_PHYSID2: /* PHYS ID 2 */
4192 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4193 break;
4194 case MII_ADVERTISE: /* Advertisement control reg */
4195 rc = ADVERTISE_ALL;
4196 break;
4197 case MII_LPA: /* Link partner ability reg */
4198 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4199 LPA_100BASE4 | LPA_LPACK;
4200 break;
4201 case MII_EXPANSION: /* Expansion register */
4202 break;
4203 case MII_DCOUNTER: /* disconnect counter */
4204 break;
4205 case MII_FCSCOUNTER: /* false carrier counter */
4206 break;
4207 case MII_NWAYTEST: /* N-way auto-neg test register */
4208 break;
4209 case MII_RERRCOUNTER: /* rx error counter */
4210 rc = card->stats.rx_errors;
4211 break;
4212 case MII_SREVISION: /* silicon revision */
4213 break;
4214 case MII_RESV1: /* reserved 1 */
4215 break;
4216 case MII_LBRERROR: /* loopback, rx, bypass error */
4217 break;
4218 case MII_PHYADDR: /* physical address */
4219 break;
4220 case MII_RESV2: /* reserved 2 */
4221 break;
4222 case MII_TPISTATUS: /* TPI status for 10mbps */
4223 break;
4224 case MII_NCONFIG: /* network interface config */
4225 break;
4226 default:
4227 break;
4228 }
4229 return rc;
4230 }
4231 EXPORT_SYMBOL_GPL(qeth_mdio_read);
4232
4233 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4234 struct qeth_cmd_buffer *iob, int len,
4235 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4236 unsigned long),
4237 void *reply_param)
4238 {
4239 u16 s1, s2;
4240
4241 QETH_CARD_TEXT(card, 4, "sendsnmp");
4242
4243 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4244 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4245 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4246 /* adjust PDU length fields in IPA_PDU_HEADER */
4247 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4248 s2 = (u32) len;
4249 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4250 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4251 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4252 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4253 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4254 reply_cb, reply_param);
4255 }
4256
4257 static int qeth_snmp_command_cb(struct qeth_card *card,
4258 struct qeth_reply *reply, unsigned long sdata)
4259 {
4260 struct qeth_ipa_cmd *cmd;
4261 struct qeth_arp_query_info *qinfo;
4262 struct qeth_snmp_cmd *snmp;
4263 unsigned char *data;
4264 __u16 data_len;
4265
4266 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4267
4268 cmd = (struct qeth_ipa_cmd *) sdata;
4269 data = (unsigned char *)((char *)cmd - reply->offset);
4270 qinfo = (struct qeth_arp_query_info *) reply->param;
4271 snmp = &cmd->data.setadapterparms.data.snmp;
4272
4273 if (cmd->hdr.return_code) {
4274 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
4275 return 0;
4276 }
4277 if (cmd->data.setadapterparms.hdr.return_code) {
4278 cmd->hdr.return_code =
4279 cmd->data.setadapterparms.hdr.return_code;
4280 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
4281 return 0;
4282 }
4283 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4284 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4285 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4286 else
4287 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4288
4289 /* check if there is enough room in userspace */
4290 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
4291 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
4292 cmd->hdr.return_code = -ENOMEM;
4293 return 0;
4294 }
4295 QETH_CARD_TEXT_(card, 4, "snore%i",
4296 cmd->data.setadapterparms.hdr.used_total);
4297 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4298 cmd->data.setadapterparms.hdr.seq_no);
4299 /*copy entries to user buffer*/
4300 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4301 memcpy(qinfo->udata + qinfo->udata_offset,
4302 (char *)snmp,
4303 data_len + offsetof(struct qeth_snmp_cmd, data));
4304 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4305 } else {
4306 memcpy(qinfo->udata + qinfo->udata_offset,
4307 (char *)&snmp->request, data_len);
4308 }
4309 qinfo->udata_offset += data_len;
4310 /* check if all replies received ... */
4311 QETH_CARD_TEXT_(card, 4, "srtot%i",
4312 cmd->data.setadapterparms.hdr.used_total);
4313 QETH_CARD_TEXT_(card, 4, "srseq%i",
4314 cmd->data.setadapterparms.hdr.seq_no);
4315 if (cmd->data.setadapterparms.hdr.seq_no <
4316 cmd->data.setadapterparms.hdr.used_total)
4317 return 1;
4318 return 0;
4319 }
4320
4321 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4322 {
4323 struct qeth_cmd_buffer *iob;
4324 struct qeth_ipa_cmd *cmd;
4325 struct qeth_snmp_ureq *ureq;
4326 int req_len;
4327 struct qeth_arp_query_info qinfo = {0, };
4328 int rc = 0;
4329
4330 QETH_CARD_TEXT(card, 3, "snmpcmd");
4331
4332 if (card->info.guestlan)
4333 return -EOPNOTSUPP;
4334
4335 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4336 (!card->options.layer2)) {
4337 return -EOPNOTSUPP;
4338 }
4339 /* skip 4 bytes (data_len struct member) to get req_len */
4340 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4341 return -EFAULT;
4342 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4343 if (IS_ERR(ureq)) {
4344 QETH_CARD_TEXT(card, 2, "snmpnome");
4345 return PTR_ERR(ureq);
4346 }
4347 qinfo.udata_len = ureq->hdr.data_len;
4348 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4349 if (!qinfo.udata) {
4350 kfree(ureq);
4351 return -ENOMEM;
4352 }
4353 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4354
4355 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4356 QETH_SNMP_SETADP_CMDLENGTH + req_len);
4357 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4358 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4359 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4360 qeth_snmp_command_cb, (void *)&qinfo);
4361 if (rc)
4362 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4363 QETH_CARD_IFNAME(card), rc);
4364 else {
4365 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4366 rc = -EFAULT;
4367 }
4368
4369 kfree(ureq);
4370 kfree(qinfo.udata);
4371 return rc;
4372 }
4373 EXPORT_SYMBOL_GPL(qeth_snmp_command);
4374
4375 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
4376 {
4377 switch (card->info.type) {
4378 case QETH_CARD_TYPE_IQD:
4379 return 2;
4380 default:
4381 return 0;
4382 }
4383 }
4384
4385 static void qeth_determine_capabilities(struct qeth_card *card)
4386 {
4387 int rc;
4388 int length;
4389 char *prcd;
4390 struct ccw_device *ddev;
4391 int ddev_offline = 0;
4392
4393 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4394 ddev = CARD_DDEV(card);
4395 if (!ddev->online) {
4396 ddev_offline = 1;
4397 rc = ccw_device_set_online(ddev);
4398 if (rc) {
4399 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4400 goto out;
4401 }
4402 }
4403
4404 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4405 if (rc) {
4406 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4407 dev_name(&card->gdev->dev), rc);
4408 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4409 goto out_offline;
4410 }
4411 qeth_configure_unitaddr(card, prcd);
4412 qeth_configure_blkt_default(card, prcd);
4413 kfree(prcd);
4414
4415 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4416 if (rc)
4417 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4418
4419 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
4420 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
4421 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
4422 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4423 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4424 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4425 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4426 dev_info(&card->gdev->dev,
4427 "Completion Queueing supported\n");
4428 } else {
4429 card->options.cq = QETH_CQ_NOTAVAILABLE;
4430 }
4431
4432
4433 out_offline:
4434 if (ddev_offline == 1)
4435 ccw_device_set_offline(ddev);
4436 out:
4437 return;
4438 }
4439
4440 static inline void qeth_qdio_establish_cq(struct qeth_card *card,
4441 struct qdio_buffer **in_sbal_ptrs,
4442 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
4443 int i;
4444
4445 if (card->options.cq == QETH_CQ_ENABLED) {
4446 int offset = QDIO_MAX_BUFFERS_PER_Q *
4447 (card->qdio.no_in_queues - 1);
4448 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4449 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4450 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4451 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4452 }
4453
4454 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4455 }
4456 }
4457
4458 static int qeth_qdio_establish(struct qeth_card *card)
4459 {
4460 struct qdio_initialize init_data;
4461 char *qib_param_field;
4462 struct qdio_buffer **in_sbal_ptrs;
4463 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4464 struct qdio_buffer **out_sbal_ptrs;
4465 int i, j, k;
4466 int rc = 0;
4467
4468 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4469
4470 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4471 GFP_KERNEL);
4472 if (!qib_param_field) {
4473 rc = -ENOMEM;
4474 goto out_free_nothing;
4475 }
4476
4477 qeth_create_qib_param_field(card, qib_param_field);
4478 qeth_create_qib_param_field_blkt(card, qib_param_field);
4479
4480 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
4481 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4482 GFP_KERNEL);
4483 if (!in_sbal_ptrs) {
4484 rc = -ENOMEM;
4485 goto out_free_qib_param;
4486 }
4487 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4488 in_sbal_ptrs[i] = (struct qdio_buffer *)
4489 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
4490 }
4491
4492 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4493 GFP_KERNEL);
4494 if (!queue_start_poll) {
4495 rc = -ENOMEM;
4496 goto out_free_in_sbals;
4497 }
4498 for (i = 0; i < card->qdio.no_in_queues; ++i)
4499 queue_start_poll[i] = card->discipline.start_poll;
4500
4501 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
4502
4503 out_sbal_ptrs =
4504 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4505 sizeof(void *), GFP_KERNEL);
4506 if (!out_sbal_ptrs) {
4507 rc = -ENOMEM;
4508 goto out_free_queue_start_poll;
4509 }
4510 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4511 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4512 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
4513 card->qdio.out_qs[i]->bufs[j]->buffer);
4514 }
4515
4516 memset(&init_data, 0, sizeof(struct qdio_initialize));
4517 init_data.cdev = CARD_DDEV(card);
4518 init_data.q_format = qeth_get_qdio_q_format(card);
4519 init_data.qib_param_field_format = 0;
4520 init_data.qib_param_field = qib_param_field;
4521 init_data.no_input_qs = card->qdio.no_in_queues;
4522 init_data.no_output_qs = card->qdio.no_out_queues;
4523 init_data.input_handler = card->discipline.input_handler;
4524 init_data.output_handler = card->discipline.output_handler;
4525 init_data.queue_start_poll = queue_start_poll;
4526 init_data.int_parm = (unsigned long) card;
4527 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4528 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
4529 init_data.output_sbal_state_array = card->qdio.out_bufstates;
4530 init_data.scan_threshold =
4531 (card->info.type == QETH_CARD_TYPE_IQD) ? 8 : 32;
4532
4533 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4534 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
4535 rc = qdio_allocate(&init_data);
4536 if (rc) {
4537 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4538 goto out;
4539 }
4540 rc = qdio_establish(&init_data);
4541 if (rc) {
4542 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4543 qdio_free(CARD_DDEV(card));
4544 }
4545 }
4546
4547 switch (card->options.cq) {
4548 case QETH_CQ_ENABLED:
4549 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4550 break;
4551 case QETH_CQ_DISABLED:
4552 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4553 break;
4554 default:
4555 break;
4556 }
4557 out:
4558 kfree(out_sbal_ptrs);
4559 out_free_queue_start_poll:
4560 kfree(queue_start_poll);
4561 out_free_in_sbals:
4562 kfree(in_sbal_ptrs);
4563 out_free_qib_param:
4564 kfree(qib_param_field);
4565 out_free_nothing:
4566 return rc;
4567 }
4568
4569 static void qeth_core_free_card(struct qeth_card *card)
4570 {
4571
4572 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4573 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4574 qeth_clean_channel(&card->read);
4575 qeth_clean_channel(&card->write);
4576 if (card->dev)
4577 free_netdev(card->dev);
4578 kfree(card->ip_tbd_list);
4579 qeth_free_qdio_buffers(card);
4580 unregister_service_level(&card->qeth_service_level);
4581 kfree(card);
4582 }
4583
4584 static struct ccw_device_id qeth_ids[] = {
4585 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4586 .driver_info = QETH_CARD_TYPE_OSD},
4587 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
4588 .driver_info = QETH_CARD_TYPE_IQD},
4589 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
4590 .driver_info = QETH_CARD_TYPE_OSN},
4591 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
4592 .driver_info = QETH_CARD_TYPE_OSM},
4593 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
4594 .driver_info = QETH_CARD_TYPE_OSX},
4595 {},
4596 };
4597 MODULE_DEVICE_TABLE(ccw, qeth_ids);
4598
4599 static struct ccw_driver qeth_ccw_driver = {
4600 .driver = {
4601 .owner = THIS_MODULE,
4602 .name = "qeth",
4603 },
4604 .ids = qeth_ids,
4605 .probe = ccwgroup_probe_ccwdev,
4606 .remove = ccwgroup_remove_ccwdev,
4607 };
4608
4609 static int qeth_core_driver_group(const char *buf, struct device *root_dev,
4610 unsigned long driver_id)
4611 {
4612 return ccwgroup_create_from_string(root_dev, driver_id,
4613 &qeth_ccw_driver, 3, buf);
4614 }
4615
4616 int qeth_core_hardsetup_card(struct qeth_card *card)
4617 {
4618 int retries = 0;
4619 int rc;
4620
4621 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4622 atomic_set(&card->force_alloc_skb, 0);
4623 qeth_get_channel_path_desc(card);
4624 retry:
4625 if (retries)
4626 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
4627 dev_name(&card->gdev->dev));
4628 ccw_device_set_offline(CARD_DDEV(card));
4629 ccw_device_set_offline(CARD_WDEV(card));
4630 ccw_device_set_offline(CARD_RDEV(card));
4631 rc = ccw_device_set_online(CARD_RDEV(card));
4632 if (rc)
4633 goto retriable;
4634 rc = ccw_device_set_online(CARD_WDEV(card));
4635 if (rc)
4636 goto retriable;
4637 rc = ccw_device_set_online(CARD_DDEV(card));
4638 if (rc)
4639 goto retriable;
4640 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
4641 retriable:
4642 if (rc == -ERESTARTSYS) {
4643 QETH_DBF_TEXT(SETUP, 2, "break1");
4644 return rc;
4645 } else if (rc) {
4646 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4647 if (++retries > 3)
4648 goto out;
4649 else
4650 goto retry;
4651 }
4652 qeth_determine_capabilities(card);
4653 qeth_init_tokens(card);
4654 qeth_init_func_level(card);
4655 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
4656 if (rc == -ERESTARTSYS) {
4657 QETH_DBF_TEXT(SETUP, 2, "break2");
4658 return rc;
4659 } else if (rc) {
4660 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4661 if (--retries < 0)
4662 goto out;
4663 else
4664 goto retry;
4665 }
4666 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
4667 if (rc == -ERESTARTSYS) {
4668 QETH_DBF_TEXT(SETUP, 2, "break3");
4669 return rc;
4670 } else if (rc) {
4671 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4672 if (--retries < 0)
4673 goto out;
4674 else
4675 goto retry;
4676 }
4677 card->read_or_write_problem = 0;
4678 rc = qeth_mpc_initialize(card);
4679 if (rc) {
4680 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4681 goto out;
4682 }
4683
4684 card->options.ipa4.supported_funcs = 0;
4685 card->options.adp.supported_funcs = 0;
4686 card->info.diagass_support = 0;
4687 qeth_query_ipassists(card, QETH_PROT_IPV4);
4688 if (qeth_is_supported(card, IPA_SETADAPTERPARMS))
4689 qeth_query_setadapterparms(card);
4690 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST))
4691 qeth_query_setdiagass(card);
4692 return 0;
4693 out:
4694 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
4695 "an error on the device\n");
4696 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
4697 dev_name(&card->gdev->dev), rc);
4698 return rc;
4699 }
4700 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
4701
4702 static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
4703 struct qdio_buffer_element *element,
4704 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
4705 {
4706 struct page *page = virt_to_page(element->addr);
4707 if (*pskb == NULL) {
4708 if (qethbuffer->rx_skb) {
4709 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
4710 *pskb = qethbuffer->rx_skb;
4711 qethbuffer->rx_skb = NULL;
4712 } else {
4713 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
4714 if (!(*pskb))
4715 return -ENOMEM;
4716 }
4717
4718 skb_reserve(*pskb, ETH_HLEN);
4719 if (data_len <= QETH_RX_PULL_LEN) {
4720 memcpy(skb_put(*pskb, data_len), element->addr + offset,
4721 data_len);
4722 } else {
4723 get_page(page);
4724 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
4725 element->addr + offset, QETH_RX_PULL_LEN);
4726 skb_fill_page_desc(*pskb, *pfrag, page,
4727 offset + QETH_RX_PULL_LEN,
4728 data_len - QETH_RX_PULL_LEN);
4729 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
4730 (*pskb)->len += data_len - QETH_RX_PULL_LEN;
4731 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
4732 (*pfrag)++;
4733 }
4734 } else {
4735 get_page(page);
4736 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
4737 (*pskb)->data_len += data_len;
4738 (*pskb)->len += data_len;
4739 (*pskb)->truesize += data_len;
4740 (*pfrag)++;
4741 }
4742
4743
4744 return 0;
4745 }
4746
4747 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
4748 struct qeth_qdio_buffer *qethbuffer,
4749 struct qdio_buffer_element **__element, int *__offset,
4750 struct qeth_hdr **hdr)
4751 {
4752 struct qdio_buffer_element *element = *__element;
4753 struct qdio_buffer *buffer = qethbuffer->buffer;
4754 int offset = *__offset;
4755 struct sk_buff *skb = NULL;
4756 int skb_len = 0;
4757 void *data_ptr;
4758 int data_len;
4759 int headroom = 0;
4760 int use_rx_sg = 0;
4761 int frag = 0;
4762
4763 /* qeth_hdr must not cross element boundaries */
4764 if (element->length < offset + sizeof(struct qeth_hdr)) {
4765 if (qeth_is_last_sbale(element))
4766 return NULL;
4767 element++;
4768 offset = 0;
4769 if (element->length < sizeof(struct qeth_hdr))
4770 return NULL;
4771 }
4772 *hdr = element->addr + offset;
4773
4774 offset += sizeof(struct qeth_hdr);
4775 switch ((*hdr)->hdr.l2.id) {
4776 case QETH_HEADER_TYPE_LAYER2:
4777 skb_len = (*hdr)->hdr.l2.pkt_length;
4778 break;
4779 case QETH_HEADER_TYPE_LAYER3:
4780 skb_len = (*hdr)->hdr.l3.length;
4781 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
4782 (card->info.link_type == QETH_LINK_TYPE_HSTR))
4783 headroom = TR_HLEN;
4784 else
4785 headroom = ETH_HLEN;
4786 break;
4787 case QETH_HEADER_TYPE_OSN:
4788 skb_len = (*hdr)->hdr.osn.pdu_length;
4789 headroom = sizeof(struct qeth_hdr);
4790 break;
4791 default:
4792 break;
4793 }
4794
4795 if (!skb_len)
4796 return NULL;
4797
4798 if (((skb_len >= card->options.rx_sg_cb) &&
4799 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4800 (!atomic_read(&card->force_alloc_skb))) ||
4801 (card->options.cq == QETH_CQ_ENABLED)) {
4802 use_rx_sg = 1;
4803 } else {
4804 skb = dev_alloc_skb(skb_len + headroom);
4805 if (!skb)
4806 goto no_mem;
4807 if (headroom)
4808 skb_reserve(skb, headroom);
4809 }
4810
4811 data_ptr = element->addr + offset;
4812 while (skb_len) {
4813 data_len = min(skb_len, (int)(element->length - offset));
4814 if (data_len) {
4815 if (use_rx_sg) {
4816 if (qeth_create_skb_frag(qethbuffer, element,
4817 &skb, offset, &frag, data_len))
4818 goto no_mem;
4819 } else {
4820 memcpy(skb_put(skb, data_len), data_ptr,
4821 data_len);
4822 }
4823 }
4824 skb_len -= data_len;
4825 if (skb_len) {
4826 if (qeth_is_last_sbale(element)) {
4827 QETH_CARD_TEXT(card, 4, "unexeob");
4828 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4829 dev_kfree_skb_any(skb);
4830 card->stats.rx_errors++;
4831 return NULL;
4832 }
4833 element++;
4834 offset = 0;
4835 data_ptr = element->addr;
4836 } else {
4837 offset += data_len;
4838 }
4839 }
4840 *__element = element;
4841 *__offset = offset;
4842 if (use_rx_sg && card->options.performance_stats) {
4843 card->perf_stats.sg_skbs_rx++;
4844 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4845 }
4846 return skb;
4847 no_mem:
4848 if (net_ratelimit()) {
4849 QETH_CARD_TEXT(card, 2, "noskbmem");
4850 }
4851 card->stats.rx_dropped++;
4852 return NULL;
4853 }
4854 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4855
4856 static void qeth_unregister_dbf_views(void)
4857 {
4858 int x;
4859 for (x = 0; x < QETH_DBF_INFOS; x++) {
4860 debug_unregister(qeth_dbf[x].id);
4861 qeth_dbf[x].id = NULL;
4862 }
4863 }
4864
4865 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
4866 {
4867 char dbf_txt_buf[32];
4868 va_list args;
4869
4870 if (level > id->level)
4871 return;
4872 va_start(args, fmt);
4873 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4874 va_end(args);
4875 debug_text_event(id, level, dbf_txt_buf);
4876 }
4877 EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4878
4879 static int qeth_register_dbf_views(void)
4880 {
4881 int ret;
4882 int x;
4883
4884 for (x = 0; x < QETH_DBF_INFOS; x++) {
4885 /* register the areas */
4886 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4887 qeth_dbf[x].pages,
4888 qeth_dbf[x].areas,
4889 qeth_dbf[x].len);
4890 if (qeth_dbf[x].id == NULL) {
4891 qeth_unregister_dbf_views();
4892 return -ENOMEM;
4893 }
4894
4895 /* register a view */
4896 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4897 if (ret) {
4898 qeth_unregister_dbf_views();
4899 return ret;
4900 }
4901
4902 /* set a passing level */
4903 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4904 }
4905
4906 return 0;
4907 }
4908
4909 int qeth_core_load_discipline(struct qeth_card *card,
4910 enum qeth_discipline_id discipline)
4911 {
4912 int rc = 0;
4913 switch (discipline) {
4914 case QETH_DISCIPLINE_LAYER3:
4915 card->discipline.ccwgdriver = try_then_request_module(
4916 symbol_get(qeth_l3_ccwgroup_driver),
4917 "qeth_l3");
4918 break;
4919 case QETH_DISCIPLINE_LAYER2:
4920 card->discipline.ccwgdriver = try_then_request_module(
4921 symbol_get(qeth_l2_ccwgroup_driver),
4922 "qeth_l2");
4923 break;
4924 }
4925 if (!card->discipline.ccwgdriver) {
4926 dev_err(&card->gdev->dev, "There is no kernel module to "
4927 "support discipline %d\n", discipline);
4928 rc = -EINVAL;
4929 }
4930 return rc;
4931 }
4932
4933 void qeth_core_free_discipline(struct qeth_card *card)
4934 {
4935 if (card->options.layer2)
4936 symbol_put(qeth_l2_ccwgroup_driver);
4937 else
4938 symbol_put(qeth_l3_ccwgroup_driver);
4939 card->discipline.ccwgdriver = NULL;
4940 }
4941
4942 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4943 {
4944 struct qeth_card *card;
4945 struct device *dev;
4946 int rc;
4947 unsigned long flags;
4948 char dbf_name[20];
4949
4950 QETH_DBF_TEXT(SETUP, 2, "probedev");
4951
4952 dev = &gdev->dev;
4953 if (!get_device(dev))
4954 return -ENODEV;
4955
4956 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4957
4958 card = qeth_alloc_card();
4959 if (!card) {
4960 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4961 rc = -ENOMEM;
4962 goto err_dev;
4963 }
4964
4965 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
4966 dev_name(&gdev->dev));
4967 card->debug = debug_register(dbf_name, 2, 1, 8);
4968 if (!card->debug) {
4969 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
4970 rc = -ENOMEM;
4971 goto err_card;
4972 }
4973 debug_register_view(card->debug, &debug_hex_ascii_view);
4974
4975 card->read.ccwdev = gdev->cdev[0];
4976 card->write.ccwdev = gdev->cdev[1];
4977 card->data.ccwdev = gdev->cdev[2];
4978 dev_set_drvdata(&gdev->dev, card);
4979 card->gdev = gdev;
4980 gdev->cdev[0]->handler = qeth_irq;
4981 gdev->cdev[1]->handler = qeth_irq;
4982 gdev->cdev[2]->handler = qeth_irq;
4983
4984 rc = qeth_determine_card_type(card);
4985 if (rc) {
4986 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4987 goto err_dbf;
4988 }
4989 rc = qeth_setup_card(card);
4990 if (rc) {
4991 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4992 goto err_dbf;
4993 }
4994
4995 if (card->info.type == QETH_CARD_TYPE_OSN)
4996 rc = qeth_core_create_osn_attributes(dev);
4997 else
4998 rc = qeth_core_create_device_attributes(dev);
4999 if (rc)
5000 goto err_dbf;
5001 switch (card->info.type) {
5002 case QETH_CARD_TYPE_OSN:
5003 case QETH_CARD_TYPE_OSM:
5004 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
5005 if (rc)
5006 goto err_attr;
5007 rc = card->discipline.ccwgdriver->probe(card->gdev);
5008 if (rc)
5009 goto err_disc;
5010 case QETH_CARD_TYPE_OSD:
5011 case QETH_CARD_TYPE_OSX:
5012 default:
5013 break;
5014 }
5015
5016 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5017 list_add_tail(&card->list, &qeth_core_card_list.list);
5018 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5019
5020 qeth_determine_capabilities(card);
5021 return 0;
5022
5023 err_disc:
5024 qeth_core_free_discipline(card);
5025 err_attr:
5026 if (card->info.type == QETH_CARD_TYPE_OSN)
5027 qeth_core_remove_osn_attributes(dev);
5028 else
5029 qeth_core_remove_device_attributes(dev);
5030 err_dbf:
5031 debug_unregister(card->debug);
5032 err_card:
5033 qeth_core_free_card(card);
5034 err_dev:
5035 put_device(dev);
5036 return rc;
5037 }
5038
5039 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5040 {
5041 unsigned long flags;
5042 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5043
5044 QETH_DBF_TEXT(SETUP, 2, "removedv");
5045
5046 if (card->info.type == QETH_CARD_TYPE_OSN) {
5047 qeth_core_remove_osn_attributes(&gdev->dev);
5048 } else {
5049 qeth_core_remove_device_attributes(&gdev->dev);
5050 }
5051
5052 if (card->discipline.ccwgdriver) {
5053 card->discipline.ccwgdriver->remove(gdev);
5054 qeth_core_free_discipline(card);
5055 }
5056
5057 debug_unregister(card->debug);
5058 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5059 list_del(&card->list);
5060 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5061 qeth_core_free_card(card);
5062 dev_set_drvdata(&gdev->dev, NULL);
5063 put_device(&gdev->dev);
5064 return;
5065 }
5066
5067 static int qeth_core_set_online(struct ccwgroup_device *gdev)
5068 {
5069 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5070 int rc = 0;
5071 int def_discipline;
5072
5073 if (!card->discipline.ccwgdriver) {
5074 if (card->info.type == QETH_CARD_TYPE_IQD)
5075 def_discipline = QETH_DISCIPLINE_LAYER3;
5076 else
5077 def_discipline = QETH_DISCIPLINE_LAYER2;
5078 rc = qeth_core_load_discipline(card, def_discipline);
5079 if (rc)
5080 goto err;
5081 rc = card->discipline.ccwgdriver->probe(card->gdev);
5082 if (rc)
5083 goto err;
5084 }
5085 rc = card->discipline.ccwgdriver->set_online(gdev);
5086 err:
5087 return rc;
5088 }
5089
5090 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5091 {
5092 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5093 return card->discipline.ccwgdriver->set_offline(gdev);
5094 }
5095
5096 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5097 {
5098 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5099 if (card->discipline.ccwgdriver &&
5100 card->discipline.ccwgdriver->shutdown)
5101 card->discipline.ccwgdriver->shutdown(gdev);
5102 }
5103
5104 static int qeth_core_prepare(struct ccwgroup_device *gdev)
5105 {
5106 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5107 if (card->discipline.ccwgdriver &&
5108 card->discipline.ccwgdriver->prepare)
5109 return card->discipline.ccwgdriver->prepare(gdev);
5110 return 0;
5111 }
5112
5113 static void qeth_core_complete(struct ccwgroup_device *gdev)
5114 {
5115 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5116 if (card->discipline.ccwgdriver &&
5117 card->discipline.ccwgdriver->complete)
5118 card->discipline.ccwgdriver->complete(gdev);
5119 }
5120
5121 static int qeth_core_freeze(struct ccwgroup_device *gdev)
5122 {
5123 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5124 if (card->discipline.ccwgdriver &&
5125 card->discipline.ccwgdriver->freeze)
5126 return card->discipline.ccwgdriver->freeze(gdev);
5127 return 0;
5128 }
5129
5130 static int qeth_core_thaw(struct ccwgroup_device *gdev)
5131 {
5132 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5133 if (card->discipline.ccwgdriver &&
5134 card->discipline.ccwgdriver->thaw)
5135 return card->discipline.ccwgdriver->thaw(gdev);
5136 return 0;
5137 }
5138
5139 static int qeth_core_restore(struct ccwgroup_device *gdev)
5140 {
5141 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5142 if (card->discipline.ccwgdriver &&
5143 card->discipline.ccwgdriver->restore)
5144 return card->discipline.ccwgdriver->restore(gdev);
5145 return 0;
5146 }
5147
5148 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
5149 .driver = {
5150 .owner = THIS_MODULE,
5151 .name = "qeth",
5152 },
5153 .driver_id = 0xD8C5E3C8,
5154 .probe = qeth_core_probe_device,
5155 .remove = qeth_core_remove_device,
5156 .set_online = qeth_core_set_online,
5157 .set_offline = qeth_core_set_offline,
5158 .shutdown = qeth_core_shutdown,
5159 .prepare = qeth_core_prepare,
5160 .complete = qeth_core_complete,
5161 .freeze = qeth_core_freeze,
5162 .thaw = qeth_core_thaw,
5163 .restore = qeth_core_restore,
5164 };
5165
5166 static ssize_t
5167 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
5168 size_t count)
5169 {
5170 int err;
5171 err = qeth_core_driver_group(buf, qeth_core_root_dev,
5172 qeth_core_ccwgroup_driver.driver_id);
5173 if (err)
5174 return err;
5175 else
5176 return count;
5177 }
5178
5179 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
5180
5181 static struct {
5182 const char str[ETH_GSTRING_LEN];
5183 } qeth_ethtool_stats_keys[] = {
5184 /* 0 */{"rx skbs"},
5185 {"rx buffers"},
5186 {"tx skbs"},
5187 {"tx buffers"},
5188 {"tx skbs no packing"},
5189 {"tx buffers no packing"},
5190 {"tx skbs packing"},
5191 {"tx buffers packing"},
5192 {"tx sg skbs"},
5193 {"tx sg frags"},
5194 /* 10 */{"rx sg skbs"},
5195 {"rx sg frags"},
5196 {"rx sg page allocs"},
5197 {"tx large kbytes"},
5198 {"tx large count"},
5199 {"tx pk state ch n->p"},
5200 {"tx pk state ch p->n"},
5201 {"tx pk watermark low"},
5202 {"tx pk watermark high"},
5203 {"queue 0 buffer usage"},
5204 /* 20 */{"queue 1 buffer usage"},
5205 {"queue 2 buffer usage"},
5206 {"queue 3 buffer usage"},
5207 {"rx poll time"},
5208 {"rx poll count"},
5209 {"rx do_QDIO time"},
5210 {"rx do_QDIO count"},
5211 {"tx handler time"},
5212 {"tx handler count"},
5213 {"tx time"},
5214 /* 30 */{"tx count"},
5215 {"tx do_QDIO time"},
5216 {"tx do_QDIO count"},
5217 {"tx csum"},
5218 {"tx lin"},
5219 {"cq handler count"},
5220 {"cq handler time"}
5221 };
5222
5223 int qeth_core_get_sset_count(struct net_device *dev, int stringset)
5224 {
5225 switch (stringset) {
5226 case ETH_SS_STATS:
5227 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5228 default:
5229 return -EINVAL;
5230 }
5231 }
5232 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
5233
5234 void qeth_core_get_ethtool_stats(struct net_device *dev,
5235 struct ethtool_stats *stats, u64 *data)
5236 {
5237 struct qeth_card *card = dev->ml_priv;
5238 data[0] = card->stats.rx_packets -
5239 card->perf_stats.initial_rx_packets;
5240 data[1] = card->perf_stats.bufs_rec;
5241 data[2] = card->stats.tx_packets -
5242 card->perf_stats.initial_tx_packets;
5243 data[3] = card->perf_stats.bufs_sent;
5244 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5245 - card->perf_stats.skbs_sent_pack;
5246 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5247 data[6] = card->perf_stats.skbs_sent_pack;
5248 data[7] = card->perf_stats.bufs_sent_pack;
5249 data[8] = card->perf_stats.sg_skbs_sent;
5250 data[9] = card->perf_stats.sg_frags_sent;
5251 data[10] = card->perf_stats.sg_skbs_rx;
5252 data[11] = card->perf_stats.sg_frags_rx;
5253 data[12] = card->perf_stats.sg_alloc_page_rx;
5254 data[13] = (card->perf_stats.large_send_bytes >> 10);
5255 data[14] = card->perf_stats.large_send_cnt;
5256 data[15] = card->perf_stats.sc_dp_p;
5257 data[16] = card->perf_stats.sc_p_dp;
5258 data[17] = QETH_LOW_WATERMARK_PACK;
5259 data[18] = QETH_HIGH_WATERMARK_PACK;
5260 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5261 data[20] = (card->qdio.no_out_queues > 1) ?
5262 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5263 data[21] = (card->qdio.no_out_queues > 2) ?
5264 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5265 data[22] = (card->qdio.no_out_queues > 3) ?
5266 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5267 data[23] = card->perf_stats.inbound_time;
5268 data[24] = card->perf_stats.inbound_cnt;
5269 data[25] = card->perf_stats.inbound_do_qdio_time;
5270 data[26] = card->perf_stats.inbound_do_qdio_cnt;
5271 data[27] = card->perf_stats.outbound_handler_time;
5272 data[28] = card->perf_stats.outbound_handler_cnt;
5273 data[29] = card->perf_stats.outbound_time;
5274 data[30] = card->perf_stats.outbound_cnt;
5275 data[31] = card->perf_stats.outbound_do_qdio_time;
5276 data[32] = card->perf_stats.outbound_do_qdio_cnt;
5277 data[33] = card->perf_stats.tx_csum;
5278 data[34] = card->perf_stats.tx_lin;
5279 data[35] = card->perf_stats.cq_cnt;
5280 data[36] = card->perf_stats.cq_time;
5281 }
5282 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
5283
5284 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5285 {
5286 switch (stringset) {
5287 case ETH_SS_STATS:
5288 memcpy(data, &qeth_ethtool_stats_keys,
5289 sizeof(qeth_ethtool_stats_keys));
5290 break;
5291 default:
5292 WARN_ON(1);
5293 break;
5294 }
5295 }
5296 EXPORT_SYMBOL_GPL(qeth_core_get_strings);
5297
5298 void qeth_core_get_drvinfo(struct net_device *dev,
5299 struct ethtool_drvinfo *info)
5300 {
5301 struct qeth_card *card = dev->ml_priv;
5302 if (card->options.layer2)
5303 strcpy(info->driver, "qeth_l2");
5304 else
5305 strcpy(info->driver, "qeth_l3");
5306
5307 strcpy(info->version, "1.0");
5308 strcpy(info->fw_version, card->info.mcl_level);
5309 sprintf(info->bus_info, "%s/%s/%s",
5310 CARD_RDEV_ID(card),
5311 CARD_WDEV_ID(card),
5312 CARD_DDEV_ID(card));
5313 }
5314 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
5315
5316 int qeth_core_ethtool_get_settings(struct net_device *netdev,
5317 struct ethtool_cmd *ecmd)
5318 {
5319 struct qeth_card *card = netdev->ml_priv;
5320 enum qeth_link_types link_type;
5321
5322 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
5323 link_type = QETH_LINK_TYPE_10GBIT_ETH;
5324 else
5325 link_type = card->info.link_type;
5326
5327 ecmd->transceiver = XCVR_INTERNAL;
5328 ecmd->supported = SUPPORTED_Autoneg;
5329 ecmd->advertising = ADVERTISED_Autoneg;
5330 ecmd->duplex = DUPLEX_FULL;
5331 ecmd->autoneg = AUTONEG_ENABLE;
5332
5333 switch (link_type) {
5334 case QETH_LINK_TYPE_FAST_ETH:
5335 case QETH_LINK_TYPE_LANE_ETH100:
5336 ecmd->supported |= SUPPORTED_10baseT_Half |
5337 SUPPORTED_10baseT_Full |
5338 SUPPORTED_100baseT_Half |
5339 SUPPORTED_100baseT_Full |
5340 SUPPORTED_TP;
5341 ecmd->advertising |= ADVERTISED_10baseT_Half |
5342 ADVERTISED_10baseT_Full |
5343 ADVERTISED_100baseT_Half |
5344 ADVERTISED_100baseT_Full |
5345 ADVERTISED_TP;
5346 ecmd->speed = SPEED_100;
5347 ecmd->port = PORT_TP;
5348 break;
5349
5350 case QETH_LINK_TYPE_GBIT_ETH:
5351 case QETH_LINK_TYPE_LANE_ETH1000:
5352 ecmd->supported |= SUPPORTED_10baseT_Half |
5353 SUPPORTED_10baseT_Full |
5354 SUPPORTED_100baseT_Half |
5355 SUPPORTED_100baseT_Full |
5356 SUPPORTED_1000baseT_Half |
5357 SUPPORTED_1000baseT_Full |
5358 SUPPORTED_FIBRE;
5359 ecmd->advertising |= ADVERTISED_10baseT_Half |
5360 ADVERTISED_10baseT_Full |
5361 ADVERTISED_100baseT_Half |
5362 ADVERTISED_100baseT_Full |
5363 ADVERTISED_1000baseT_Half |
5364 ADVERTISED_1000baseT_Full |
5365 ADVERTISED_FIBRE;
5366 ecmd->speed = SPEED_1000;
5367 ecmd->port = PORT_FIBRE;
5368 break;
5369
5370 case QETH_LINK_TYPE_10GBIT_ETH:
5371 ecmd->supported |= SUPPORTED_10baseT_Half |
5372 SUPPORTED_10baseT_Full |
5373 SUPPORTED_100baseT_Half |
5374 SUPPORTED_100baseT_Full |
5375 SUPPORTED_1000baseT_Half |
5376 SUPPORTED_1000baseT_Full |
5377 SUPPORTED_10000baseT_Full |
5378 SUPPORTED_FIBRE;
5379 ecmd->advertising |= ADVERTISED_10baseT_Half |
5380 ADVERTISED_10baseT_Full |
5381 ADVERTISED_100baseT_Half |
5382 ADVERTISED_100baseT_Full |
5383 ADVERTISED_1000baseT_Half |
5384 ADVERTISED_1000baseT_Full |
5385 ADVERTISED_10000baseT_Full |
5386 ADVERTISED_FIBRE;
5387 ecmd->speed = SPEED_10000;
5388 ecmd->port = PORT_FIBRE;
5389 break;
5390
5391 default:
5392 ecmd->supported |= SUPPORTED_10baseT_Half |
5393 SUPPORTED_10baseT_Full |
5394 SUPPORTED_TP;
5395 ecmd->advertising |= ADVERTISED_10baseT_Half |
5396 ADVERTISED_10baseT_Full |
5397 ADVERTISED_TP;
5398 ecmd->speed = SPEED_10;
5399 ecmd->port = PORT_TP;
5400 }
5401
5402 return 0;
5403 }
5404 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
5405
5406 static int __init qeth_core_init(void)
5407 {
5408 int rc;
5409
5410 pr_info("loading core functions\n");
5411 INIT_LIST_HEAD(&qeth_core_card_list.list);
5412 rwlock_init(&qeth_core_card_list.rwlock);
5413
5414 rc = qeth_register_dbf_views();
5415 if (rc)
5416 goto out_err;
5417 rc = ccw_driver_register(&qeth_ccw_driver);
5418 if (rc)
5419 goto ccw_err;
5420 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
5421 if (rc)
5422 goto ccwgroup_err;
5423 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
5424 &driver_attr_group);
5425 if (rc)
5426 goto driver_err;
5427 qeth_core_root_dev = root_device_register("qeth");
5428 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
5429 if (rc)
5430 goto register_err;
5431
5432 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
5433 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
5434 if (!qeth_core_header_cache) {
5435 rc = -ENOMEM;
5436 goto slab_err;
5437 }
5438
5439 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
5440 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
5441 if (!qeth_qdio_outbuf_cache) {
5442 rc = -ENOMEM;
5443 goto cqslab_err;
5444 }
5445
5446 return 0;
5447 cqslab_err:
5448 kmem_cache_destroy(qeth_core_header_cache);
5449 slab_err:
5450 root_device_unregister(qeth_core_root_dev);
5451 register_err:
5452 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
5453 &driver_attr_group);
5454 driver_err:
5455 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5456 ccwgroup_err:
5457 ccw_driver_unregister(&qeth_ccw_driver);
5458 ccw_err:
5459 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);
5460 qeth_unregister_dbf_views();
5461 out_err:
5462 pr_err("Initializing the qeth device driver failed\n");
5463 return rc;
5464 }
5465
5466 static void __exit qeth_core_exit(void)
5467 {
5468 root_device_unregister(qeth_core_root_dev);
5469 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
5470 &driver_attr_group);
5471 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5472 ccw_driver_unregister(&qeth_ccw_driver);
5473 kmem_cache_destroy(qeth_qdio_outbuf_cache);
5474 kmem_cache_destroy(qeth_core_header_cache);
5475 qeth_unregister_dbf_views();
5476 pr_info("core functions removed\n");
5477 }
5478
5479 module_init(qeth_core_init);
5480 module_exit(qeth_core_exit);
5481 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
5482 MODULE_DESCRIPTION("qeth core functions");
5483 MODULE_LICENSE("GPL");
Linux 2.6 ibm-acpi/thinkpad-acpi driver git tree