2 * Core driver for WM8400.
4 * Copyright 2008 Wolfson Microelectronics PLC.
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of the
11 * License, or (at your option) any later version.
15 #include <linux/module.h>
16 #include <linux/bug.h>
17 #include <linux/err.h>
18 #include <linux/i2c.h>
19 #include <linux/kernel.h>
20 #include <linux/mfd/core.h>
21 #include <linux/mfd/wm8400-private.h>
22 #include <linux/mfd/wm8400-audio.h>
23 #include <linux/regmap.h>
24 #include <linux/slab.h>
27 u16 readable
; /* Mask of readable bits */
28 u16 writable
; /* Mask of writable bits */
29 u16 vol
; /* Mask of volatile bits */
30 int is_codec
; /* Register controlled by codec reset */
31 u16 default_val
; /* Value on reset */
33 { 0xFFFF, 0xFFFF, 0x0000, 0, 0x6172 }, /* R0 */
34 { 0x7000, 0x0000, 0x8000, 0, 0x0000 }, /* R1 */
35 { 0xFF17, 0xFF17, 0x0000, 0, 0x0000 }, /* R2 */
36 { 0xEBF3, 0xEBF3, 0x0000, 1, 0x6000 }, /* R3 */
37 { 0x3CF3, 0x3CF3, 0x0000, 1, 0x0000 }, /* R4 */
38 { 0xF1F8, 0xF1F8, 0x0000, 1, 0x4050 }, /* R5 */
39 { 0xFC1F, 0xFC1F, 0x0000, 1, 0x4000 }, /* R6 */
40 { 0xDFDE, 0xDFDE, 0x0000, 1, 0x01C8 }, /* R7 */
41 { 0xFCFC, 0xFCFC, 0x0000, 1, 0x0000 }, /* R8 */
42 { 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R9 */
43 { 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R10 */
44 { 0x27F7, 0x27F7, 0x0000, 1, 0x0004 }, /* R11 */
45 { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R12 */
46 { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R13 */
47 { 0x1FEF, 0x1FEF, 0x0000, 1, 0x0000 }, /* R14 */
48 { 0x0163, 0x0163, 0x0000, 1, 0x0100 }, /* R15 */
49 { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R16 */
50 { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R17 */
51 { 0x1FFF, 0x0FFF, 0x0000, 1, 0x0000 }, /* R18 */
52 { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1000 }, /* R19 */
53 { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R20 */
54 { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R21 */
55 { 0x0FDD, 0x0FDD, 0x0000, 1, 0x8000 }, /* R22 */
56 { 0x1FFF, 0x1FFF, 0x0000, 1, 0x0800 }, /* R23 */
57 { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R24 */
58 { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R25 */
59 { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R26 */
60 { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R27 */
61 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R28 */
62 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R29 */
63 { 0x0000, 0x0077, 0x0000, 1, 0x0066 }, /* R30 */
64 { 0x0000, 0x0033, 0x0000, 1, 0x0022 }, /* R31 */
65 { 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R32 */
66 { 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R33 */
67 { 0x0000, 0x0003, 0x0000, 1, 0x0003 }, /* R34 */
68 { 0x0000, 0x01FF, 0x0000, 1, 0x0003 }, /* R35 */
69 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R36 */
70 { 0x0000, 0x003F, 0x0000, 1, 0x0100 }, /* R37 */
71 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R38 */
72 { 0x0000, 0x000F, 0x0000, 0, 0x0000 }, /* R39 */
73 { 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R40 */
74 { 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R41 */
75 { 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R42 */
76 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R43 */
77 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R44 */
78 { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R45 */
79 { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R46 */
80 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R47 */
81 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R48 */
82 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R49 */
83 { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R50 */
84 { 0x0000, 0x01B3, 0x0000, 1, 0x0180 }, /* R51 */
85 { 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R52 */
86 { 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R53 */
87 { 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R54 */
88 { 0x0000, 0x0001, 0x0000, 1, 0x0000 }, /* R55 */
89 { 0x0000, 0x003F, 0x0000, 1, 0x0000 }, /* R56 */
90 { 0x0000, 0x004F, 0x0000, 1, 0x0000 }, /* R57 */
91 { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R58 */
92 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R59 */
93 { 0x1FFF, 0x1FFF, 0x0000, 1, 0x0000 }, /* R60 */
94 { 0xFFFF, 0xFFFF, 0x0000, 1, 0x0000 }, /* R61 */
95 { 0x03FF, 0x03FF, 0x0000, 1, 0x0000 }, /* R62 */
96 { 0x007F, 0x007F, 0x0000, 1, 0x0000 }, /* R63 */
97 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R64 */
98 { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R65 */
99 { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R66 */
100 { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R67 */
101 { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R68 */
102 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R69 */
103 { 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R70 */
104 { 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R71 */
105 { 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R72 */
106 { 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R73 */
107 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R74 */
108 { 0x000E, 0x000E, 0x0000, 0, 0x0008 }, /* R75 */
109 { 0xE00F, 0xE00F, 0x0000, 0, 0x0000 }, /* R76 */
110 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R77 */
111 { 0x03C0, 0x03C0, 0x0000, 0, 0x02C0 }, /* R78 */
112 { 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R79 */
113 { 0xFFFF, 0xFFFF, 0x0000, 0, 0x0000 }, /* R80 */
114 { 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R81 */
115 { 0x2BFF, 0x0000, 0xffff, 0, 0x0000 }, /* R82 */
116 { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R83 */
117 { 0x80FF, 0x80FF, 0x0000, 0, 0x00ff }, /* R84 */
120 static int wm8400_read(struct wm8400
*wm8400
, u8 reg
, int num_regs
, u16
*dest
)
124 BUG_ON(reg
+ num_regs
> ARRAY_SIZE(wm8400
->reg_cache
));
126 /* If there are any volatile reads then read back the entire block */
127 for (i
= reg
; i
< reg
+ num_regs
; i
++)
128 if (reg_data
[i
].vol
) {
129 ret
= regmap_bulk_read(wm8400
->regmap
, reg
, dest
,
134 /* Otherwise use the cache */
135 memcpy(dest
, &wm8400
->reg_cache
[reg
], num_regs
* sizeof(u16
));
140 static int wm8400_write(struct wm8400
*wm8400
, u8 reg
, int num_regs
,
145 BUG_ON(reg
+ num_regs
> ARRAY_SIZE(wm8400
->reg_cache
));
147 for (i
= 0; i
< num_regs
; i
++) {
148 BUG_ON(!reg_data
[reg
+ i
].writable
);
149 wm8400
->reg_cache
[reg
+ i
] = src
[i
];
150 ret
= regmap_write(wm8400
->regmap
, reg
, src
[i
]);
159 * wm8400_reg_read - Single register read
161 * @wm8400: Pointer to wm8400 control structure
162 * @reg: Register to read
166 u16
wm8400_reg_read(struct wm8400
*wm8400
, u8 reg
)
170 mutex_lock(&wm8400
->io_lock
);
172 wm8400_read(wm8400
, reg
, 1, &val
);
174 mutex_unlock(&wm8400
->io_lock
);
178 EXPORT_SYMBOL_GPL(wm8400_reg_read
);
180 int wm8400_block_read(struct wm8400
*wm8400
, u8 reg
, int count
, u16
*data
)
184 mutex_lock(&wm8400
->io_lock
);
186 ret
= wm8400_read(wm8400
, reg
, count
, data
);
188 mutex_unlock(&wm8400
->io_lock
);
192 EXPORT_SYMBOL_GPL(wm8400_block_read
);
195 * wm8400_set_bits - Bitmask write
197 * @wm8400: Pointer to wm8400 control structure
198 * @reg: Register to access
199 * @mask: Mask of bits to change
200 * @val: Value to set for masked bits
202 int wm8400_set_bits(struct wm8400
*wm8400
, u8 reg
, u16 mask
, u16 val
)
207 mutex_lock(&wm8400
->io_lock
);
209 ret
= wm8400_read(wm8400
, reg
, 1, &tmp
);
210 tmp
= (tmp
& ~mask
) | val
;
212 ret
= wm8400_write(wm8400
, reg
, 1, &tmp
);
214 mutex_unlock(&wm8400
->io_lock
);
218 EXPORT_SYMBOL_GPL(wm8400_set_bits
);
221 * wm8400_reset_codec_reg_cache - Reset cached codec registers to
222 * their default values.
224 void wm8400_reset_codec_reg_cache(struct wm8400
*wm8400
)
228 mutex_lock(&wm8400
->io_lock
);
230 /* Reset all codec registers to their initial value */
231 for (i
= 0; i
< ARRAY_SIZE(wm8400
->reg_cache
); i
++)
232 if (reg_data
[i
].is_codec
)
233 wm8400
->reg_cache
[i
] = reg_data
[i
].default_val
;
235 mutex_unlock(&wm8400
->io_lock
);
237 EXPORT_SYMBOL_GPL(wm8400_reset_codec_reg_cache
);
239 static int wm8400_register_codec(struct wm8400
*wm8400
)
241 struct mfd_cell cell
= {
242 .name
= "wm8400-codec",
243 .platform_data
= wm8400
,
244 .pdata_size
= sizeof(*wm8400
),
247 return mfd_add_devices(wm8400
->dev
, -1, &cell
, 1, NULL
, 0);
251 * wm8400_init - Generic initialisation
253 * The WM8400 can be configured as either an I2C or SPI device. Probe
254 * functions for each bus set up the accessors then call into this to
255 * set up the device itself.
257 static int wm8400_init(struct wm8400
*wm8400
,
258 struct wm8400_platform_data
*pdata
)
263 mutex_init(&wm8400
->io_lock
);
265 dev_set_drvdata(wm8400
->dev
, wm8400
);
267 /* Check that this is actually a WM8400 */
268 ret
= regmap_read(wm8400
->regmap
, WM8400_RESET_ID
, &i
);
270 dev_err(wm8400
->dev
, "Chip ID register read failed\n");
273 if (i
!= reg_data
[WM8400_RESET_ID
].default_val
) {
274 dev_err(wm8400
->dev
, "Device is not a WM8400, ID is %x\n",
279 /* We don't know what state the hardware is in and since this
280 * is a PMIC we can't reset it safely so initialise the register
281 * cache from the hardware.
283 ret
= regmap_raw_read(wm8400
->regmap
, 0, wm8400
->reg_cache
,
284 ARRAY_SIZE(wm8400
->reg_cache
));
286 dev_err(wm8400
->dev
, "Register cache read failed\n");
289 for (i
= 0; i
< ARRAY_SIZE(wm8400
->reg_cache
); i
++)
290 wm8400
->reg_cache
[i
] = be16_to_cpu(wm8400
->reg_cache
[i
]);
292 /* If the codec is in reset use hard coded values */
293 if (!(wm8400
->reg_cache
[WM8400_POWER_MANAGEMENT_1
] & WM8400_CODEC_ENA
))
294 for (i
= 0; i
< ARRAY_SIZE(wm8400
->reg_cache
); i
++)
295 if (reg_data
[i
].is_codec
)
296 wm8400
->reg_cache
[i
] = reg_data
[i
].default_val
;
298 ret
= wm8400_read(wm8400
, WM8400_ID
, 1, ®
);
300 dev_err(wm8400
->dev
, "ID register read failed: %d\n", ret
);
303 reg
= (reg
& WM8400_CHIP_REV_MASK
) >> WM8400_CHIP_REV_SHIFT
;
304 dev_info(wm8400
->dev
, "WM8400 revision %x\n", reg
);
306 ret
= wm8400_register_codec(wm8400
);
308 dev_err(wm8400
->dev
, "Failed to register codec\n");
312 if (pdata
&& pdata
->platform_init
) {
313 ret
= pdata
->platform_init(wm8400
->dev
);
315 dev_err(wm8400
->dev
, "Platform init failed: %d\n",
320 dev_warn(wm8400
->dev
, "No platform initialisation supplied\n");
325 mfd_remove_devices(wm8400
->dev
);
329 static void wm8400_release(struct wm8400
*wm8400
)
331 mfd_remove_devices(wm8400
->dev
);
334 static const struct regmap_config wm8400_regmap_config
= {
337 .max_register
= WM8400_REGISTER_COUNT
- 1,
340 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
341 static int wm8400_i2c_probe(struct i2c_client
*i2c
,
342 const struct i2c_device_id
*id
)
344 struct wm8400
*wm8400
;
347 wm8400
= kzalloc(sizeof(struct wm8400
), GFP_KERNEL
);
348 if (wm8400
== NULL
) {
353 wm8400
->regmap
= regmap_init_i2c(i2c
, &wm8400_regmap_config
);
354 if (IS_ERR(wm8400
->regmap
)) {
355 ret
= PTR_ERR(wm8400
->regmap
);
359 wm8400
->dev
= &i2c
->dev
;
360 i2c_set_clientdata(i2c
, wm8400
);
362 ret
= wm8400_init(wm8400
, i2c
->dev
.platform_data
);
369 regmap_exit(wm8400
->regmap
);
376 static int wm8400_i2c_remove(struct i2c_client
*i2c
)
378 struct wm8400
*wm8400
= i2c_get_clientdata(i2c
);
380 wm8400_release(wm8400
);
381 regmap_exit(wm8400
->regmap
);
387 static const struct i2c_device_id wm8400_i2c_id
[] = {
391 MODULE_DEVICE_TABLE(i2c
, wm8400_i2c_id
);
393 static struct i2c_driver wm8400_i2c_driver
= {
396 .owner
= THIS_MODULE
,
398 .probe
= wm8400_i2c_probe
,
399 .remove
= wm8400_i2c_remove
,
400 .id_table
= wm8400_i2c_id
,
404 static int __init
wm8400_module_init(void)
408 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
409 ret
= i2c_add_driver(&wm8400_i2c_driver
);
411 pr_err("Failed to register I2C driver: %d\n", ret
);
416 subsys_initcall(wm8400_module_init
);
418 static void __exit
wm8400_module_exit(void)
420 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
421 i2c_del_driver(&wm8400_i2c_driver
);
424 module_exit(wm8400_module_exit
);
426 MODULE_LICENSE("GPL");
427 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");